1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Common boot and setup code for both 32-bit and 64-bit.
4  * Extracted from arch/powerpc/kernel/setup_64.c.
5  *
6  * Copyright (C) 2001 PPC64 Team, IBM Corp
7  */
8 
9 #undef DEBUG
10 
11 #include <linux/export.h>
12 #include <linux/string.h>
13 #include <linux/sched.h>
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/reboot.h>
17 #include <linux/delay.h>
18 #include <linux/initrd.h>
19 #include <linux/platform_device.h>
20 #include <linux/seq_file.h>
21 #include <linux/ioport.h>
22 #include <linux/console.h>
23 #include <linux/screen_info.h>
24 #include <linux/root_dev.h>
25 #include <linux/notifier.h>
26 #include <linux/cpu.h>
27 #include <linux/unistd.h>
28 #include <linux/serial.h>
29 #include <linux/serial_8250.h>
30 #include <linux/percpu.h>
31 #include <linux/memblock.h>
32 #include <linux/of_platform.h>
33 #include <linux/hugetlb.h>
34 #include <linux/pgtable.h>
35 #include <asm/debugfs.h>
36 #include <asm/io.h>
37 #include <asm/paca.h>
38 #include <asm/prom.h>
39 #include <asm/processor.h>
40 #include <asm/vdso_datapage.h>
41 #include <asm/smp.h>
42 #include <asm/elf.h>
43 #include <asm/machdep.h>
44 #include <asm/time.h>
45 #include <asm/cputable.h>
46 #include <asm/sections.h>
47 #include <asm/firmware.h>
48 #include <asm/btext.h>
49 #include <asm/nvram.h>
50 #include <asm/setup.h>
51 #include <asm/rtas.h>
52 #include <asm/iommu.h>
53 #include <asm/serial.h>
54 #include <asm/cache.h>
55 #include <asm/page.h>
56 #include <asm/mmu.h>
57 #include <asm/xmon.h>
58 #include <asm/cputhreads.h>
59 #include <mm/mmu_decl.h>
60 #include <asm/fadump.h>
61 #include <asm/udbg.h>
62 #include <asm/hugetlb.h>
63 #include <asm/livepatch.h>
64 #include <asm/mmu_context.h>
65 #include <asm/cpu_has_feature.h>
66 #include <asm/kasan.h>
67 #include <asm/mce.h>
68 
69 #include "setup.h"
70 
71 #ifdef DEBUG
72 #define DBG(fmt...) udbg_printf(fmt)
73 #else
74 #define DBG(fmt...)
75 #endif
76 
77 /* The main machine-dep calls structure
78  */
79 struct machdep_calls ppc_md;
80 EXPORT_SYMBOL(ppc_md);
81 struct machdep_calls *machine_id;
82 EXPORT_SYMBOL(machine_id);
83 
84 int boot_cpuid = -1;
85 EXPORT_SYMBOL_GPL(boot_cpuid);
86 
87 /*
88  * These are used in binfmt_elf.c to put aux entries on the stack
89  * for each elf executable being started.
90  */
91 int dcache_bsize;
92 int icache_bsize;
93 
94 unsigned long klimit = (unsigned long) _end;
95 
96 /*
97  * This still seems to be needed... -- paulus
98  */
99 struct screen_info screen_info = {
100 	.orig_x = 0,
101 	.orig_y = 25,
102 	.orig_video_cols = 80,
103 	.orig_video_lines = 25,
104 	.orig_video_isVGA = 1,
105 	.orig_video_points = 16
106 };
107 #if defined(CONFIG_FB_VGA16_MODULE)
108 EXPORT_SYMBOL(screen_info);
109 #endif
110 
111 /* Variables required to store legacy IO irq routing */
112 int of_i8042_kbd_irq;
113 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
114 int of_i8042_aux_irq;
115 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
116 
117 #ifdef __DO_IRQ_CANON
118 /* XXX should go elsewhere eventually */
119 int ppc_do_canonicalize_irqs;
120 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
121 #endif
122 
123 #ifdef CONFIG_CRASH_CORE
124 /* This keeps a track of which one is the crashing cpu. */
125 int crashing_cpu = -1;
126 #endif
127 
128 /* also used by kexec */
129 void machine_shutdown(void)
130 {
131 	/*
132 	 * if fadump is active, cleanup the fadump registration before we
133 	 * shutdown.
134 	 */
135 	fadump_cleanup();
136 
137 	if (ppc_md.machine_shutdown)
138 		ppc_md.machine_shutdown();
139 }
140 
141 static void machine_hang(void)
142 {
143 	pr_emerg("System Halted, OK to turn off power\n");
144 	local_irq_disable();
145 	while (1)
146 		;
147 }
148 
149 void machine_restart(char *cmd)
150 {
151 	machine_shutdown();
152 	if (ppc_md.restart)
153 		ppc_md.restart(cmd);
154 
155 	smp_send_stop();
156 
157 	do_kernel_restart(cmd);
158 	mdelay(1000);
159 
160 	machine_hang();
161 }
162 
163 void machine_power_off(void)
164 {
165 	machine_shutdown();
166 	if (pm_power_off)
167 		pm_power_off();
168 
169 	smp_send_stop();
170 	machine_hang();
171 }
172 /* Used by the G5 thermal driver */
173 EXPORT_SYMBOL_GPL(machine_power_off);
174 
175 void (*pm_power_off)(void);
176 EXPORT_SYMBOL_GPL(pm_power_off);
177 
178 void machine_halt(void)
179 {
180 	machine_shutdown();
181 	if (ppc_md.halt)
182 		ppc_md.halt();
183 
184 	smp_send_stop();
185 	machine_hang();
186 }
187 
188 #ifdef CONFIG_SMP
189 DEFINE_PER_CPU(unsigned int, cpu_pvr);
190 #endif
191 
192 static void show_cpuinfo_summary(struct seq_file *m)
193 {
194 	struct device_node *root;
195 	const char *model = NULL;
196 	unsigned long bogosum = 0;
197 	int i;
198 
199 	if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) {
200 		for_each_online_cpu(i)
201 			bogosum += loops_per_jiffy;
202 		seq_printf(m, "total bogomips\t: %lu.%02lu\n",
203 			   bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100);
204 	}
205 	seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
206 	if (ppc_md.name)
207 		seq_printf(m, "platform\t: %s\n", ppc_md.name);
208 	root = of_find_node_by_path("/");
209 	if (root)
210 		model = of_get_property(root, "model", NULL);
211 	if (model)
212 		seq_printf(m, "model\t\t: %s\n", model);
213 	of_node_put(root);
214 
215 	if (ppc_md.show_cpuinfo != NULL)
216 		ppc_md.show_cpuinfo(m);
217 
218 	/* Display the amount of memory */
219 	if (IS_ENABLED(CONFIG_PPC32))
220 		seq_printf(m, "Memory\t\t: %d MB\n",
221 			   (unsigned int)(total_memory / (1024 * 1024)));
222 }
223 
224 static int show_cpuinfo(struct seq_file *m, void *v)
225 {
226 	unsigned long cpu_id = (unsigned long)v - 1;
227 	unsigned int pvr;
228 	unsigned long proc_freq;
229 	unsigned short maj;
230 	unsigned short min;
231 
232 #ifdef CONFIG_SMP
233 	pvr = per_cpu(cpu_pvr, cpu_id);
234 #else
235 	pvr = mfspr(SPRN_PVR);
236 #endif
237 	maj = (pvr >> 8) & 0xFF;
238 	min = pvr & 0xFF;
239 
240 	seq_printf(m, "processor\t: %lu\ncpu\t\t: ", cpu_id);
241 
242 	if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
243 		seq_puts(m, cur_cpu_spec->cpu_name);
244 	else
245 		seq_printf(m, "unknown (%08x)", pvr);
246 
247 	if (cpu_has_feature(CPU_FTR_ALTIVEC))
248 		seq_puts(m, ", altivec supported");
249 
250 	seq_putc(m, '\n');
251 
252 #ifdef CONFIG_TAU
253 	if (cpu_has_feature(CPU_FTR_TAU)) {
254 		if (IS_ENABLED(CONFIG_TAU_AVERAGE)) {
255 			/* more straightforward, but potentially misleading */
256 			seq_printf(m,  "temperature \t: %u C (uncalibrated)\n",
257 				   cpu_temp(cpu_id));
258 		} else {
259 			/* show the actual temp sensor range */
260 			u32 temp;
261 			temp = cpu_temp_both(cpu_id);
262 			seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
263 				   temp & 0xff, temp >> 16);
264 		}
265 	}
266 #endif /* CONFIG_TAU */
267 
268 	/*
269 	 * Platforms that have variable clock rates, should implement
270 	 * the method ppc_md.get_proc_freq() that reports the clock
271 	 * rate of a given cpu. The rest can use ppc_proc_freq to
272 	 * report the clock rate that is same across all cpus.
273 	 */
274 	if (ppc_md.get_proc_freq)
275 		proc_freq = ppc_md.get_proc_freq(cpu_id);
276 	else
277 		proc_freq = ppc_proc_freq;
278 
279 	if (proc_freq)
280 		seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
281 			   proc_freq / 1000000, proc_freq % 1000000);
282 
283 	if (ppc_md.show_percpuinfo != NULL)
284 		ppc_md.show_percpuinfo(m, cpu_id);
285 
286 	/* If we are a Freescale core do a simple check so
287 	 * we dont have to keep adding cases in the future */
288 	if (PVR_VER(pvr) & 0x8000) {
289 		switch (PVR_VER(pvr)) {
290 		case 0x8000:	/* 7441/7450/7451, Voyager */
291 		case 0x8001:	/* 7445/7455, Apollo 6 */
292 		case 0x8002:	/* 7447/7457, Apollo 7 */
293 		case 0x8003:	/* 7447A, Apollo 7 PM */
294 		case 0x8004:	/* 7448, Apollo 8 */
295 		case 0x800c:	/* 7410, Nitro */
296 			maj = ((pvr >> 8) & 0xF);
297 			min = PVR_MIN(pvr);
298 			break;
299 		default:	/* e500/book-e */
300 			maj = PVR_MAJ(pvr);
301 			min = PVR_MIN(pvr);
302 			break;
303 		}
304 	} else {
305 		switch (PVR_VER(pvr)) {
306 			case 0x1008:	/* 740P/750P ?? */
307 				maj = ((pvr >> 8) & 0xFF) - 1;
308 				min = pvr & 0xFF;
309 				break;
310 			case 0x004e: /* POWER9 bits 12-15 give chip type */
311 			case 0x0080: /* POWER10 bit 12 gives SMT8/4 */
312 				maj = (pvr >> 8) & 0x0F;
313 				min = pvr & 0xFF;
314 				break;
315 			default:
316 				maj = (pvr >> 8) & 0xFF;
317 				min = pvr & 0xFF;
318 				break;
319 		}
320 	}
321 
322 	seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
323 		   maj, min, PVR_VER(pvr), PVR_REV(pvr));
324 
325 	if (IS_ENABLED(CONFIG_PPC32))
326 		seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ),
327 			   (loops_per_jiffy / (5000 / HZ)) % 100);
328 
329 	seq_putc(m, '\n');
330 
331 	/* If this is the last cpu, print the summary */
332 	if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
333 		show_cpuinfo_summary(m);
334 
335 	return 0;
336 }
337 
338 static void *c_start(struct seq_file *m, loff_t *pos)
339 {
340 	if (*pos == 0)	/* just in case, cpu 0 is not the first */
341 		*pos = cpumask_first(cpu_online_mask);
342 	else
343 		*pos = cpumask_next(*pos - 1, cpu_online_mask);
344 	if ((*pos) < nr_cpu_ids)
345 		return (void *)(unsigned long)(*pos + 1);
346 	return NULL;
347 }
348 
349 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
350 {
351 	(*pos)++;
352 	return c_start(m, pos);
353 }
354 
355 static void c_stop(struct seq_file *m, void *v)
356 {
357 }
358 
359 const struct seq_operations cpuinfo_op = {
360 	.start	= c_start,
361 	.next	= c_next,
362 	.stop	= c_stop,
363 	.show	= show_cpuinfo,
364 };
365 
366 void __init check_for_initrd(void)
367 {
368 #ifdef CONFIG_BLK_DEV_INITRD
369 	DBG(" -> check_for_initrd()  initrd_start=0x%lx  initrd_end=0x%lx\n",
370 	    initrd_start, initrd_end);
371 
372 	/* If we were passed an initrd, set the ROOT_DEV properly if the values
373 	 * look sensible. If not, clear initrd reference.
374 	 */
375 	if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
376 	    initrd_end > initrd_start)
377 		ROOT_DEV = Root_RAM0;
378 	else
379 		initrd_start = initrd_end = 0;
380 
381 	if (initrd_start)
382 		pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
383 
384 	DBG(" <- check_for_initrd()\n");
385 #endif /* CONFIG_BLK_DEV_INITRD */
386 }
387 
388 #ifdef CONFIG_SMP
389 
390 int threads_per_core, threads_per_subcore, threads_shift __read_mostly;
391 cpumask_t threads_core_mask __read_mostly;
392 EXPORT_SYMBOL_GPL(threads_per_core);
393 EXPORT_SYMBOL_GPL(threads_per_subcore);
394 EXPORT_SYMBOL_GPL(threads_shift);
395 EXPORT_SYMBOL_GPL(threads_core_mask);
396 
397 static void __init cpu_init_thread_core_maps(int tpc)
398 {
399 	int i;
400 
401 	threads_per_core = tpc;
402 	threads_per_subcore = tpc;
403 	cpumask_clear(&threads_core_mask);
404 
405 	/* This implementation only supports power of 2 number of threads
406 	 * for simplicity and performance
407 	 */
408 	threads_shift = ilog2(tpc);
409 	BUG_ON(tpc != (1 << threads_shift));
410 
411 	for (i = 0; i < tpc; i++)
412 		cpumask_set_cpu(i, &threads_core_mask);
413 
414 	printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
415 	       tpc, tpc > 1 ? "s" : "");
416 	printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
417 }
418 
419 
420 u32 *cpu_to_phys_id = NULL;
421 
422 /**
423  * setup_cpu_maps - initialize the following cpu maps:
424  *                  cpu_possible_mask
425  *                  cpu_present_mask
426  *
427  * Having the possible map set up early allows us to restrict allocations
428  * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
429  *
430  * We do not initialize the online map here; cpus set their own bits in
431  * cpu_online_mask as they come up.
432  *
433  * This function is valid only for Open Firmware systems.  finish_device_tree
434  * must be called before using this.
435  *
436  * While we're here, we may as well set the "physical" cpu ids in the paca.
437  *
438  * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
439  */
440 void __init smp_setup_cpu_maps(void)
441 {
442 	struct device_node *dn;
443 	int cpu = 0;
444 	int nthreads = 1;
445 
446 	DBG("smp_setup_cpu_maps()\n");
447 
448 	cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32),
449 					__alignof__(u32));
450 	if (!cpu_to_phys_id)
451 		panic("%s: Failed to allocate %zu bytes align=0x%zx\n",
452 		      __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32));
453 
454 	for_each_node_by_type(dn, "cpu") {
455 		const __be32 *intserv;
456 		__be32 cpu_be;
457 		int j, len;
458 
459 		DBG("  * %pOF...\n", dn);
460 
461 		intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
462 				&len);
463 		if (intserv) {
464 			DBG("    ibm,ppc-interrupt-server#s -> %d threads\n",
465 			    nthreads);
466 		} else {
467 			DBG("    no ibm,ppc-interrupt-server#s -> 1 thread\n");
468 			intserv = of_get_property(dn, "reg", &len);
469 			if (!intserv) {
470 				cpu_be = cpu_to_be32(cpu);
471 				/* XXX: what is this? uninitialized?? */
472 				intserv = &cpu_be;	/* assume logical == phys */
473 				len = 4;
474 			}
475 		}
476 
477 		nthreads = len / sizeof(int);
478 
479 		for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
480 			bool avail;
481 
482 			DBG("    thread %d -> cpu %d (hard id %d)\n",
483 			    j, cpu, be32_to_cpu(intserv[j]));
484 
485 			avail = of_device_is_available(dn);
486 			if (!avail)
487 				avail = !of_property_match_string(dn,
488 						"enable-method", "spin-table");
489 
490 			set_cpu_present(cpu, avail);
491 			set_cpu_possible(cpu, true);
492 			cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]);
493 			cpu++;
494 		}
495 
496 		if (cpu >= nr_cpu_ids) {
497 			of_node_put(dn);
498 			break;
499 		}
500 	}
501 
502 	/* If no SMT supported, nthreads is forced to 1 */
503 	if (!cpu_has_feature(CPU_FTR_SMT)) {
504 		DBG("  SMT disabled ! nthreads forced to 1\n");
505 		nthreads = 1;
506 	}
507 
508 #ifdef CONFIG_PPC64
509 	/*
510 	 * On pSeries LPAR, we need to know how many cpus
511 	 * could possibly be added to this partition.
512 	 */
513 	if (firmware_has_feature(FW_FEATURE_LPAR) &&
514 	    (dn = of_find_node_by_path("/rtas"))) {
515 		int num_addr_cell, num_size_cell, maxcpus;
516 		const __be32 *ireg;
517 
518 		num_addr_cell = of_n_addr_cells(dn);
519 		num_size_cell = of_n_size_cells(dn);
520 
521 		ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
522 
523 		if (!ireg)
524 			goto out;
525 
526 		maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
527 
528 		/* Double maxcpus for processors which have SMT capability */
529 		if (cpu_has_feature(CPU_FTR_SMT))
530 			maxcpus *= nthreads;
531 
532 		if (maxcpus > nr_cpu_ids) {
533 			printk(KERN_WARNING
534 			       "Partition configured for %d cpus, "
535 			       "operating system maximum is %u.\n",
536 			       maxcpus, nr_cpu_ids);
537 			maxcpus = nr_cpu_ids;
538 		} else
539 			printk(KERN_INFO "Partition configured for %d cpus.\n",
540 			       maxcpus);
541 
542 		for (cpu = 0; cpu < maxcpus; cpu++)
543 			set_cpu_possible(cpu, true);
544 	out:
545 		of_node_put(dn);
546 	}
547 	vdso_data->processorCount = num_present_cpus();
548 #endif /* CONFIG_PPC64 */
549 
550         /* Initialize CPU <=> thread mapping/
551 	 *
552 	 * WARNING: We assume that the number of threads is the same for
553 	 * every CPU in the system. If that is not the case, then some code
554 	 * here will have to be reworked
555 	 */
556 	cpu_init_thread_core_maps(nthreads);
557 
558 	/* Now that possible cpus are set, set nr_cpu_ids for later use */
559 	setup_nr_cpu_ids();
560 
561 	free_unused_pacas();
562 }
563 #endif /* CONFIG_SMP */
564 
565 #ifdef CONFIG_PCSPKR_PLATFORM
566 static __init int add_pcspkr(void)
567 {
568 	struct device_node *np;
569 	struct platform_device *pd;
570 	int ret;
571 
572 	np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
573 	of_node_put(np);
574 	if (!np)
575 		return -ENODEV;
576 
577 	pd = platform_device_alloc("pcspkr", -1);
578 	if (!pd)
579 		return -ENOMEM;
580 
581 	ret = platform_device_add(pd);
582 	if (ret)
583 		platform_device_put(pd);
584 
585 	return ret;
586 }
587 device_initcall(add_pcspkr);
588 #endif	/* CONFIG_PCSPKR_PLATFORM */
589 
590 void probe_machine(void)
591 {
592 	extern struct machdep_calls __machine_desc_start;
593 	extern struct machdep_calls __machine_desc_end;
594 	unsigned int i;
595 
596 	/*
597 	 * Iterate all ppc_md structures until we find the proper
598 	 * one for the current machine type
599 	 */
600 	DBG("Probing machine type ...\n");
601 
602 	/*
603 	 * Check ppc_md is empty, if not we have a bug, ie, we setup an
604 	 * entry before probe_machine() which will be overwritten
605 	 */
606 	for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
607 		if (((void **)&ppc_md)[i]) {
608 			printk(KERN_ERR "Entry %d in ppc_md non empty before"
609 			       " machine probe !\n", i);
610 		}
611 	}
612 
613 	for (machine_id = &__machine_desc_start;
614 	     machine_id < &__machine_desc_end;
615 	     machine_id++) {
616 		DBG("  %s ...", machine_id->name);
617 		memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
618 		if (ppc_md.probe()) {
619 			DBG(" match !\n");
620 			break;
621 		}
622 		DBG("\n");
623 	}
624 	/* What can we do if we didn't find ? */
625 	if (machine_id >= &__machine_desc_end) {
626 		pr_err("No suitable machine description found !\n");
627 		for (;;);
628 	}
629 
630 	printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
631 }
632 
633 /* Match a class of boards, not a specific device configuration. */
634 int check_legacy_ioport(unsigned long base_port)
635 {
636 	struct device_node *parent, *np = NULL;
637 	int ret = -ENODEV;
638 
639 	switch(base_port) {
640 	case I8042_DATA_REG:
641 		if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
642 			np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
643 		if (np) {
644 			parent = of_get_parent(np);
645 
646 			of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
647 			if (!of_i8042_kbd_irq)
648 				of_i8042_kbd_irq = 1;
649 
650 			of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
651 			if (!of_i8042_aux_irq)
652 				of_i8042_aux_irq = 12;
653 
654 			of_node_put(np);
655 			np = parent;
656 			break;
657 		}
658 		np = of_find_node_by_type(NULL, "8042");
659 		/* Pegasos has no device_type on its 8042 node, look for the
660 		 * name instead */
661 		if (!np)
662 			np = of_find_node_by_name(NULL, "8042");
663 		if (np) {
664 			of_i8042_kbd_irq = 1;
665 			of_i8042_aux_irq = 12;
666 		}
667 		break;
668 	case FDC_BASE: /* FDC1 */
669 		np = of_find_node_by_type(NULL, "fdc");
670 		break;
671 	default:
672 		/* ipmi is supposed to fail here */
673 		break;
674 	}
675 	if (!np)
676 		return ret;
677 	parent = of_get_parent(np);
678 	if (parent) {
679 		if (of_node_is_type(parent, "isa"))
680 			ret = 0;
681 		of_node_put(parent);
682 	}
683 	of_node_put(np);
684 	return ret;
685 }
686 EXPORT_SYMBOL(check_legacy_ioport);
687 
688 static int ppc_panic_event(struct notifier_block *this,
689                              unsigned long event, void *ptr)
690 {
691 	/*
692 	 * panic does a local_irq_disable, but we really
693 	 * want interrupts to be hard disabled.
694 	 */
695 	hard_irq_disable();
696 
697 	/*
698 	 * If firmware-assisted dump has been registered then trigger
699 	 * firmware-assisted dump and let firmware handle everything else.
700 	 */
701 	crash_fadump(NULL, ptr);
702 	if (ppc_md.panic)
703 		ppc_md.panic(ptr);  /* May not return */
704 	return NOTIFY_DONE;
705 }
706 
707 static struct notifier_block ppc_panic_block = {
708 	.notifier_call = ppc_panic_event,
709 	.priority = INT_MIN /* may not return; must be done last */
710 };
711 
712 /*
713  * Dump out kernel offset information on panic.
714  */
715 static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
716 			      void *p)
717 {
718 	pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
719 		 kaslr_offset(), KERNELBASE);
720 
721 	return 0;
722 }
723 
724 static struct notifier_block kernel_offset_notifier = {
725 	.notifier_call = dump_kernel_offset
726 };
727 
728 void __init setup_panic(void)
729 {
730 	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0)
731 		atomic_notifier_chain_register(&panic_notifier_list,
732 					       &kernel_offset_notifier);
733 
734 	/* PPC64 always does a hard irq disable in its panic handler */
735 	if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic)
736 		return;
737 	atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
738 }
739 
740 #ifdef CONFIG_CHECK_CACHE_COHERENCY
741 /*
742  * For platforms that have configurable cache-coherency.  This function
743  * checks that the cache coherency setting of the kernel matches the setting
744  * left by the firmware, as indicated in the device tree.  Since a mismatch
745  * will eventually result in DMA failures, we print * and error and call
746  * BUG() in that case.
747  */
748 
749 #define KERNEL_COHERENCY	(!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE))
750 
751 static int __init check_cache_coherency(void)
752 {
753 	struct device_node *np;
754 	const void *prop;
755 	bool devtree_coherency;
756 
757 	np = of_find_node_by_path("/");
758 	prop = of_get_property(np, "coherency-off", NULL);
759 	of_node_put(np);
760 
761 	devtree_coherency = prop ? false : true;
762 
763 	if (devtree_coherency != KERNEL_COHERENCY) {
764 		printk(KERN_ERR
765 			"kernel coherency:%s != device tree_coherency:%s\n",
766 			KERNEL_COHERENCY ? "on" : "off",
767 			devtree_coherency ? "on" : "off");
768 		BUG();
769 	}
770 
771 	return 0;
772 }
773 
774 late_initcall(check_cache_coherency);
775 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
776 
777 #ifdef CONFIG_DEBUG_FS
778 struct dentry *powerpc_debugfs_root;
779 EXPORT_SYMBOL(powerpc_debugfs_root);
780 
781 static int powerpc_debugfs_init(void)
782 {
783 	powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
784 	return 0;
785 }
786 arch_initcall(powerpc_debugfs_init);
787 #endif
788 
789 void ppc_printk_progress(char *s, unsigned short hex)
790 {
791 	pr_info("%s\n", s);
792 }
793 
794 static __init void print_system_info(void)
795 {
796 	pr_info("-----------------------------------------------------\n");
797 	pr_info("phys_mem_size     = 0x%llx\n",
798 		(unsigned long long)memblock_phys_mem_size());
799 
800 	pr_info("dcache_bsize      = 0x%x\n", dcache_bsize);
801 	pr_info("icache_bsize      = 0x%x\n", icache_bsize);
802 
803 	pr_info("cpu_features      = 0x%016lx\n", cur_cpu_spec->cpu_features);
804 	pr_info("  possible        = 0x%016lx\n",
805 		(unsigned long)CPU_FTRS_POSSIBLE);
806 	pr_info("  always          = 0x%016lx\n",
807 		(unsigned long)CPU_FTRS_ALWAYS);
808 	pr_info("cpu_user_features = 0x%08x 0x%08x\n",
809 		cur_cpu_spec->cpu_user_features,
810 		cur_cpu_spec->cpu_user_features2);
811 	pr_info("mmu_features      = 0x%08x\n", cur_cpu_spec->mmu_features);
812 #ifdef CONFIG_PPC64
813 	pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
814 #ifdef CONFIG_PPC_BOOK3S
815 	pr_info("vmalloc start     = 0x%lx\n", KERN_VIRT_START);
816 	pr_info("IO start          = 0x%lx\n", KERN_IO_START);
817 	pr_info("vmemmap start     = 0x%lx\n", (unsigned long)vmemmap);
818 #endif
819 #endif
820 
821 	if (!early_radix_enabled())
822 		print_system_hash_info();
823 
824 	if (PHYSICAL_START > 0)
825 		pr_info("physical_start    = 0x%llx\n",
826 		       (unsigned long long)PHYSICAL_START);
827 	pr_info("-----------------------------------------------------\n");
828 }
829 
830 #ifdef CONFIG_SMP
831 static void __init smp_setup_pacas(void)
832 {
833 	int cpu;
834 
835 	for_each_possible_cpu(cpu) {
836 		if (cpu == smp_processor_id())
837 			continue;
838 		allocate_paca(cpu);
839 		set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
840 	}
841 
842 	memblock_free(__pa(cpu_to_phys_id), nr_cpu_ids * sizeof(u32));
843 	cpu_to_phys_id = NULL;
844 }
845 #endif
846 
847 /*
848  * Called into from start_kernel this initializes memblock, which is used
849  * to manage page allocation until mem_init is called.
850  */
851 void __init setup_arch(char **cmdline_p)
852 {
853 	kasan_init();
854 
855 	*cmdline_p = boot_command_line;
856 
857 	/* Set a half-reasonable default so udelay does something sensible */
858 	loops_per_jiffy = 500000000 / HZ;
859 
860 	/* Unflatten the device-tree passed by prom_init or kexec */
861 	unflatten_device_tree();
862 
863 	/*
864 	 * Initialize cache line/block info from device-tree (on ppc64) or
865 	 * just cputable (on ppc32).
866 	 */
867 	initialize_cache_info();
868 
869 	/* Initialize RTAS if available. */
870 	rtas_initialize();
871 
872 	/* Check if we have an initrd provided via the device-tree. */
873 	check_for_initrd();
874 
875 	/* Probe the machine type, establish ppc_md. */
876 	probe_machine();
877 
878 	/* Setup panic notifier if requested by the platform. */
879 	setup_panic();
880 
881 	/*
882 	 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
883 	 * it from their respective probe() function.
884 	 */
885 	setup_power_save();
886 
887 	/* Discover standard serial ports. */
888 	find_legacy_serial_ports();
889 
890 	/* Register early console with the printk subsystem. */
891 	register_early_udbg_console();
892 
893 	/* Setup the various CPU maps based on the device-tree. */
894 	smp_setup_cpu_maps();
895 
896 	/* Initialize xmon. */
897 	xmon_setup();
898 
899 	/* Check the SMT related command line arguments (ppc64). */
900 	check_smt_enabled();
901 
902 	/* Parse memory topology */
903 	mem_topology_setup();
904 
905 	/*
906 	 * Release secondary cpus out of their spinloops at 0x60 now that
907 	 * we can map physical -> logical CPU ids.
908 	 *
909 	 * Freescale Book3e parts spin in a loop provided by firmware,
910 	 * so smp_release_cpus() does nothing for them.
911 	 */
912 #ifdef CONFIG_SMP
913 	smp_setup_pacas();
914 
915 	/* On BookE, setup per-core TLB data structures. */
916 	setup_tlb_core_data();
917 #endif
918 
919 	/* Print various info about the machine that has been gathered so far. */
920 	print_system_info();
921 
922 	/* Reserve large chunks of memory for use by CMA for KVM. */
923 	kvm_cma_reserve();
924 
925 	/*  Reserve large chunks of memory for us by CMA for hugetlb */
926 	gigantic_hugetlb_cma_reserve();
927 
928 	klp_init_thread_info(&init_task);
929 
930 	init_mm.start_code = (unsigned long)_stext;
931 	init_mm.end_code = (unsigned long) _etext;
932 	init_mm.end_data = (unsigned long) _edata;
933 	init_mm.brk = klimit;
934 
935 	mm_iommu_init(&init_mm);
936 	irqstack_early_init();
937 	exc_lvl_early_init();
938 	emergency_stack_init();
939 
940 	mce_init();
941 	smp_release_cpus();
942 
943 	initmem_init();
944 
945 	early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
946 
947 	if (ppc_md.setup_arch)
948 		ppc_md.setup_arch();
949 
950 	setup_barrier_nospec();
951 	setup_spectre_v2();
952 
953 	paging_init();
954 
955 	/* Initialize the MMU context management stuff. */
956 	mmu_context_init();
957 
958 	/* Interrupt code needs to be 64K-aligned. */
959 	if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff)
960 		panic("Kernelbase not 64K-aligned (0x%lx)!\n",
961 		      (unsigned long)_stext);
962 }
963