1 /* 2 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation 3 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM 4 * 5 * RTAS specific routines for PCI. 6 * 7 * Based on code from pci.c, chrp_pci.c and pSeries_pci.c 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 */ 23 24 #include <linux/kernel.h> 25 #include <linux/threads.h> 26 #include <linux/pci.h> 27 #include <linux/string.h> 28 #include <linux/init.h> 29 #include <linux/bootmem.h> 30 31 #include <asm/io.h> 32 #include <asm/pgtable.h> 33 #include <asm/irq.h> 34 #include <asm/prom.h> 35 #include <asm/machdep.h> 36 #include <asm/pci-bridge.h> 37 #include <asm/iommu.h> 38 #include <asm/rtas.h> 39 #include <asm/mpic.h> 40 #include <asm/ppc-pci.h> 41 #include <asm/eeh.h> 42 43 /* RTAS tokens */ 44 static int read_pci_config; 45 static int write_pci_config; 46 static int ibm_read_pci_config; 47 static int ibm_write_pci_config; 48 49 static inline int config_access_valid(struct pci_dn *dn, int where) 50 { 51 if (where < 256) 52 return 1; 53 if (where < 4096 && dn->pci_ext_config_space) 54 return 1; 55 56 return 0; 57 } 58 59 static int of_device_available(struct device_node * dn) 60 { 61 const char *status; 62 63 status = of_get_property(dn, "status", NULL); 64 65 if (!status) 66 return 1; 67 68 if (!strcmp(status, "okay")) 69 return 1; 70 71 return 0; 72 } 73 74 int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val) 75 { 76 int returnval = -1; 77 unsigned long buid, addr; 78 int ret; 79 80 if (!pdn) 81 return PCIBIOS_DEVICE_NOT_FOUND; 82 if (!config_access_valid(pdn, where)) 83 return PCIBIOS_BAD_REGISTER_NUMBER; 84 85 addr = rtas_config_addr(pdn->busno, pdn->devfn, where); 86 buid = pdn->phb->buid; 87 if (buid) { 88 ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval, 89 addr, BUID_HI(buid), BUID_LO(buid), size); 90 } else { 91 ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size); 92 } 93 *val = returnval; 94 95 if (ret) 96 return PCIBIOS_DEVICE_NOT_FOUND; 97 98 if (returnval == EEH_IO_ERROR_VALUE(size) && 99 eeh_dn_check_failure (pdn->node, NULL)) 100 return PCIBIOS_DEVICE_NOT_FOUND; 101 102 return PCIBIOS_SUCCESSFUL; 103 } 104 105 static int rtas_pci_read_config(struct pci_bus *bus, 106 unsigned int devfn, 107 int where, int size, u32 *val) 108 { 109 struct device_node *busdn, *dn; 110 111 if (bus->self) 112 busdn = pci_device_to_OF_node(bus->self); 113 else 114 busdn = bus->sysdata; /* must be a phb */ 115 116 /* Search only direct children of the bus */ 117 for (dn = busdn->child; dn; dn = dn->sibling) { 118 struct pci_dn *pdn = PCI_DN(dn); 119 if (pdn && pdn->devfn == devfn 120 && of_device_available(dn)) 121 return rtas_read_config(pdn, where, size, val); 122 } 123 124 return PCIBIOS_DEVICE_NOT_FOUND; 125 } 126 127 int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val) 128 { 129 unsigned long buid, addr; 130 int ret; 131 132 if (!pdn) 133 return PCIBIOS_DEVICE_NOT_FOUND; 134 if (!config_access_valid(pdn, where)) 135 return PCIBIOS_BAD_REGISTER_NUMBER; 136 137 addr = rtas_config_addr(pdn->busno, pdn->devfn, where); 138 buid = pdn->phb->buid; 139 if (buid) { 140 ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, 141 BUID_HI(buid), BUID_LO(buid), size, (ulong) val); 142 } else { 143 ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val); 144 } 145 146 if (ret) 147 return PCIBIOS_DEVICE_NOT_FOUND; 148 149 return PCIBIOS_SUCCESSFUL; 150 } 151 152 static int rtas_pci_write_config(struct pci_bus *bus, 153 unsigned int devfn, 154 int where, int size, u32 val) 155 { 156 struct device_node *busdn, *dn; 157 158 if (bus->self) 159 busdn = pci_device_to_OF_node(bus->self); 160 else 161 busdn = bus->sysdata; /* must be a phb */ 162 163 /* Search only direct children of the bus */ 164 for (dn = busdn->child; dn; dn = dn->sibling) { 165 struct pci_dn *pdn = PCI_DN(dn); 166 if (pdn && pdn->devfn == devfn 167 && of_device_available(dn)) 168 return rtas_write_config(pdn, where, size, val); 169 } 170 return PCIBIOS_DEVICE_NOT_FOUND; 171 } 172 173 struct pci_ops rtas_pci_ops = { 174 .read = rtas_pci_read_config, 175 .write = rtas_pci_write_config, 176 }; 177 178 int is_python(struct device_node *dev) 179 { 180 const char *model = of_get_property(dev, "model", NULL); 181 182 if (model && strstr(model, "Python")) 183 return 1; 184 185 return 0; 186 } 187 188 static void python_countermeasures(struct device_node *dev) 189 { 190 struct resource registers; 191 void __iomem *chip_regs; 192 volatile u32 val; 193 194 if (of_address_to_resource(dev, 0, ®isters)) { 195 printk(KERN_ERR "Can't get address for Python workarounds !\n"); 196 return; 197 } 198 199 /* Python's register file is 1 MB in size. */ 200 chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000); 201 202 /* 203 * Firmware doesn't always clear this bit which is critical 204 * for good performance - Anton 205 */ 206 207 #define PRG_CL_RESET_VALID 0x00010000 208 209 val = in_be32(chip_regs + 0xf6030); 210 if (val & PRG_CL_RESET_VALID) { 211 printk(KERN_INFO "Python workaround: "); 212 val &= ~PRG_CL_RESET_VALID; 213 out_be32(chip_regs + 0xf6030, val); 214 /* 215 * We must read it back for changes to 216 * take effect 217 */ 218 val = in_be32(chip_regs + 0xf6030); 219 printk("reg0: %x\n", val); 220 } 221 222 iounmap(chip_regs); 223 } 224 225 void __init init_pci_config_tokens (void) 226 { 227 read_pci_config = rtas_token("read-pci-config"); 228 write_pci_config = rtas_token("write-pci-config"); 229 ibm_read_pci_config = rtas_token("ibm,read-pci-config"); 230 ibm_write_pci_config = rtas_token("ibm,write-pci-config"); 231 } 232 233 unsigned long __devinit get_phb_buid (struct device_node *phb) 234 { 235 struct resource r; 236 237 if (ibm_read_pci_config == -1) 238 return 0; 239 if (of_address_to_resource(phb, 0, &r)) 240 return 0; 241 return r.start; 242 } 243 244 static int phb_set_bus_ranges(struct device_node *dev, 245 struct pci_controller *phb) 246 { 247 const int *bus_range; 248 unsigned int len; 249 250 bus_range = of_get_property(dev, "bus-range", &len); 251 if (bus_range == NULL || len < 2 * sizeof(int)) { 252 return 1; 253 } 254 255 phb->first_busno = bus_range[0]; 256 phb->last_busno = bus_range[1]; 257 258 return 0; 259 } 260 261 int __devinit rtas_setup_phb(struct pci_controller *phb) 262 { 263 struct device_node *dev = phb->dn; 264 265 if (is_python(dev)) 266 python_countermeasures(dev); 267 268 if (phb_set_bus_ranges(dev, phb)) 269 return 1; 270 271 phb->ops = &rtas_pci_ops; 272 phb->buid = get_phb_buid(dev); 273 274 return 0; 275 } 276 277 void __init find_and_init_phbs(void) 278 { 279 struct device_node *node; 280 struct pci_controller *phb; 281 struct device_node *root = of_find_node_by_path("/"); 282 283 for_each_child_of_node(root, node) { 284 if (node->type == NULL || (strcmp(node->type, "pci") != 0 && 285 strcmp(node->type, "pciex") != 0)) 286 continue; 287 288 phb = pcibios_alloc_controller(node); 289 if (!phb) 290 continue; 291 rtas_setup_phb(phb); 292 pci_process_bridge_OF_ranges(phb, node, 0); 293 isa_bridge_find_early(phb); 294 } 295 296 of_node_put(root); 297 pci_devs_phb_init(); 298 299 /* 300 * pci_probe_only and pci_assign_all_buses can be set via properties 301 * in chosen. 302 */ 303 if (of_chosen) { 304 const int *prop; 305 306 prop = of_get_property(of_chosen, 307 "linux,pci-probe-only", NULL); 308 if (prop) 309 pci_probe_only = *prop; 310 311 #ifdef CONFIG_PPC32 /* Will be made generic soon */ 312 prop = of_get_property(of_chosen, 313 "linux,pci-assign-all-buses", NULL); 314 if (prop && *prop) 315 ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS; 316 #endif /* CONFIG_PPC32 */ 317 } 318 } 319 320 /* RPA-specific bits for removing PHBs */ 321 int pcibios_remove_root_bus(struct pci_controller *phb) 322 { 323 struct pci_bus *b = phb->bus; 324 struct resource *res; 325 int rc, i; 326 327 res = b->resource[0]; 328 if (!res->flags) { 329 printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__, 330 b->name); 331 return 1; 332 } 333 334 rc = pcibios_unmap_io_space(b); 335 if (rc) { 336 printk(KERN_ERR "%s: failed to unmap IO on bus %s\n", 337 __FUNCTION__, b->name); 338 return 1; 339 } 340 341 if (release_resource(res)) { 342 printk(KERN_ERR "%s: failed to release IO on bus %s\n", 343 __FUNCTION__, b->name); 344 return 1; 345 } 346 347 for (i = 1; i < 3; ++i) { 348 res = b->resource[i]; 349 if (!res->flags && i == 0) { 350 printk(KERN_ERR "%s: no MEM resource for PHB %s\n", 351 __FUNCTION__, b->name); 352 return 1; 353 } 354 if (res->flags && release_resource(res)) { 355 printk(KERN_ERR 356 "%s: failed to release IO %d on bus %s\n", 357 __FUNCTION__, i, b->name); 358 return 1; 359 } 360 } 361 362 pcibios_free_controller(phb); 363 364 return 0; 365 } 366 EXPORT_SYMBOL(pcibios_remove_root_bus); 367