xref: /openbmc/linux/arch/powerpc/kernel/rtas_pci.c (revision 87c2ce3b)
1 /*
2  * arch/ppc64/kernel/rtas_pci.c
3  *
4  * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
5  * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
6  *
7  * RTAS specific routines for PCI.
8  *
9  * Based on code from pci.c, chrp_pci.c and pSeries_pci.c
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or
14  * (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
24  */
25 
26 #include <linux/kernel.h>
27 #include <linux/threads.h>
28 #include <linux/pci.h>
29 #include <linux/string.h>
30 #include <linux/init.h>
31 #include <linux/bootmem.h>
32 
33 #include <asm/io.h>
34 #include <asm/pgtable.h>
35 #include <asm/irq.h>
36 #include <asm/prom.h>
37 #include <asm/machdep.h>
38 #include <asm/pci-bridge.h>
39 #include <asm/iommu.h>
40 #include <asm/rtas.h>
41 #include <asm/mpic.h>
42 #include <asm/ppc-pci.h>
43 
44 /* RTAS tokens */
45 static int read_pci_config;
46 static int write_pci_config;
47 static int ibm_read_pci_config;
48 static int ibm_write_pci_config;
49 
50 static inline int config_access_valid(struct pci_dn *dn, int where)
51 {
52 	if (where < 256)
53 		return 1;
54 	if (where < 4096 && dn->pci_ext_config_space)
55 		return 1;
56 
57 	return 0;
58 }
59 
60 static int of_device_available(struct device_node * dn)
61 {
62         char * status;
63 
64         status = get_property(dn, "status", NULL);
65 
66         if (!status)
67                 return 1;
68 
69         if (!strcmp(status, "okay"))
70                 return 1;
71 
72         return 0;
73 }
74 
75 static int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
76 {
77 	int returnval = -1;
78 	unsigned long buid, addr;
79 	int ret;
80 
81 	if (!pdn)
82 		return PCIBIOS_DEVICE_NOT_FOUND;
83 	if (!config_access_valid(pdn, where))
84 		return PCIBIOS_BAD_REGISTER_NUMBER;
85 
86 	addr = ((where & 0xf00) << 20) | (pdn->busno << 16) |
87 		(pdn->devfn << 8) | (where & 0xff);
88 	buid = pdn->phb->buid;
89 	if (buid) {
90 		ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
91 				addr, BUID_HI(buid), BUID_LO(buid), size);
92 	} else {
93 		ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
94 	}
95 	*val = returnval;
96 
97 	if (ret)
98 		return PCIBIOS_DEVICE_NOT_FOUND;
99 
100 	if (returnval == EEH_IO_ERROR_VALUE(size) &&
101 	    eeh_dn_check_failure (pdn->node, NULL))
102 		return PCIBIOS_DEVICE_NOT_FOUND;
103 
104 	return PCIBIOS_SUCCESSFUL;
105 }
106 
107 static int rtas_pci_read_config(struct pci_bus *bus,
108 				unsigned int devfn,
109 				int where, int size, u32 *val)
110 {
111 	struct device_node *busdn, *dn;
112 
113 	if (bus->self)
114 		busdn = pci_device_to_OF_node(bus->self);
115 	else
116 		busdn = bus->sysdata;	/* must be a phb */
117 
118 	/* Search only direct children of the bus */
119 	for (dn = busdn->child; dn; dn = dn->sibling) {
120 		struct pci_dn *pdn = PCI_DN(dn);
121 		if (pdn && pdn->devfn == devfn
122 		    && of_device_available(dn))
123 			return rtas_read_config(pdn, where, size, val);
124 	}
125 
126 	return PCIBIOS_DEVICE_NOT_FOUND;
127 }
128 
129 int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
130 {
131 	unsigned long buid, addr;
132 	int ret;
133 
134 	if (!pdn)
135 		return PCIBIOS_DEVICE_NOT_FOUND;
136 	if (!config_access_valid(pdn, where))
137 		return PCIBIOS_BAD_REGISTER_NUMBER;
138 
139 	addr = ((where & 0xf00) << 20) | (pdn->busno << 16) |
140 		(pdn->devfn << 8) | (where & 0xff);
141 	buid = pdn->phb->buid;
142 	if (buid) {
143 		ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr,
144 			BUID_HI(buid), BUID_LO(buid), size, (ulong) val);
145 	} else {
146 		ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
147 	}
148 
149 	if (ret)
150 		return PCIBIOS_DEVICE_NOT_FOUND;
151 
152 	return PCIBIOS_SUCCESSFUL;
153 }
154 
155 static int rtas_pci_write_config(struct pci_bus *bus,
156 				 unsigned int devfn,
157 				 int where, int size, u32 val)
158 {
159 	struct device_node *busdn, *dn;
160 
161 	if (bus->self)
162 		busdn = pci_device_to_OF_node(bus->self);
163 	else
164 		busdn = bus->sysdata;	/* must be a phb */
165 
166 	/* Search only direct children of the bus */
167 	for (dn = busdn->child; dn; dn = dn->sibling) {
168 		struct pci_dn *pdn = PCI_DN(dn);
169 		if (pdn && pdn->devfn == devfn
170 		    && of_device_available(dn))
171 			return rtas_write_config(pdn, where, size, val);
172 	}
173 	return PCIBIOS_DEVICE_NOT_FOUND;
174 }
175 
176 struct pci_ops rtas_pci_ops = {
177 	rtas_pci_read_config,
178 	rtas_pci_write_config
179 };
180 
181 int is_python(struct device_node *dev)
182 {
183 	char *model = (char *)get_property(dev, "model", NULL);
184 
185 	if (model && strstr(model, "Python"))
186 		return 1;
187 
188 	return 0;
189 }
190 
191 static void python_countermeasures(struct device_node *dev)
192 {
193 	struct resource registers;
194 	void __iomem *chip_regs;
195 	volatile u32 val;
196 
197 	if (of_address_to_resource(dev, 0, &registers)) {
198 		printk(KERN_ERR "Can't get address for Python workarounds !\n");
199 		return;
200 	}
201 
202 	/* Python's register file is 1 MB in size. */
203 	chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000);
204 
205 	/*
206 	 * Firmware doesn't always clear this bit which is critical
207 	 * for good performance - Anton
208 	 */
209 
210 #define PRG_CL_RESET_VALID 0x00010000
211 
212 	val = in_be32(chip_regs + 0xf6030);
213 	if (val & PRG_CL_RESET_VALID) {
214 		printk(KERN_INFO "Python workaround: ");
215 		val &= ~PRG_CL_RESET_VALID;
216 		out_be32(chip_regs + 0xf6030, val);
217 		/*
218 		 * We must read it back for changes to
219 		 * take effect
220 		 */
221 		val = in_be32(chip_regs + 0xf6030);
222 		printk("reg0: %x\n", val);
223 	}
224 
225 	iounmap(chip_regs);
226 }
227 
228 void __init init_pci_config_tokens (void)
229 {
230 	read_pci_config = rtas_token("read-pci-config");
231 	write_pci_config = rtas_token("write-pci-config");
232 	ibm_read_pci_config = rtas_token("ibm,read-pci-config");
233 	ibm_write_pci_config = rtas_token("ibm,write-pci-config");
234 }
235 
236 unsigned long __devinit get_phb_buid (struct device_node *phb)
237 {
238 	int addr_cells;
239 	unsigned int *buid_vals;
240 	unsigned int len;
241 	unsigned long buid;
242 
243 	if (ibm_read_pci_config == -1) return 0;
244 
245 	/* PHB's will always be children of the root node,
246 	 * or so it is promised by the current firmware. */
247 	if (phb->parent == NULL)
248 		return 0;
249 	if (phb->parent->parent)
250 		return 0;
251 
252 	buid_vals = (unsigned int *) get_property(phb, "reg", &len);
253 	if (buid_vals == NULL)
254 		return 0;
255 
256 	addr_cells = prom_n_addr_cells(phb);
257 	if (addr_cells == 1) {
258 		buid = (unsigned long) buid_vals[0];
259 	} else {
260 		buid = (((unsigned long)buid_vals[0]) << 32UL) |
261 			(((unsigned long)buid_vals[1]) & 0xffffffff);
262 	}
263 	return buid;
264 }
265 
266 static int phb_set_bus_ranges(struct device_node *dev,
267 			      struct pci_controller *phb)
268 {
269 	int *bus_range;
270 	unsigned int len;
271 
272 	bus_range = (int *) get_property(dev, "bus-range", &len);
273 	if (bus_range == NULL || len < 2 * sizeof(int)) {
274 		return 1;
275  	}
276 
277 	phb->first_busno =  bus_range[0];
278 	phb->last_busno  =  bus_range[1];
279 
280 	return 0;
281 }
282 
283 static int __devinit setup_phb(struct device_node *dev,
284 			       struct pci_controller *phb)
285 {
286 	if (is_python(dev))
287 		python_countermeasures(dev);
288 
289 	if (phb_set_bus_ranges(dev, phb))
290 		return 1;
291 
292 	phb->ops = &rtas_pci_ops;
293 	phb->buid = get_phb_buid(dev);
294 
295 	return 0;
296 }
297 
298 unsigned long __init find_and_init_phbs(void)
299 {
300 	struct device_node *node;
301 	struct pci_controller *phb;
302 	unsigned int index;
303 	unsigned int root_size_cells = 0;
304 	unsigned int *opprop = NULL;
305 	struct device_node *root = of_find_node_by_path("/");
306 
307 	if (ppc64_interrupt_controller == IC_OPEN_PIC) {
308 		opprop = (unsigned int *)get_property(root,
309 				"platform-open-pic", NULL);
310 	}
311 
312 	root_size_cells = prom_n_size_cells(root);
313 
314 	index = 0;
315 
316 	for (node = of_get_next_child(root, NULL);
317 	     node != NULL;
318 	     node = of_get_next_child(root, node)) {
319 		if (node->type == NULL || strcmp(node->type, "pci") != 0)
320 			continue;
321 
322 		phb = pcibios_alloc_controller(node);
323 		if (!phb)
324 			continue;
325 		setup_phb(node, phb);
326 		pci_process_bridge_OF_ranges(phb, node, 0);
327 		pci_setup_phb_io(phb, index == 0);
328 #ifdef CONFIG_PPC_PSERIES
329 		/* XXX This code need serious fixing ... --BenH */
330 		if (ppc64_interrupt_controller == IC_OPEN_PIC && pSeries_mpic) {
331 			int addr = root_size_cells * (index + 2) - 1;
332 			mpic_assign_isu(pSeries_mpic, index, opprop[addr]);
333 		}
334 #endif
335 		index++;
336 	}
337 
338 	of_node_put(root);
339 	pci_devs_phb_init();
340 
341 	/*
342 	 * pci_probe_only and pci_assign_all_buses can be set via properties
343 	 * in chosen.
344 	 */
345 	if (of_chosen) {
346 		int *prop;
347 
348 		prop = (int *)get_property(of_chosen, "linux,pci-probe-only",
349 					   NULL);
350 		if (prop)
351 			pci_probe_only = *prop;
352 
353 		prop = (int *)get_property(of_chosen,
354 					   "linux,pci-assign-all-buses", NULL);
355 		if (prop)
356 			pci_assign_all_buses = *prop;
357 	}
358 
359 	return 0;
360 }
361 
362 struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
363 {
364 	struct pci_controller *phb;
365 	int primary;
366 
367 	primary = list_empty(&hose_list);
368 	phb = pcibios_alloc_controller(dn);
369 	if (!phb)
370 		return NULL;
371 	setup_phb(dn, phb);
372 	pci_process_bridge_OF_ranges(phb, dn, primary);
373 
374 	pci_setup_phb_io_dynamic(phb, primary);
375 
376 	pci_devs_phb_init_dynamic(phb);
377 	scan_phb(phb);
378 
379 	return phb;
380 }
381 EXPORT_SYMBOL(init_phb_dynamic);
382 
383 /* RPA-specific bits for removing PHBs */
384 int pcibios_remove_root_bus(struct pci_controller *phb)
385 {
386 	struct pci_bus *b = phb->bus;
387 	struct resource *res;
388 	int rc, i;
389 
390 	res = b->resource[0];
391 	if (!res->flags) {
392 		printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__,
393 				b->name);
394 		return 1;
395 	}
396 
397 	rc = unmap_bus_range(b);
398 	if (rc) {
399 		printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
400 			__FUNCTION__, b->name);
401 		return 1;
402 	}
403 
404 	if (release_resource(res)) {
405 		printk(KERN_ERR "%s: failed to release IO on bus %s\n",
406 				__FUNCTION__, b->name);
407 		return 1;
408 	}
409 
410 	for (i = 1; i < 3; ++i) {
411 		res = b->resource[i];
412 		if (!res->flags && i == 0) {
413 			printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
414 				__FUNCTION__, b->name);
415 			return 1;
416 		}
417 		if (res->flags && release_resource(res)) {
418 			printk(KERN_ERR
419 			       "%s: failed to release IO %d on bus %s\n",
420 				__FUNCTION__, i, b->name);
421 			return 1;
422 		}
423 	}
424 
425 	list_del(&phb->list_node);
426 	pcibios_free_controller(phb);
427 
428 	return 0;
429 }
430 EXPORT_SYMBOL(pcibios_remove_root_bus);
431