1 /* 2 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation 3 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM 4 * 5 * RTAS specific routines for PCI. 6 * 7 * Based on code from pci.c, chrp_pci.c and pSeries_pci.c 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 */ 23 24 #include <linux/kernel.h> 25 #include <linux/threads.h> 26 #include <linux/pci.h> 27 #include <linux/string.h> 28 #include <linux/init.h> 29 #include <linux/bootmem.h> 30 31 #include <asm/io.h> 32 #include <asm/pgtable.h> 33 #include <asm/irq.h> 34 #include <asm/prom.h> 35 #include <asm/machdep.h> 36 #include <asm/pci-bridge.h> 37 #include <asm/iommu.h> 38 #include <asm/rtas.h> 39 #include <asm/mpic.h> 40 #include <asm/ppc-pci.h> 41 #include <asm/eeh.h> 42 43 /* RTAS tokens */ 44 static int read_pci_config; 45 static int write_pci_config; 46 static int ibm_read_pci_config; 47 static int ibm_write_pci_config; 48 49 static inline int config_access_valid(struct pci_dn *dn, int where) 50 { 51 if (where < 256) 52 return 1; 53 if (where < 4096 && dn->pci_ext_config_space) 54 return 1; 55 56 return 0; 57 } 58 59 int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val) 60 { 61 int returnval = -1; 62 unsigned long buid, addr; 63 int ret; 64 65 if (!pdn) 66 return PCIBIOS_DEVICE_NOT_FOUND; 67 if (!config_access_valid(pdn, where)) 68 return PCIBIOS_BAD_REGISTER_NUMBER; 69 70 addr = rtas_config_addr(pdn->busno, pdn->devfn, where); 71 buid = pdn->phb->buid; 72 if (buid) { 73 ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval, 74 addr, BUID_HI(buid), BUID_LO(buid), size); 75 } else { 76 ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size); 77 } 78 *val = returnval; 79 80 if (ret) 81 return PCIBIOS_DEVICE_NOT_FOUND; 82 83 if (returnval == EEH_IO_ERROR_VALUE(size) && 84 eeh_dn_check_failure (pdn->node, NULL)) 85 return PCIBIOS_DEVICE_NOT_FOUND; 86 87 return PCIBIOS_SUCCESSFUL; 88 } 89 90 static int rtas_pci_read_config(struct pci_bus *bus, 91 unsigned int devfn, 92 int where, int size, u32 *val) 93 { 94 struct device_node *busdn, *dn; 95 96 if (bus->self) 97 busdn = pci_device_to_OF_node(bus->self); 98 else 99 busdn = bus->sysdata; /* must be a phb */ 100 101 /* Search only direct children of the bus */ 102 for (dn = busdn->child; dn; dn = dn->sibling) { 103 struct pci_dn *pdn = PCI_DN(dn); 104 if (pdn && pdn->devfn == devfn 105 && of_device_is_available(dn)) 106 return rtas_read_config(pdn, where, size, val); 107 } 108 109 return PCIBIOS_DEVICE_NOT_FOUND; 110 } 111 112 int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val) 113 { 114 unsigned long buid, addr; 115 int ret; 116 117 if (!pdn) 118 return PCIBIOS_DEVICE_NOT_FOUND; 119 if (!config_access_valid(pdn, where)) 120 return PCIBIOS_BAD_REGISTER_NUMBER; 121 122 addr = rtas_config_addr(pdn->busno, pdn->devfn, where); 123 buid = pdn->phb->buid; 124 if (buid) { 125 ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, 126 BUID_HI(buid), BUID_LO(buid), size, (ulong) val); 127 } else { 128 ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val); 129 } 130 131 if (ret) 132 return PCIBIOS_DEVICE_NOT_FOUND; 133 134 return PCIBIOS_SUCCESSFUL; 135 } 136 137 static int rtas_pci_write_config(struct pci_bus *bus, 138 unsigned int devfn, 139 int where, int size, u32 val) 140 { 141 struct device_node *busdn, *dn; 142 143 if (bus->self) 144 busdn = pci_device_to_OF_node(bus->self); 145 else 146 busdn = bus->sysdata; /* must be a phb */ 147 148 /* Search only direct children of the bus */ 149 for (dn = busdn->child; dn; dn = dn->sibling) { 150 struct pci_dn *pdn = PCI_DN(dn); 151 if (pdn && pdn->devfn == devfn 152 && of_device_is_available(dn)) 153 return rtas_write_config(pdn, where, size, val); 154 } 155 return PCIBIOS_DEVICE_NOT_FOUND; 156 } 157 158 static struct pci_ops rtas_pci_ops = { 159 .read = rtas_pci_read_config, 160 .write = rtas_pci_write_config, 161 }; 162 163 static int is_python(struct device_node *dev) 164 { 165 const char *model = of_get_property(dev, "model", NULL); 166 167 if (model && strstr(model, "Python")) 168 return 1; 169 170 return 0; 171 } 172 173 static void python_countermeasures(struct device_node *dev) 174 { 175 struct resource registers; 176 void __iomem *chip_regs; 177 volatile u32 val; 178 179 if (of_address_to_resource(dev, 0, ®isters)) { 180 printk(KERN_ERR "Can't get address for Python workarounds !\n"); 181 return; 182 } 183 184 /* Python's register file is 1 MB in size. */ 185 chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000); 186 187 /* 188 * Firmware doesn't always clear this bit which is critical 189 * for good performance - Anton 190 */ 191 192 #define PRG_CL_RESET_VALID 0x00010000 193 194 val = in_be32(chip_regs + 0xf6030); 195 if (val & PRG_CL_RESET_VALID) { 196 printk(KERN_INFO "Python workaround: "); 197 val &= ~PRG_CL_RESET_VALID; 198 out_be32(chip_regs + 0xf6030, val); 199 /* 200 * We must read it back for changes to 201 * take effect 202 */ 203 val = in_be32(chip_regs + 0xf6030); 204 printk("reg0: %x\n", val); 205 } 206 207 iounmap(chip_regs); 208 } 209 210 void __init init_pci_config_tokens (void) 211 { 212 read_pci_config = rtas_token("read-pci-config"); 213 write_pci_config = rtas_token("write-pci-config"); 214 ibm_read_pci_config = rtas_token("ibm,read-pci-config"); 215 ibm_write_pci_config = rtas_token("ibm,write-pci-config"); 216 } 217 218 unsigned long __devinit get_phb_buid (struct device_node *phb) 219 { 220 struct resource r; 221 222 if (ibm_read_pci_config == -1) 223 return 0; 224 if (of_address_to_resource(phb, 0, &r)) 225 return 0; 226 return r.start; 227 } 228 229 static int phb_set_bus_ranges(struct device_node *dev, 230 struct pci_controller *phb) 231 { 232 const int *bus_range; 233 unsigned int len; 234 235 bus_range = of_get_property(dev, "bus-range", &len); 236 if (bus_range == NULL || len < 2 * sizeof(int)) { 237 return 1; 238 } 239 240 phb->first_busno = bus_range[0]; 241 phb->last_busno = bus_range[1]; 242 243 return 0; 244 } 245 246 int __devinit rtas_setup_phb(struct pci_controller *phb) 247 { 248 struct device_node *dev = phb->dn; 249 250 if (is_python(dev)) 251 python_countermeasures(dev); 252 253 if (phb_set_bus_ranges(dev, phb)) 254 return 1; 255 256 phb->ops = &rtas_pci_ops; 257 phb->buid = get_phb_buid(dev); 258 259 return 0; 260 } 261 262 void __init find_and_init_phbs(void) 263 { 264 struct device_node *node; 265 struct pci_controller *phb; 266 struct device_node *root = of_find_node_by_path("/"); 267 268 for_each_child_of_node(root, node) { 269 if (node->type == NULL || (strcmp(node->type, "pci") != 0 && 270 strcmp(node->type, "pciex") != 0)) 271 continue; 272 273 phb = pcibios_alloc_controller(node); 274 if (!phb) 275 continue; 276 rtas_setup_phb(phb); 277 pci_process_bridge_OF_ranges(phb, node, 0); 278 isa_bridge_find_early(phb); 279 } 280 281 of_node_put(root); 282 pci_devs_phb_init(); 283 284 /* 285 * pci_probe_only and pci_assign_all_buses can be set via properties 286 * in chosen. 287 */ 288 if (of_chosen) { 289 const int *prop; 290 291 prop = of_get_property(of_chosen, 292 "linux,pci-probe-only", NULL); 293 if (prop) 294 pci_probe_only = *prop; 295 296 #ifdef CONFIG_PPC32 /* Will be made generic soon */ 297 prop = of_get_property(of_chosen, 298 "linux,pci-assign-all-buses", NULL); 299 if (prop && *prop) 300 ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS; 301 #endif /* CONFIG_PPC32 */ 302 } 303 } 304 305 /* RPA-specific bits for removing PHBs */ 306 int pcibios_remove_root_bus(struct pci_controller *phb) 307 { 308 struct pci_bus *b = phb->bus; 309 struct resource *res; 310 int rc, i; 311 312 res = b->resource[0]; 313 if (!res->flags) { 314 printk(KERN_ERR "%s: no IO resource for PHB %s\n", __func__, 315 b->name); 316 return 1; 317 } 318 319 rc = pcibios_unmap_io_space(b); 320 if (rc) { 321 printk(KERN_ERR "%s: failed to unmap IO on bus %s\n", 322 __func__, b->name); 323 return 1; 324 } 325 326 if (release_resource(res)) { 327 printk(KERN_ERR "%s: failed to release IO on bus %s\n", 328 __func__, b->name); 329 return 1; 330 } 331 332 for (i = 1; i < 3; ++i) { 333 res = b->resource[i]; 334 if (!res->flags && i == 0) { 335 printk(KERN_ERR "%s: no MEM resource for PHB %s\n", 336 __func__, b->name); 337 return 1; 338 } 339 if (res->flags && release_resource(res)) { 340 printk(KERN_ERR 341 "%s: failed to release IO %d on bus %s\n", 342 __func__, i, b->name); 343 return 1; 344 } 345 } 346 347 pcibios_free_controller(phb); 348 349 return 0; 350 } 351 EXPORT_SYMBOL(pcibios_remove_root_bus); 352