1 #undef DEBUG 2 3 #include <linux/kernel.h> 4 #include <linux/string.h> 5 #include <linux/pci_regs.h> 6 #include <linux/module.h> 7 #include <linux/ioport.h> 8 #include <asm/prom.h> 9 #include <asm/pci-bridge.h> 10 11 #ifdef DEBUG 12 #define DBG(fmt...) do { printk(fmt); } while(0) 13 #else 14 #define DBG(fmt...) do { } while(0) 15 #endif 16 17 #ifdef CONFIG_PPC64 18 #define PRu64 "%lx" 19 #else 20 #define PRu64 "%llx" 21 #endif 22 23 /* Max address size we deal with */ 24 #define OF_MAX_ADDR_CELLS 4 25 #define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \ 26 (ns) > 0) 27 28 /* Debug utility */ 29 #ifdef DEBUG 30 static void of_dump_addr(const char *s, u32 *addr, int na) 31 { 32 printk("%s", s); 33 while(na--) 34 printk(" %08x", *(addr++)); 35 printk("\n"); 36 } 37 #else 38 static void of_dump_addr(const char *s, u32 *addr, int na) { } 39 #endif 40 41 /* Read a big address */ 42 static inline u64 of_read_addr(u32 *cell, int size) 43 { 44 u64 r = 0; 45 while (size--) 46 r = (r << 32) | *(cell++); 47 return r; 48 } 49 50 /* Callbacks for bus specific translators */ 51 struct of_bus { 52 const char *name; 53 const char *addresses; 54 int (*match)(struct device_node *parent); 55 void (*count_cells)(struct device_node *child, 56 int *addrc, int *sizec); 57 u64 (*map)(u32 *addr, u32 *range, int na, int ns, int pna); 58 int (*translate)(u32 *addr, u64 offset, int na); 59 unsigned int (*get_flags)(u32 *addr); 60 }; 61 62 63 /* 64 * Default translator (generic bus) 65 */ 66 67 static void of_bus_default_count_cells(struct device_node *dev, 68 int *addrc, int *sizec) 69 { 70 if (addrc) 71 *addrc = prom_n_addr_cells(dev); 72 if (sizec) 73 *sizec = prom_n_size_cells(dev); 74 } 75 76 static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna) 77 { 78 u64 cp, s, da; 79 80 cp = of_read_addr(range, na); 81 s = of_read_addr(range + na + pna, ns); 82 da = of_read_addr(addr, na); 83 84 DBG("OF: default map, cp="PRu64", s="PRu64", da="PRu64"\n", 85 cp, s, da); 86 87 if (da < cp || da >= (cp + s)) 88 return OF_BAD_ADDR; 89 return da - cp; 90 } 91 92 static int of_bus_default_translate(u32 *addr, u64 offset, int na) 93 { 94 u64 a = of_read_addr(addr, na); 95 memset(addr, 0, na * 4); 96 a += offset; 97 if (na > 1) 98 addr[na - 2] = a >> 32; 99 addr[na - 1] = a & 0xffffffffu; 100 101 return 0; 102 } 103 104 static unsigned int of_bus_default_get_flags(u32 *addr) 105 { 106 return IORESOURCE_MEM; 107 } 108 109 110 /* 111 * PCI bus specific translator 112 */ 113 114 static int of_bus_pci_match(struct device_node *np) 115 { 116 return !strcmp(np->type, "pci"); 117 } 118 119 static void of_bus_pci_count_cells(struct device_node *np, 120 int *addrc, int *sizec) 121 { 122 if (addrc) 123 *addrc = 3; 124 if (sizec) 125 *sizec = 2; 126 } 127 128 static u64 of_bus_pci_map(u32 *addr, u32 *range, int na, int ns, int pna) 129 { 130 u64 cp, s, da; 131 132 /* Check address type match */ 133 if ((addr[0] ^ range[0]) & 0x03000000) 134 return OF_BAD_ADDR; 135 136 /* Read address values, skipping high cell */ 137 cp = of_read_addr(range + 1, na - 1); 138 s = of_read_addr(range + na + pna, ns); 139 da = of_read_addr(addr + 1, na - 1); 140 141 DBG("OF: PCI map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da); 142 143 if (da < cp || da >= (cp + s)) 144 return OF_BAD_ADDR; 145 return da - cp; 146 } 147 148 static int of_bus_pci_translate(u32 *addr, u64 offset, int na) 149 { 150 return of_bus_default_translate(addr + 1, offset, na - 1); 151 } 152 153 static unsigned int of_bus_pci_get_flags(u32 *addr) 154 { 155 unsigned int flags = 0; 156 u32 w = addr[0]; 157 158 switch((w >> 24) & 0x03) { 159 case 0x01: 160 flags |= IORESOURCE_IO; 161 case 0x02: /* 32 bits */ 162 case 0x03: /* 64 bits */ 163 flags |= IORESOURCE_MEM; 164 } 165 if (w & 0x40000000) 166 flags |= IORESOURCE_PREFETCH; 167 return flags; 168 } 169 170 /* 171 * ISA bus specific translator 172 */ 173 174 static int of_bus_isa_match(struct device_node *np) 175 { 176 return !strcmp(np->name, "isa"); 177 } 178 179 static void of_bus_isa_count_cells(struct device_node *child, 180 int *addrc, int *sizec) 181 { 182 if (addrc) 183 *addrc = 2; 184 if (sizec) 185 *sizec = 1; 186 } 187 188 static u64 of_bus_isa_map(u32 *addr, u32 *range, int na, int ns, int pna) 189 { 190 u64 cp, s, da; 191 192 /* Check address type match */ 193 if ((addr[0] ^ range[0]) & 0x00000001) 194 return OF_BAD_ADDR; 195 196 /* Read address values, skipping high cell */ 197 cp = of_read_addr(range + 1, na - 1); 198 s = of_read_addr(range + na + pna, ns); 199 da = of_read_addr(addr + 1, na - 1); 200 201 DBG("OF: ISA map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da); 202 203 if (da < cp || da >= (cp + s)) 204 return OF_BAD_ADDR; 205 return da - cp; 206 } 207 208 static int of_bus_isa_translate(u32 *addr, u64 offset, int na) 209 { 210 return of_bus_default_translate(addr + 1, offset, na - 1); 211 } 212 213 static unsigned int of_bus_isa_get_flags(u32 *addr) 214 { 215 unsigned int flags = 0; 216 u32 w = addr[0]; 217 218 if (w & 1) 219 flags |= IORESOURCE_IO; 220 else 221 flags |= IORESOURCE_MEM; 222 return flags; 223 } 224 225 226 /* 227 * Array of bus specific translators 228 */ 229 230 static struct of_bus of_busses[] = { 231 /* PCI */ 232 { 233 .name = "pci", 234 .addresses = "assigned-addresses", 235 .match = of_bus_pci_match, 236 .count_cells = of_bus_pci_count_cells, 237 .map = of_bus_pci_map, 238 .translate = of_bus_pci_translate, 239 .get_flags = of_bus_pci_get_flags, 240 }, 241 /* ISA */ 242 { 243 .name = "isa", 244 .addresses = "reg", 245 .match = of_bus_isa_match, 246 .count_cells = of_bus_isa_count_cells, 247 .map = of_bus_isa_map, 248 .translate = of_bus_isa_translate, 249 .get_flags = of_bus_isa_get_flags, 250 }, 251 /* Default */ 252 { 253 .name = "default", 254 .addresses = "reg", 255 .match = NULL, 256 .count_cells = of_bus_default_count_cells, 257 .map = of_bus_default_map, 258 .translate = of_bus_default_translate, 259 .get_flags = of_bus_default_get_flags, 260 }, 261 }; 262 263 static struct of_bus *of_match_bus(struct device_node *np) 264 { 265 int i; 266 267 for (i = 0; i < ARRAY_SIZE(of_busses); i ++) 268 if (!of_busses[i].match || of_busses[i].match(np)) 269 return &of_busses[i]; 270 BUG(); 271 return NULL; 272 } 273 274 static int of_translate_one(struct device_node *parent, struct of_bus *bus, 275 struct of_bus *pbus, u32 *addr, 276 int na, int ns, int pna) 277 { 278 u32 *ranges; 279 unsigned int rlen; 280 int rone; 281 u64 offset = OF_BAD_ADDR; 282 283 /* Normally, an absence of a "ranges" property means we are 284 * crossing a non-translatable boundary, and thus the addresses 285 * below the current not cannot be converted to CPU physical ones. 286 * Unfortunately, while this is very clear in the spec, it's not 287 * what Apple understood, and they do have things like /uni-n or 288 * /ht nodes with no "ranges" property and a lot of perfectly 289 * useable mapped devices below them. Thus we treat the absence of 290 * "ranges" as equivalent to an empty "ranges" property which means 291 * a 1:1 translation at that level. It's up to the caller not to try 292 * to translate addresses that aren't supposed to be translated in 293 * the first place. --BenH. 294 */ 295 ranges = (u32 *)get_property(parent, "ranges", &rlen); 296 if (ranges == NULL || rlen == 0) { 297 offset = of_read_addr(addr, na); 298 memset(addr, 0, pna * 4); 299 DBG("OF: no ranges, 1:1 translation\n"); 300 goto finish; 301 } 302 303 DBG("OF: walking ranges...\n"); 304 305 /* Now walk through the ranges */ 306 rlen /= 4; 307 rone = na + pna + ns; 308 for (; rlen >= rone; rlen -= rone, ranges += rone) { 309 offset = bus->map(addr, ranges, na, ns, pna); 310 if (offset != OF_BAD_ADDR) 311 break; 312 } 313 if (offset == OF_BAD_ADDR) { 314 DBG("OF: not found !\n"); 315 return 1; 316 } 317 memcpy(addr, ranges + na, 4 * pna); 318 319 finish: 320 of_dump_addr("OF: parent translation for:", addr, pna); 321 DBG("OF: with offset: "PRu64"\n", offset); 322 323 /* Translate it into parent bus space */ 324 return pbus->translate(addr, offset, pna); 325 } 326 327 328 /* 329 * Translate an address from the device-tree into a CPU physical address, 330 * this walks up the tree and applies the various bus mappings on the 331 * way. 332 * 333 * Note: We consider that crossing any level with #size-cells == 0 to mean 334 * that translation is impossible (that is we are not dealing with a value 335 * that can be mapped to a cpu physical address). This is not really specified 336 * that way, but this is traditionally the way IBM at least do things 337 */ 338 u64 of_translate_address(struct device_node *dev, u32 *in_addr) 339 { 340 struct device_node *parent = NULL; 341 struct of_bus *bus, *pbus; 342 u32 addr[OF_MAX_ADDR_CELLS]; 343 int na, ns, pna, pns; 344 u64 result = OF_BAD_ADDR; 345 346 DBG("OF: ** translation for device %s **\n", dev->full_name); 347 348 /* Increase refcount at current level */ 349 of_node_get(dev); 350 351 /* Get parent & match bus type */ 352 parent = of_get_parent(dev); 353 if (parent == NULL) 354 goto bail; 355 bus = of_match_bus(parent); 356 357 /* Cound address cells & copy address locally */ 358 bus->count_cells(dev, &na, &ns); 359 if (!OF_CHECK_COUNTS(na, ns)) { 360 printk(KERN_ERR "prom_parse: Bad cell count for %s\n", 361 dev->full_name); 362 goto bail; 363 } 364 memcpy(addr, in_addr, na * 4); 365 366 DBG("OF: bus is %s (na=%d, ns=%d) on %s\n", 367 bus->name, na, ns, parent->full_name); 368 of_dump_addr("OF: translating address:", addr, na); 369 370 /* Translate */ 371 for (;;) { 372 /* Switch to parent bus */ 373 of_node_put(dev); 374 dev = parent; 375 parent = of_get_parent(dev); 376 377 /* If root, we have finished */ 378 if (parent == NULL) { 379 DBG("OF: reached root node\n"); 380 result = of_read_addr(addr, na); 381 break; 382 } 383 384 /* Get new parent bus and counts */ 385 pbus = of_match_bus(parent); 386 pbus->count_cells(dev, &pna, &pns); 387 if (!OF_CHECK_COUNTS(pna, pns)) { 388 printk(KERN_ERR "prom_parse: Bad cell count for %s\n", 389 dev->full_name); 390 break; 391 } 392 393 DBG("OF: parent bus is %s (na=%d, ns=%d) on %s\n", 394 pbus->name, pna, pns, parent->full_name); 395 396 /* Apply bus translation */ 397 if (of_translate_one(dev, bus, pbus, addr, na, ns, pna)) 398 break; 399 400 /* Complete the move up one level */ 401 na = pna; 402 ns = pns; 403 bus = pbus; 404 405 of_dump_addr("OF: one level translation:", addr, na); 406 } 407 bail: 408 of_node_put(parent); 409 of_node_put(dev); 410 411 return result; 412 } 413 EXPORT_SYMBOL(of_translate_address); 414 415 u32 *of_get_address(struct device_node *dev, int index, u64 *size, 416 unsigned int *flags) 417 { 418 u32 *prop; 419 unsigned int psize; 420 struct device_node *parent; 421 struct of_bus *bus; 422 int onesize, i, na, ns; 423 424 /* Get parent & match bus type */ 425 parent = of_get_parent(dev); 426 if (parent == NULL) 427 return NULL; 428 bus = of_match_bus(parent); 429 bus->count_cells(dev, &na, &ns); 430 of_node_put(parent); 431 if (!OF_CHECK_COUNTS(na, ns)) 432 return NULL; 433 434 /* Get "reg" or "assigned-addresses" property */ 435 prop = (u32 *)get_property(dev, bus->addresses, &psize); 436 if (prop == NULL) 437 return NULL; 438 psize /= 4; 439 440 onesize = na + ns; 441 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) 442 if (i == index) { 443 if (size) 444 *size = of_read_addr(prop + na, ns); 445 if (flags) 446 *flags = bus->get_flags(prop); 447 return prop; 448 } 449 return NULL; 450 } 451 EXPORT_SYMBOL(of_get_address); 452 453 u32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size, 454 unsigned int *flags) 455 { 456 u32 *prop; 457 unsigned int psize; 458 struct device_node *parent; 459 struct of_bus *bus; 460 int onesize, i, na, ns; 461 462 /* Get parent & match bus type */ 463 parent = of_get_parent(dev); 464 if (parent == NULL) 465 return NULL; 466 bus = of_match_bus(parent); 467 if (strcmp(bus->name, "pci")) 468 return NULL; 469 bus->count_cells(dev, &na, &ns); 470 of_node_put(parent); 471 if (!OF_CHECK_COUNTS(na, ns)) 472 return NULL; 473 474 /* Get "reg" or "assigned-addresses" property */ 475 prop = (u32 *)get_property(dev, bus->addresses, &psize); 476 if (prop == NULL) 477 return NULL; 478 psize /= 4; 479 480 onesize = na + ns; 481 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) 482 if ((prop[0] & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) { 483 if (size) 484 *size = of_read_addr(prop + na, ns); 485 if (flags) 486 *flags = bus->get_flags(prop); 487 return prop; 488 } 489 return NULL; 490 } 491 EXPORT_SYMBOL(of_get_pci_address); 492 493 static int __of_address_to_resource(struct device_node *dev, u32 *addrp, 494 u64 size, unsigned int flags, 495 struct resource *r) 496 { 497 u64 taddr; 498 499 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0) 500 return -EINVAL; 501 taddr = of_translate_address(dev, addrp); 502 if (taddr == OF_BAD_ADDR) 503 return -EINVAL; 504 memset(r, 0, sizeof(struct resource)); 505 if (flags & IORESOURCE_IO) { 506 unsigned long port; 507 port = pci_address_to_pio(taddr); 508 if (port == (unsigned long)-1) 509 return -EINVAL; 510 r->start = port; 511 r->end = port + size - 1; 512 } else { 513 r->start = taddr; 514 r->end = taddr + size - 1; 515 } 516 r->flags = flags; 517 r->name = dev->name; 518 return 0; 519 } 520 521 int of_address_to_resource(struct device_node *dev, int index, 522 struct resource *r) 523 { 524 u32 *addrp; 525 u64 size; 526 unsigned int flags; 527 528 addrp = of_get_address(dev, index, &size, &flags); 529 if (addrp == NULL) 530 return -EINVAL; 531 return __of_address_to_resource(dev, addrp, size, flags, r); 532 } 533 EXPORT_SYMBOL_GPL(of_address_to_resource); 534 535 int of_pci_address_to_resource(struct device_node *dev, int bar, 536 struct resource *r) 537 { 538 u32 *addrp; 539 u64 size; 540 unsigned int flags; 541 542 addrp = of_get_pci_address(dev, bar, &size, &flags); 543 if (addrp == NULL) 544 return -EINVAL; 545 return __of_address_to_resource(dev, addrp, size, flags, r); 546 } 547 EXPORT_SYMBOL_GPL(of_pci_address_to_resource); 548