1 /* 2 * Machine check exception handling CPU-side for power7 and power8 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17 * 18 * Copyright 2013 IBM Corporation 19 * Author: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> 20 */ 21 22 #undef DEBUG 23 #define pr_fmt(fmt) "mce_power: " fmt 24 25 #include <linux/types.h> 26 #include <linux/ptrace.h> 27 #include <asm/mmu.h> 28 #include <asm/mce.h> 29 #include <asm/machdep.h> 30 #include <asm/pgtable.h> 31 #include <asm/pte-walk.h> 32 #include <asm/sstep.h> 33 #include <asm/exception-64s.h> 34 35 /* 36 * Convert an address related to an mm to a PFN. NOTE: we are in real 37 * mode, we could potentially race with page table updates. 38 */ 39 unsigned long addr_to_pfn(struct pt_regs *regs, unsigned long addr) 40 { 41 pte_t *ptep; 42 unsigned long flags; 43 struct mm_struct *mm; 44 45 if (user_mode(regs)) 46 mm = current->mm; 47 else 48 mm = &init_mm; 49 50 local_irq_save(flags); 51 if (mm == current->mm) 52 ptep = find_current_mm_pte(mm->pgd, addr, NULL, NULL); 53 else 54 ptep = find_init_mm_pte(addr, NULL); 55 local_irq_restore(flags); 56 if (!ptep || pte_special(*ptep)) 57 return ULONG_MAX; 58 return pte_pfn(*ptep); 59 } 60 61 /* flush SLBs and reload */ 62 #ifdef CONFIG_PPC_BOOK3S_64 63 void flush_and_reload_slb(void) 64 { 65 /* Invalidate all SLBs */ 66 slb_flush_all_realmode(); 67 68 #ifdef CONFIG_KVM_BOOK3S_HANDLER 69 /* 70 * If machine check is hit when in guest or in transition, we will 71 * only flush the SLBs and continue. 72 */ 73 if (get_paca()->kvm_hstate.in_guest) 74 return; 75 #endif 76 if (early_radix_enabled()) 77 return; 78 79 /* 80 * This probably shouldn't happen, but it may be possible it's 81 * called in early boot before SLB shadows are allocated. 82 */ 83 if (!get_slb_shadow()) 84 return; 85 86 slb_restore_bolted_realmode(); 87 } 88 #endif 89 90 static void flush_erat(void) 91 { 92 #ifdef CONFIG_PPC_BOOK3S_64 93 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) { 94 flush_and_reload_slb(); 95 return; 96 } 97 #endif 98 asm volatile(PPC_ISA_3_0_INVALIDATE_ERAT : : :"memory"); 99 } 100 101 #define MCE_FLUSH_SLB 1 102 #define MCE_FLUSH_TLB 2 103 #define MCE_FLUSH_ERAT 3 104 105 static int mce_flush(int what) 106 { 107 #ifdef CONFIG_PPC_BOOK3S_64 108 if (what == MCE_FLUSH_SLB) { 109 flush_and_reload_slb(); 110 return 1; 111 } 112 #endif 113 if (what == MCE_FLUSH_ERAT) { 114 flush_erat(); 115 return 1; 116 } 117 if (what == MCE_FLUSH_TLB) { 118 tlbiel_all(); 119 return 1; 120 } 121 122 return 0; 123 } 124 125 #define SRR1_MC_LOADSTORE(srr1) ((srr1) & PPC_BIT(42)) 126 127 struct mce_ierror_table { 128 unsigned long srr1_mask; 129 unsigned long srr1_value; 130 bool nip_valid; /* nip is a valid indicator of faulting address */ 131 unsigned int error_type; 132 unsigned int error_subtype; 133 unsigned int error_class; 134 unsigned int initiator; 135 unsigned int severity; 136 bool sync_error; 137 }; 138 139 static const struct mce_ierror_table mce_p7_ierror_table[] = { 140 { 0x00000000001c0000, 0x0000000000040000, true, 141 MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE, 142 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 143 { 0x00000000001c0000, 0x0000000000080000, true, 144 MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE, 145 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 146 { 0x00000000001c0000, 0x00000000000c0000, true, 147 MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 148 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 149 { 0x00000000001c0000, 0x0000000000100000, true, 150 MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_INDETERMINATE, /* BOTH */ 151 MCE_ECLASS_SOFT_INDETERMINATE, 152 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 153 { 0x00000000001c0000, 0x0000000000140000, true, 154 MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 155 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 156 { 0x00000000001c0000, 0x0000000000180000, true, 157 MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_HARDWARE, 158 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 159 { 0x00000000001c0000, 0x00000000001c0000, true, 160 MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE, 161 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 162 { 0, 0, 0, 0, 0, 0, 0 } }; 163 164 static const struct mce_ierror_table mce_p8_ierror_table[] = { 165 { 0x00000000081c0000, 0x0000000000040000, true, 166 MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE, 167 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 168 { 0x00000000081c0000, 0x0000000000080000, true, 169 MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE, 170 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 171 { 0x00000000081c0000, 0x00000000000c0000, true, 172 MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 173 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 174 { 0x00000000081c0000, 0x0000000000100000, true, 175 MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 176 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 177 { 0x00000000081c0000, 0x0000000000140000, true, 178 MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 179 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 180 { 0x00000000081c0000, 0x0000000000180000, true, 181 MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH, 182 MCE_ECLASS_HARDWARE, 183 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 184 { 0x00000000081c0000, 0x00000000001c0000, true, 185 MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE, 186 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 187 { 0x00000000081c0000, 0x0000000008000000, true, 188 MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_IFETCH_TIMEOUT, MCE_ECLASS_HARDWARE, 189 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 190 { 0x00000000081c0000, 0x0000000008040000, true, 191 MCE_ERROR_TYPE_LINK,MCE_LINK_ERROR_PAGE_TABLE_WALK_IFETCH_TIMEOUT, 192 MCE_ECLASS_HARDWARE, 193 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 194 { 0, 0, 0, 0, 0, 0, 0 } }; 195 196 static const struct mce_ierror_table mce_p9_ierror_table[] = { 197 { 0x00000000081c0000, 0x0000000000040000, true, 198 MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE, 199 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 200 { 0x00000000081c0000, 0x0000000000080000, true, 201 MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE, 202 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 203 { 0x00000000081c0000, 0x00000000000c0000, true, 204 MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 205 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 206 { 0x00000000081c0000, 0x0000000000100000, true, 207 MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 208 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 209 { 0x00000000081c0000, 0x0000000000140000, true, 210 MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 211 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 212 { 0x00000000081c0000, 0x0000000000180000, true, 213 MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_HARDWARE, 214 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 215 { 0x00000000081c0000, 0x00000000001c0000, true, 216 MCE_ERROR_TYPE_RA, MCE_RA_ERROR_IFETCH_FOREIGN, MCE_ECLASS_SOFTWARE, 217 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 218 { 0x00000000081c0000, 0x0000000008000000, true, 219 MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_IFETCH_TIMEOUT, MCE_ECLASS_HARDWARE, 220 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 221 { 0x00000000081c0000, 0x0000000008040000, true, 222 MCE_ERROR_TYPE_LINK,MCE_LINK_ERROR_PAGE_TABLE_WALK_IFETCH_TIMEOUT, 223 MCE_ECLASS_HARDWARE, 224 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 225 { 0x00000000081c0000, 0x00000000080c0000, true, 226 MCE_ERROR_TYPE_RA, MCE_RA_ERROR_IFETCH, MCE_ECLASS_SOFTWARE, 227 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 228 { 0x00000000081c0000, 0x0000000008100000, true, 229 MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_SOFTWARE, 230 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 231 { 0x00000000081c0000, 0x0000000008140000, false, 232 MCE_ERROR_TYPE_RA, MCE_RA_ERROR_STORE, MCE_ECLASS_HARDWARE, 233 MCE_INITIATOR_CPU, MCE_SEV_FATAL, false }, /* ASYNC is fatal */ 234 { 0x00000000081c0000, 0x0000000008180000, false, 235 MCE_ERROR_TYPE_LINK,MCE_LINK_ERROR_STORE_TIMEOUT, 236 MCE_INITIATOR_CPU, MCE_SEV_FATAL, false }, /* ASYNC is fatal */ 237 { 0x00000000081c0000, 0x00000000081c0000, true, MCE_ECLASS_HARDWARE, 238 MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH_FOREIGN, 239 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 240 { 0, 0, 0, 0, 0, 0, 0 } }; 241 242 struct mce_derror_table { 243 unsigned long dsisr_value; 244 bool dar_valid; /* dar is a valid indicator of faulting address */ 245 unsigned int error_type; 246 unsigned int error_subtype; 247 unsigned int error_class; 248 unsigned int initiator; 249 unsigned int severity; 250 bool sync_error; 251 }; 252 253 static const struct mce_derror_table mce_p7_derror_table[] = { 254 { 0x00008000, false, 255 MCE_ERROR_TYPE_UE, MCE_UE_ERROR_LOAD_STORE, MCE_ECLASS_HARDWARE, 256 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 257 { 0x00004000, true, 258 MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE, 259 MCE_ECLASS_HARDWARE, 260 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 261 { 0x00000800, true, 262 MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 263 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 264 { 0x00000400, true, 265 MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 266 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 267 { 0x00000080, true, 268 MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 269 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 270 { 0x00000100, true, 271 MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE, 272 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 273 { 0x00000040, true, 274 MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_INDETERMINATE, /* BOTH */ 275 MCE_ECLASS_HARD_INDETERMINATE, 276 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 277 { 0, false, 0, 0, 0, 0, 0 } }; 278 279 static const struct mce_derror_table mce_p8_derror_table[] = { 280 { 0x00008000, false, 281 MCE_ERROR_TYPE_UE, MCE_UE_ERROR_LOAD_STORE, MCE_ECLASS_HARDWARE, 282 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 283 { 0x00004000, true, 284 MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE, 285 MCE_ECLASS_HARDWARE, 286 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 287 { 0x00002000, true, 288 MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_LOAD_TIMEOUT, MCE_ECLASS_HARDWARE, 289 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 290 { 0x00001000, true, 291 MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_PAGE_TABLE_WALK_LOAD_STORE_TIMEOUT, 292 MCE_ECLASS_HARDWARE, 293 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 294 { 0x00000800, true, 295 MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 296 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 297 { 0x00000400, true, 298 MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 299 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 300 { 0x00000200, true, 301 MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, /* SECONDARY ERAT */ 302 MCE_ECLASS_SOFT_INDETERMINATE, 303 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 304 { 0x00000080, true, 305 MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, /* Before PARITY */ 306 MCE_ECLASS_SOFT_INDETERMINATE, 307 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 308 { 0x00000100, true, 309 MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE, 310 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 311 { 0, false, 0, 0, 0, 0, 0 } }; 312 313 static const struct mce_derror_table mce_p9_derror_table[] = { 314 { 0x00008000, false, 315 MCE_ERROR_TYPE_UE, MCE_UE_ERROR_LOAD_STORE, MCE_ECLASS_HARDWARE, 316 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 317 { 0x00004000, true, 318 MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE, 319 MCE_ECLASS_HARDWARE, 320 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 321 { 0x00002000, true, 322 MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_LOAD_TIMEOUT, MCE_ECLASS_HARDWARE, 323 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 324 { 0x00001000, true, 325 MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_PAGE_TABLE_WALK_LOAD_STORE_TIMEOUT, 326 MCE_ECLASS_HARDWARE, 327 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 328 { 0x00000800, true, 329 MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 330 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 331 { 0x00000400, true, 332 MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, 333 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 334 { 0x00000200, false, 335 MCE_ERROR_TYPE_USER, MCE_USER_ERROR_TLBIE, MCE_ECLASS_SOFTWARE, 336 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 337 { 0x00000080, true, 338 MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, /* Before PARITY */ 339 MCE_ECLASS_SOFT_INDETERMINATE, 340 MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, 341 { 0x00000100, true, 342 MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE, 343 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 344 { 0x00000040, true, 345 MCE_ERROR_TYPE_RA, MCE_RA_ERROR_LOAD, MCE_ECLASS_HARDWARE, 346 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 347 { 0x00000020, false, 348 MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE, 349 MCE_ECLASS_HARDWARE, 350 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 351 { 0x00000010, false, 352 MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE_FOREIGN, 353 MCE_ECLASS_HARDWARE, 354 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 355 { 0x00000008, false, 356 MCE_ERROR_TYPE_RA, MCE_RA_ERROR_LOAD_STORE_FOREIGN, MCE_ECLASS_HARDWARE, 357 MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, 358 { 0, false, 0, 0, 0, 0, 0 } }; 359 360 static int mce_find_instr_ea_and_pfn(struct pt_regs *regs, uint64_t *addr, 361 uint64_t *phys_addr) 362 { 363 /* 364 * Carefully look at the NIP to determine 365 * the instruction to analyse. Reading the NIP 366 * in real-mode is tricky and can lead to recursive 367 * faults 368 */ 369 int instr; 370 unsigned long pfn, instr_addr; 371 struct instruction_op op; 372 struct pt_regs tmp = *regs; 373 374 pfn = addr_to_pfn(regs, regs->nip); 375 if (pfn != ULONG_MAX) { 376 instr_addr = (pfn << PAGE_SHIFT) + (regs->nip & ~PAGE_MASK); 377 instr = *(unsigned int *)(instr_addr); 378 if (!analyse_instr(&op, &tmp, instr)) { 379 pfn = addr_to_pfn(regs, op.ea); 380 *addr = op.ea; 381 *phys_addr = (pfn << PAGE_SHIFT); 382 return 0; 383 } 384 /* 385 * analyse_instr() might fail if the instruction 386 * is not a load/store, although this is unexpected 387 * for load/store errors or if we got the NIP 388 * wrong 389 */ 390 } 391 *addr = 0; 392 return -1; 393 } 394 395 static int mce_handle_ierror(struct pt_regs *regs, 396 const struct mce_ierror_table table[], 397 struct mce_error_info *mce_err, uint64_t *addr, 398 uint64_t *phys_addr) 399 { 400 uint64_t srr1 = regs->msr; 401 int handled = 0; 402 int i; 403 404 *addr = 0; 405 406 for (i = 0; table[i].srr1_mask; i++) { 407 if ((srr1 & table[i].srr1_mask) != table[i].srr1_value) 408 continue; 409 410 /* attempt to correct the error */ 411 switch (table[i].error_type) { 412 case MCE_ERROR_TYPE_SLB: 413 handled = mce_flush(MCE_FLUSH_SLB); 414 break; 415 case MCE_ERROR_TYPE_ERAT: 416 handled = mce_flush(MCE_FLUSH_ERAT); 417 break; 418 case MCE_ERROR_TYPE_TLB: 419 handled = mce_flush(MCE_FLUSH_TLB); 420 break; 421 } 422 423 /* now fill in mce_error_info */ 424 mce_err->error_type = table[i].error_type; 425 mce_err->error_class = table[i].error_class; 426 switch (table[i].error_type) { 427 case MCE_ERROR_TYPE_UE: 428 mce_err->u.ue_error_type = table[i].error_subtype; 429 break; 430 case MCE_ERROR_TYPE_SLB: 431 mce_err->u.slb_error_type = table[i].error_subtype; 432 break; 433 case MCE_ERROR_TYPE_ERAT: 434 mce_err->u.erat_error_type = table[i].error_subtype; 435 break; 436 case MCE_ERROR_TYPE_TLB: 437 mce_err->u.tlb_error_type = table[i].error_subtype; 438 break; 439 case MCE_ERROR_TYPE_USER: 440 mce_err->u.user_error_type = table[i].error_subtype; 441 break; 442 case MCE_ERROR_TYPE_RA: 443 mce_err->u.ra_error_type = table[i].error_subtype; 444 break; 445 case MCE_ERROR_TYPE_LINK: 446 mce_err->u.link_error_type = table[i].error_subtype; 447 break; 448 } 449 mce_err->sync_error = table[i].sync_error; 450 mce_err->severity = table[i].severity; 451 mce_err->initiator = table[i].initiator; 452 if (table[i].nip_valid) { 453 *addr = regs->nip; 454 if (mce_err->sync_error && 455 table[i].error_type == MCE_ERROR_TYPE_UE) { 456 unsigned long pfn; 457 458 if (get_paca()->in_mce < MAX_MCE_DEPTH) { 459 pfn = addr_to_pfn(regs, regs->nip); 460 if (pfn != ULONG_MAX) { 461 *phys_addr = 462 (pfn << PAGE_SHIFT); 463 } 464 } 465 } 466 } 467 return handled; 468 } 469 470 mce_err->error_type = MCE_ERROR_TYPE_UNKNOWN; 471 mce_err->error_class = MCE_ECLASS_UNKNOWN; 472 mce_err->severity = MCE_SEV_SEVERE; 473 mce_err->initiator = MCE_INITIATOR_CPU; 474 mce_err->sync_error = true; 475 476 return 0; 477 } 478 479 static int mce_handle_derror(struct pt_regs *regs, 480 const struct mce_derror_table table[], 481 struct mce_error_info *mce_err, uint64_t *addr, 482 uint64_t *phys_addr) 483 { 484 uint64_t dsisr = regs->dsisr; 485 int handled = 0; 486 int found = 0; 487 int i; 488 489 *addr = 0; 490 491 for (i = 0; table[i].dsisr_value; i++) { 492 if (!(dsisr & table[i].dsisr_value)) 493 continue; 494 495 /* attempt to correct the error */ 496 switch (table[i].error_type) { 497 case MCE_ERROR_TYPE_SLB: 498 if (mce_flush(MCE_FLUSH_SLB)) 499 handled = 1; 500 break; 501 case MCE_ERROR_TYPE_ERAT: 502 if (mce_flush(MCE_FLUSH_ERAT)) 503 handled = 1; 504 break; 505 case MCE_ERROR_TYPE_TLB: 506 if (mce_flush(MCE_FLUSH_TLB)) 507 handled = 1; 508 break; 509 } 510 511 /* 512 * Attempt to handle multiple conditions, but only return 513 * one. Ensure uncorrectable errors are first in the table 514 * to match. 515 */ 516 if (found) 517 continue; 518 519 /* now fill in mce_error_info */ 520 mce_err->error_type = table[i].error_type; 521 mce_err->error_class = table[i].error_class; 522 switch (table[i].error_type) { 523 case MCE_ERROR_TYPE_UE: 524 mce_err->u.ue_error_type = table[i].error_subtype; 525 break; 526 case MCE_ERROR_TYPE_SLB: 527 mce_err->u.slb_error_type = table[i].error_subtype; 528 break; 529 case MCE_ERROR_TYPE_ERAT: 530 mce_err->u.erat_error_type = table[i].error_subtype; 531 break; 532 case MCE_ERROR_TYPE_TLB: 533 mce_err->u.tlb_error_type = table[i].error_subtype; 534 break; 535 case MCE_ERROR_TYPE_USER: 536 mce_err->u.user_error_type = table[i].error_subtype; 537 break; 538 case MCE_ERROR_TYPE_RA: 539 mce_err->u.ra_error_type = table[i].error_subtype; 540 break; 541 case MCE_ERROR_TYPE_LINK: 542 mce_err->u.link_error_type = table[i].error_subtype; 543 break; 544 } 545 mce_err->sync_error = table[i].sync_error; 546 mce_err->severity = table[i].severity; 547 mce_err->initiator = table[i].initiator; 548 if (table[i].dar_valid) 549 *addr = regs->dar; 550 else if (mce_err->sync_error && 551 table[i].error_type == MCE_ERROR_TYPE_UE) { 552 /* 553 * We do a maximum of 4 nested MCE calls, see 554 * kernel/exception-64s.h 555 */ 556 if (get_paca()->in_mce < MAX_MCE_DEPTH) 557 mce_find_instr_ea_and_pfn(regs, addr, phys_addr); 558 } 559 found = 1; 560 } 561 562 if (found) 563 return handled; 564 565 mce_err->error_type = MCE_ERROR_TYPE_UNKNOWN; 566 mce_err->error_class = MCE_ECLASS_UNKNOWN; 567 mce_err->severity = MCE_SEV_SEVERE; 568 mce_err->initiator = MCE_INITIATOR_CPU; 569 mce_err->sync_error = true; 570 571 return 0; 572 } 573 574 static long mce_handle_ue_error(struct pt_regs *regs) 575 { 576 long handled = 0; 577 578 /* 579 * On specific SCOM read via MMIO we may get a machine check 580 * exception with SRR0 pointing inside opal. If that is the 581 * case OPAL may have recovery address to re-read SCOM data in 582 * different way and hence we can recover from this MC. 583 */ 584 585 if (ppc_md.mce_check_early_recovery) { 586 if (ppc_md.mce_check_early_recovery(regs)) 587 handled = 1; 588 } 589 return handled; 590 } 591 592 static long mce_handle_error(struct pt_regs *regs, 593 const struct mce_derror_table dtable[], 594 const struct mce_ierror_table itable[]) 595 { 596 struct mce_error_info mce_err = { 0 }; 597 uint64_t addr, phys_addr = ULONG_MAX; 598 uint64_t srr1 = regs->msr; 599 long handled; 600 601 if (SRR1_MC_LOADSTORE(srr1)) 602 handled = mce_handle_derror(regs, dtable, &mce_err, &addr, 603 &phys_addr); 604 else 605 handled = mce_handle_ierror(regs, itable, &mce_err, &addr, 606 &phys_addr); 607 608 if (!handled && mce_err.error_type == MCE_ERROR_TYPE_UE) 609 handled = mce_handle_ue_error(regs); 610 611 save_mce_event(regs, handled, &mce_err, regs->nip, addr, phys_addr); 612 613 return handled; 614 } 615 616 long __machine_check_early_realmode_p7(struct pt_regs *regs) 617 { 618 /* P7 DD1 leaves top bits of DSISR undefined */ 619 regs->dsisr &= 0x0000ffff; 620 621 return mce_handle_error(regs, mce_p7_derror_table, mce_p7_ierror_table); 622 } 623 624 long __machine_check_early_realmode_p8(struct pt_regs *regs) 625 { 626 return mce_handle_error(regs, mce_p8_derror_table, mce_p8_ierror_table); 627 } 628 629 long __machine_check_early_realmode_p9(struct pt_regs *regs) 630 { 631 /* 632 * On POWER9 DD2.1 and below, it's possible to get a machine check 633 * caused by a paste instruction where only DSISR bit 25 is set. This 634 * will result in the MCE handler seeing an unknown event and the kernel 635 * crashing. An MCE that occurs like this is spurious, so we don't need 636 * to do anything in terms of servicing it. If there is something that 637 * needs to be serviced, the CPU will raise the MCE again with the 638 * correct DSISR so that it can be serviced properly. So detect this 639 * case and mark it as handled. 640 */ 641 if (SRR1_MC_LOADSTORE(regs->msr) && regs->dsisr == 0x02000000) 642 return 1; 643 644 return mce_handle_error(regs, mce_p9_derror_table, mce_p9_ierror_table); 645 } 646