12874c5fdSThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-or-later */ 214cf11afSPaul Mackerras/* 314cf11afSPaul Mackerras * PowerPC version 414cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 514cf11afSPaul Mackerras * 614cf11afSPaul Mackerras * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 714cf11afSPaul Mackerras * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 814cf11afSPaul Mackerras * Adapted for Power Macintosh by Paul Mackerras. 914cf11afSPaul Mackerras * Low-level exception handlers and MMU support 1014cf11afSPaul Mackerras * rewritten by Paul Mackerras. 1114cf11afSPaul Mackerras * Copyright (C) 1996 Paul Mackerras. 1214cf11afSPaul Mackerras * 1314cf11afSPaul Mackerras * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 1414cf11afSPaul Mackerras * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 1514cf11afSPaul Mackerras * 160ebc4cdaSBenjamin Herrenschmidt * This file contains the entry point for the 64-bit kernel along 170ebc4cdaSBenjamin Herrenschmidt * with some early initialization code common to all 64-bit powerpc 180ebc4cdaSBenjamin Herrenschmidt * variants. 1914cf11afSPaul Mackerras */ 2014cf11afSPaul Mackerras 2129a011fcSSathvika Vasireddy#include <linux/linkage.h> 2214cf11afSPaul Mackerras#include <linux/threads.h> 23c141611fSPaul Gortmaker#include <linux/init.h> 24b5bbeb23SPaul Mackerras#include <asm/reg.h> 2514cf11afSPaul Mackerras#include <asm/page.h> 2614cf11afSPaul Mackerras#include <asm/mmu.h> 2714cf11afSPaul Mackerras#include <asm/ppc_asm.h> 2857f26649SNicholas Piggin#include <asm/head-64.h> 2914cf11afSPaul Mackerras#include <asm/asm-offsets.h> 3014cf11afSPaul Mackerras#include <asm/bug.h> 3114cf11afSPaul Mackerras#include <asm/cputable.h> 3214cf11afSPaul Mackerras#include <asm/setup.h> 3314cf11afSPaul Mackerras#include <asm/hvcall.h> 346cb7bfebSDavid Gibson#include <asm/thread_info.h> 353f639ee8SStephen Rothwell#include <asm/firmware.h> 3616a15a30SStephen Rothwell#include <asm/page_64.h> 37945feb17SBenjamin Herrenschmidt#include <asm/irqflags.h> 382191d657SAlexander Graf#include <asm/kvm_book3s_asm.h> 3946f52210SStephen Rothwell#include <asm/ptrace.h> 407230c564SBenjamin Herrenschmidt#include <asm/hw_irq.h> 416becef7eSchenhui zhao#include <asm/cputhreads.h> 427a25d912SScott Wood#include <asm/ppc-opcode.h> 439445aa1aSAl Viro#include <asm/export.h> 442c86cd18SChristophe Leroy#include <asm/feature-fixups.h> 45879add77SChristophe Leroy#ifdef CONFIG_PPC_BOOK3S 46879add77SChristophe Leroy#include <asm/exception-64s.h> 47879add77SChristophe Leroy#else 48879add77SChristophe Leroy#include <asm/exception-64e.h> 49879add77SChristophe Leroy#endif 5014cf11afSPaul Mackerras 5125985edcSLucas De Marchi/* The physical memory is laid out such that the secondary processor 520ebc4cdaSBenjamin Herrenschmidt * spin code sits at 0x0000...0x00ff. On server, the vectors follow 530ebc4cdaSBenjamin Herrenschmidt * using the layout described in exceptions-64s.S 5414cf11afSPaul Mackerras */ 5514cf11afSPaul Mackerras 5614cf11afSPaul Mackerras/* 5714cf11afSPaul Mackerras * Entering into this code we make the following assumptions: 580ebc4cdaSBenjamin Herrenschmidt * 590ebc4cdaSBenjamin Herrenschmidt * For pSeries or server processors: 6014cf11afSPaul Mackerras * 1. The MMU is off & open firmware is running in real mode. 61339a3293SNicholas Piggin * 2. The primary CPU enters at __start. 62339a3293SNicholas Piggin * 3. If the RTAS supports "query-cpu-stopped-state", then secondary 63339a3293SNicholas Piggin * CPUs will enter as directed by "start-cpu" RTAS call, which is 64339a3293SNicholas Piggin * generic_secondary_smp_init, with PIR in r3. 65339a3293SNicholas Piggin * 4. Else the secondary CPUs will enter at secondary_hold (0x60) as 66339a3293SNicholas Piggin * directed by the "start-cpu" RTS call, with PIR in r3. 6727f44888SBenjamin Herrenschmidt * -or- For OPAL entry: 68339a3293SNicholas Piggin * 1. The MMU is off, processor in HV mode. 69339a3293SNicholas Piggin * 2. The primary CPU enters at 0 with device-tree in r3, OPAL base 70339a3293SNicholas Piggin * in r8, and entry in r9 for debugging purposes. 71339a3293SNicholas Piggin * 3. Secondary CPUs enter as directed by OPAL_START_CPU call, which 72339a3293SNicholas Piggin * is at generic_secondary_smp_init, with PIR in r3. 7314cf11afSPaul Mackerras * 740ebc4cdaSBenjamin Herrenschmidt * For Book3E processors: 750ebc4cdaSBenjamin Herrenschmidt * 1. The MMU is on running in AS0 in a state defined in ePAPR 760ebc4cdaSBenjamin Herrenschmidt * 2. The kernel is entered at __start 7714cf11afSPaul Mackerras */ 7814cf11afSPaul Mackerras 7957f26649SNicholas PigginOPEN_FIXED_SECTION(first_256B, 0x0, 0x100) 8057f26649SNicholas PigginUSE_FIXED_SECTION(first_256B) 8157f26649SNicholas Piggin /* 8257f26649SNicholas Piggin * Offsets are relative from the start of fixed section, and 8357f26649SNicholas Piggin * first_256B starts at 0. Offsets are a bit easier to use here 8457f26649SNicholas Piggin * than the fixed section entry macros. 8557f26649SNicholas Piggin */ 8657f26649SNicholas Piggin . = 0x0 8714cf11afSPaul Mackerras_GLOBAL(__start) 8814cf11afSPaul Mackerras /* NOP this out unconditionally */ 8914cf11afSPaul MackerrasBEGIN_FTR_SECTION 905c0484e2SBenjamin Herrenschmidt FIXUP_ENDIAN 91b1576fecSAnton Blanchard b __start_initialization_multiplatform 9214cf11afSPaul MackerrasEND_FTR_SECTION(0, 1) 9314cf11afSPaul Mackerras 9414cf11afSPaul Mackerras /* Catch branch to 0 in real mode */ 9514cf11afSPaul Mackerras trap 9614cf11afSPaul Mackerras 972751b628SAnton Blanchard /* Secondary processors spin on this value until it becomes non-zero. 982751b628SAnton Blanchard * When non-zero, it contains the real address of the function the cpu 992751b628SAnton Blanchard * should jump to. 1001f6a93e4SPaul Mackerras */ 1017d4151b5SOlof Johansson .balign 8 10214cf11afSPaul Mackerras .globl __secondary_hold_spinloop 10314cf11afSPaul Mackerras__secondary_hold_spinloop: 104eb039161STobin C. Harding .8byte 0x0 10514cf11afSPaul Mackerras 10614cf11afSPaul Mackerras /* Secondary processors write this value with their cpu # */ 10714cf11afSPaul Mackerras /* after they enter the spin loop immediately below. */ 10814cf11afSPaul Mackerras .globl __secondary_hold_acknowledge 10914cf11afSPaul Mackerras__secondary_hold_acknowledge: 110eb039161STobin C. Harding .8byte 0x0 11114cf11afSPaul Mackerras 112928a3197SSonny Rao#ifdef CONFIG_RELOCATABLE 1138b8b0cc1SMilton Miller /* This flag is set to 1 by a loader if the kernel should run 1148b8b0cc1SMilton Miller * at the loaded address instead of the linked address. This 11587c78b61SMichael Ellerman * is used by kexec-tools to keep the kdump kernel in the 1168b8b0cc1SMilton Miller * crash_kernel region. The loader is responsible for 1178b8b0cc1SMilton Miller * observing the alignment requirement. 1188b8b0cc1SMilton Miller */ 11970839d20SNicholas Piggin 12070839d20SNicholas Piggin#ifdef CONFIG_RELOCATABLE_TEST 12170839d20SNicholas Piggin#define RUN_AT_LOAD_DEFAULT 1 /* Test relocation, do not copy to 0 */ 12270839d20SNicholas Piggin#else 12370839d20SNicholas Piggin#define RUN_AT_LOAD_DEFAULT 0x72756e30 /* "run0" -- relocate to 0 by default */ 12470839d20SNicholas Piggin#endif 12570839d20SNicholas Piggin 1268b8b0cc1SMilton Miller /* Do not move this variable as kexec-tools knows about it. */ 1278b8b0cc1SMilton Miller . = 0x5c 1288b8b0cc1SMilton Miller .globl __run_at_load 1298b8b0cc1SMilton Miller__run_at_load: 130d72c4a36SDaniel AxtensDEFINE_FIXED_SYMBOL(__run_at_load, first_256B) 13170839d20SNicholas Piggin .long RUN_AT_LOAD_DEFAULT 1328b8b0cc1SMilton Miller#endif 1338b8b0cc1SMilton Miller 13414cf11afSPaul Mackerras . = 0x60 13514cf11afSPaul Mackerras/* 13675423b7bSGeoff Levand * The following code is used to hold secondary processors 13775423b7bSGeoff Levand * in a spin loop after they have entered the kernel, but 13814cf11afSPaul Mackerras * before the bulk of the kernel has been relocated. This code 13914cf11afSPaul Mackerras * is relocated to physical address 0x60 before prom_init is run. 14014cf11afSPaul Mackerras * All of it must fit below the first exception vector at 0x100. 1411f6a93e4SPaul Mackerras * Use .globl here not _GLOBAL because we want __secondary_hold 1421f6a93e4SPaul Mackerras * to be the actual text address, not a descriptor. 14314cf11afSPaul Mackerras */ 1441f6a93e4SPaul Mackerras .globl __secondary_hold 1451f6a93e4SPaul Mackerras__secondary_hold: 1465c0484e2SBenjamin Herrenschmidt FIXUP_ENDIAN 147e0d68273SChristophe Leroy#ifndef CONFIG_PPC_BOOK3E_64 14814cf11afSPaul Mackerras mfmsr r24 14914cf11afSPaul Mackerras ori r24,r24,MSR_RI 15014cf11afSPaul Mackerras mtmsrd r24 /* RI on */ 1512d27cfd3SBenjamin Herrenschmidt#endif 152f1870f77SAnton Blanchard /* Grab our physical cpu number */ 15314cf11afSPaul Mackerras mr r24,r3 15496f013feSJimi Xenidis /* stash r4 for book3e */ 15596f013feSJimi Xenidis mr r25,r4 15614cf11afSPaul Mackerras 15714cf11afSPaul Mackerras /* Tell the master cpu we're here */ 15814cf11afSPaul Mackerras /* Relocation is off & we are located at an address less */ 15914cf11afSPaul Mackerras /* than 0x100, so only need to grab low order offset. */ 160d72c4a36SDaniel Axtens std r24,(ABS_ADDR(__secondary_hold_acknowledge, first_256B))(0) 16114cf11afSPaul Mackerras sync 16214cf11afSPaul Mackerras 16396f013feSJimi Xenidis li r26,0 164e0d68273SChristophe Leroy#ifdef CONFIG_PPC_BOOK3E_64 16596f013feSJimi Xenidis tovirt(r26,r26) 16696f013feSJimi Xenidis#endif 16714cf11afSPaul Mackerras /* All secondary cpus wait here until told to start. */ 168d72c4a36SDaniel Axtens100: ld r12,(ABS_ADDR(__secondary_hold_spinloop, first_256B))(r26) 169cc7efbf9SAnton Blanchard cmpdi 0,r12,0 1701f6a93e4SPaul Mackerras beq 100b 17114cf11afSPaul Mackerras 172da665885SThiago Jung Bauermann#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE) 173e0d68273SChristophe Leroy#ifdef CONFIG_PPC_BOOK3E_64 174cc7efbf9SAnton Blanchard tovirt(r12,r12) 17596f013feSJimi Xenidis#endif 176cc7efbf9SAnton Blanchard mtctr r12 17714cf11afSPaul Mackerras mr r3,r24 17896f013feSJimi Xenidis /* 17996f013feSJimi Xenidis * it may be the case that other platforms have r4 right to 18096f013feSJimi Xenidis * begin with, this gives us some safety in case it is not 18196f013feSJimi Xenidis */ 182e0d68273SChristophe Leroy#ifdef CONFIG_PPC_BOOK3E_64 18396f013feSJimi Xenidis mr r4,r25 18496f013feSJimi Xenidis#else 1852d27cfd3SBenjamin Herrenschmidt li r4,0 18696f013feSJimi Xenidis#endif 187dd797738SBenjamin Herrenschmidt /* Make sure that patched code is visible */ 188dd797738SBenjamin Herrenschmidt isync 189758438a7SMichael Ellerman bctr 19014cf11afSPaul Mackerras#else 19163ce271bSChristophe Leroy0: trap 19263ce271bSChristophe Leroy EMIT_BUG_ENTRY 0b, __FILE__, __LINE__, 0 19314cf11afSPaul Mackerras#endif 19457f26649SNicholas PigginCLOSE_FIXED_SECTION(first_256B) 19514cf11afSPaul Mackerras 19614cf11afSPaul Mackerras/* 1970ebc4cdaSBenjamin Herrenschmidt * On server, we include the exception vectors code here as it 1980ebc4cdaSBenjamin Herrenschmidt * relies on absolute addressing which is only possible within 1990ebc4cdaSBenjamin Herrenschmidt * this compilation unit 20014cf11afSPaul Mackerras */ 2010ebc4cdaSBenjamin Herrenschmidt#ifdef CONFIG_PPC_BOOK3S 2020ebc4cdaSBenjamin Herrenschmidt#include "exceptions-64s.S" 20357f26649SNicholas Piggin#else 20457f26649SNicholas PigginOPEN_TEXT_SECTION(0x100) 2051f6a93e4SPaul Mackerras#endif 20614cf11afSPaul Mackerras 20757f26649SNicholas PigginUSE_TEXT_SECTION() 20857f26649SNicholas Piggin 209e754f4d1SNicholas Piggin#include "interrupt_64.S" 210e754f4d1SNicholas Piggin 211e0d68273SChristophe Leroy#ifdef CONFIG_PPC_BOOK3E_64 212d17799f9Schenhui zhao/* 2136becef7eSchenhui zhao * The booting_thread_hwid holds the thread id we want to boot in cpu 2146becef7eSchenhui zhao * hotplug case. It is set by cpu hotplug code, and is invalid by default. 2156becef7eSchenhui zhao * The thread id is the same as the initial value of SPRN_PIR[THREAD_ID] 2166becef7eSchenhui zhao * bit field. 2176becef7eSchenhui zhao */ 2186becef7eSchenhui zhao .globl booting_thread_hwid 2196becef7eSchenhui zhaobooting_thread_hwid: 2206becef7eSchenhui zhao .long INVALID_THREAD_HWID 2216becef7eSchenhui zhao .align 3 2226becef7eSchenhui zhao/* 2236becef7eSchenhui zhao * start a thread in the same core 2246becef7eSchenhui zhao * input parameters: 2256becef7eSchenhui zhao * r3 = the thread physical id 2266becef7eSchenhui zhao * r4 = the entry point where thread starts 2276becef7eSchenhui zhao */ 2286becef7eSchenhui zhao_GLOBAL(book3e_start_thread) 2296becef7eSchenhui zhao LOAD_REG_IMMEDIATE(r5, MSR_KERNEL) 230f87f253bSNicholas Piggin cmpwi r3, 0 2316becef7eSchenhui zhao beq 10f 232f87f253bSNicholas Piggin cmpwi r3, 1 2336becef7eSchenhui zhao beq 11f 2346becef7eSchenhui zhao /* If the thread id is invalid, just exit. */ 2356becef7eSchenhui zhao b 13f 2366becef7eSchenhui zhao10: 2377a25d912SScott Wood MTTMR(TMRN_IMSR0, 5) 2387a25d912SScott Wood MTTMR(TMRN_INIA0, 4) 2396becef7eSchenhui zhao b 12f 2406becef7eSchenhui zhao11: 2417a25d912SScott Wood MTTMR(TMRN_IMSR1, 5) 2427a25d912SScott Wood MTTMR(TMRN_INIA1, 4) 2436becef7eSchenhui zhao12: 2446becef7eSchenhui zhao isync 2456becef7eSchenhui zhao li r6, 1 2466becef7eSchenhui zhao sld r6, r6, r3 2476becef7eSchenhui zhao mtspr SPRN_TENS, r6 2486becef7eSchenhui zhao13: 2496becef7eSchenhui zhao blr 2506becef7eSchenhui zhao 2516becef7eSchenhui zhao/* 252d17799f9Schenhui zhao * stop a thread in the same core 253d17799f9Schenhui zhao * input parameter: 254d17799f9Schenhui zhao * r3 = the thread physical id 255d17799f9Schenhui zhao */ 256d17799f9Schenhui zhao_GLOBAL(book3e_stop_thread) 257f87f253bSNicholas Piggin cmpwi r3, 0 258d17799f9Schenhui zhao beq 10f 259f87f253bSNicholas Piggin cmpwi r3, 1 260d17799f9Schenhui zhao beq 10f 261d17799f9Schenhui zhao /* If the thread id is invalid, just exit. */ 262d17799f9Schenhui zhao b 13f 263d17799f9Schenhui zhao10: 264d17799f9Schenhui zhao li r4, 1 265d17799f9Schenhui zhao sld r4, r4, r3 266d17799f9Schenhui zhao mtspr SPRN_TENC, r4 267d17799f9Schenhui zhao13: 268d17799f9Schenhui zhao blr 269d17799f9Schenhui zhao 270e16c8765SAndy Fleming_GLOBAL(fsl_secondary_thread_init) 271f34b3e19SScott Wood mfspr r4,SPRN_BUCSR 272f34b3e19SScott Wood 273e16c8765SAndy Fleming /* Enable branch prediction */ 274e16c8765SAndy Fleming lis r3,BUCSR_INIT@h 275e16c8765SAndy Fleming ori r3,r3,BUCSR_INIT@l 276e16c8765SAndy Fleming mtspr SPRN_BUCSR,r3 277e16c8765SAndy Fleming isync 278e16c8765SAndy Fleming 279e16c8765SAndy Fleming /* 280e16c8765SAndy Fleming * Fix PIR to match the linear numbering in the device tree. 281e16c8765SAndy Fleming * 282e16c8765SAndy Fleming * On e6500, the reset value of PIR uses the low three bits for 283e16c8765SAndy Fleming * the thread within a core, and the upper bits for the core 284e16c8765SAndy Fleming * number. There are two threads per core, so shift everything 285e16c8765SAndy Fleming * but the low bit right by two bits so that the cpu numbering is 286e16c8765SAndy Fleming * continuous. 287f34b3e19SScott Wood * 288f34b3e19SScott Wood * If the old value of BUCSR is non-zero, this thread has run 289f34b3e19SScott Wood * before. Thus, we assume we are coming from kexec or a similar 290f34b3e19SScott Wood * scenario, and PIR is already set to the correct value. This 291f34b3e19SScott Wood * is a bit of a hack, but there are limited opportunities for 292f34b3e19SScott Wood * getting information into the thread and the alternatives 293f34b3e19SScott Wood * seemed like they'd be overkill. We can't tell just by looking 294f34b3e19SScott Wood * at the old PIR value which state it's in, since the same value 295f34b3e19SScott Wood * could be valid for one thread out of reset and for a different 296f34b3e19SScott Wood * thread in Linux. 297e16c8765SAndy Fleming */ 298f34b3e19SScott Wood 299e16c8765SAndy Fleming mfspr r3, SPRN_PIR 300f34b3e19SScott Wood cmpwi r4,0 301f34b3e19SScott Wood bne 1f 302e16c8765SAndy Fleming rlwimi r3, r3, 30, 2, 30 303e16c8765SAndy Fleming mtspr SPRN_PIR, r3 304f34b3e19SScott Wood1: 30514cf11afSPaul Mackerras mr r24,r3 30614cf11afSPaul Mackerras 30714cf11afSPaul Mackerras /* turn on 64-bit mode */ 308b1576fecSAnton Blanchard bl enable_64b_mode 30914cf11afSPaul Mackerras 3102d27cfd3SBenjamin Herrenschmidt /* get a valid TOC pointer, wherever we're mapped at */ 311b1576fecSAnton Blanchard bl relative_toc 3121fbe9cf2SAnton Blanchard tovirt(r2,r2) 313e31aa453SPaul Mackerras 3142d27cfd3SBenjamin Herrenschmidt /* Book3E initialization */ 3152d27cfd3SBenjamin Herrenschmidt mr r3,r24 316b1576fecSAnton Blanchard bl book3e_secondary_thread_init 3172d27cfd3SBenjamin Herrenschmidt b generic_secondary_common_init 3182d27cfd3SBenjamin Herrenschmidt 319e0d68273SChristophe Leroy#endif /* CONFIG_PPC_BOOK3E_64 */ 320529d2bd5SMichael Ellerman 3212d27cfd3SBenjamin Herrenschmidt/* 3222d27cfd3SBenjamin Herrenschmidt * On pSeries and most other platforms, secondary processors spin 3232d27cfd3SBenjamin Herrenschmidt * in the following code. 3242d27cfd3SBenjamin Herrenschmidt * At entry, r3 = this processor's number (physical cpu id) 3252d27cfd3SBenjamin Herrenschmidt * 3262d27cfd3SBenjamin Herrenschmidt * On Book3E, r4 = 1 to indicate that the initial TLB entry for 3272d27cfd3SBenjamin Herrenschmidt * this core already exists (setup via some other mechanism such 3282d27cfd3SBenjamin Herrenschmidt * as SCOM before entry). 3292d27cfd3SBenjamin Herrenschmidt */ 3302d27cfd3SBenjamin Herrenschmidt_GLOBAL(generic_secondary_smp_init) 3315c0484e2SBenjamin Herrenschmidt FIXUP_ENDIAN 3322d27cfd3SBenjamin Herrenschmidt mr r24,r3 3332d27cfd3SBenjamin Herrenschmidt mr r25,r4 3342d27cfd3SBenjamin Herrenschmidt 3352d27cfd3SBenjamin Herrenschmidt /* turn on 64-bit mode */ 336b1576fecSAnton Blanchard bl enable_64b_mode 3372d27cfd3SBenjamin Herrenschmidt 3382d27cfd3SBenjamin Herrenschmidt /* get a valid TOC pointer, wherever we're mapped at */ 339b1576fecSAnton Blanchard bl relative_toc 3401fbe9cf2SAnton Blanchard tovirt(r2,r2) 3412d27cfd3SBenjamin Herrenschmidt 342e0d68273SChristophe Leroy#ifdef CONFIG_PPC_BOOK3E_64 3432d27cfd3SBenjamin Herrenschmidt /* Book3E initialization */ 3442d27cfd3SBenjamin Herrenschmidt mr r3,r24 3452d27cfd3SBenjamin Herrenschmidt mr r4,r25 346b1576fecSAnton Blanchard bl book3e_secondary_core_init 3476becef7eSchenhui zhao 3486becef7eSchenhui zhao/* 3496becef7eSchenhui zhao * After common core init has finished, check if the current thread is the 3506becef7eSchenhui zhao * one we wanted to boot. If not, start the specified thread and stop the 3516becef7eSchenhui zhao * current thread. 3526becef7eSchenhui zhao */ 3536becef7eSchenhui zhao LOAD_REG_ADDR(r4, booting_thread_hwid) 3546becef7eSchenhui zhao lwz r3, 0(r4) 3556becef7eSchenhui zhao li r5, INVALID_THREAD_HWID 3566becef7eSchenhui zhao cmpw r3, r5 3576becef7eSchenhui zhao beq 20f 3586becef7eSchenhui zhao 3596becef7eSchenhui zhao /* 3606becef7eSchenhui zhao * The value of booting_thread_hwid has been stored in r3, 3616becef7eSchenhui zhao * so make it invalid. 3626becef7eSchenhui zhao */ 3636becef7eSchenhui zhao stw r5, 0(r4) 3646becef7eSchenhui zhao 3656becef7eSchenhui zhao /* 3666becef7eSchenhui zhao * Get the current thread id and check if it is the one we wanted. 3676becef7eSchenhui zhao * If not, start the one specified in booting_thread_hwid and stop 3686becef7eSchenhui zhao * the current thread. 3696becef7eSchenhui zhao */ 3706becef7eSchenhui zhao mfspr r8, SPRN_TIR 3716becef7eSchenhui zhao cmpw r3, r8 3726becef7eSchenhui zhao beq 20f 3736becef7eSchenhui zhao 3746becef7eSchenhui zhao /* start the specified thread */ 3756becef7eSchenhui zhao LOAD_REG_ADDR(r5, fsl_secondary_thread_init) 3766becef7eSchenhui zhao ld r4, 0(r5) 3776becef7eSchenhui zhao bl book3e_start_thread 3786becef7eSchenhui zhao 3796becef7eSchenhui zhao /* stop the current thread */ 3806becef7eSchenhui zhao mr r3, r8 3816becef7eSchenhui zhao bl book3e_stop_thread 3826becef7eSchenhui zhao10: 3836becef7eSchenhui zhao b 10b 3846becef7eSchenhui zhao20: 3852d27cfd3SBenjamin Herrenschmidt#endif 3862d27cfd3SBenjamin Herrenschmidt 3872d27cfd3SBenjamin Herrenschmidtgeneric_secondary_common_init: 38814cf11afSPaul Mackerras /* Set up a paca value for this processor. Since we have the 38914cf11afSPaul Mackerras * physical cpu id in r24, we need to search the pacas to find 39014cf11afSPaul Mackerras * which logical id maps to our physical one. 39114cf11afSPaul Mackerras */ 392768d18adSMilton Miller#ifndef CONFIG_SMP 393b1576fecSAnton Blanchard b kexec_wait /* wait for next kernel if !SMP */ 394768d18adSMilton Miller#else 395d2e60075SNicholas Piggin LOAD_REG_ADDR(r8, paca_ptrs) /* Load paca_ptrs pointe */ 396d2e60075SNicholas Piggin ld r8,0(r8) /* Get base vaddr of array */ 397546a073dSYury Norov#if (NR_CPUS == 1) || defined(CONFIG_FORCE_NR_CPUS) 398546a073dSYury Norov LOAD_REG_IMMEDIATE(r7, NR_CPUS) 399546a073dSYury Norov#else 400768d18adSMilton Miller LOAD_REG_ADDR(r7, nr_cpu_ids) /* Load nr_cpu_ids address */ 401768d18adSMilton Miller lwz r7,0(r7) /* also the max paca allocated */ 402546a073dSYury Norov#endif 40314cf11afSPaul Mackerras li r5,0 /* logical cpu id */ 404d2e60075SNicholas Piggin1: 405d2e60075SNicholas Piggin sldi r9,r5,3 /* get paca_ptrs[] index from cpu id */ 406d2e60075SNicholas Piggin ldx r13,r9,r8 /* r13 = paca_ptrs[cpu id] */ 407d2e60075SNicholas Piggin lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */ 40814cf11afSPaul Mackerras cmpw r6,r24 /* Compare to our id */ 40914cf11afSPaul Mackerras beq 2f 41014cf11afSPaul Mackerras addi r5,r5,1 411768d18adSMilton Miller cmpw r5,r7 /* Check if more pacas exist */ 41214cf11afSPaul Mackerras blt 1b 41314cf11afSPaul Mackerras 41414cf11afSPaul Mackerras mr r3,r24 /* not found, copy phys to r3 */ 415b1576fecSAnton Blanchard b kexec_wait /* next kernel might do better */ 41614cf11afSPaul Mackerras 4172dd60d79SBenjamin Herrenschmidt2: SET_PACA(r13) 418e0d68273SChristophe Leroy#ifdef CONFIG_PPC_BOOK3E_64 4192d27cfd3SBenjamin Herrenschmidt addi r12,r13,PACA_EXTLB /* and TLB exc frame in another */ 4202d27cfd3SBenjamin Herrenschmidt mtspr SPRN_SPRG_TLB_EXFRAME,r12 4212d27cfd3SBenjamin Herrenschmidt#endif 4222d27cfd3SBenjamin Herrenschmidt 42314cf11afSPaul Mackerras /* From now on, r24 is expected to be logical cpuid */ 42414cf11afSPaul Mackerras mr r24,r5 425b6f6b98aSSonny Rao 4263c0b976bSJordan Niethe /* Create a temp kernel stack for use before relocation is on. */ 4273c0b976bSJordan Niethe ld r1,PACAEMERGSP(r13) 42890f1b431SNicholas Piggin subi r1,r1,STACK_FRAME_MIN_SIZE 4293c0b976bSJordan Niethe 430f39b7a55SOlof Johansson /* See if we need to call a cpu state restore handler */ 431e31aa453SPaul Mackerras LOAD_REG_ADDR(r23, cur_cpu_spec) 432f39b7a55SOlof Johansson ld r23,0(r23) 4332751b628SAnton Blanchard ld r12,CPU_SPEC_RESTORE(r23) 4342751b628SAnton Blanchard cmpdi 0,r12,0 4359d07bc84SBenjamin Herrenschmidt beq 3f 4367d40aff8SChristophe Leroy#ifdef CONFIG_PPC64_ELF_ABI_V1 4372751b628SAnton Blanchard ld r12,0(r12) 4382751b628SAnton Blanchard#endif 439cc7efbf9SAnton Blanchard mtctr r12 440f39b7a55SOlof Johansson bctrl 441f39b7a55SOlof Johansson 4427ac87abbSMatt Evans3: LOAD_REG_ADDR(r3, spinning_secondaries) /* Decrement spinning_secondaries */ 4439d07bc84SBenjamin Herrenschmidt lwarx r4,0,r3 4449d07bc84SBenjamin Herrenschmidt subi r4,r4,1 4459d07bc84SBenjamin Herrenschmidt stwcx. r4,0,r3 4469d07bc84SBenjamin Herrenschmidt bne 3b 4479d07bc84SBenjamin Herrenschmidt isync 4489d07bc84SBenjamin Herrenschmidt 4499d07bc84SBenjamin Herrenschmidt4: HMT_LOW 450ad0693eeSBenjamin Herrenschmidt lbz r23,PACAPROCSTART(r13) /* Test if this processor should */ 451ad0693eeSBenjamin Herrenschmidt /* start. */ 452ad0693eeSBenjamin Herrenschmidt cmpwi 0,r23,0 4539d07bc84SBenjamin Herrenschmidt beq 4b /* Loop until told to go */ 454ad0693eeSBenjamin Herrenschmidt 455ad0693eeSBenjamin Herrenschmidt sync /* order paca.run and cur_cpu_spec */ 4569d07bc84SBenjamin Herrenschmidt isync /* In case code patching happened */ 457ad0693eeSBenjamin Herrenschmidt 458c705677eSStephen Rothwell b __secondary_start 459768d18adSMilton Miller#endif /* SMP */ 46014cf11afSPaul Mackerras 461e31aa453SPaul Mackerras/* 462e31aa453SPaul Mackerras * Turn the MMU off. 463e31aa453SPaul Mackerras * Assumes we're mapped EA == RA if the MMU is on. 464e31aa453SPaul Mackerras */ 4652d27cfd3SBenjamin Herrenschmidt#ifdef CONFIG_PPC_BOOK3S 46629a011fcSSathvika VasireddySYM_FUNC_START_LOCAL(__mmu_off) 46714cf11afSPaul Mackerras mfmsr r3 46814cf11afSPaul Mackerras andi. r0,r3,MSR_IR|MSR_DR 46914cf11afSPaul Mackerras beqlr 470e31aa453SPaul Mackerras mflr r4 47114cf11afSPaul Mackerras andc r3,r3,r0 47214cf11afSPaul Mackerras mtspr SPRN_SRR0,r4 47314cf11afSPaul Mackerras mtspr SPRN_SRR1,r3 47414cf11afSPaul Mackerras sync 47514cf11afSPaul Mackerras rfid 47614cf11afSPaul Mackerras b . /* prevent speculative execution */ 47729a011fcSSathvika VasireddySYM_FUNC_END(__mmu_off) 47814cf11afSPaul Mackerras 479*58f24eeaSNicholas Pigginstart_initialization_book3s: 480*58f24eeaSNicholas Piggin mflr r25 481*58f24eeaSNicholas Piggin 482*58f24eeaSNicholas Piggin /* Setup some critical 970 SPRs before switching MMU off */ 483*58f24eeaSNicholas Piggin mfspr r0,SPRN_PVR 484*58f24eeaSNicholas Piggin srwi r0,r0,16 485*58f24eeaSNicholas Piggin cmpwi r0,0x39 /* 970 */ 486*58f24eeaSNicholas Piggin beq 1f 487*58f24eeaSNicholas Piggin cmpwi r0,0x3c /* 970FX */ 488*58f24eeaSNicholas Piggin beq 1f 489*58f24eeaSNicholas Piggin cmpwi r0,0x44 /* 970MP */ 490*58f24eeaSNicholas Piggin beq 1f 491*58f24eeaSNicholas Piggin cmpwi r0,0x45 /* 970GX */ 492*58f24eeaSNicholas Piggin bne 2f 493*58f24eeaSNicholas Piggin1: bl __cpu_preinit_ppc970 494*58f24eeaSNicholas Piggin2: 495*58f24eeaSNicholas Piggin 496*58f24eeaSNicholas Piggin /* Switch off MMU if not already off */ 497*58f24eeaSNicholas Piggin bl __mmu_off 498*58f24eeaSNicholas Piggin 499*58f24eeaSNicholas Piggin mtlr r25 500*58f24eeaSNicholas Piggin blr 501*58f24eeaSNicholas Piggin#endif 50214cf11afSPaul Mackerras 50314cf11afSPaul Mackerras/* 50414cf11afSPaul Mackerras * Here is our main kernel entry point. We support currently 2 kind of entries 50514cf11afSPaul Mackerras * depending on the value of r5. 50614cf11afSPaul Mackerras * 50714cf11afSPaul Mackerras * r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content 50814cf11afSPaul Mackerras * in r3...r7 50914cf11afSPaul Mackerras * 51014cf11afSPaul Mackerras * r5 == NULL -> kexec style entry. r3 is a physical pointer to the 51114cf11afSPaul Mackerras * DT block, r4 is a physical pointer to the kernel itself 51214cf11afSPaul Mackerras * 51314cf11afSPaul Mackerras */ 5146a3bab90SAnton Blanchard__start_initialization_multiplatform: 515e31aa453SPaul Mackerras /* Make sure we are running in 64 bits mode */ 516b1576fecSAnton Blanchard bl enable_64b_mode 517e31aa453SPaul Mackerras 518e1100ceeSNicholas Piggin /* Zero r13 (paca) so early program check / mce don't use it */ 519e1100ceeSNicholas Piggin li r13,0 520e1100ceeSNicholas Piggin 521e31aa453SPaul Mackerras /* Get TOC pointer (current runtime address) */ 522b1576fecSAnton Blanchard bl relative_toc 523e31aa453SPaul Mackerras 524e31aa453SPaul Mackerras /* find out where we are now */ 525e31aa453SPaul Mackerras bcl 20,31,$+4 526e31aa453SPaul Mackerras0: mflr r26 /* r26 = runtime addr here */ 527e31aa453SPaul Mackerras addis r26,r26,(_stext - 0b)@ha 528e31aa453SPaul Mackerras addi r26,r26,(_stext - 0b)@l /* current runtime base addr */ 529e31aa453SPaul Mackerras 53014cf11afSPaul Mackerras /* 53114cf11afSPaul Mackerras * Are we booted from a PROM Of-type client-interface ? 53214cf11afSPaul Mackerras */ 53314cf11afSPaul Mackerras cmpldi cr0,r5,0 534939e60f6SStephen Rothwell beq 1f 535b1576fecSAnton Blanchard b __boot_from_prom /* yes -> prom */ 536939e60f6SStephen Rothwell1: 53714cf11afSPaul Mackerras /* Save parameters */ 53814cf11afSPaul Mackerras mr r31,r3 53914cf11afSPaul Mackerras mr r30,r4 540daea1175SBenjamin Herrenschmidt#ifdef CONFIG_PPC_EARLY_DEBUG_OPAL 541daea1175SBenjamin Herrenschmidt /* Save OPAL entry */ 542daea1175SBenjamin Herrenschmidt mr r28,r8 543daea1175SBenjamin Herrenschmidt mr r29,r9 544daea1175SBenjamin Herrenschmidt#endif 54514cf11afSPaul Mackerras 546e0d68273SChristophe Leroy#ifdef CONFIG_PPC_BOOK3E_64 547b1576fecSAnton Blanchard bl start_initialization_book3e 5482d27cfd3SBenjamin Herrenschmidt#else 549*58f24eeaSNicholas Piggin bl start_initialization_book3s 550e0d68273SChristophe Leroy#endif /* CONFIG_PPC_BOOK3E_64 */ 551*58f24eeaSNicholas Piggin b __after_prom_start 55214cf11afSPaul Mackerras 5536eeb9b3bSMichael Ellerman__REF 5546a3bab90SAnton Blanchard__boot_from_prom: 55528794d34SBenjamin Herrenschmidt#ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE 55614cf11afSPaul Mackerras /* Save parameters */ 55714cf11afSPaul Mackerras mr r31,r3 55814cf11afSPaul Mackerras mr r30,r4 55914cf11afSPaul Mackerras mr r29,r5 56014cf11afSPaul Mackerras mr r28,r6 56114cf11afSPaul Mackerras mr r27,r7 56214cf11afSPaul Mackerras 5636088857bSOlaf Hering /* 5646088857bSOlaf Hering * Align the stack to 16-byte boundary 5656088857bSOlaf Hering * Depending on the size and layout of the ELF sections in the initial 566e31aa453SPaul Mackerras * boot binary, the stack pointer may be unaligned on PowerMac 5676088857bSOlaf Hering */ 568c05b4770SLinus Torvalds rldicr r1,r1,0,59 569c05b4770SLinus Torvalds 570549e8152SPaul Mackerras#ifdef CONFIG_RELOCATABLE 571549e8152SPaul Mackerras /* Relocate code for where we are now */ 572549e8152SPaul Mackerras mr r3,r26 573b1576fecSAnton Blanchard bl relocate 574549e8152SPaul Mackerras#endif 575549e8152SPaul Mackerras 57614cf11afSPaul Mackerras /* Restore parameters */ 57714cf11afSPaul Mackerras mr r3,r31 57814cf11afSPaul Mackerras mr r4,r30 57914cf11afSPaul Mackerras mr r5,r29 58014cf11afSPaul Mackerras mr r6,r28 58114cf11afSPaul Mackerras mr r7,r27 58214cf11afSPaul Mackerras 58314cf11afSPaul Mackerras /* Do all of the interaction with OF client interface */ 584549e8152SPaul Mackerras mr r8,r26 585b1576fecSAnton Blanchard bl prom_init 58628794d34SBenjamin Herrenschmidt#endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */ 58728794d34SBenjamin Herrenschmidt 58828794d34SBenjamin Herrenschmidt /* We never return. We also hit that trap if trying to boot 58928794d34SBenjamin Herrenschmidt * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */ 59014cf11afSPaul Mackerras trap 5916eeb9b3bSMichael Ellerman .previous 59214cf11afSPaul Mackerras 5936a3bab90SAnton Blanchard__after_prom_start: 594549e8152SPaul Mackerras#ifdef CONFIG_RELOCATABLE 595549e8152SPaul Mackerras /* process relocations for the final address of the kernel */ 596549e8152SPaul Mackerras lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */ 597549e8152SPaul Mackerras sldi r25,r25,32 598e0d68273SChristophe Leroy#if defined(CONFIG_PPC_BOOK3E_64) 5991cb6e064STiejun Chen tovirt(r26,r26) /* on booke, we already run at PAGE_OFFSET */ 6001cb6e064STiejun Chen#endif 60157f26649SNicholas Piggin lwz r7,(FIXED_SYMBOL_ABS_ADDR(__run_at_load))(r26) 602e0d68273SChristophe Leroy#if defined(CONFIG_PPC_BOOK3E_64) 6031cb6e064STiejun Chen tophys(r26,r26) 6041cb6e064STiejun Chen#endif 605928a3197SSonny Rao cmplwi cr0,r7,1 /* flagged to stay where we are ? */ 60654622f10SMohan Kumar M bne 1f 60754622f10SMohan Kumar M add r25,r25,r26 60854622f10SMohan Kumar M1: mr r3,r25 609b1576fecSAnton Blanchard bl relocate 610e0d68273SChristophe Leroy#if defined(CONFIG_PPC_BOOK3E_64) 6111cb6e064STiejun Chen /* IVPR needs to be set after relocation. */ 6121cb6e064STiejun Chen bl init_core_book3e 6131cb6e064STiejun Chen#endif 614549e8152SPaul Mackerras#endif 61514cf11afSPaul Mackerras 61614cf11afSPaul Mackerras/* 617e31aa453SPaul Mackerras * We need to run with _stext at physical address PHYSICAL_START. 61814cf11afSPaul Mackerras * This will leave some code in the first 256B of 61914cf11afSPaul Mackerras * real memory, which are reserved for software use. 62014cf11afSPaul Mackerras * 62114cf11afSPaul Mackerras * Note: This process overwrites the OF exception vectors. 62214cf11afSPaul Mackerras */ 623549e8152SPaul Mackerras li r3,0 /* target addr */ 624e0d68273SChristophe Leroy#ifdef CONFIG_PPC_BOOK3E_64 6252d27cfd3SBenjamin Herrenschmidt tovirt(r3,r3) /* on booke, we already run at PAGE_OFFSET */ 6262d27cfd3SBenjamin Herrenschmidt#endif 627549e8152SPaul Mackerras mr. r4,r26 /* In some cases the loader may */ 628e0d68273SChristophe Leroy#if defined(CONFIG_PPC_BOOK3E_64) 629835c031cSTiejun Chen tovirt(r4,r4) 630835c031cSTiejun Chen#endif 631e31aa453SPaul Mackerras beq 9f /* have already put us at zero */ 63214cf11afSPaul Mackerras li r6,0x100 /* Start offset, the first 0x100 */ 63314cf11afSPaul Mackerras /* bytes were copied earlier. */ 63414cf11afSPaul Mackerras 63511ee7e99SAnton Blanchard#ifdef CONFIG_RELOCATABLE 63654622f10SMohan Kumar M/* 63754622f10SMohan Kumar M * Check if the kernel has to be running as relocatable kernel based on the 6388b8b0cc1SMilton Miller * variable __run_at_load, if it is set the kernel is treated as relocatable 63954622f10SMohan Kumar M * kernel, otherwise it will be moved to PHYSICAL_START 64054622f10SMohan Kumar M */ 641e0d68273SChristophe Leroy#if defined(CONFIG_PPC_BOOK3E_64) 6421cb6e064STiejun Chen tovirt(r26,r26) /* on booke, we already run at PAGE_OFFSET */ 6431cb6e064STiejun Chen#endif 64457f26649SNicholas Piggin lwz r7,(FIXED_SYMBOL_ABS_ADDR(__run_at_load))(r26) 6458b8b0cc1SMilton Miller cmplwi cr0,r7,1 64654622f10SMohan Kumar M bne 3f 64754622f10SMohan Kumar M 648e0d68273SChristophe Leroy#ifdef CONFIG_PPC_BOOK3E_64 6491cb6e064STiejun Chen LOAD_REG_ADDR(r5, __end_interrupts) 6501cb6e064STiejun Chen LOAD_REG_ADDR(r11, _stext) 6511cb6e064STiejun Chen sub r5,r5,r11 6521cb6e064STiejun Chen#else 653c1fb6816SMichael Neuling /* just copy interrupts */ 654d7fb5b18SChristophe Leroy LOAD_REG_IMMEDIATE_SYM(r5, r11, FIXED_SYMBOL_ABS_ADDR(__end_interrupts)) 6551cb6e064STiejun Chen#endif 65654622f10SMohan Kumar M b 5f 65754622f10SMohan Kumar M3: 65854622f10SMohan Kumar M#endif 65957f26649SNicholas Piggin /* # bytes of memory to copy */ 660d72c4a36SDaniel Axtens lis r5,(ABS_ADDR(copy_to_here, text))@ha 661d72c4a36SDaniel Axtens addi r5,r5,(ABS_ADDR(copy_to_here, text))@l 66254622f10SMohan Kumar M 663b1576fecSAnton Blanchard bl copy_and_flush /* copy the first n bytes */ 66414cf11afSPaul Mackerras /* this includes the code being */ 66514cf11afSPaul Mackerras /* executed here. */ 66657f26649SNicholas Piggin /* Jump to the copy of this code that we just made */ 667d72c4a36SDaniel Axtens addis r8,r3,(ABS_ADDR(4f, text))@ha 668d72c4a36SDaniel Axtens addi r12,r8,(ABS_ADDR(4f, text))@l 669cc7efbf9SAnton Blanchard mtctr r12 67014cf11afSPaul Mackerras bctr 67114cf11afSPaul Mackerras 672286e4f90SAnton Blanchard.balign 8 673eb039161STobin C. Hardingp_end: .8byte _end - copy_to_here 67454622f10SMohan Kumar M 675573819e3SNicholas Piggin4: 676573819e3SNicholas Piggin /* 677573819e3SNicholas Piggin * Now copy the rest of the kernel up to _end, add 678573819e3SNicholas Piggin * _end - copy_to_here to the copy limit and run again. 679573819e3SNicholas Piggin */ 680d72c4a36SDaniel Axtens addis r8,r26,(ABS_ADDR(p_end, text))@ha 681d72c4a36SDaniel Axtens ld r8,(ABS_ADDR(p_end, text))@l(r8) 682573819e3SNicholas Piggin add r5,r5,r8 683b1576fecSAnton Blanchard5: bl copy_and_flush /* copy the rest */ 684e31aa453SPaul Mackerras 685b1576fecSAnton Blanchard9: b start_here_multiplatform 686e31aa453SPaul Mackerras 68714cf11afSPaul Mackerras/* 68814cf11afSPaul Mackerras * Copy routine used to copy the kernel to start at physical address 0 68914cf11afSPaul Mackerras * and flush and invalidate the caches as needed. 69014cf11afSPaul Mackerras * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset 69114cf11afSPaul Mackerras * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5. 69214cf11afSPaul Mackerras * 69314cf11afSPaul Mackerras * Note: this routine *only* clobbers r0, r6 and lr 69414cf11afSPaul Mackerras */ 69514cf11afSPaul Mackerras_GLOBAL(copy_and_flush) 69614cf11afSPaul Mackerras addi r5,r5,-8 69714cf11afSPaul Mackerras addi r6,r6,-8 6985a2fe38dSOlof Johansson4: li r0,8 /* Use the smallest common */ 69914cf11afSPaul Mackerras /* denominator cache line */ 70014cf11afSPaul Mackerras /* size. This results in */ 70114cf11afSPaul Mackerras /* extra cache line flushes */ 70214cf11afSPaul Mackerras /* but operation is correct. */ 70314cf11afSPaul Mackerras /* Can't get cache line size */ 70414cf11afSPaul Mackerras /* from NACA as it is being */ 70514cf11afSPaul Mackerras /* moved too. */ 70614cf11afSPaul Mackerras 70714cf11afSPaul Mackerras mtctr r0 /* put # words/line in ctr */ 70814cf11afSPaul Mackerras3: addi r6,r6,8 /* copy a cache line */ 70914cf11afSPaul Mackerras ldx r0,r6,r4 71014cf11afSPaul Mackerras stdx r0,r6,r3 71114cf11afSPaul Mackerras bdnz 3b 71214cf11afSPaul Mackerras dcbst r6,r3 /* write it to memory */ 71314cf11afSPaul Mackerras sync 71414cf11afSPaul Mackerras icbi r6,r3 /* flush the icache line */ 71514cf11afSPaul Mackerras cmpld 0,r6,r5 71614cf11afSPaul Mackerras blt 4b 71714cf11afSPaul Mackerras sync 71814cf11afSPaul Mackerras addi r5,r5,8 71914cf11afSPaul Mackerras addi r6,r6,8 72029ce3c50SMichael Neuling isync 72114cf11afSPaul Mackerras blr 72214cf11afSPaul Mackerras 7238119cefdSHari Bathini_ASM_NOKPROBE_SYMBOL(copy_and_flush); /* Called in real mode */ 7248119cefdSHari Bathini 72514cf11afSPaul Mackerras.align 8 72614cf11afSPaul Mackerrascopy_to_here: 72714cf11afSPaul Mackerras 72814cf11afSPaul Mackerras#ifdef CONFIG_SMP 72914cf11afSPaul Mackerras#ifdef CONFIG_PPC_PMAC 73014cf11afSPaul Mackerras/* 73114cf11afSPaul Mackerras * On PowerMac, secondary processors starts from the reset vector, which 73214cf11afSPaul Mackerras * is temporarily turned into a call to one of the functions below. 73314cf11afSPaul Mackerras */ 73414cf11afSPaul Mackerras .section ".text"; 73514cf11afSPaul Mackerras .align 2 ; 73614cf11afSPaul Mackerras 73735499c01SPaul Mackerras .globl __secondary_start_pmac_0 73835499c01SPaul Mackerras__secondary_start_pmac_0: 73935499c01SPaul Mackerras /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */ 74035499c01SPaul Mackerras li r24,0 74135499c01SPaul Mackerras b 1f 74214cf11afSPaul Mackerras li r24,1 74335499c01SPaul Mackerras b 1f 74414cf11afSPaul Mackerras li r24,2 74535499c01SPaul Mackerras b 1f 74614cf11afSPaul Mackerras li r24,3 74735499c01SPaul Mackerras1: 74814cf11afSPaul Mackerras 74914cf11afSPaul Mackerras_GLOBAL(pmac_secondary_start) 75014cf11afSPaul Mackerras /* turn on 64-bit mode */ 751b1576fecSAnton Blanchard bl enable_64b_mode 75214cf11afSPaul Mackerras 753c478b581SBenjamin Herrenschmidt li r0,0 754c478b581SBenjamin Herrenschmidt mfspr r3,SPRN_HID4 755c478b581SBenjamin Herrenschmidt rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */ 756c478b581SBenjamin Herrenschmidt sync 757c478b581SBenjamin Herrenschmidt mtspr SPRN_HID4,r3 758c478b581SBenjamin Herrenschmidt isync 759c478b581SBenjamin Herrenschmidt sync 760c478b581SBenjamin Herrenschmidt slbia 761c478b581SBenjamin Herrenschmidt 762e31aa453SPaul Mackerras /* get TOC pointer (real address) */ 763b1576fecSAnton Blanchard bl relative_toc 7641fbe9cf2SAnton Blanchard tovirt(r2,r2) 765e31aa453SPaul Mackerras 76614cf11afSPaul Mackerras /* Copy some CPU settings from CPU 0 */ 767b1576fecSAnton Blanchard bl __restore_cpu_ppc970 76814cf11afSPaul Mackerras 76914cf11afSPaul Mackerras /* pSeries do that early though I don't think we really need it */ 77014cf11afSPaul Mackerras mfmsr r3 77114cf11afSPaul Mackerras ori r3,r3,MSR_RI 77214cf11afSPaul Mackerras mtmsrd r3 /* RI on */ 77314cf11afSPaul Mackerras 77414cf11afSPaul Mackerras /* Set up a paca value for this processor. */ 775d2e60075SNicholas Piggin LOAD_REG_ADDR(r4,paca_ptrs) /* Load paca pointer */ 776d2e60075SNicholas Piggin ld r4,0(r4) /* Get base vaddr of paca_ptrs array */ 777d2e60075SNicholas Piggin sldi r5,r24,3 /* get paca_ptrs[] index from cpu id */ 778d2e60075SNicholas Piggin ldx r13,r5,r4 /* r13 = paca_ptrs[cpu id] */ 7792dd60d79SBenjamin Herrenschmidt SET_PACA(r13) /* Save vaddr of paca in an SPRG*/ 78014cf11afSPaul Mackerras 78162cc67b9SBenjamin Herrenschmidt /* Mark interrupts soft and hard disabled (they might be enabled 78262cc67b9SBenjamin Herrenschmidt * in the PACA when doing hotplug) 78362cc67b9SBenjamin Herrenschmidt */ 784c2e480baSMadhavan Srinivasan li r0,IRQS_DISABLED 7854e26bc4aSMadhavan Srinivasan stb r0,PACAIRQSOFTMASK(r13) 7867230c564SBenjamin Herrenschmidt li r0,PACA_IRQ_HARD_DIS 7877230c564SBenjamin Herrenschmidt stb r0,PACAIRQHAPPENED(r13) 78862cc67b9SBenjamin Herrenschmidt 78914cf11afSPaul Mackerras /* Create a temp kernel stack for use before relocation is on. */ 79014cf11afSPaul Mackerras ld r1,PACAEMERGSP(r13) 79190f1b431SNicholas Piggin subi r1,r1,STACK_FRAME_MIN_SIZE 79214cf11afSPaul Mackerras 793c705677eSStephen Rothwell b __secondary_start 79414cf11afSPaul Mackerras 79514cf11afSPaul Mackerras#endif /* CONFIG_PPC_PMAC */ 79614cf11afSPaul Mackerras 79714cf11afSPaul Mackerras/* 79814cf11afSPaul Mackerras * This function is called after the master CPU has released the 79914cf11afSPaul Mackerras * secondary processors. The execution environment is relocation off. 80014cf11afSPaul Mackerras * The paca for this processor has the following fields initialized at 80114cf11afSPaul Mackerras * this point: 80214cf11afSPaul Mackerras * 1. Processor number 80314cf11afSPaul Mackerras * 2. Segment table pointer (virtual address) 80414cf11afSPaul Mackerras * On entry the following are set: 8054f8cf36fSBenjamin Herrenschmidt * r1 = stack pointer (real addr of temp stack) 80614cf11afSPaul Mackerras * r24 = cpu# (in Linux terms) 80714cf11afSPaul Mackerras * r13 = paca virtual address 808ee43eb78SBenjamin Herrenschmidt * SPRG_PACA = paca virtual address 80914cf11afSPaul Mackerras */ 8102d27cfd3SBenjamin Herrenschmidt .section ".text"; 8112d27cfd3SBenjamin Herrenschmidt .align 2 ; 8122d27cfd3SBenjamin Herrenschmidt 813fc68e869SStephen Rothwell .globl __secondary_start 814c705677eSStephen Rothwell__secondary_start: 815799d6046SPaul Mackerras /* Set thread priority to MEDIUM */ 816799d6046SPaul Mackerras HMT_MEDIUM 81714cf11afSPaul Mackerras 818eafd825eSMichael Ellerman /* 819eafd825eSMichael Ellerman * Do early setup for this CPU, in particular initialising the MMU so we 820eafd825eSMichael Ellerman * can turn it on below. This is a call to C, which is OK, we're still 821eafd825eSMichael Ellerman * running on the emergency stack. 822eafd825eSMichael Ellerman */ 823b1576fecSAnton Blanchard bl early_setup_secondary 824f761622eSMatt Evans 82554a83404SMichael Neuling /* 826eafd825eSMichael Ellerman * The primary has initialized our kernel stack for us in the paca, grab 827eafd825eSMichael Ellerman * it and put it in r1. We must *not* use it until we turn on the MMU 828eafd825eSMichael Ellerman * below, because it may not be inside the RMO. 82954a83404SMichael Neuling */ 830eafd825eSMichael Ellerman ld r1, PACAKSAVE(r13) 83154a83404SMichael Neuling 832799d6046SPaul Mackerras /* Clear backchain so we get nice backtraces */ 83314cf11afSPaul Mackerras li r7,0 83414cf11afSPaul Mackerras mtlr r7 83514cf11afSPaul Mackerras 8367230c564SBenjamin Herrenschmidt /* Mark interrupts soft and hard disabled (they might be enabled 8377230c564SBenjamin Herrenschmidt * in the PACA when doing hotplug) 8387230c564SBenjamin Herrenschmidt */ 839c2e480baSMadhavan Srinivasan li r7,IRQS_DISABLED 8404e26bc4aSMadhavan Srinivasan stb r7,PACAIRQSOFTMASK(r13) 8417230c564SBenjamin Herrenschmidt li r0,PACA_IRQ_HARD_DIS 8427230c564SBenjamin Herrenschmidt stb r0,PACAIRQHAPPENED(r13) 8434f8cf36fSBenjamin Herrenschmidt 84414cf11afSPaul Mackerras /* enable MMU and jump to start_secondary */ 845ad0289e4SAnton Blanchard LOAD_REG_ADDR(r3, start_secondary_prolog) 846e58c3495SDavid Gibson LOAD_REG_IMMEDIATE(r4, MSR_KERNEL) 847d04c56f7SPaul Mackerras 848b5bbeb23SPaul Mackerras mtspr SPRN_SRR0,r3 849b5bbeb23SPaul Mackerras mtspr SPRN_SRR1,r4 850879add77SChristophe Leroy RFI_TO_KERNEL 85114cf11afSPaul Mackerras b . /* prevent speculative execution */ 85214cf11afSPaul Mackerras 85314cf11afSPaul Mackerras/* 85414cf11afSPaul Mackerras * Running with relocation on at this point. All we want to do is 855e31aa453SPaul Mackerras * zero the stack back-chain pointer and get the TOC virtual address 856e31aa453SPaul Mackerras * before going into C code. 85714cf11afSPaul Mackerras */ 858ad0289e4SAnton Blanchardstart_secondary_prolog: 8598e93fb33SNicholas Piggin LOAD_PACA_TOC() 86014cf11afSPaul Mackerras li r3,0 86114cf11afSPaul Mackerras std r3,0(r1) /* Zero the stack frame pointer */ 862b1576fecSAnton Blanchard bl start_secondary 863799d6046SPaul Mackerras b . 8648dbce53cSVaidyanathan Srinivasan/* 8658dbce53cSVaidyanathan Srinivasan * Reset stack pointer and call start_secondary 8668dbce53cSVaidyanathan Srinivasan * to continue with online operation when woken up 8678dbce53cSVaidyanathan Srinivasan * from cede in cpu offline. 8688dbce53cSVaidyanathan Srinivasan */ 8698dbce53cSVaidyanathan Srinivasan_GLOBAL(start_secondary_resume) 8708dbce53cSVaidyanathan Srinivasan ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */ 8718dbce53cSVaidyanathan Srinivasan li r3,0 8728dbce53cSVaidyanathan Srinivasan std r3,0(r1) /* Zero the stack frame pointer */ 873b1576fecSAnton Blanchard bl start_secondary 8748dbce53cSVaidyanathan Srinivasan b . 87514cf11afSPaul Mackerras#endif 87614cf11afSPaul Mackerras 87714cf11afSPaul Mackerras/* 87814cf11afSPaul Mackerras * This subroutine clobbers r11 and r12 87914cf11afSPaul Mackerras */ 88029a011fcSSathvika VasireddySYM_FUNC_START_LOCAL(enable_64b_mode) 88114cf11afSPaul Mackerras mfmsr r11 /* grab the current MSR */ 882e0d68273SChristophe Leroy#ifdef CONFIG_PPC_BOOK3E_64 8832d27cfd3SBenjamin Herrenschmidt oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */ 8842d27cfd3SBenjamin Herrenschmidt mtmsr r11 885e0d68273SChristophe Leroy#else /* CONFIG_PPC_BOOK3E_64 */ 886e89a8ca9SNicholas Piggin LOAD_REG_IMMEDIATE(r12, MSR_64BIT) 88714cf11afSPaul Mackerras or r11,r11,r12 88814cf11afSPaul Mackerras mtmsrd r11 88914cf11afSPaul Mackerras isync 8902d27cfd3SBenjamin Herrenschmidt#endif 89114cf11afSPaul Mackerras blr 89229a011fcSSathvika VasireddySYM_FUNC_END(enable_64b_mode) 89314cf11afSPaul Mackerras 89414cf11afSPaul Mackerras/* 895e31aa453SPaul Mackerras * This puts the TOC pointer into r2, offset by 0x8000 (as expected 896e31aa453SPaul Mackerras * by the toolchain). It computes the correct value for wherever we 897e31aa453SPaul Mackerras * are running at the moment, using position-independent code. 8981fbe9cf2SAnton Blanchard * 8991fbe9cf2SAnton Blanchard * Note: The compiler constructs pointers using offsets from the 9001fbe9cf2SAnton Blanchard * TOC in -mcmodel=medium mode. After we relocate to 0 but before 9011fbe9cf2SAnton Blanchard * the MMU is on we need our TOC to be a virtual address otherwise 9021fbe9cf2SAnton Blanchard * these pointers will be real addresses which may get stored and 9031fbe9cf2SAnton Blanchard * accessed later with the MMU on. We use tovirt() at the call 9041fbe9cf2SAnton Blanchard * sites to handle this. 905e31aa453SPaul Mackerras */ 906e31aa453SPaul Mackerras_GLOBAL(relative_toc) 907e31aa453SPaul Mackerras mflr r0 908e31aa453SPaul Mackerras bcl 20,31,$+4 909e550592eSBenjamin Herrenschmidt0: mflr r11 910e550592eSBenjamin Herrenschmidt ld r2,(p_toc - 0b)(r11) 911e550592eSBenjamin Herrenschmidt add r2,r2,r11 912e31aa453SPaul Mackerras mtlr r0 913e31aa453SPaul Mackerras blr 914e31aa453SPaul Mackerras 9155b63fee1SAnton Blanchard.balign 8 916a3ad84daSAlan Modrap_toc: .8byte .TOC. - 0b 917e31aa453SPaul Mackerras 918e31aa453SPaul Mackerras/* 91914cf11afSPaul Mackerras * This is where the main kernel code starts. 92014cf11afSPaul Mackerras */ 9219c4e4c90SChristophe Leroy__REF 9226a3bab90SAnton Blanchardstart_here_multiplatform: 9231fbe9cf2SAnton Blanchard /* set up the TOC */ 924b1576fecSAnton Blanchard bl relative_toc 9251fbe9cf2SAnton Blanchard tovirt(r2,r2) 92614cf11afSPaul Mackerras 92714cf11afSPaul Mackerras /* Clear out the BSS. It may have been done in prom_init, 92814cf11afSPaul Mackerras * already but that's irrelevant since prom_init will soon 92914cf11afSPaul Mackerras * be detached from the kernel completely. Besides, we need 93014cf11afSPaul Mackerras * to clear it now for kexec-style entry. 93114cf11afSPaul Mackerras */ 932e31aa453SPaul Mackerras LOAD_REG_ADDR(r11,__bss_stop) 933e31aa453SPaul Mackerras LOAD_REG_ADDR(r8,__bss_start) 93414cf11afSPaul Mackerras sub r11,r11,r8 /* bss size */ 93514cf11afSPaul Mackerras addi r11,r11,7 /* round up to an even double word */ 936e31aa453SPaul Mackerras srdi. r11,r11,3 /* shift right by 3 */ 93714cf11afSPaul Mackerras beq 4f 93814cf11afSPaul Mackerras addi r8,r8,-8 93914cf11afSPaul Mackerras li r0,0 94014cf11afSPaul Mackerras mtctr r11 /* zero this many doublewords */ 94114cf11afSPaul Mackerras3: stdu r0,8(r8) 94214cf11afSPaul Mackerras bdnz 3b 94314cf11afSPaul Mackerras4: 94414cf11afSPaul Mackerras 945daea1175SBenjamin Herrenschmidt#ifdef CONFIG_PPC_EARLY_DEBUG_OPAL 946daea1175SBenjamin Herrenschmidt /* Setup OPAL entry */ 947ab7f961aSBenjamin Herrenschmidt LOAD_REG_ADDR(r11, opal) 948daea1175SBenjamin Herrenschmidt std r28,0(r11); 949daea1175SBenjamin Herrenschmidt std r29,8(r11); 950daea1175SBenjamin Herrenschmidt#endif 951daea1175SBenjamin Herrenschmidt 952e0d68273SChristophe Leroy#ifndef CONFIG_PPC_BOOK3E_64 95314cf11afSPaul Mackerras mfmsr r6 95414cf11afSPaul Mackerras ori r6,r6,MSR_RI 95514cf11afSPaul Mackerras mtmsrd r6 /* RI on */ 9562d27cfd3SBenjamin Herrenschmidt#endif 95714cf11afSPaul Mackerras 958549e8152SPaul Mackerras#ifdef CONFIG_RELOCATABLE 959549e8152SPaul Mackerras /* Save the physical address we're running at in kernstart_addr */ 960549e8152SPaul Mackerras LOAD_REG_ADDR(r4, kernstart_addr) 961549e8152SPaul Mackerras clrldi r0,r25,2 962549e8152SPaul Mackerras std r0,0(r4) 963549e8152SPaul Mackerras#endif 964549e8152SPaul Mackerras 965e31aa453SPaul Mackerras /* set up a stack pointer */ 9667ffa8b7dSMichael Ellerman LOAD_REG_ADDR(r3,init_thread_union) 967cabed148SHamish Martin LOAD_REG_IMMEDIATE(r1,THREAD_SIZE) 968cabed148SHamish Martin add r1,r3,r1 96914cf11afSPaul Mackerras li r0,0 97090f1b431SNicholas Piggin stdu r0,-STACK_FRAME_MIN_SIZE(r1) 97114cf11afSPaul Mackerras 972376af594SMichael Ellerman /* 973376af594SMichael Ellerman * Do very early kernel initializations, including initial hash table 974376af594SMichael Ellerman * and SLB setup before we turn on relocation. 975376af594SMichael Ellerman */ 97614cf11afSPaul Mackerras 977c7b9ed7cSChristophe Leroy#ifdef CONFIG_KASAN 978c7b9ed7cSChristophe Leroy bl kasan_early_init 979c7b9ed7cSChristophe Leroy#endif 98014cf11afSPaul Mackerras /* Restore parameters passed from prom_init/kexec */ 98114cf11afSPaul Mackerras mr r3,r31 98256c46bbaSRussell Currey LOAD_REG_ADDR(r12, DOTSYM(early_setup)) 98356c46bbaSRussell Currey mtctr r12 98456c46bbaSRussell Currey bctrl /* also sets r13 and SPRG_PACA */ 98514cf11afSPaul Mackerras 986ad0289e4SAnton Blanchard LOAD_REG_ADDR(r3, start_here_common) 987e31aa453SPaul Mackerras ld r4,PACAKMSR(r13) 988b5bbeb23SPaul Mackerras mtspr SPRN_SRR0,r3 989b5bbeb23SPaul Mackerras mtspr SPRN_SRR1,r4 990879add77SChristophe Leroy RFI_TO_KERNEL 99114cf11afSPaul Mackerras b . /* prevent speculative execution */ 99214cf11afSPaul Mackerras 99314cf11afSPaul Mackerras /* This is where all platforms converge execution */ 994ad0289e4SAnton Blanchard 995ad0289e4SAnton Blanchardstart_here_common: 99614cf11afSPaul Mackerras /* relocation is on at this point */ 99714cf11afSPaul Mackerras std r1,PACAKSAVE(r13) 99814cf11afSPaul Mackerras 999e31aa453SPaul Mackerras /* Load the TOC (virtual address) */ 10008e93fb33SNicholas Piggin LOAD_PACA_TOC() 100114cf11afSPaul Mackerras 10027230c564SBenjamin Herrenschmidt /* Mark interrupts soft and hard disabled (they might be enabled 10037230c564SBenjamin Herrenschmidt * in the PACA when doing hotplug) 10047230c564SBenjamin Herrenschmidt */ 1005c2e480baSMadhavan Srinivasan li r0,IRQS_DISABLED 10064e26bc4aSMadhavan Srinivasan stb r0,PACAIRQSOFTMASK(r13) 10077230c564SBenjamin Herrenschmidt li r0,PACA_IRQ_HARD_DIS 10087230c564SBenjamin Herrenschmidt stb r0,PACAIRQHAPPENED(r13) 100914cf11afSPaul Mackerras 10107230c564SBenjamin Herrenschmidt /* Generic kernel entry */ 1011b1576fecSAnton Blanchard bl start_kernel 101214cf11afSPaul Mackerras 1013f1870f77SAnton Blanchard /* Not reached */ 1014fe18a35eSJordan Niethe0: trap 101563ce271bSChristophe Leroy EMIT_BUG_ENTRY 0b, __FILE__, __LINE__, 0 10166eeb9b3bSMichael Ellerman .previous 1017