12874c5fdSThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-or-later */ 214cf11afSPaul Mackerras/* 314cf11afSPaul Mackerras * PowerPC version 414cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 514cf11afSPaul Mackerras * 614cf11afSPaul Mackerras * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 714cf11afSPaul Mackerras * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 814cf11afSPaul Mackerras * Adapted for Power Macintosh by Paul Mackerras. 914cf11afSPaul Mackerras * Low-level exception handlers and MMU support 1014cf11afSPaul Mackerras * rewritten by Paul Mackerras. 1114cf11afSPaul Mackerras * Copyright (C) 1996 Paul Mackerras. 1214cf11afSPaul Mackerras * 1314cf11afSPaul Mackerras * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 1414cf11afSPaul Mackerras * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 1514cf11afSPaul Mackerras * 160ebc4cdaSBenjamin Herrenschmidt * This file contains the entry point for the 64-bit kernel along 170ebc4cdaSBenjamin Herrenschmidt * with some early initialization code common to all 64-bit powerpc 180ebc4cdaSBenjamin Herrenschmidt * variants. 1914cf11afSPaul Mackerras */ 2014cf11afSPaul Mackerras 2129a011fcSSathvika Vasireddy#include <linux/linkage.h> 2214cf11afSPaul Mackerras#include <linux/threads.h> 23c141611fSPaul Gortmaker#include <linux/init.h> 24b5bbeb23SPaul Mackerras#include <asm/reg.h> 2514cf11afSPaul Mackerras#include <asm/page.h> 2614cf11afSPaul Mackerras#include <asm/mmu.h> 2714cf11afSPaul Mackerras#include <asm/ppc_asm.h> 2857f26649SNicholas Piggin#include <asm/head-64.h> 2914cf11afSPaul Mackerras#include <asm/asm-offsets.h> 3014cf11afSPaul Mackerras#include <asm/bug.h> 3114cf11afSPaul Mackerras#include <asm/cputable.h> 3214cf11afSPaul Mackerras#include <asm/setup.h> 3314cf11afSPaul Mackerras#include <asm/hvcall.h> 346cb7bfebSDavid Gibson#include <asm/thread_info.h> 353f639ee8SStephen Rothwell#include <asm/firmware.h> 3616a15a30SStephen Rothwell#include <asm/page_64.h> 37945feb17SBenjamin Herrenschmidt#include <asm/irqflags.h> 382191d657SAlexander Graf#include <asm/kvm_book3s_asm.h> 3946f52210SStephen Rothwell#include <asm/ptrace.h> 407230c564SBenjamin Herrenschmidt#include <asm/hw_irq.h> 416becef7eSchenhui zhao#include <asm/cputhreads.h> 427a25d912SScott Wood#include <asm/ppc-opcode.h> 432c86cd18SChristophe Leroy#include <asm/feature-fixups.h> 44879add77SChristophe Leroy#ifdef CONFIG_PPC_BOOK3S 45879add77SChristophe Leroy#include <asm/exception-64s.h> 46879add77SChristophe Leroy#else 47879add77SChristophe Leroy#include <asm/exception-64e.h> 48879add77SChristophe Leroy#endif 4914cf11afSPaul Mackerras 5025985edcSLucas De Marchi/* The physical memory is laid out such that the secondary processor 510ebc4cdaSBenjamin Herrenschmidt * spin code sits at 0x0000...0x00ff. On server, the vectors follow 520ebc4cdaSBenjamin Herrenschmidt * using the layout described in exceptions-64s.S 5314cf11afSPaul Mackerras */ 5414cf11afSPaul Mackerras 5514cf11afSPaul Mackerras/* 5614cf11afSPaul Mackerras * Entering into this code we make the following assumptions: 570ebc4cdaSBenjamin Herrenschmidt * 580ebc4cdaSBenjamin Herrenschmidt * For pSeries or server processors: 5914cf11afSPaul Mackerras * 1. The MMU is off & open firmware is running in real mode. 60339a3293SNicholas Piggin * 2. The primary CPU enters at __start. 61339a3293SNicholas Piggin * 3. If the RTAS supports "query-cpu-stopped-state", then secondary 62339a3293SNicholas Piggin * CPUs will enter as directed by "start-cpu" RTAS call, which is 63339a3293SNicholas Piggin * generic_secondary_smp_init, with PIR in r3. 64339a3293SNicholas Piggin * 4. Else the secondary CPUs will enter at secondary_hold (0x60) as 65339a3293SNicholas Piggin * directed by the "start-cpu" RTS call, with PIR in r3. 6627f44888SBenjamin Herrenschmidt * -or- For OPAL entry: 67339a3293SNicholas Piggin * 1. The MMU is off, processor in HV mode. 68339a3293SNicholas Piggin * 2. The primary CPU enters at 0 with device-tree in r3, OPAL base 69339a3293SNicholas Piggin * in r8, and entry in r9 for debugging purposes. 70339a3293SNicholas Piggin * 3. Secondary CPUs enter as directed by OPAL_START_CPU call, which 71339a3293SNicholas Piggin * is at generic_secondary_smp_init, with PIR in r3. 7214cf11afSPaul Mackerras * 730ebc4cdaSBenjamin Herrenschmidt * For Book3E processors: 740ebc4cdaSBenjamin Herrenschmidt * 1. The MMU is on running in AS0 in a state defined in ePAPR 750ebc4cdaSBenjamin Herrenschmidt * 2. The kernel is entered at __start 7614cf11afSPaul Mackerras */ 7714cf11afSPaul Mackerras 78b270bebdSNicholas Piggin/* 79b270bebdSNicholas Piggin * boot_from_prom and prom_init run at the physical address. Everything 80b270bebdSNicholas Piggin * after prom and kexec entry run at the virtual address (PAGE_OFFSET). 81b270bebdSNicholas Piggin * Secondaries run at the virtual address from generic_secondary_common_init 82b270bebdSNicholas Piggin * onward. 83b270bebdSNicholas Piggin */ 84b270bebdSNicholas Piggin 8557f26649SNicholas PigginOPEN_FIXED_SECTION(first_256B, 0x0, 0x100) 8657f26649SNicholas PigginUSE_FIXED_SECTION(first_256B) 8757f26649SNicholas Piggin /* 8857f26649SNicholas Piggin * Offsets are relative from the start of fixed section, and 8957f26649SNicholas Piggin * first_256B starts at 0. Offsets are a bit easier to use here 9057f26649SNicholas Piggin * than the fixed section entry macros. 9157f26649SNicholas Piggin */ 9257f26649SNicholas Piggin . = 0x0 9314cf11afSPaul Mackerras_GLOBAL(__start) 9414cf11afSPaul Mackerras /* NOP this out unconditionally */ 9514cf11afSPaul MackerrasBEGIN_FTR_SECTION 965c0484e2SBenjamin Herrenschmidt FIXUP_ENDIAN 97b1576fecSAnton Blanchard b __start_initialization_multiplatform 9814cf11afSPaul MackerrasEND_FTR_SECTION(0, 1) 9914cf11afSPaul Mackerras 10014cf11afSPaul Mackerras /* Catch branch to 0 in real mode */ 10114cf11afSPaul Mackerras trap 10214cf11afSPaul Mackerras 1032751b628SAnton Blanchard /* Secondary processors spin on this value until it becomes non-zero. 1042751b628SAnton Blanchard * When non-zero, it contains the real address of the function the cpu 1052751b628SAnton Blanchard * should jump to. 1061f6a93e4SPaul Mackerras */ 1077d4151b5SOlof Johansson .balign 8 10814cf11afSPaul Mackerras .globl __secondary_hold_spinloop 10914cf11afSPaul Mackerras__secondary_hold_spinloop: 110eb039161STobin C. Harding .8byte 0x0 11114cf11afSPaul Mackerras 11214cf11afSPaul Mackerras /* Secondary processors write this value with their cpu # */ 11314cf11afSPaul Mackerras /* after they enter the spin loop immediately below. */ 11414cf11afSPaul Mackerras .globl __secondary_hold_acknowledge 11514cf11afSPaul Mackerras__secondary_hold_acknowledge: 116eb039161STobin C. Harding .8byte 0x0 11714cf11afSPaul Mackerras 118928a3197SSonny Rao#ifdef CONFIG_RELOCATABLE 1198b8b0cc1SMilton Miller /* This flag is set to 1 by a loader if the kernel should run 1208b8b0cc1SMilton Miller * at the loaded address instead of the linked address. This 12187c78b61SMichael Ellerman * is used by kexec-tools to keep the kdump kernel in the 1228b8b0cc1SMilton Miller * crash_kernel region. The loader is responsible for 1238b8b0cc1SMilton Miller * observing the alignment requirement. 1248b8b0cc1SMilton Miller */ 12570839d20SNicholas Piggin 12670839d20SNicholas Piggin#ifdef CONFIG_RELOCATABLE_TEST 12770839d20SNicholas Piggin#define RUN_AT_LOAD_DEFAULT 1 /* Test relocation, do not copy to 0 */ 12870839d20SNicholas Piggin#else 12970839d20SNicholas Piggin#define RUN_AT_LOAD_DEFAULT 0x72756e30 /* "run0" -- relocate to 0 by default */ 13070839d20SNicholas Piggin#endif 13170839d20SNicholas Piggin 1328b8b0cc1SMilton Miller /* Do not move this variable as kexec-tools knows about it. */ 1338b8b0cc1SMilton Miller . = 0x5c 1348b8b0cc1SMilton Miller .globl __run_at_load 1358b8b0cc1SMilton Miller__run_at_load: 136d72c4a36SDaniel AxtensDEFINE_FIXED_SYMBOL(__run_at_load, first_256B) 13770839d20SNicholas Piggin .long RUN_AT_LOAD_DEFAULT 1388b8b0cc1SMilton Miller#endif 1398b8b0cc1SMilton Miller 14014cf11afSPaul Mackerras . = 0x60 14114cf11afSPaul Mackerras/* 14275423b7bSGeoff Levand * The following code is used to hold secondary processors 14375423b7bSGeoff Levand * in a spin loop after they have entered the kernel, but 14414cf11afSPaul Mackerras * before the bulk of the kernel has been relocated. This code 14514cf11afSPaul Mackerras * is relocated to physical address 0x60 before prom_init is run. 14614cf11afSPaul Mackerras * All of it must fit below the first exception vector at 0x100. 1471f6a93e4SPaul Mackerras * Use .globl here not _GLOBAL because we want __secondary_hold 1481f6a93e4SPaul Mackerras * to be the actual text address, not a descriptor. 14914cf11afSPaul Mackerras */ 1501f6a93e4SPaul Mackerras .globl __secondary_hold 1511f6a93e4SPaul Mackerras__secondary_hold: 1525c0484e2SBenjamin Herrenschmidt FIXUP_ENDIAN 153e0d68273SChristophe Leroy#ifndef CONFIG_PPC_BOOK3E_64 15414cf11afSPaul Mackerras mfmsr r24 15514cf11afSPaul Mackerras ori r24,r24,MSR_RI 15614cf11afSPaul Mackerras mtmsrd r24 /* RI on */ 1572d27cfd3SBenjamin Herrenschmidt#endif 158f1870f77SAnton Blanchard /* Grab our physical cpu number */ 15914cf11afSPaul Mackerras mr r24,r3 16096f013feSJimi Xenidis /* stash r4 for book3e */ 16196f013feSJimi Xenidis mr r25,r4 16214cf11afSPaul Mackerras 16314cf11afSPaul Mackerras /* Tell the master cpu we're here */ 16414cf11afSPaul Mackerras /* Relocation is off & we are located at an address less */ 16514cf11afSPaul Mackerras /* than 0x100, so only need to grab low order offset. */ 166d72c4a36SDaniel Axtens std r24,(ABS_ADDR(__secondary_hold_acknowledge, first_256B))(0) 16714cf11afSPaul Mackerras sync 16814cf11afSPaul Mackerras 16914cf11afSPaul Mackerras /* All secondary cpus wait here until told to start. */ 170ffc8e90dSNicholas Piggin100: ld r12,(ABS_ADDR(__secondary_hold_spinloop, first_256B))(0) 171cc7efbf9SAnton Blanchard cmpdi 0,r12,0 1721f6a93e4SPaul Mackerras beq 100b 17314cf11afSPaul Mackerras 174da665885SThiago Jung Bauermann#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE) 175e0d68273SChristophe Leroy#ifdef CONFIG_PPC_BOOK3E_64 176cc7efbf9SAnton Blanchard tovirt(r12,r12) 17796f013feSJimi Xenidis#endif 178cc7efbf9SAnton Blanchard mtctr r12 17914cf11afSPaul Mackerras mr r3,r24 18096f013feSJimi Xenidis /* 18196f013feSJimi Xenidis * it may be the case that other platforms have r4 right to 18296f013feSJimi Xenidis * begin with, this gives us some safety in case it is not 18396f013feSJimi Xenidis */ 184e0d68273SChristophe Leroy#ifdef CONFIG_PPC_BOOK3E_64 18596f013feSJimi Xenidis mr r4,r25 18696f013feSJimi Xenidis#else 1872d27cfd3SBenjamin Herrenschmidt li r4,0 18896f013feSJimi Xenidis#endif 189dd797738SBenjamin Herrenschmidt /* Make sure that patched code is visible */ 190dd797738SBenjamin Herrenschmidt isync 191758438a7SMichael Ellerman bctr 19214cf11afSPaul Mackerras#else 19363ce271bSChristophe Leroy0: trap 19463ce271bSChristophe Leroy EMIT_BUG_ENTRY 0b, __FILE__, __LINE__, 0 19514cf11afSPaul Mackerras#endif 19657f26649SNicholas PigginCLOSE_FIXED_SECTION(first_256B) 19714cf11afSPaul Mackerras 19814cf11afSPaul Mackerras/* 1990ebc4cdaSBenjamin Herrenschmidt * On server, we include the exception vectors code here as it 2000ebc4cdaSBenjamin Herrenschmidt * relies on absolute addressing which is only possible within 2010ebc4cdaSBenjamin Herrenschmidt * this compilation unit 20214cf11afSPaul Mackerras */ 2030ebc4cdaSBenjamin Herrenschmidt#ifdef CONFIG_PPC_BOOK3S 2040ebc4cdaSBenjamin Herrenschmidt#include "exceptions-64s.S" 20557f26649SNicholas Piggin#else 20657f26649SNicholas PigginOPEN_TEXT_SECTION(0x100) 2071f6a93e4SPaul Mackerras#endif 20814cf11afSPaul Mackerras 20957f26649SNicholas PigginUSE_TEXT_SECTION() 21057f26649SNicholas Piggin 211e754f4d1SNicholas Piggin#include "interrupt_64.S" 212e754f4d1SNicholas Piggin 213e0d68273SChristophe Leroy#ifdef CONFIG_PPC_BOOK3E_64 214d17799f9Schenhui zhao/* 2156becef7eSchenhui zhao * The booting_thread_hwid holds the thread id we want to boot in cpu 2166becef7eSchenhui zhao * hotplug case. It is set by cpu hotplug code, and is invalid by default. 2176becef7eSchenhui zhao * The thread id is the same as the initial value of SPRN_PIR[THREAD_ID] 2186becef7eSchenhui zhao * bit field. 2196becef7eSchenhui zhao */ 2206becef7eSchenhui zhao .globl booting_thread_hwid 2216becef7eSchenhui zhaobooting_thread_hwid: 2226becef7eSchenhui zhao .long INVALID_THREAD_HWID 2236becef7eSchenhui zhao .align 3 2246becef7eSchenhui zhao/* 2256becef7eSchenhui zhao * start a thread in the same core 2266becef7eSchenhui zhao * input parameters: 2276becef7eSchenhui zhao * r3 = the thread physical id 2286becef7eSchenhui zhao * r4 = the entry point where thread starts 2296becef7eSchenhui zhao */ 2306becef7eSchenhui zhao_GLOBAL(book3e_start_thread) 2316becef7eSchenhui zhao LOAD_REG_IMMEDIATE(r5, MSR_KERNEL) 232f87f253bSNicholas Piggin cmpwi r3, 0 2336becef7eSchenhui zhao beq 10f 234f87f253bSNicholas Piggin cmpwi r3, 1 2356becef7eSchenhui zhao beq 11f 2366becef7eSchenhui zhao /* If the thread id is invalid, just exit. */ 2376becef7eSchenhui zhao b 13f 2386becef7eSchenhui zhao10: 2397a25d912SScott Wood MTTMR(TMRN_IMSR0, 5) 2407a25d912SScott Wood MTTMR(TMRN_INIA0, 4) 2416becef7eSchenhui zhao b 12f 2426becef7eSchenhui zhao11: 2437a25d912SScott Wood MTTMR(TMRN_IMSR1, 5) 2447a25d912SScott Wood MTTMR(TMRN_INIA1, 4) 2456becef7eSchenhui zhao12: 2466becef7eSchenhui zhao isync 2476becef7eSchenhui zhao li r6, 1 2486becef7eSchenhui zhao sld r6, r6, r3 2496becef7eSchenhui zhao mtspr SPRN_TENS, r6 2506becef7eSchenhui zhao13: 2516becef7eSchenhui zhao blr 2526becef7eSchenhui zhao 2536becef7eSchenhui zhao/* 254d17799f9Schenhui zhao * stop a thread in the same core 255d17799f9Schenhui zhao * input parameter: 256d17799f9Schenhui zhao * r3 = the thread physical id 257d17799f9Schenhui zhao */ 258d17799f9Schenhui zhao_GLOBAL(book3e_stop_thread) 259f87f253bSNicholas Piggin cmpwi r3, 0 260d17799f9Schenhui zhao beq 10f 261f87f253bSNicholas Piggin cmpwi r3, 1 262d17799f9Schenhui zhao beq 10f 263d17799f9Schenhui zhao /* If the thread id is invalid, just exit. */ 264d17799f9Schenhui zhao b 13f 265d17799f9Schenhui zhao10: 266d17799f9Schenhui zhao li r4, 1 267d17799f9Schenhui zhao sld r4, r4, r3 268d17799f9Schenhui zhao mtspr SPRN_TENC, r4 269d17799f9Schenhui zhao13: 270d17799f9Schenhui zhao blr 271d17799f9Schenhui zhao 272e16c8765SAndy Fleming_GLOBAL(fsl_secondary_thread_init) 273f34b3e19SScott Wood mfspr r4,SPRN_BUCSR 274f34b3e19SScott Wood 275e16c8765SAndy Fleming /* Enable branch prediction */ 276e16c8765SAndy Fleming lis r3,BUCSR_INIT@h 277e16c8765SAndy Fleming ori r3,r3,BUCSR_INIT@l 278e16c8765SAndy Fleming mtspr SPRN_BUCSR,r3 279e16c8765SAndy Fleming isync 280e16c8765SAndy Fleming 281e16c8765SAndy Fleming /* 282e16c8765SAndy Fleming * Fix PIR to match the linear numbering in the device tree. 283e16c8765SAndy Fleming * 284e16c8765SAndy Fleming * On e6500, the reset value of PIR uses the low three bits for 285e16c8765SAndy Fleming * the thread within a core, and the upper bits for the core 286e16c8765SAndy Fleming * number. There are two threads per core, so shift everything 287e16c8765SAndy Fleming * but the low bit right by two bits so that the cpu numbering is 288e16c8765SAndy Fleming * continuous. 289f34b3e19SScott Wood * 290f34b3e19SScott Wood * If the old value of BUCSR is non-zero, this thread has run 291f34b3e19SScott Wood * before. Thus, we assume we are coming from kexec or a similar 292f34b3e19SScott Wood * scenario, and PIR is already set to the correct value. This 293f34b3e19SScott Wood * is a bit of a hack, but there are limited opportunities for 294f34b3e19SScott Wood * getting information into the thread and the alternatives 295f34b3e19SScott Wood * seemed like they'd be overkill. We can't tell just by looking 296f34b3e19SScott Wood * at the old PIR value which state it's in, since the same value 297f34b3e19SScott Wood * could be valid for one thread out of reset and for a different 298f34b3e19SScott Wood * thread in Linux. 299e16c8765SAndy Fleming */ 300f34b3e19SScott Wood 301e16c8765SAndy Fleming mfspr r3, SPRN_PIR 302f34b3e19SScott Wood cmpwi r4,0 303f34b3e19SScott Wood bne 1f 304e16c8765SAndy Fleming rlwimi r3, r3, 30, 2, 30 305e16c8765SAndy Fleming mtspr SPRN_PIR, r3 306f34b3e19SScott Wood1: 30714cf11afSPaul Mackerras mr r24,r3 30814cf11afSPaul Mackerras 30914cf11afSPaul Mackerras /* turn on 64-bit mode */ 310b1576fecSAnton Blanchard bl enable_64b_mode 31114cf11afSPaul Mackerras 3122d27cfd3SBenjamin Herrenschmidt /* Book3E initialization */ 3132d27cfd3SBenjamin Herrenschmidt mr r3,r24 314b1576fecSAnton Blanchard bl book3e_secondary_thread_init 315b270bebdSNicholas Piggin bl relative_toc 316b270bebdSNicholas Piggin 3172d27cfd3SBenjamin Herrenschmidt b generic_secondary_common_init 3182d27cfd3SBenjamin Herrenschmidt 319e0d68273SChristophe Leroy#endif /* CONFIG_PPC_BOOK3E_64 */ 320529d2bd5SMichael Ellerman 3212d27cfd3SBenjamin Herrenschmidt/* 3222d27cfd3SBenjamin Herrenschmidt * On pSeries and most other platforms, secondary processors spin 3232d27cfd3SBenjamin Herrenschmidt * in the following code. 3242d27cfd3SBenjamin Herrenschmidt * At entry, r3 = this processor's number (physical cpu id) 3252d27cfd3SBenjamin Herrenschmidt * 3262d27cfd3SBenjamin Herrenschmidt * On Book3E, r4 = 1 to indicate that the initial TLB entry for 3272d27cfd3SBenjamin Herrenschmidt * this core already exists (setup via some other mechanism such 3282d27cfd3SBenjamin Herrenschmidt * as SCOM before entry). 3292d27cfd3SBenjamin Herrenschmidt */ 3302d27cfd3SBenjamin Herrenschmidt_GLOBAL(generic_secondary_smp_init) 3315c0484e2SBenjamin Herrenschmidt FIXUP_ENDIAN 332*7e3a68beSNicholas Piggin 333*7e3a68beSNicholas Piggin li r13,0 334*7e3a68beSNicholas Piggin 335*7e3a68beSNicholas Piggin /* Poison TOC */ 336*7e3a68beSNicholas Piggin li r2,-1 337*7e3a68beSNicholas Piggin 3382d27cfd3SBenjamin Herrenschmidt mr r24,r3 3392d27cfd3SBenjamin Herrenschmidt mr r25,r4 3402d27cfd3SBenjamin Herrenschmidt 3412d27cfd3SBenjamin Herrenschmidt /* turn on 64-bit mode */ 342b1576fecSAnton Blanchard bl enable_64b_mode 3432d27cfd3SBenjamin Herrenschmidt 344e0d68273SChristophe Leroy#ifdef CONFIG_PPC_BOOK3E_64 3452d27cfd3SBenjamin Herrenschmidt /* Book3E initialization */ 3462d27cfd3SBenjamin Herrenschmidt mr r3,r24 3472d27cfd3SBenjamin Herrenschmidt mr r4,r25 348b1576fecSAnton Blanchard bl book3e_secondary_core_init 349b270bebdSNicholas Piggin /* Now NIA and r2 are relocated to PAGE_OFFSET if not already */ 3506becef7eSchenhui zhao/* 3516becef7eSchenhui zhao * After common core init has finished, check if the current thread is the 3526becef7eSchenhui zhao * one we wanted to boot. If not, start the specified thread and stop the 3536becef7eSchenhui zhao * current thread. 3546becef7eSchenhui zhao */ 3556becef7eSchenhui zhao LOAD_REG_ADDR(r4, booting_thread_hwid) 3566becef7eSchenhui zhao lwz r3, 0(r4) 3576becef7eSchenhui zhao li r5, INVALID_THREAD_HWID 3586becef7eSchenhui zhao cmpw r3, r5 3596becef7eSchenhui zhao beq 20f 3606becef7eSchenhui zhao 3616becef7eSchenhui zhao /* 3626becef7eSchenhui zhao * The value of booting_thread_hwid has been stored in r3, 3636becef7eSchenhui zhao * so make it invalid. 3646becef7eSchenhui zhao */ 3656becef7eSchenhui zhao stw r5, 0(r4) 3666becef7eSchenhui zhao 3676becef7eSchenhui zhao /* 3686becef7eSchenhui zhao * Get the current thread id and check if it is the one we wanted. 3696becef7eSchenhui zhao * If not, start the one specified in booting_thread_hwid and stop 3706becef7eSchenhui zhao * the current thread. 3716becef7eSchenhui zhao */ 3726becef7eSchenhui zhao mfspr r8, SPRN_TIR 3736becef7eSchenhui zhao cmpw r3, r8 3746becef7eSchenhui zhao beq 20f 3756becef7eSchenhui zhao 3766becef7eSchenhui zhao /* start the specified thread */ 3776becef7eSchenhui zhao LOAD_REG_ADDR(r5, DOTSYM(fsl_secondary_thread_init)) 3786becef7eSchenhui zhao bl book3e_start_thread 3796becef7eSchenhui zhao 3806becef7eSchenhui zhao /* stop the current thread */ 3816becef7eSchenhui zhao mr r3, r8 3826becef7eSchenhui zhao bl book3e_stop_thread 3836becef7eSchenhui zhao10: 3846becef7eSchenhui zhao b 10b 3856becef7eSchenhui zhao20: 3866becef7eSchenhui zhao#else 387b270bebdSNicholas Piggin /* Now the MMU is off, can branch to our PAGE_OFFSET address */ 388b270bebdSNicholas Piggin bcl 20,31,$+4 389b270bebdSNicholas Piggin1: mflr r11 390b270bebdSNicholas Piggin addi r11,r11,(2f - 1b) 391b270bebdSNicholas Piggin tovirt(r11, r11) 392b270bebdSNicholas Piggin mtctr r11 393b270bebdSNicholas Piggin bctr 394b270bebdSNicholas Piggin2: 395b270bebdSNicholas Piggin bl relative_toc 396b270bebdSNicholas Piggin#endif 3972d27cfd3SBenjamin Herrenschmidt 3982d27cfd3SBenjamin Herrenschmidtgeneric_secondary_common_init: 3992d27cfd3SBenjamin Herrenschmidt /* Set up a paca value for this processor. Since we have the 40014cf11afSPaul Mackerras * physical cpu id in r24, we need to search the pacas to find 40114cf11afSPaul Mackerras * which logical id maps to our physical one. 40214cf11afSPaul Mackerras */ 40314cf11afSPaul Mackerras#ifndef CONFIG_SMP 404768d18adSMilton Miller b kexec_wait /* wait for next kernel if !SMP */ 405b1576fecSAnton Blanchard#else 406768d18adSMilton Miller LOAD_REG_ADDR(r8, paca_ptrs) /* Load paca_ptrs pointe */ 407d2e60075SNicholas Piggin ld r8,0(r8) /* Get base vaddr of array */ 408d2e60075SNicholas Piggin#if (NR_CPUS == 1) || defined(CONFIG_FORCE_NR_CPUS) 409546a073dSYury Norov LOAD_REG_IMMEDIATE(r7, NR_CPUS) 410546a073dSYury Norov#else 411546a073dSYury Norov LOAD_REG_ADDR(r7, nr_cpu_ids) /* Load nr_cpu_ids address */ 412768d18adSMilton Miller lwz r7,0(r7) /* also the max paca allocated */ 413768d18adSMilton Miller#endif 414546a073dSYury Norov li r5,0 /* logical cpu id */ 41514cf11afSPaul Mackerras1: 416d2e60075SNicholas Piggin sldi r9,r5,3 /* get paca_ptrs[] index from cpu id */ 417d2e60075SNicholas Piggin ldx r13,r9,r8 /* r13 = paca_ptrs[cpu id] */ 418d2e60075SNicholas Piggin lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */ 419d2e60075SNicholas Piggin cmpw r6,r24 /* Compare to our id */ 42014cf11afSPaul Mackerras beq 2f 42114cf11afSPaul Mackerras addi r5,r5,1 42214cf11afSPaul Mackerras cmpw r5,r7 /* Check if more pacas exist */ 423768d18adSMilton Miller blt 1b 42414cf11afSPaul Mackerras 42514cf11afSPaul Mackerras mr r3,r24 /* not found, copy phys to r3 */ 42614cf11afSPaul Mackerras b kexec_wait /* next kernel might do better */ 427b1576fecSAnton Blanchard 42814cf11afSPaul Mackerras2: SET_PACA(r13) 4292dd60d79SBenjamin Herrenschmidt#ifdef CONFIG_PPC_BOOK3E_64 430e0d68273SChristophe Leroy addi r12,r13,PACA_EXTLB /* and TLB exc frame in another */ 4312d27cfd3SBenjamin Herrenschmidt mtspr SPRN_SPRG_TLB_EXFRAME,r12 4322d27cfd3SBenjamin Herrenschmidt#endif 4332d27cfd3SBenjamin Herrenschmidt 4342d27cfd3SBenjamin Herrenschmidt /* From now on, r24 is expected to be logical cpuid */ 43514cf11afSPaul Mackerras mr r24,r5 43614cf11afSPaul Mackerras 437b6f6b98aSSonny Rao /* Create a temp kernel stack for use before relocation is on. */ 4383c0b976bSJordan Niethe ld r1,PACAEMERGSP(r13) 4393c0b976bSJordan Niethe subi r1,r1,STACK_FRAME_MIN_SIZE 44090f1b431SNicholas Piggin 4413c0b976bSJordan Niethe /* See if we need to call a cpu state restore handler */ 442f39b7a55SOlof Johansson LOAD_REG_ADDR(r23, cur_cpu_spec) 443e31aa453SPaul Mackerras ld r23,0(r23) 444f39b7a55SOlof Johansson ld r12,CPU_SPEC_RESTORE(r23) 4452751b628SAnton Blanchard cmpdi 0,r12,0 4462751b628SAnton Blanchard beq 3f 4479d07bc84SBenjamin Herrenschmidt#ifdef CONFIG_PPC64_ELF_ABI_V1 4487d40aff8SChristophe Leroy ld r12,0(r12) 4492751b628SAnton Blanchard#endif 4502751b628SAnton Blanchard mtctr r12 451cc7efbf9SAnton Blanchard bctrl 452f39b7a55SOlof Johansson 453f39b7a55SOlof Johansson3: LOAD_REG_ADDR(r3, spinning_secondaries) /* Decrement spinning_secondaries */ 4547ac87abbSMatt Evans lwarx r4,0,r3 4559d07bc84SBenjamin Herrenschmidt subi r4,r4,1 4569d07bc84SBenjamin Herrenschmidt stwcx. r4,0,r3 4579d07bc84SBenjamin Herrenschmidt bne 3b 4589d07bc84SBenjamin Herrenschmidt isync 4599d07bc84SBenjamin Herrenschmidt 4609d07bc84SBenjamin Herrenschmidt4: HMT_LOW 4619d07bc84SBenjamin Herrenschmidt lbz r23,PACAPROCSTART(r13) /* Test if this processor should */ 462ad0693eeSBenjamin Herrenschmidt /* start. */ 463ad0693eeSBenjamin Herrenschmidt cmpwi 0,r23,0 464ad0693eeSBenjamin Herrenschmidt beq 4b /* Loop until told to go */ 4659d07bc84SBenjamin Herrenschmidt 466ad0693eeSBenjamin Herrenschmidt sync /* order paca.run and cur_cpu_spec */ 467ad0693eeSBenjamin Herrenschmidt isync /* In case code patching happened */ 4689d07bc84SBenjamin Herrenschmidt 469ad0693eeSBenjamin Herrenschmidt b __secondary_start 470c705677eSStephen Rothwell#endif /* SMP */ 471768d18adSMilton Miller 47214cf11afSPaul Mackerras/* 473e31aa453SPaul Mackerras * Turn the MMU off. 474e31aa453SPaul Mackerras * Assumes we're mapped EA == RA if the MMU is on. 475e31aa453SPaul Mackerras */ 476e31aa453SPaul Mackerras#ifdef CONFIG_PPC_BOOK3S 4772d27cfd3SBenjamin HerrenschmidtSYM_FUNC_START_LOCAL(__mmu_off) 47829a011fcSSathvika Vasireddy mfmsr r3 47914cf11afSPaul Mackerras andi. r0,r3,MSR_IR|MSR_DR 48014cf11afSPaul Mackerras beqlr 48114cf11afSPaul Mackerras mflr r4 482e31aa453SPaul Mackerras andc r3,r3,r0 48314cf11afSPaul Mackerras mtspr SPRN_SRR0,r4 48414cf11afSPaul Mackerras mtspr SPRN_SRR1,r3 48514cf11afSPaul Mackerras sync 48614cf11afSPaul Mackerras rfid 48714cf11afSPaul Mackerras b . /* prevent speculative execution */ 48814cf11afSPaul MackerrasSYM_FUNC_END(__mmu_off) 48929a011fcSSathvika Vasireddy 49014cf11afSPaul MackerrasSYM_FUNC_START_LOCAL(start_initialization_book3s) 49138d73b67SSathvika Vasireddy mflr r25 49258f24eeaSNicholas Piggin 49358f24eeaSNicholas Piggin /* Setup some critical 970 SPRs before switching MMU off */ 49458f24eeaSNicholas Piggin mfspr r0,SPRN_PVR 49558f24eeaSNicholas Piggin srwi r0,r0,16 49658f24eeaSNicholas Piggin cmpwi r0,0x39 /* 970 */ 49758f24eeaSNicholas Piggin beq 1f 49858f24eeaSNicholas Piggin cmpwi r0,0x3c /* 970FX */ 49958f24eeaSNicholas Piggin beq 1f 50058f24eeaSNicholas Piggin cmpwi r0,0x44 /* 970MP */ 50158f24eeaSNicholas Piggin beq 1f 50258f24eeaSNicholas Piggin cmpwi r0,0x45 /* 970GX */ 50358f24eeaSNicholas Piggin bne 2f 50458f24eeaSNicholas Piggin1: bl __cpu_preinit_ppc970 50558f24eeaSNicholas Piggin2: 50658f24eeaSNicholas Piggin 50758f24eeaSNicholas Piggin /* Switch off MMU if not already off */ 50858f24eeaSNicholas Piggin bl __mmu_off 50958f24eeaSNicholas Piggin 51058f24eeaSNicholas Piggin /* Now the MMU is off, can return to our PAGE_OFFSET address */ 511b270bebdSNicholas Piggin tovirt(r25,r25) 512b270bebdSNicholas Piggin mtlr r25 51358f24eeaSNicholas Piggin blr 51458f24eeaSNicholas PigginSYM_FUNC_END(start_initialization_book3s) 51538d73b67SSathvika Vasireddy#endif 51658f24eeaSNicholas Piggin 51714cf11afSPaul Mackerras/* 51814cf11afSPaul Mackerras * Here is our main kernel entry point. We support currently 2 kind of entries 51914cf11afSPaul Mackerras * depending on the value of r5. 52014cf11afSPaul Mackerras * 52114cf11afSPaul Mackerras * r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content 52214cf11afSPaul Mackerras * in r3...r7 52314cf11afSPaul Mackerras * 52414cf11afSPaul Mackerras * r5 == NULL -> kexec style entry. r3 is a physical pointer to the 52514cf11afSPaul Mackerras * DT block, r4 is a physical pointer to the kernel itself 52614cf11afSPaul Mackerras * 52714cf11afSPaul Mackerras */ 52814cf11afSPaul Mackerras__start_initialization_multiplatform: 5296a3bab90SAnton Blanchard /* Make sure we are running in 64 bits mode */ 530e31aa453SPaul Mackerras bl enable_64b_mode 531b1576fecSAnton Blanchard 532e31aa453SPaul Mackerras /* Zero r13 (paca) so early program check / mce don't use it */ 533e1100ceeSNicholas Piggin li r13,0 534e1100ceeSNicholas Piggin 535e1100ceeSNicholas Piggin /* Poison TOC */ 536*7e3a68beSNicholas Piggin li r2,-1 537*7e3a68beSNicholas Piggin 538*7e3a68beSNicholas Piggin /* 53914cf11afSPaul Mackerras * Are we booted from a PROM Of-type client-interface ? 54014cf11afSPaul Mackerras */ 54114cf11afSPaul Mackerras cmpldi cr0,r5,0 54214cf11afSPaul Mackerras beq 1f 543939e60f6SStephen Rothwell b __boot_from_prom /* yes -> prom */ 544b1576fecSAnton Blanchard1: 545939e60f6SStephen Rothwell /* Save parameters */ 54614cf11afSPaul Mackerras mr r31,r3 54714cf11afSPaul Mackerras mr r30,r4 54814cf11afSPaul Mackerras#ifdef CONFIG_PPC_EARLY_DEBUG_OPAL 549daea1175SBenjamin Herrenschmidt /* Save OPAL entry */ 550daea1175SBenjamin Herrenschmidt mr r28,r8 551daea1175SBenjamin Herrenschmidt mr r29,r9 552daea1175SBenjamin Herrenschmidt#endif 553daea1175SBenjamin Herrenschmidt 55414cf11afSPaul Mackerras /* Get TOC pointer (current runtime address) */ 5554f18b9e6SNicholas Piggin bl relative_toc 5564f18b9e6SNicholas Piggin 5574f18b9e6SNicholas Piggin /* These functions return to the virtual (PAGE_OFFSET) address */ 558b270bebdSNicholas Piggin#ifdef CONFIG_PPC_BOOK3E_64 559e0d68273SChristophe Leroy bl start_initialization_book3e 560b1576fecSAnton Blanchard#else 5612d27cfd3SBenjamin Herrenschmidt bl start_initialization_book3s 56258f24eeaSNicholas Piggin#endif /* CONFIG_PPC_BOOK3E_64 */ 563e0d68273SChristophe Leroy 5644f18b9e6SNicholas Piggin /* Get TOC pointer, virtual */ 565b270bebdSNicholas Piggin bl relative_toc 5664f18b9e6SNicholas Piggin 5674f18b9e6SNicholas Piggin /* find out where we are now */ 5684f18b9e6SNicholas Piggin 569b270bebdSNicholas Piggin /* OPAL doesn't pass base address in r4, have to derive it. */ 570b270bebdSNicholas Piggin bcl 20,31,$+4 5714f18b9e6SNicholas Piggin0: mflr r26 /* r26 = runtime addr here */ 5724f18b9e6SNicholas Piggin addis r26,r26,(_stext - 0b)@ha 5734f18b9e6SNicholas Piggin addi r26,r26,(_stext - 0b)@l /* current runtime base addr */ 5744f18b9e6SNicholas Piggin 5754f18b9e6SNicholas Piggin b __after_prom_start 57658f24eeaSNicholas Piggin 57714cf11afSPaul Mackerras__REF 5786eeb9b3bSMichael Ellerman__boot_from_prom: 5796a3bab90SAnton Blanchard#ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE 58028794d34SBenjamin Herrenschmidt /* Get TOC pointer, non-virtual */ 581b270bebdSNicholas Piggin bl relative_toc 5824f18b9e6SNicholas Piggin 5834f18b9e6SNicholas Piggin /* find out where we are now */ 5844f18b9e6SNicholas Piggin bcl 20,31,$+4 5854f18b9e6SNicholas Piggin0: mflr r26 /* r26 = runtime addr here */ 5864f18b9e6SNicholas Piggin addis r26,r26,(_stext - 0b)@ha 5874f18b9e6SNicholas Piggin addi r26,r26,(_stext - 0b)@l /* current runtime base addr */ 5884f18b9e6SNicholas Piggin 5894f18b9e6SNicholas Piggin /* Save parameters */ 59014cf11afSPaul Mackerras mr r31,r3 59114cf11afSPaul Mackerras mr r30,r4 59214cf11afSPaul Mackerras mr r29,r5 59314cf11afSPaul Mackerras mr r28,r6 59414cf11afSPaul Mackerras mr r27,r7 59514cf11afSPaul Mackerras 59614cf11afSPaul Mackerras /* 5976088857bSOlaf Hering * Align the stack to 16-byte boundary 5986088857bSOlaf Hering * Depending on the size and layout of the ELF sections in the initial 5996088857bSOlaf Hering * boot binary, the stack pointer may be unaligned on PowerMac 600e31aa453SPaul Mackerras */ 6016088857bSOlaf Hering rldicr r1,r1,0,59 602c05b4770SLinus Torvalds 603c05b4770SLinus Torvalds#ifdef CONFIG_RELOCATABLE 604549e8152SPaul Mackerras /* Relocate code for where we are now */ 605549e8152SPaul Mackerras mr r3,r26 606549e8152SPaul Mackerras bl relocate 607b1576fecSAnton Blanchard#endif 608549e8152SPaul Mackerras 609549e8152SPaul Mackerras /* Restore parameters */ 61014cf11afSPaul Mackerras mr r3,r31 61114cf11afSPaul Mackerras mr r4,r30 61214cf11afSPaul Mackerras mr r5,r29 61314cf11afSPaul Mackerras mr r6,r28 61414cf11afSPaul Mackerras mr r7,r27 61514cf11afSPaul Mackerras 61614cf11afSPaul Mackerras /* Do all of the interaction with OF client interface */ 61714cf11afSPaul Mackerras mr r8,r26 618549e8152SPaul Mackerras bl CFUNC(prom_init) 6194e991e3cSNicholas Piggin#endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */ 62028794d34SBenjamin Herrenschmidt 62128794d34SBenjamin Herrenschmidt /* We never return. We also hit that trap if trying to boot 62228794d34SBenjamin Herrenschmidt * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */ 62328794d34SBenjamin Herrenschmidt trap 62414cf11afSPaul Mackerras .previous 6256eeb9b3bSMichael Ellerman 62614cf11afSPaul Mackerras__after_prom_start: 6276a3bab90SAnton Blanchard#ifdef CONFIG_RELOCATABLE 628549e8152SPaul Mackerras /* process relocations for the final address of the kernel */ 629549e8152SPaul Mackerras lwz r7,(FIXED_SYMBOL_ABS_ADDR(__run_at_load))(r26) 63057f26649SNicholas Piggin cmplwi cr0,r7,1 /* flagged to stay where we are ? */ 631928a3197SSonny Rao mr r25,r26 /* then use current kernel base */ 632b270bebdSNicholas Piggin beq 1f 633b270bebdSNicholas Piggin LOAD_REG_IMMEDIATE(r25, PAGE_OFFSET) /* else use static kernel base */ 634b270bebdSNicholas Piggin1: mr r3,r25 63554622f10SMohan Kumar M bl relocate 636b1576fecSAnton Blanchard#if defined(CONFIG_PPC_BOOK3E_64) 637e0d68273SChristophe Leroy /* IVPR needs to be set after relocation. */ 6381cb6e064STiejun Chen bl init_core_book3e 6391cb6e064STiejun Chen#endif 6401cb6e064STiejun Chen#endif 641549e8152SPaul Mackerras 64214cf11afSPaul Mackerras/* 64314cf11afSPaul Mackerras * We need to run with _stext at physical address PHYSICAL_START. 644e31aa453SPaul Mackerras * This will leave some code in the first 256B of 64514cf11afSPaul Mackerras * real memory, which are reserved for software use. 64614cf11afSPaul Mackerras * 64714cf11afSPaul Mackerras * Note: This process overwrites the OF exception vectors. 64814cf11afSPaul Mackerras */ 64914cf11afSPaul Mackerras LOAD_REG_IMMEDIATE(r3, PAGE_OFFSET) 650b270bebdSNicholas Piggin mr. r4,r26 /* In some cases the loader may */ 651549e8152SPaul Mackerras beq 9f /* have already put us at zero */ 652e31aa453SPaul Mackerras li r6,0x100 /* Start offset, the first 0x100 */ 65314cf11afSPaul Mackerras /* bytes were copied earlier. */ 65414cf11afSPaul Mackerras 65514cf11afSPaul Mackerras#ifdef CONFIG_RELOCATABLE 65611ee7e99SAnton Blanchard/* 65754622f10SMohan Kumar M * Check if the kernel has to be running as relocatable kernel based on the 65854622f10SMohan Kumar M * variable __run_at_load, if it is set the kernel is treated as relocatable 6598b8b0cc1SMilton Miller * kernel, otherwise it will be moved to PHYSICAL_START 66054622f10SMohan Kumar M */ 66154622f10SMohan Kumar M lwz r7,(FIXED_SYMBOL_ABS_ADDR(__run_at_load))(r26) 66257f26649SNicholas Piggin cmplwi cr0,r7,1 6638b8b0cc1SMilton Miller bne 3f 66454622f10SMohan Kumar M 66554622f10SMohan Kumar M#ifdef CONFIG_PPC_BOOK3E_64 666e0d68273SChristophe Leroy LOAD_REG_ADDR(r5, __end_interrupts) 6671cb6e064STiejun Chen LOAD_REG_ADDR(r11, _stext) 6681cb6e064STiejun Chen sub r5,r5,r11 6691cb6e064STiejun Chen#else 6701cb6e064STiejun Chen /* just copy interrupts */ 671c1fb6816SMichael Neuling LOAD_REG_IMMEDIATE_SYM(r5, r11, FIXED_SYMBOL_ABS_ADDR(__end_interrupts)) 672d7fb5b18SChristophe Leroy#endif 6731cb6e064STiejun Chen b 5f 67454622f10SMohan Kumar M3: 67554622f10SMohan Kumar M#endif 67654622f10SMohan Kumar M /* # bytes of memory to copy */ 67757f26649SNicholas Piggin lis r5,(ABS_ADDR(copy_to_here, text))@ha 678d72c4a36SDaniel Axtens addi r5,r5,(ABS_ADDR(copy_to_here, text))@l 679d72c4a36SDaniel Axtens 68054622f10SMohan Kumar M bl copy_and_flush /* copy the first n bytes */ 681b1576fecSAnton Blanchard /* this includes the code being */ 68214cf11afSPaul Mackerras /* executed here. */ 68314cf11afSPaul Mackerras /* Jump to the copy of this code that we just made */ 68457f26649SNicholas Piggin addis r8,r3,(ABS_ADDR(4f, text))@ha 685d72c4a36SDaniel Axtens addi r12,r8,(ABS_ADDR(4f, text))@l 686d72c4a36SDaniel Axtens mtctr r12 687cc7efbf9SAnton Blanchard bctr 68814cf11afSPaul Mackerras 68914cf11afSPaul Mackerras.balign 8 690286e4f90SAnton Blanchardp_end: .8byte _end - copy_to_here 691eb039161STobin C. Harding 69254622f10SMohan Kumar M4: 693573819e3SNicholas Piggin /* 694573819e3SNicholas Piggin * Now copy the rest of the kernel up to _end, add 695573819e3SNicholas Piggin * _end - copy_to_here to the copy limit and run again. 696573819e3SNicholas Piggin */ 697573819e3SNicholas Piggin addis r8,r26,(ABS_ADDR(p_end, text))@ha 698d72c4a36SDaniel Axtens ld r8,(ABS_ADDR(p_end, text))@l(r8) 699d72c4a36SDaniel Axtens add r5,r5,r8 700573819e3SNicholas Piggin5: bl copy_and_flush /* copy the rest */ 701b1576fecSAnton Blanchard 702e31aa453SPaul Mackerras9: b start_here_multiplatform 703b1576fecSAnton Blanchard 704e31aa453SPaul Mackerras/* 70514cf11afSPaul Mackerras * Copy routine used to copy the kernel to start at physical address 0 70614cf11afSPaul Mackerras * and flush and invalidate the caches as needed. 70714cf11afSPaul Mackerras * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset 70814cf11afSPaul Mackerras * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5. 70914cf11afSPaul Mackerras * 71014cf11afSPaul Mackerras * Note: this routine *only* clobbers r0, r6 and lr 71114cf11afSPaul Mackerras */ 71214cf11afSPaul Mackerras_GLOBAL(copy_and_flush) 71314cf11afSPaul Mackerras addi r5,r5,-8 71414cf11afSPaul Mackerras addi r6,r6,-8 71514cf11afSPaul Mackerras4: li r0,8 /* Use the smallest common */ 7165a2fe38dSOlof Johansson /* denominator cache line */ 71714cf11afSPaul Mackerras /* size. This results in */ 71814cf11afSPaul Mackerras /* extra cache line flushes */ 71914cf11afSPaul Mackerras /* but operation is correct. */ 72014cf11afSPaul Mackerras /* Can't get cache line size */ 72114cf11afSPaul Mackerras /* from NACA as it is being */ 72214cf11afSPaul Mackerras /* moved too. */ 72314cf11afSPaul Mackerras 72414cf11afSPaul Mackerras mtctr r0 /* put # words/line in ctr */ 72514cf11afSPaul Mackerras3: addi r6,r6,8 /* copy a cache line */ 72614cf11afSPaul Mackerras ldx r0,r6,r4 72714cf11afSPaul Mackerras stdx r0,r6,r3 72814cf11afSPaul Mackerras bdnz 3b 72914cf11afSPaul Mackerras dcbst r6,r3 /* write it to memory */ 73014cf11afSPaul Mackerras sync 73114cf11afSPaul Mackerras icbi r6,r3 /* flush the icache line */ 73214cf11afSPaul Mackerras cmpld 0,r6,r5 73314cf11afSPaul Mackerras blt 4b 73414cf11afSPaul Mackerras sync 73514cf11afSPaul Mackerras addi r5,r5,8 73614cf11afSPaul Mackerras addi r6,r6,8 73714cf11afSPaul Mackerras isync 73829ce3c50SMichael Neuling blr 73914cf11afSPaul Mackerras 74014cf11afSPaul Mackerras_ASM_NOKPROBE_SYMBOL(copy_and_flush); /* Called in real mode */ 7418119cefdSHari Bathini 7428119cefdSHari Bathini.align 8 74314cf11afSPaul Mackerrascopy_to_here: 74414cf11afSPaul Mackerras 74514cf11afSPaul Mackerras#ifdef CONFIG_SMP 74614cf11afSPaul Mackerras#ifdef CONFIG_PPC_PMAC 74714cf11afSPaul Mackerras/* 74814cf11afSPaul Mackerras * On PowerMac, secondary processors starts from the reset vector, which 74914cf11afSPaul Mackerras * is temporarily turned into a call to one of the functions below. 75014cf11afSPaul Mackerras */ 75114cf11afSPaul Mackerras .section ".text"; 75214cf11afSPaul Mackerras .align 2 ; 75314cf11afSPaul Mackerras 75414cf11afSPaul Mackerras .globl __secondary_start_pmac_0 75535499c01SPaul Mackerras__secondary_start_pmac_0: 75635499c01SPaul Mackerras /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */ 75735499c01SPaul Mackerras li r24,0 75835499c01SPaul Mackerras b 1f 75935499c01SPaul Mackerras li r24,1 76014cf11afSPaul Mackerras b 1f 76135499c01SPaul Mackerras li r24,2 76214cf11afSPaul Mackerras b 1f 76335499c01SPaul Mackerras li r24,3 76414cf11afSPaul Mackerras1: 76535499c01SPaul Mackerras 76614cf11afSPaul Mackerras_GLOBAL(pmac_secondary_start) 76714cf11afSPaul Mackerras /* turn on 64-bit mode */ 76814cf11afSPaul Mackerras bl enable_64b_mode 769b1576fecSAnton Blanchard 77014cf11afSPaul Mackerras li r0,0 771c478b581SBenjamin Herrenschmidt mfspr r3,SPRN_HID4 772c478b581SBenjamin Herrenschmidt rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */ 773c478b581SBenjamin Herrenschmidt sync 774c478b581SBenjamin Herrenschmidt mtspr SPRN_HID4,r3 775c478b581SBenjamin Herrenschmidt isync 776c478b581SBenjamin Herrenschmidt sync 777c478b581SBenjamin Herrenschmidt slbia 778c478b581SBenjamin Herrenschmidt 779c478b581SBenjamin Herrenschmidt /* Branch to our PAGE_OFFSET address */ 780b270bebdSNicholas Piggin bcl 20,31,$+4 781b270bebdSNicholas Piggin1: mflr r11 782b270bebdSNicholas Piggin addi r11,r11,(2f - 1b) 783b270bebdSNicholas Piggin tovirt(r11, r11) 784b270bebdSNicholas Piggin mtctr r11 785b270bebdSNicholas Piggin bctr 786b270bebdSNicholas Piggin2: 787b270bebdSNicholas Piggin bl relative_toc 788b1576fecSAnton Blanchard 789e31aa453SPaul Mackerras /* Copy some CPU settings from CPU 0 */ 79014cf11afSPaul Mackerras bl __restore_cpu_ppc970 791b1576fecSAnton Blanchard 79214cf11afSPaul Mackerras /* pSeries do that early though I don't think we really need it */ 79314cf11afSPaul Mackerras mfmsr r3 79414cf11afSPaul Mackerras ori r3,r3,MSR_RI 79514cf11afSPaul Mackerras mtmsrd r3 /* RI on */ 79614cf11afSPaul Mackerras 79714cf11afSPaul Mackerras /* Set up a paca value for this processor. */ 79814cf11afSPaul Mackerras LOAD_REG_ADDR(r4,paca_ptrs) /* Load paca pointer */ 799d2e60075SNicholas Piggin ld r4,0(r4) /* Get base vaddr of paca_ptrs array */ 800d2e60075SNicholas Piggin sldi r5,r24,3 /* get paca_ptrs[] index from cpu id */ 801d2e60075SNicholas Piggin ldx r13,r5,r4 /* r13 = paca_ptrs[cpu id] */ 802d2e60075SNicholas Piggin SET_PACA(r13) /* Save vaddr of paca in an SPRG*/ 8032dd60d79SBenjamin Herrenschmidt 80414cf11afSPaul Mackerras /* Mark interrupts soft and hard disabled (they might be enabled 80562cc67b9SBenjamin Herrenschmidt * in the PACA when doing hotplug) 80662cc67b9SBenjamin Herrenschmidt */ 80762cc67b9SBenjamin Herrenschmidt li r0,IRQS_DISABLED 808c2e480baSMadhavan Srinivasan stb r0,PACAIRQSOFTMASK(r13) 8094e26bc4aSMadhavan Srinivasan li r0,PACA_IRQ_HARD_DIS 8107230c564SBenjamin Herrenschmidt stb r0,PACAIRQHAPPENED(r13) 8117230c564SBenjamin Herrenschmidt 81262cc67b9SBenjamin Herrenschmidt /* Create a temp kernel stack for use before relocation is on. */ 81314cf11afSPaul Mackerras ld r1,PACAEMERGSP(r13) 81414cf11afSPaul Mackerras subi r1,r1,STACK_FRAME_MIN_SIZE 81590f1b431SNicholas Piggin 81614cf11afSPaul Mackerras b __secondary_start 817c705677eSStephen Rothwell 81814cf11afSPaul Mackerras#endif /* CONFIG_PPC_PMAC */ 81914cf11afSPaul Mackerras 82014cf11afSPaul Mackerras/* 82114cf11afSPaul Mackerras * This function is called after the master CPU has released the 82214cf11afSPaul Mackerras * secondary processors. The execution environment is relocation off. 82314cf11afSPaul Mackerras * The paca for this processor has the following fields initialized at 82414cf11afSPaul Mackerras * this point: 82514cf11afSPaul Mackerras * 1. Processor number 82614cf11afSPaul Mackerras * 2. Segment table pointer (virtual address) 82714cf11afSPaul Mackerras * On entry the following are set: 82814cf11afSPaul Mackerras * r1 = stack pointer (real addr of temp stack) 8294f8cf36fSBenjamin Herrenschmidt * r24 = cpu# (in Linux terms) 83014cf11afSPaul Mackerras * r13 = paca virtual address 83114cf11afSPaul Mackerras * SPRG_PACA = paca virtual address 832ee43eb78SBenjamin Herrenschmidt */ 83314cf11afSPaul Mackerras .section ".text"; 8342d27cfd3SBenjamin Herrenschmidt .align 2 ; 8352d27cfd3SBenjamin Herrenschmidt 8362d27cfd3SBenjamin Herrenschmidt .globl __secondary_start 837fc68e869SStephen Rothwell__secondary_start: 838c705677eSStephen Rothwell /* Set thread priority to MEDIUM */ 839799d6046SPaul Mackerras HMT_MEDIUM 840799d6046SPaul Mackerras 84114cf11afSPaul Mackerras /* 842eafd825eSMichael Ellerman * Do early setup for this CPU, in particular initialising the MMU so we 843eafd825eSMichael Ellerman * can turn it on below. This is a call to C, which is OK, we're still 844eafd825eSMichael Ellerman * running on the emergency stack. 845eafd825eSMichael Ellerman */ 846eafd825eSMichael Ellerman bl CFUNC(early_setup_secondary) 8474e991e3cSNicholas Piggin 848f761622eSMatt Evans /* 84954a83404SMichael Neuling * The primary has initialized our kernel stack for us in the paca, grab 850eafd825eSMichael Ellerman * it and put it in r1. We must *not* use it until we turn on the MMU 851eafd825eSMichael Ellerman * below, because it may not be inside the RMO. 852eafd825eSMichael Ellerman */ 85354a83404SMichael Neuling ld r1, PACAKSAVE(r13) 854eafd825eSMichael Ellerman 85554a83404SMichael Neuling /* Clear backchain so we get nice backtraces */ 856799d6046SPaul Mackerras li r7,0 85714cf11afSPaul Mackerras mtlr r7 85814cf11afSPaul Mackerras 85914cf11afSPaul Mackerras /* Mark interrupts soft and hard disabled (they might be enabled 8607230c564SBenjamin Herrenschmidt * in the PACA when doing hotplug) 8617230c564SBenjamin Herrenschmidt */ 8627230c564SBenjamin Herrenschmidt li r7,IRQS_DISABLED 863c2e480baSMadhavan Srinivasan stb r7,PACAIRQSOFTMASK(r13) 8644e26bc4aSMadhavan Srinivasan li r0,PACA_IRQ_HARD_DIS 8657230c564SBenjamin Herrenschmidt stb r0,PACAIRQHAPPENED(r13) 8667230c564SBenjamin Herrenschmidt 8674f8cf36fSBenjamin Herrenschmidt /* enable MMU and jump to start_secondary */ 86814cf11afSPaul Mackerras LOAD_REG_ADDR(r3, start_secondary_prolog) 869ad0289e4SAnton Blanchard LOAD_REG_IMMEDIATE(r4, MSR_KERNEL) 870e58c3495SDavid Gibson 871d04c56f7SPaul Mackerras mtspr SPRN_SRR0,r3 872b5bbeb23SPaul Mackerras mtspr SPRN_SRR1,r4 873b5bbeb23SPaul Mackerras RFI_TO_KERNEL 874879add77SChristophe Leroy b . /* prevent speculative execution */ 87514cf11afSPaul Mackerras 87614cf11afSPaul Mackerras/* 87714cf11afSPaul Mackerras * Running with relocation on at this point. All we want to do is 87814cf11afSPaul Mackerras * zero the stack back-chain pointer and get the TOC virtual address 879e31aa453SPaul Mackerras * before going into C code. 880e31aa453SPaul Mackerras */ 88114cf11afSPaul Mackerrasstart_secondary_prolog: 882ad0289e4SAnton Blanchard LOAD_PACA_TOC() 8838e93fb33SNicholas Piggin li r3,0 88414cf11afSPaul Mackerras std r3,0(r1) /* Zero the stack frame pointer */ 88514cf11afSPaul Mackerras bl CFUNC(start_secondary) 8864e991e3cSNicholas Piggin b . 887799d6046SPaul Mackerras/* 8888dbce53cSVaidyanathan Srinivasan * Reset stack pointer and call start_secondary 8898dbce53cSVaidyanathan Srinivasan * to continue with online operation when woken up 8908dbce53cSVaidyanathan Srinivasan * from cede in cpu offline. 8918dbce53cSVaidyanathan Srinivasan */ 8928dbce53cSVaidyanathan Srinivasan_GLOBAL(start_secondary_resume) 8938dbce53cSVaidyanathan Srinivasan ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */ 8948dbce53cSVaidyanathan Srinivasan li r3,0 8958dbce53cSVaidyanathan Srinivasan std r3,0(r1) /* Zero the stack frame pointer */ 8968dbce53cSVaidyanathan Srinivasan bl CFUNC(start_secondary) 8974e991e3cSNicholas Piggin b . 8988dbce53cSVaidyanathan Srinivasan#endif 89914cf11afSPaul Mackerras 90014cf11afSPaul Mackerras/* 90114cf11afSPaul Mackerras * This subroutine clobbers r11 and r12 90214cf11afSPaul Mackerras */ 90314cf11afSPaul MackerrasSYM_FUNC_START_LOCAL(enable_64b_mode) 90429a011fcSSathvika Vasireddy mfmsr r11 /* grab the current MSR */ 90514cf11afSPaul Mackerras#ifdef CONFIG_PPC_BOOK3E_64 906e0d68273SChristophe Leroy oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */ 9072d27cfd3SBenjamin Herrenschmidt mtmsr r11 9082d27cfd3SBenjamin Herrenschmidt#else /* CONFIG_PPC_BOOK3E_64 */ 909e0d68273SChristophe Leroy LOAD_REG_IMMEDIATE(r12, MSR_64BIT) 910e89a8ca9SNicholas Piggin or r11,r11,r12 91114cf11afSPaul Mackerras mtmsrd r11 91214cf11afSPaul Mackerras isync 91314cf11afSPaul Mackerras#endif 9142d27cfd3SBenjamin Herrenschmidt blr 91514cf11afSPaul MackerrasSYM_FUNC_END(enable_64b_mode) 91629a011fcSSathvika Vasireddy 91714cf11afSPaul Mackerras/* 91814cf11afSPaul Mackerras * This puts the TOC pointer into r2, offset by 0x8000 (as expected 919e31aa453SPaul Mackerras * by the toolchain). It computes the correct value for wherever we 920e31aa453SPaul Mackerras * are running at the moment, using position-independent code. 921e31aa453SPaul Mackerras * 9221fbe9cf2SAnton Blanchard * Note: The compiler constructs pointers using offsets from the 9231fbe9cf2SAnton Blanchard * TOC in -mcmodel=medium mode. After we relocate to 0 but before 9241fbe9cf2SAnton Blanchard * the MMU is on we need our TOC to be a virtual address otherwise 9251fbe9cf2SAnton Blanchard * these pointers will be real addresses which may get stored and 9261fbe9cf2SAnton Blanchard * accessed later with the MMU on. We branch to the virtual address 927b270bebdSNicholas Piggin * while still in real mode then call relative_toc again to handle 928b270bebdSNicholas Piggin * this. 929b270bebdSNicholas Piggin */ 930e31aa453SPaul Mackerras_GLOBAL(relative_toc) 931e31aa453SPaul Mackerras#ifdef CONFIG_PPC_KERNEL_PCREL 932*7e3a68beSNicholas Piggin tdnei r2,-1 933*7e3a68beSNicholas Piggin blr 934*7e3a68beSNicholas Piggin#else 935*7e3a68beSNicholas Piggin mflr r0 936e31aa453SPaul Mackerras bcl 20,31,$+4 937e31aa453SPaul Mackerras0: mflr r11 938e550592eSBenjamin Herrenschmidt ld r2,(p_toc - 0b)(r11) 939e550592eSBenjamin Herrenschmidt add r2,r2,r11 940e550592eSBenjamin Herrenschmidt mtlr r0 941e31aa453SPaul Mackerras blr 942e31aa453SPaul Mackerras 943e31aa453SPaul Mackerras.balign 8 9445b63fee1SAnton Blanchardp_toc: .8byte .TOC. - 0b 945a3ad84daSAlan Modra#endif 946*7e3a68beSNicholas Piggin 947e31aa453SPaul Mackerras/* 948e31aa453SPaul Mackerras * This is where the main kernel code starts. 94914cf11afSPaul Mackerras */ 95014cf11afSPaul Mackerras__REF 9519c4e4c90SChristophe Leroystart_here_multiplatform: 9526a3bab90SAnton Blanchard /* Adjust TOC for moved kernel. Could adjust when moving it instead. */ 953b270bebdSNicholas Piggin bl relative_toc 954b1576fecSAnton Blanchard 95514cf11afSPaul Mackerras /* Clear out the BSS. It may have been done in prom_init, 95614cf11afSPaul Mackerras * already but that's irrelevant since prom_init will soon 95714cf11afSPaul Mackerras * be detached from the kernel completely. Besides, we need 95814cf11afSPaul Mackerras * to clear it now for kexec-style entry. 95914cf11afSPaul Mackerras */ 96014cf11afSPaul Mackerras LOAD_REG_ADDR(r11,__bss_stop) 961e31aa453SPaul Mackerras LOAD_REG_ADDR(r8,__bss_start) 962e31aa453SPaul Mackerras sub r11,r11,r8 /* bss size */ 96314cf11afSPaul Mackerras addi r11,r11,7 /* round up to an even double word */ 96414cf11afSPaul Mackerras srdi. r11,r11,3 /* shift right by 3 */ 965e31aa453SPaul Mackerras beq 4f 96614cf11afSPaul Mackerras addi r8,r8,-8 96714cf11afSPaul Mackerras li r0,0 96814cf11afSPaul Mackerras mtctr r11 /* zero this many doublewords */ 96914cf11afSPaul Mackerras3: stdu r0,8(r8) 97014cf11afSPaul Mackerras bdnz 3b 97114cf11afSPaul Mackerras4: 97214cf11afSPaul Mackerras 97314cf11afSPaul Mackerras#ifdef CONFIG_PPC_EARLY_DEBUG_OPAL 974daea1175SBenjamin Herrenschmidt /* Setup OPAL entry */ 975daea1175SBenjamin Herrenschmidt LOAD_REG_ADDR(r11, opal) 976ab7f961aSBenjamin Herrenschmidt std r28,0(r11); 977daea1175SBenjamin Herrenschmidt std r29,8(r11); 978daea1175SBenjamin Herrenschmidt#endif 979daea1175SBenjamin Herrenschmidt 980daea1175SBenjamin Herrenschmidt#ifndef CONFIG_PPC_BOOK3E_64 981e0d68273SChristophe Leroy mfmsr r6 98214cf11afSPaul Mackerras ori r6,r6,MSR_RI 98314cf11afSPaul Mackerras mtmsrd r6 /* RI on */ 98414cf11afSPaul Mackerras#endif 9852d27cfd3SBenjamin Herrenschmidt 98614cf11afSPaul Mackerras#ifdef CONFIG_RELOCATABLE 987549e8152SPaul Mackerras /* Save the physical address we're running at in kernstart_addr */ 988549e8152SPaul Mackerras LOAD_REG_ADDR(r4, kernstart_addr) 989549e8152SPaul Mackerras clrldi r0,r25,2 990549e8152SPaul Mackerras std r0,0(r4) 991549e8152SPaul Mackerras#endif 992549e8152SPaul Mackerras 993549e8152SPaul Mackerras /* set up a stack pointer */ 994e31aa453SPaul Mackerras LOAD_REG_ADDR(r3,init_thread_union) 9957ffa8b7dSMichael Ellerman LOAD_REG_IMMEDIATE(r1,THREAD_SIZE) 996cabed148SHamish Martin add r1,r3,r1 997cabed148SHamish Martin li r0,0 99814cf11afSPaul Mackerras stdu r0,-STACK_FRAME_MIN_SIZE(r1) 99990f1b431SNicholas Piggin 100014cf11afSPaul Mackerras /* 1001376af594SMichael Ellerman * Do very early kernel initializations, including initial hash table 1002376af594SMichael Ellerman * and SLB setup before we turn on relocation. 1003376af594SMichael Ellerman */ 1004376af594SMichael Ellerman 100514cf11afSPaul Mackerras#ifdef CONFIG_KASAN 1006c7b9ed7cSChristophe Leroy bl CFUNC(kasan_early_init) 10074e991e3cSNicholas Piggin#endif 1008c7b9ed7cSChristophe Leroy /* Restore parameters passed from prom_init/kexec */ 100914cf11afSPaul Mackerras mr r3,r31 101014cf11afSPaul Mackerras LOAD_REG_ADDR(r12, DOTSYM(early_setup)) 101156c46bbaSRussell Currey mtctr r12 101256c46bbaSRussell Currey bctrl /* also sets r13 and SPRG_PACA */ 101356c46bbaSRussell Currey 101414cf11afSPaul Mackerras LOAD_REG_ADDR(r3, start_here_common) 1015ad0289e4SAnton Blanchard ld r4,PACAKMSR(r13) 1016e31aa453SPaul Mackerras mtspr SPRN_SRR0,r3 1017b5bbeb23SPaul Mackerras mtspr SPRN_SRR1,r4 1018b5bbeb23SPaul Mackerras RFI_TO_KERNEL 1019879add77SChristophe Leroy b . /* prevent speculative execution */ 102014cf11afSPaul Mackerras 102114cf11afSPaul Mackerras /* This is where all platforms converge execution */ 102214cf11afSPaul Mackerras 1023ad0289e4SAnton Blanchardstart_here_common: 1024ad0289e4SAnton Blanchard /* relocation is on at this point */ 102514cf11afSPaul Mackerras std r1,PACAKSAVE(r13) 102614cf11afSPaul Mackerras 102714cf11afSPaul Mackerras /* Load the TOC (virtual address) */ 1028e31aa453SPaul Mackerras LOAD_PACA_TOC() 10298e93fb33SNicholas Piggin 103014cf11afSPaul Mackerras /* Mark interrupts soft and hard disabled (they might be enabled 10317230c564SBenjamin Herrenschmidt * in the PACA when doing hotplug) 10327230c564SBenjamin Herrenschmidt */ 10337230c564SBenjamin Herrenschmidt li r0,IRQS_DISABLED 1034c2e480baSMadhavan Srinivasan stb r0,PACAIRQSOFTMASK(r13) 10354e26bc4aSMadhavan Srinivasan li r0,PACA_IRQ_HARD_DIS 10367230c564SBenjamin Herrenschmidt stb r0,PACAIRQHAPPENED(r13) 10377230c564SBenjamin Herrenschmidt 103814cf11afSPaul Mackerras /* Generic kernel entry */ 10397230c564SBenjamin Herrenschmidt bl CFUNC(start_kernel) 10404e991e3cSNicholas Piggin 104114cf11afSPaul Mackerras /* Not reached */ 1042f1870f77SAnton Blanchard0: trap 1043fe18a35eSJordan Niethe EMIT_BUG_ENTRY 0b, __FILE__, __LINE__, 0 104463ce271bSChristophe Leroy .previous 10456eeb9b3bSMichael Ellerman