1/* 2 * This file contains the 64-bit "server" PowerPC variant 3 * of the low level exception handling including exception 4 * vectors, exception return, part of the slb and stab 5 * handling and other fixed offset specific things. 6 * 7 * This file is meant to be #included from head_64.S due to 8 * position dependent assembly. 9 * 10 * Most of this originates from head_64.S and thus has the same 11 * copyright history. 12 * 13 */ 14 15#include <asm/hw_irq.h> 16#include <asm/exception-64s.h> 17#include <asm/ptrace.h> 18#include <asm/cpuidle.h> 19 20/* 21 * We layout physical memory as follows: 22 * 0x0000 - 0x00ff : Secondary processor spin code 23 * 0x0100 - 0x17ff : pSeries Interrupt prologs 24 * 0x1800 - 0x4000 : interrupt support common interrupt prologs 25 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1 26 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1 27 * 0x7000 - 0x7fff : FWNMI data area 28 * 0x8000 - 0x8fff : Initial (CPU0) segment table 29 * 0x9000 - : Early init and support code 30 */ 31 /* Syscall routine is used twice, in reloc-off and reloc-on paths */ 32#define SYSCALL_PSERIES_1 \ 33BEGIN_FTR_SECTION \ 34 cmpdi r0,0x1ebe ; \ 35 beq- 1f ; \ 36END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \ 37 mr r9,r13 ; \ 38 GET_PACA(r13) ; \ 39 mfspr r11,SPRN_SRR0 ; \ 400: 41 42#define SYSCALL_PSERIES_2_RFID \ 43 mfspr r12,SPRN_SRR1 ; \ 44 ld r10,PACAKBASE(r13) ; \ 45 LOAD_HANDLER(r10, system_call_entry) ; \ 46 mtspr SPRN_SRR0,r10 ; \ 47 ld r10,PACAKMSR(r13) ; \ 48 mtspr SPRN_SRR1,r10 ; \ 49 rfid ; \ 50 b . ; /* prevent speculative execution */ 51 52#define SYSCALL_PSERIES_3 \ 53 /* Fast LE/BE switch system call */ \ 541: mfspr r12,SPRN_SRR1 ; \ 55 xori r12,r12,MSR_LE ; \ 56 mtspr SPRN_SRR1,r12 ; \ 57 rfid ; /* return to userspace */ \ 58 b . ; /* prevent speculative execution */ 59 60#if defined(CONFIG_RELOCATABLE) 61 /* 62 * We can't branch directly so we do it via the CTR which 63 * is volatile across system calls. 64 */ 65#define SYSCALL_PSERIES_2_DIRECT \ 66 mflr r10 ; \ 67 ld r12,PACAKBASE(r13) ; \ 68 LOAD_HANDLER(r12, system_call_entry) ; \ 69 mtctr r12 ; \ 70 mfspr r12,SPRN_SRR1 ; \ 71 /* Re-use of r13... No spare regs to do this */ \ 72 li r13,MSR_RI ; \ 73 mtmsrd r13,1 ; \ 74 GET_PACA(r13) ; /* get r13 back */ \ 75 bctr ; 76#else 77 /* We can branch directly */ 78#define SYSCALL_PSERIES_2_DIRECT \ 79 mfspr r12,SPRN_SRR1 ; \ 80 li r10,MSR_RI ; \ 81 mtmsrd r10,1 ; /* Set RI (EE=0) */ \ 82 b system_call_common ; 83#endif 84 85/* 86 * This is the start of the interrupt handlers for pSeries 87 * This code runs with relocation off. 88 * Code from here to __end_interrupts gets copied down to real 89 * address 0x100 when we are running a relocatable kernel. 90 * Therefore any relative branches in this section must only 91 * branch to labels in this section. 92 */ 93 . = 0x100 94 .globl __start_interrupts 95__start_interrupts: 96 97 .globl system_reset_pSeries; 98system_reset_pSeries: 99 SET_SCRATCH0(r13) 100#ifdef CONFIG_PPC_P7_NAP 101BEGIN_FTR_SECTION 102 /* Running native on arch 2.06 or later, check if we are 103 * waking up from nap/sleep/winkle. 104 */ 105 mfspr r13,SPRN_SRR1 106 rlwinm. r13,r13,47-31,30,31 107 beq 9f 108 109 cmpwi cr3,r13,2 110 GET_PACA(r13) 111 bl pnv_restore_hyp_resource 112 113 li r0,PNV_THREAD_RUNNING 114 stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */ 115 116#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 117 li r0,KVM_HWTHREAD_IN_KERNEL 118 stb r0,HSTATE_HWTHREAD_STATE(r13) 119 /* Order setting hwthread_state vs. testing hwthread_req */ 120 sync 121 lbz r0,HSTATE_HWTHREAD_REQ(r13) 122 cmpwi r0,0 123 beq 1f 124 b kvm_start_guest 1251: 126#endif 127 128 /* Return SRR1 from power7_nap() */ 129 mfspr r3,SPRN_SRR1 130 blt cr3,2f 131 b pnv_wakeup_loss 1322: b pnv_wakeup_noloss 133 1349: 135END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) 136#endif /* CONFIG_PPC_P7_NAP */ 137 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, 138 NOTEST, 0x100) 139 140 . = 0x200 141machine_check_pSeries_1: 142 /* This is moved out of line as it can be patched by FW, but 143 * some code path might still want to branch into the original 144 * vector 145 */ 146 SET_SCRATCH0(r13) /* save r13 */ 147#ifdef CONFIG_PPC_P7_NAP 148BEGIN_FTR_SECTION 149 /* Running native on arch 2.06 or later, check if we are 150 * waking up from nap. We only handle no state loss and 151 * supervisor state loss. We do -not- handle hypervisor 152 * state loss at this time. 153 */ 154 mfspr r13,SPRN_SRR1 155 rlwinm. r13,r13,47-31,30,31 156 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) 157 beq 9f 158 159 mfspr r13,SPRN_SRR1 160 rlwinm. r13,r13,47-31,30,31 161 /* waking up from powersave (nap) state */ 162 cmpwi cr1,r13,2 163 /* Total loss of HV state is fatal. let's just stay stuck here */ 164 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) 165 bgt cr1,. 1669: 167 OPT_SET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) 168END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) 169#endif /* CONFIG_PPC_P7_NAP */ 170 EXCEPTION_PROLOG_0(PACA_EXMC) 171BEGIN_FTR_SECTION 172 b machine_check_powernv_early 173FTR_SECTION_ELSE 174 b machine_check_pSeries_0 175ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) 176 177 . = 0x300 178 .globl data_access_pSeries 179data_access_pSeries: 180 SET_SCRATCH0(r13) 181 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD, 182 KVMTEST, 0x300) 183 184 . = 0x380 185 .globl data_access_slb_pSeries 186data_access_slb_pSeries: 187 SET_SCRATCH0(r13) 188 EXCEPTION_PROLOG_0(PACA_EXSLB) 189 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380) 190 std r3,PACA_EXSLB+EX_R3(r13) 191 mfspr r3,SPRN_DAR 192 mfspr r12,SPRN_SRR1 193#ifndef CONFIG_RELOCATABLE 194 b slb_miss_realmode 195#else 196 /* 197 * We can't just use a direct branch to slb_miss_realmode 198 * because the distance from here to there depends on where 199 * the kernel ends up being put. 200 */ 201 mfctr r11 202 ld r10,PACAKBASE(r13) 203 LOAD_HANDLER(r10, slb_miss_realmode) 204 mtctr r10 205 bctr 206#endif 207 208 STD_EXCEPTION_PSERIES(0x400, instruction_access) 209 210 . = 0x480 211 .globl instruction_access_slb_pSeries 212instruction_access_slb_pSeries: 213 SET_SCRATCH0(r13) 214 EXCEPTION_PROLOG_0(PACA_EXSLB) 215 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x480) 216 std r3,PACA_EXSLB+EX_R3(r13) 217 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ 218 mfspr r12,SPRN_SRR1 219#ifndef CONFIG_RELOCATABLE 220 b slb_miss_realmode 221#else 222 mfctr r11 223 ld r10,PACAKBASE(r13) 224 LOAD_HANDLER(r10, slb_miss_realmode) 225 mtctr r10 226 bctr 227#endif 228 229 /* We open code these as we can't have a ". = x" (even with 230 * x = "." within a feature section 231 */ 232 . = 0x500; 233 .globl hardware_interrupt_pSeries; 234 .globl hardware_interrupt_hv; 235hardware_interrupt_pSeries: 236hardware_interrupt_hv: 237 BEGIN_FTR_SECTION 238 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt, 239 EXC_HV, SOFTEN_TEST_HV) 240 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502) 241 FTR_SECTION_ELSE 242 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt, 243 EXC_STD, SOFTEN_TEST_PR) 244 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500) 245 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) 246 247 STD_EXCEPTION_PSERIES(0x600, alignment) 248 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x600) 249 250 STD_EXCEPTION_PSERIES(0x700, program_check) 251 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x700) 252 253 STD_EXCEPTION_PSERIES(0x800, fp_unavailable) 254 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x800) 255 256 . = 0x900 257 .globl decrementer_pSeries 258decrementer_pSeries: 259 _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR) 260 261 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer) 262 263 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super) 264 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xa00) 265 266 STD_EXCEPTION_PSERIES(0xb00, trap_0b) 267 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xb00) 268 269 . = 0xc00 270 .globl system_call_pSeries 271system_call_pSeries: 272 /* 273 * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems 274 * that support it) before changing to HMT_MEDIUM. That allows the KVM 275 * code to save that value into the guest state (it is the guest's PPR 276 * value). Otherwise just change to HMT_MEDIUM as userspace has 277 * already saved the PPR. 278 */ 279#ifdef CONFIG_KVM_BOOK3S_64_HANDLER 280 SET_SCRATCH0(r13) 281 GET_PACA(r13) 282 std r9,PACA_EXGEN+EX_R9(r13) 283 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); 284 HMT_MEDIUM; 285 std r10,PACA_EXGEN+EX_R10(r13) 286 OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR); 287 mfcr r9 288 KVMTEST(0xc00) 289 GET_SCRATCH0(r13) 290#else 291 HMT_MEDIUM; 292#endif 293 SYSCALL_PSERIES_1 294 SYSCALL_PSERIES_2_RFID 295 SYSCALL_PSERIES_3 296 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00) 297 298 STD_EXCEPTION_PSERIES(0xd00, single_step) 299 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xd00) 300 301 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch 302 * out of line to handle them 303 */ 304 . = 0xe00 305hv_data_storage_trampoline: 306 SET_SCRATCH0(r13) 307 EXCEPTION_PROLOG_0(PACA_EXGEN) 308 b h_data_storage_hv 309 310 . = 0xe20 311hv_instr_storage_trampoline: 312 SET_SCRATCH0(r13) 313 EXCEPTION_PROLOG_0(PACA_EXGEN) 314 b h_instr_storage_hv 315 316 . = 0xe40 317emulation_assist_trampoline: 318 SET_SCRATCH0(r13) 319 EXCEPTION_PROLOG_0(PACA_EXGEN) 320 b emulation_assist_hv 321 322 . = 0xe60 323hv_exception_trampoline: 324 SET_SCRATCH0(r13) 325 EXCEPTION_PROLOG_0(PACA_EXGEN) 326 b hmi_exception_early 327 328 . = 0xe80 329hv_doorbell_trampoline: 330 SET_SCRATCH0(r13) 331 EXCEPTION_PROLOG_0(PACA_EXGEN) 332 b h_doorbell_hv 333 334 . = 0xea0 335hv_virt_irq_trampoline: 336 SET_SCRATCH0(r13) 337 EXCEPTION_PROLOG_0(PACA_EXGEN) 338 b h_virt_irq_hv 339 340 /* We need to deal with the Altivec unavailable exception 341 * here which is at 0xf20, thus in the middle of the 342 * prolog code of the PerformanceMonitor one. A little 343 * trickery is thus necessary 344 */ 345 . = 0xf00 346performance_monitor_pseries_trampoline: 347 SET_SCRATCH0(r13) 348 EXCEPTION_PROLOG_0(PACA_EXGEN) 349 b performance_monitor_pSeries 350 351 . = 0xf20 352altivec_unavailable_pseries_trampoline: 353 SET_SCRATCH0(r13) 354 EXCEPTION_PROLOG_0(PACA_EXGEN) 355 b altivec_unavailable_pSeries 356 357 . = 0xf40 358vsx_unavailable_pseries_trampoline: 359 SET_SCRATCH0(r13) 360 EXCEPTION_PROLOG_0(PACA_EXGEN) 361 b vsx_unavailable_pSeries 362 363 . = 0xf60 364facility_unavailable_trampoline: 365 SET_SCRATCH0(r13) 366 EXCEPTION_PROLOG_0(PACA_EXGEN) 367 b facility_unavailable_pSeries 368 369 . = 0xf80 370hv_facility_unavailable_trampoline: 371 SET_SCRATCH0(r13) 372 EXCEPTION_PROLOG_0(PACA_EXGEN) 373 b facility_unavailable_hv 374 375#ifdef CONFIG_CBE_RAS 376 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error) 377 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202) 378#endif /* CONFIG_CBE_RAS */ 379 380 STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint) 381 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1300) 382 383 . = 0x1500 384 .global denorm_exception_hv 385denorm_exception_hv: 386 mtspr SPRN_SPRG_HSCRATCH0,r13 387 EXCEPTION_PROLOG_0(PACA_EXGEN) 388 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500) 389 390#ifdef CONFIG_PPC_DENORMALISATION 391 mfspr r10,SPRN_HSRR1 392 mfspr r11,SPRN_HSRR0 /* save HSRR0 */ 393 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */ 394 addi r11,r11,-4 /* HSRR0 is next instruction */ 395 bne+ denorm_assist 396#endif 397 398 KVMTEST(0x1500) 399 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV) 400 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500) 401 402#ifdef CONFIG_CBE_RAS 403 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance) 404 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602) 405#endif /* CONFIG_CBE_RAS */ 406 407 STD_EXCEPTION_PSERIES(0x1700, altivec_assist) 408 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x1700) 409 410#ifdef CONFIG_CBE_RAS 411 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal) 412 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802) 413#else 414 . = 0x1800 415#endif /* CONFIG_CBE_RAS */ 416 417 418/*** Out of line interrupts support ***/ 419 420 .align 7 421 /* moved from 0x200 */ 422machine_check_powernv_early: 423BEGIN_FTR_SECTION 424 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200) 425 /* 426 * Register contents: 427 * R13 = PACA 428 * R9 = CR 429 * Original R9 to R13 is saved on PACA_EXMC 430 * 431 * Switch to mc_emergency stack and handle re-entrancy (we limit 432 * the nested MCE upto level 4 to avoid stack overflow). 433 * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1 434 * 435 * We use paca->in_mce to check whether this is the first entry or 436 * nested machine check. We increment paca->in_mce to track nested 437 * machine checks. 438 * 439 * If this is the first entry then set stack pointer to 440 * paca->mc_emergency_sp, otherwise r1 is already pointing to 441 * stack frame on mc_emergency stack. 442 * 443 * NOTE: We are here with MSR_ME=0 (off), which means we risk a 444 * checkstop if we get another machine check exception before we do 445 * rfid with MSR_ME=1. 446 */ 447 mr r11,r1 /* Save r1 */ 448 lhz r10,PACA_IN_MCE(r13) 449 cmpwi r10,0 /* Are we in nested machine check */ 450 bne 0f /* Yes, we are. */ 451 /* First machine check entry */ 452 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */ 4530: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ 454 addi r10,r10,1 /* increment paca->in_mce */ 455 sth r10,PACA_IN_MCE(r13) 456 /* Limit nested MCE to level 4 to avoid stack overflow */ 457 cmpwi r10,4 458 bgt 2f /* Check if we hit limit of 4 */ 459 std r11,GPR1(r1) /* Save r1 on the stack. */ 460 std r11,0(r1) /* make stack chain pointer */ 461 mfspr r11,SPRN_SRR0 /* Save SRR0 */ 462 std r11,_NIP(r1) 463 mfspr r11,SPRN_SRR1 /* Save SRR1 */ 464 std r11,_MSR(r1) 465 mfspr r11,SPRN_DAR /* Save DAR */ 466 std r11,_DAR(r1) 467 mfspr r11,SPRN_DSISR /* Save DSISR */ 468 std r11,_DSISR(r1) 469 std r9,_CCR(r1) /* Save CR in stackframe */ 470 /* Save r9 through r13 from EXMC save area to stack frame. */ 471 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC) 472 mfmsr r11 /* get MSR value */ 473 ori r11,r11,MSR_ME /* turn on ME bit */ 474 ori r11,r11,MSR_RI /* turn on RI bit */ 475 ld r12,PACAKBASE(r13) /* get high part of &label */ 476 LOAD_HANDLER(r12, machine_check_handle_early) 4771: mtspr SPRN_SRR0,r12 478 mtspr SPRN_SRR1,r11 479 rfid 480 b . /* prevent speculative execution */ 4812: 482 /* Stack overflow. Stay on emergency stack and panic. 483 * Keep the ME bit off while panic-ing, so that if we hit 484 * another machine check we checkstop. 485 */ 486 addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */ 487 ld r11,PACAKMSR(r13) 488 ld r12,PACAKBASE(r13) 489 LOAD_HANDLER(r12, unrecover_mce) 490 li r10,MSR_ME 491 andc r11,r11,r10 /* Turn off MSR_ME */ 492 b 1b 493 b . /* prevent speculative execution */ 494END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) 495 496machine_check_pSeries: 497 .globl machine_check_fwnmi 498machine_check_fwnmi: 499 SET_SCRATCH0(r13) /* save r13 */ 500 EXCEPTION_PROLOG_0(PACA_EXMC) 501machine_check_pSeries_0: 502 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200) 503 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD) 504 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200) 505 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300) 506 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380) 507 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x400) 508 KVM_HANDLER(PACA_EXSLB, EXC_STD, 0x480) 509 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x900) 510 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982) 511 512#ifdef CONFIG_PPC_DENORMALISATION 513denorm_assist: 514BEGIN_FTR_SECTION 515/* 516 * To denormalise we need to move a copy of the register to itself. 517 * For POWER6 do that here for all FP regs. 518 */ 519 mfmsr r10 520 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1) 521 xori r10,r10,(MSR_FE0|MSR_FE1) 522 mtmsrd r10 523 sync 524 525#define FMR2(n) fmr (n), (n) ; fmr n+1, n+1 526#define FMR4(n) FMR2(n) ; FMR2(n+2) 527#define FMR8(n) FMR4(n) ; FMR4(n+4) 528#define FMR16(n) FMR8(n) ; FMR8(n+8) 529#define FMR32(n) FMR16(n) ; FMR16(n+16) 530 FMR32(0) 531 532FTR_SECTION_ELSE 533/* 534 * To denormalise we need to move a copy of the register to itself. 535 * For POWER7 do that here for the first 32 VSX registers only. 536 */ 537 mfmsr r10 538 oris r10,r10,MSR_VSX@h 539 mtmsrd r10 540 sync 541 542#define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1) 543#define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2) 544#define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4) 545#define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8) 546#define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16) 547 XVCPSGNDP32(0) 548 549ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206) 550 551BEGIN_FTR_SECTION 552 b denorm_done 553END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) 554/* 555 * To denormalise we need to move a copy of the register to itself. 556 * For POWER8 we need to do that for all 64 VSX registers 557 */ 558 XVCPSGNDP32(32) 559denorm_done: 560 mtspr SPRN_HSRR0,r11 561 mtcrf 0x80,r9 562 ld r9,PACA_EXGEN+EX_R9(r13) 563 RESTORE_PPR_PACA(PACA_EXGEN, r10) 564BEGIN_FTR_SECTION 565 ld r10,PACA_EXGEN+EX_CFAR(r13) 566 mtspr SPRN_CFAR,r10 567END_FTR_SECTION_IFSET(CPU_FTR_CFAR) 568 ld r10,PACA_EXGEN+EX_R10(r13) 569 ld r11,PACA_EXGEN+EX_R11(r13) 570 ld r12,PACA_EXGEN+EX_R12(r13) 571 ld r13,PACA_EXGEN+EX_R13(r13) 572 HRFID 573 b . 574#endif 575 576 .align 7 577 /* moved from 0xe00 */ 578 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage) 579 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02) 580 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage) 581 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22) 582 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist) 583 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42) 584 MASKABLE_EXCEPTION_HV_OOL(0xe62, hmi_exception) 585 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62) 586 587 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell) 588 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82) 589 590 MASKABLE_EXCEPTION_HV_OOL(0xea2, h_virt_irq) 591 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xea2) 592 593 /* moved from 0xf00 */ 594 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) 595 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf00) 596 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) 597 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf20) 598 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) 599 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf40) 600 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) 601 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf60) 602 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable) 603 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82) 604 605/* 606 * An interrupt came in while soft-disabled. We set paca->irq_happened, then: 607 * - If it was a decrementer interrupt, we bump the dec to max and and return. 608 * - If it was a doorbell we return immediately since doorbells are edge 609 * triggered and won't automatically refire. 610 * - If it was a HMI we return immediately since we handled it in realmode 611 * and it won't refire. 612 * - else we hard disable and return. 613 * This is called with r10 containing the value to OR to the paca field. 614 */ 615#define MASKED_INTERRUPT(_H) \ 616masked_##_H##interrupt: \ 617 std r11,PACA_EXGEN+EX_R11(r13); \ 618 lbz r11,PACAIRQHAPPENED(r13); \ 619 or r11,r11,r10; \ 620 stb r11,PACAIRQHAPPENED(r13); \ 621 cmpwi r10,PACA_IRQ_DEC; \ 622 bne 1f; \ 623 lis r10,0x7fff; \ 624 ori r10,r10,0xffff; \ 625 mtspr SPRN_DEC,r10; \ 626 b 2f; \ 6271: cmpwi r10,PACA_IRQ_DBELL; \ 628 beq 2f; \ 629 cmpwi r10,PACA_IRQ_HMI; \ 630 beq 2f; \ 631 mfspr r10,SPRN_##_H##SRR1; \ 632 rldicl r10,r10,48,1; /* clear MSR_EE */ \ 633 rotldi r10,r10,16; \ 634 mtspr SPRN_##_H##SRR1,r10; \ 6352: mtcrf 0x80,r9; \ 636 ld r9,PACA_EXGEN+EX_R9(r13); \ 637 ld r10,PACA_EXGEN+EX_R10(r13); \ 638 ld r11,PACA_EXGEN+EX_R11(r13); \ 639 GET_SCRATCH0(r13); \ 640 ##_H##rfid; \ 641 b . 642 643 MASKED_INTERRUPT() 644 MASKED_INTERRUPT(H) 645 646/* 647 * Called from arch_local_irq_enable when an interrupt needs 648 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate 649 * which kind of interrupt. MSR:EE is already off. We generate a 650 * stackframe like if a real interrupt had happened. 651 * 652 * Note: While MSR:EE is off, we need to make sure that _MSR 653 * in the generated frame has EE set to 1 or the exception 654 * handler will not properly re-enable them. 655 */ 656_GLOBAL(__replay_interrupt) 657 /* We are going to jump to the exception common code which 658 * will retrieve various register values from the PACA which 659 * we don't give a damn about, so we don't bother storing them. 660 */ 661 mfmsr r12 662 mflr r11 663 mfcr r9 664 ori r12,r12,MSR_EE 665 cmpwi r3,0x900 666 beq decrementer_common 667 cmpwi r3,0x500 668 beq hardware_interrupt_common 669BEGIN_FTR_SECTION 670 cmpwi r3,0xe80 671 beq h_doorbell_common 672 cmpwi r3,0xea0 673 beq h_virt_irq_common 674FTR_SECTION_ELSE 675 cmpwi r3,0xa00 676 beq doorbell_super_common 677ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) 678 blr 679 680#ifdef CONFIG_PPC_PSERIES 681/* 682 * Vectors for the FWNMI option. Share common code. 683 */ 684 .globl system_reset_fwnmi 685 .align 7 686system_reset_fwnmi: 687 SET_SCRATCH0(r13) /* save r13 */ 688 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, 689 NOTEST, 0x100) 690 691#endif /* CONFIG_PPC_PSERIES */ 692 693#ifdef CONFIG_KVM_BOOK3S_64_HANDLER 694kvmppc_skip_interrupt: 695 /* 696 * Here all GPRs are unchanged from when the interrupt happened 697 * except for r13, which is saved in SPRG_SCRATCH0. 698 */ 699 mfspr r13, SPRN_SRR0 700 addi r13, r13, 4 701 mtspr SPRN_SRR0, r13 702 GET_SCRATCH0(r13) 703 rfid 704 b . 705 706kvmppc_skip_Hinterrupt: 707 /* 708 * Here all GPRs are unchanged from when the interrupt happened 709 * except for r13, which is saved in SPRG_SCRATCH0. 710 */ 711 mfspr r13, SPRN_HSRR0 712 addi r13, r13, 4 713 mtspr SPRN_HSRR0, r13 714 GET_SCRATCH0(r13) 715 hrfid 716 b . 717#endif 718 719/* 720 * Ensure that any handlers that get invoked from the exception prologs 721 * above are below the first 64KB (0x10000) of the kernel image because 722 * the prologs assemble the addresses of these handlers using the 723 * LOAD_HANDLER macro, which uses an ori instruction. 724 */ 725 726/*** Common interrupt handlers ***/ 727 728 STD_EXCEPTION_COMMON(0x100, system_reset, system_reset_exception) 729 730 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ) 731 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, timer_interrupt) 732 STD_EXCEPTION_COMMON(0x980, hdecrementer, hdec_interrupt) 733#ifdef CONFIG_PPC_DOORBELL 734 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, doorbell_exception) 735#else 736 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, unknown_exception) 737#endif 738 STD_EXCEPTION_COMMON(0xb00, trap_0b, unknown_exception) 739 STD_EXCEPTION_COMMON(0xd00, single_step, single_step_exception) 740 STD_EXCEPTION_COMMON(0xe00, trap_0e, unknown_exception) 741 STD_EXCEPTION_COMMON(0xe40, emulation_assist, emulation_assist_interrupt) 742 STD_EXCEPTION_COMMON_ASYNC(0xe60, hmi_exception, handle_hmi_exception) 743#ifdef CONFIG_PPC_DOORBELL 744 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, doorbell_exception) 745#else 746 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception) 747#endif 748 STD_EXCEPTION_COMMON_ASYNC(0xea0, h_virt_irq, do_IRQ) 749 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception) 750 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception) 751 STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception) 752#ifdef CONFIG_ALTIVEC 753 STD_EXCEPTION_COMMON(0x1700, altivec_assist, altivec_assist_exception) 754#else 755 STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception) 756#endif 757 758 /* 759 * Relocation-on interrupts: A subset of the interrupts can be delivered 760 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering 761 * it. Addresses are the same as the original interrupt addresses, but 762 * offset by 0xc000000000004000. 763 * It's impossible to receive interrupts below 0x300 via this mechanism. 764 * KVM: None of these traps are from the guest ; anything that escalated 765 * to HV=1 from HV=0 is delivered via real mode handlers. 766 */ 767 768 /* 769 * This uses the standard macro, since the original 0x300 vector 770 * only has extra guff for STAB-based processors -- which never 771 * come here. 772 */ 773 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access) 774 . = 0x4380 775 .globl data_access_slb_relon_pSeries 776data_access_slb_relon_pSeries: 777 SET_SCRATCH0(r13) 778 EXCEPTION_PROLOG_0(PACA_EXSLB) 779 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380) 780 std r3,PACA_EXSLB+EX_R3(r13) 781 mfspr r3,SPRN_DAR 782 mfspr r12,SPRN_SRR1 783#ifndef CONFIG_RELOCATABLE 784 b slb_miss_realmode 785#else 786 /* 787 * We can't just use a direct branch to slb_miss_realmode 788 * because the distance from here to there depends on where 789 * the kernel ends up being put. 790 */ 791 mfctr r11 792 ld r10,PACAKBASE(r13) 793 LOAD_HANDLER(r10, slb_miss_realmode) 794 mtctr r10 795 bctr 796#endif 797 798 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access) 799 . = 0x4480 800 .globl instruction_access_slb_relon_pSeries 801instruction_access_slb_relon_pSeries: 802 SET_SCRATCH0(r13) 803 EXCEPTION_PROLOG_0(PACA_EXSLB) 804 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480) 805 std r3,PACA_EXSLB+EX_R3(r13) 806 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ 807 mfspr r12,SPRN_SRR1 808#ifndef CONFIG_RELOCATABLE 809 b slb_miss_realmode 810#else 811 mfctr r11 812 ld r10,PACAKBASE(r13) 813 LOAD_HANDLER(r10, slb_miss_realmode) 814 mtctr r10 815 bctr 816#endif 817 818 . = 0x4500 819 .globl hardware_interrupt_relon_pSeries; 820 .globl hardware_interrupt_relon_hv; 821hardware_interrupt_relon_pSeries: 822hardware_interrupt_relon_hv: 823 BEGIN_FTR_SECTION 824 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV) 825 FTR_SECTION_ELSE 826 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR) 827 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) 828 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment) 829 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check) 830 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable) 831 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer) 832 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer) 833 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super) 834 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b) 835 836 . = 0x4c00 837 .globl system_call_relon_pSeries 838system_call_relon_pSeries: 839 HMT_MEDIUM 840 SYSCALL_PSERIES_1 841 SYSCALL_PSERIES_2_DIRECT 842 SYSCALL_PSERIES_3 843 844 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step) 845 846 . = 0x4e00 847 b . /* Can't happen, see v2.07 Book III-S section 6.5 */ 848 849 . = 0x4e20 850 b . /* Can't happen, see v2.07 Book III-S section 6.5 */ 851 852 . = 0x4e40 853emulation_assist_relon_trampoline: 854 SET_SCRATCH0(r13) 855 EXCEPTION_PROLOG_0(PACA_EXGEN) 856 b emulation_assist_relon_hv 857 858 . = 0x4e60 859 b . /* Can't happen, see v2.07 Book III-S section 6.5 */ 860 861 . = 0x4e80 862h_doorbell_relon_trampoline: 863 SET_SCRATCH0(r13) 864 EXCEPTION_PROLOG_0(PACA_EXGEN) 865 b h_doorbell_relon_hv 866 867 . = 0x4ea0 868h_virt_irq_relon_trampoline: 869 SET_SCRATCH0(r13) 870 EXCEPTION_PROLOG_0(PACA_EXGEN) 871 b h_virt_irq_relon_hv 872 873 . = 0x4f00 874performance_monitor_relon_pseries_trampoline: 875 SET_SCRATCH0(r13) 876 EXCEPTION_PROLOG_0(PACA_EXGEN) 877 b performance_monitor_relon_pSeries 878 879 . = 0x4f20 880altivec_unavailable_relon_pseries_trampoline: 881 SET_SCRATCH0(r13) 882 EXCEPTION_PROLOG_0(PACA_EXGEN) 883 b altivec_unavailable_relon_pSeries 884 885 . = 0x4f40 886vsx_unavailable_relon_pseries_trampoline: 887 SET_SCRATCH0(r13) 888 EXCEPTION_PROLOG_0(PACA_EXGEN) 889 b vsx_unavailable_relon_pSeries 890 891 . = 0x4f60 892facility_unavailable_relon_trampoline: 893 SET_SCRATCH0(r13) 894 EXCEPTION_PROLOG_0(PACA_EXGEN) 895 b facility_unavailable_relon_pSeries 896 897 . = 0x4f80 898hv_facility_unavailable_relon_trampoline: 899 SET_SCRATCH0(r13) 900 EXCEPTION_PROLOG_0(PACA_EXGEN) 901 b hv_facility_unavailable_relon_hv 902 903 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint) 904#ifdef CONFIG_PPC_DENORMALISATION 905 . = 0x5500 906 b denorm_exception_hv 907#endif 908 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist) 909 910 .align 7 911system_call_entry: 912 b system_call_common 913 914ppc64_runlatch_on_trampoline: 915 b __ppc64_runlatch_on 916 917/* 918 * Here r13 points to the paca, r9 contains the saved CR, 919 * SRR0 and SRR1 are saved in r11 and r12, 920 * r9 - r13 are saved in paca->exgen. 921 */ 922 .align 7 923 .globl data_access_common 924data_access_common: 925 mfspr r10,SPRN_DAR 926 std r10,PACA_EXGEN+EX_DAR(r13) 927 mfspr r10,SPRN_DSISR 928 stw r10,PACA_EXGEN+EX_DSISR(r13) 929 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN) 930 RECONCILE_IRQ_STATE(r10, r11) 931 ld r12,_MSR(r1) 932 ld r3,PACA_EXGEN+EX_DAR(r13) 933 lwz r4,PACA_EXGEN+EX_DSISR(r13) 934 li r5,0x300 935 std r3,_DAR(r1) 936 std r4,_DSISR(r1) 937BEGIN_MMU_FTR_SECTION 938 b do_hash_page /* Try to handle as hpte fault */ 939MMU_FTR_SECTION_ELSE 940 b handle_page_fault 941ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_RADIX) 942 943 .align 7 944 .globl h_data_storage_common 945h_data_storage_common: 946 mfspr r10,SPRN_HDAR 947 std r10,PACA_EXGEN+EX_DAR(r13) 948 mfspr r10,SPRN_HDSISR 949 stw r10,PACA_EXGEN+EX_DSISR(r13) 950 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN) 951 bl save_nvgprs 952 RECONCILE_IRQ_STATE(r10, r11) 953 addi r3,r1,STACK_FRAME_OVERHEAD 954 bl unknown_exception 955 b ret_from_except 956 957 .align 7 958 .globl instruction_access_common 959instruction_access_common: 960 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN) 961 RECONCILE_IRQ_STATE(r10, r11) 962 ld r12,_MSR(r1) 963 ld r3,_NIP(r1) 964 andis. r4,r12,0x5820 965 li r5,0x400 966 std r3,_DAR(r1) 967 std r4,_DSISR(r1) 968BEGIN_MMU_FTR_SECTION 969 b do_hash_page /* Try to handle as hpte fault */ 970MMU_FTR_SECTION_ELSE 971 b handle_page_fault 972ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_RADIX) 973 974 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, unknown_exception) 975 976 /* 977 * Machine check is different because we use a different 978 * save area: PACA_EXMC instead of PACA_EXGEN. 979 */ 980 .align 7 981 .globl machine_check_common 982machine_check_common: 983 984 mfspr r10,SPRN_DAR 985 std r10,PACA_EXGEN+EX_DAR(r13) 986 mfspr r10,SPRN_DSISR 987 stw r10,PACA_EXGEN+EX_DSISR(r13) 988 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC) 989 FINISH_NAP 990 RECONCILE_IRQ_STATE(r10, r11) 991 ld r3,PACA_EXGEN+EX_DAR(r13) 992 lwz r4,PACA_EXGEN+EX_DSISR(r13) 993 std r3,_DAR(r1) 994 std r4,_DSISR(r1) 995 bl save_nvgprs 996 addi r3,r1,STACK_FRAME_OVERHEAD 997 bl machine_check_exception 998 b ret_from_except 999 1000 .align 7 1001 .globl alignment_common 1002alignment_common: 1003 mfspr r10,SPRN_DAR 1004 std r10,PACA_EXGEN+EX_DAR(r13) 1005 mfspr r10,SPRN_DSISR 1006 stw r10,PACA_EXGEN+EX_DSISR(r13) 1007 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN) 1008 ld r3,PACA_EXGEN+EX_DAR(r13) 1009 lwz r4,PACA_EXGEN+EX_DSISR(r13) 1010 std r3,_DAR(r1) 1011 std r4,_DSISR(r1) 1012 bl save_nvgprs 1013 RECONCILE_IRQ_STATE(r10, r11) 1014 addi r3,r1,STACK_FRAME_OVERHEAD 1015 bl alignment_exception 1016 b ret_from_except 1017 1018 .align 7 1019 .globl program_check_common 1020program_check_common: 1021 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN) 1022 bl save_nvgprs 1023 RECONCILE_IRQ_STATE(r10, r11) 1024 addi r3,r1,STACK_FRAME_OVERHEAD 1025 bl program_check_exception 1026 b ret_from_except 1027 1028 .align 7 1029 .globl fp_unavailable_common 1030fp_unavailable_common: 1031 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN) 1032 bne 1f /* if from user, just load it up */ 1033 bl save_nvgprs 1034 RECONCILE_IRQ_STATE(r10, r11) 1035 addi r3,r1,STACK_FRAME_OVERHEAD 1036 bl kernel_fp_unavailable_exception 1037 BUG_OPCODE 10381: 1039#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1040BEGIN_FTR_SECTION 1041 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in 1042 * transaction), go do TM stuff 1043 */ 1044 rldicl. r0, r12, (64-MSR_TS_LG), (64-2) 1045 bne- 2f 1046END_FTR_SECTION_IFSET(CPU_FTR_TM) 1047#endif 1048 bl load_up_fpu 1049 b fast_exception_return 1050#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 10512: /* User process was in a transaction */ 1052 bl save_nvgprs 1053 RECONCILE_IRQ_STATE(r10, r11) 1054 addi r3,r1,STACK_FRAME_OVERHEAD 1055 bl fp_unavailable_tm 1056 b ret_from_except 1057#endif 1058 .align 7 1059 .globl altivec_unavailable_common 1060altivec_unavailable_common: 1061 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) 1062#ifdef CONFIG_ALTIVEC 1063BEGIN_FTR_SECTION 1064 beq 1f 1065#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1066 BEGIN_FTR_SECTION_NESTED(69) 1067 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in 1068 * transaction), go do TM stuff 1069 */ 1070 rldicl. r0, r12, (64-MSR_TS_LG), (64-2) 1071 bne- 2f 1072 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) 1073#endif 1074 bl load_up_altivec 1075 b fast_exception_return 1076#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 10772: /* User process was in a transaction */ 1078 bl save_nvgprs 1079 RECONCILE_IRQ_STATE(r10, r11) 1080 addi r3,r1,STACK_FRAME_OVERHEAD 1081 bl altivec_unavailable_tm 1082 b ret_from_except 1083#endif 10841: 1085END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 1086#endif 1087 bl save_nvgprs 1088 RECONCILE_IRQ_STATE(r10, r11) 1089 addi r3,r1,STACK_FRAME_OVERHEAD 1090 bl altivec_unavailable_exception 1091 b ret_from_except 1092 1093 .align 7 1094 .globl vsx_unavailable_common 1095vsx_unavailable_common: 1096 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN) 1097#ifdef CONFIG_VSX 1098BEGIN_FTR_SECTION 1099 beq 1f 1100#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1101 BEGIN_FTR_SECTION_NESTED(69) 1102 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in 1103 * transaction), go do TM stuff 1104 */ 1105 rldicl. r0, r12, (64-MSR_TS_LG), (64-2) 1106 bne- 2f 1107 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) 1108#endif 1109 b load_up_vsx 1110#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 11112: /* User process was in a transaction */ 1112 bl save_nvgprs 1113 RECONCILE_IRQ_STATE(r10, r11) 1114 addi r3,r1,STACK_FRAME_OVERHEAD 1115 bl vsx_unavailable_tm 1116 b ret_from_except 1117#endif 11181: 1119END_FTR_SECTION_IFSET(CPU_FTR_VSX) 1120#endif 1121 bl save_nvgprs 1122 RECONCILE_IRQ_STATE(r10, r11) 1123 addi r3,r1,STACK_FRAME_OVERHEAD 1124 bl vsx_unavailable_exception 1125 b ret_from_except 1126 1127 /* Equivalents to the above handlers for relocation-on interrupt vectors */ 1128 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist) 1129 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell) 1130 MASKABLE_RELON_EXCEPTION_HV_OOL(0xea0, h_virt_irq) 1131 1132 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) 1133 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) 1134 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) 1135 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) 1136 STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable) 1137 1138 /* 1139 * The __end_interrupts marker must be past the out-of-line (OOL) 1140 * handlers, so that they are copied to real address 0x100 when running 1141 * a relocatable kernel. This ensures they can be reached from the short 1142 * trampoline handlers (like 0x4f00, 0x4f20, etc.) which branch 1143 * directly, without using LOAD_HANDLER(). 1144 */ 1145 .align 7 1146 .globl __end_interrupts 1147__end_interrupts: 1148 1149#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) 1150/* 1151 * Data area reserved for FWNMI option. 1152 * This address (0x7000) is fixed by the RPA. 1153 */ 1154 .= 0x7000 1155 .globl fwnmi_data_area 1156fwnmi_data_area: 1157 1158 /* pseries and powernv need to keep the whole page from 1159 * 0x7000 to 0x8000 free for use by the firmware 1160 */ 1161 . = 0x8000 1162#endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */ 1163 1164 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception) 1165 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception) 1166 1167#ifdef CONFIG_CBE_RAS 1168 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception) 1169 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception) 1170 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception) 1171#endif /* CONFIG_CBE_RAS */ 1172 1173 .globl hmi_exception_early 1174hmi_exception_early: 1175 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0xe60) 1176 mr r10,r1 /* Save r1 */ 1177 ld r1,PACAEMERGSP(r13) /* Use emergency stack */ 1178 subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ 1179 std r9,_CCR(r1) /* save CR in stackframe */ 1180 mfspr r11,SPRN_HSRR0 /* Save HSRR0 */ 1181 std r11,_NIP(r1) /* save HSRR0 in stackframe */ 1182 mfspr r12,SPRN_HSRR1 /* Save SRR1 */ 1183 std r12,_MSR(r1) /* save SRR1 in stackframe */ 1184 std r10,0(r1) /* make stack chain pointer */ 1185 std r0,GPR0(r1) /* save r0 in stackframe */ 1186 std r10,GPR1(r1) /* save r1 in stackframe */ 1187 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN) 1188 EXCEPTION_PROLOG_COMMON_3(0xe60) 1189 addi r3,r1,STACK_FRAME_OVERHEAD 1190 bl hmi_exception_realmode 1191 /* Windup the stack. */ 1192 /* Move original HSRR0 and HSRR1 into the respective regs */ 1193 ld r9,_MSR(r1) 1194 mtspr SPRN_HSRR1,r9 1195 ld r3,_NIP(r1) 1196 mtspr SPRN_HSRR0,r3 1197 ld r9,_CTR(r1) 1198 mtctr r9 1199 ld r9,_XER(r1) 1200 mtxer r9 1201 ld r9,_LINK(r1) 1202 mtlr r9 1203 REST_GPR(0, r1) 1204 REST_8GPRS(2, r1) 1205 REST_GPR(10, r1) 1206 ld r11,_CCR(r1) 1207 mtcr r11 1208 REST_GPR(11, r1) 1209 REST_2GPRS(12, r1) 1210 /* restore original r1. */ 1211 ld r1,GPR1(r1) 1212 1213 /* 1214 * Go to virtual mode and pull the HMI event information from 1215 * firmware. 1216 */ 1217 .globl hmi_exception_after_realmode 1218hmi_exception_after_realmode: 1219 SET_SCRATCH0(r13) 1220 EXCEPTION_PROLOG_0(PACA_EXGEN) 1221 b hmi_exception_hv 1222 1223 1224#define MACHINE_CHECK_HANDLER_WINDUP \ 1225 /* Clear MSR_RI before setting SRR0 and SRR1. */\ 1226 li r0,MSR_RI; \ 1227 mfmsr r9; /* get MSR value */ \ 1228 andc r9,r9,r0; \ 1229 mtmsrd r9,1; /* Clear MSR_RI */ \ 1230 /* Move original SRR0 and SRR1 into the respective regs */ \ 1231 ld r9,_MSR(r1); \ 1232 mtspr SPRN_SRR1,r9; \ 1233 ld r3,_NIP(r1); \ 1234 mtspr SPRN_SRR0,r3; \ 1235 ld r9,_CTR(r1); \ 1236 mtctr r9; \ 1237 ld r9,_XER(r1); \ 1238 mtxer r9; \ 1239 ld r9,_LINK(r1); \ 1240 mtlr r9; \ 1241 REST_GPR(0, r1); \ 1242 REST_8GPRS(2, r1); \ 1243 REST_GPR(10, r1); \ 1244 ld r11,_CCR(r1); \ 1245 mtcr r11; \ 1246 /* Decrement paca->in_mce. */ \ 1247 lhz r12,PACA_IN_MCE(r13); \ 1248 subi r12,r12,1; \ 1249 sth r12,PACA_IN_MCE(r13); \ 1250 REST_GPR(11, r1); \ 1251 REST_2GPRS(12, r1); \ 1252 /* restore original r1. */ \ 1253 ld r1,GPR1(r1) 1254 1255 /* 1256 * Handle machine check early in real mode. We come here with 1257 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack. 1258 */ 1259 .align 7 1260 .globl machine_check_handle_early 1261machine_check_handle_early: 1262 std r0,GPR0(r1) /* Save r0 */ 1263 EXCEPTION_PROLOG_COMMON_3(0x200) 1264 bl save_nvgprs 1265 addi r3,r1,STACK_FRAME_OVERHEAD 1266 bl machine_check_early 1267 std r3,RESULT(r1) /* Save result */ 1268 ld r12,_MSR(r1) 1269#ifdef CONFIG_PPC_P7_NAP 1270 /* 1271 * Check if thread was in power saving mode. We come here when any 1272 * of the following is true: 1273 * a. thread wasn't in power saving mode 1274 * b. thread was in power saving mode with no state loss or 1275 * supervisor state loss 1276 * 1277 * Go back to nap again if (b) is true. 1278 */ 1279 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */ 1280 beq 4f /* No, it wasn;t */ 1281 /* Thread was in power saving mode. Go back to nap again. */ 1282 cmpwi r11,2 1283 bne 3f 1284 /* Supervisor state loss */ 1285 li r0,1 1286 stb r0,PACA_NAPSTATELOST(r13) 12873: bl machine_check_queue_event 1288 MACHINE_CHECK_HANDLER_WINDUP 1289 GET_PACA(r13) 1290 ld r1,PACAR1(r13) 1291 li r3,PNV_THREAD_NAP 1292 b pnv_enter_arch207_idle_mode 12934: 1294#endif 1295 /* 1296 * Check if we are coming from hypervisor userspace. If yes then we 1297 * continue in host kernel in V mode to deliver the MC event. 1298 */ 1299 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */ 1300 beq 5f 1301 andi. r11,r12,MSR_PR /* See if coming from user. */ 1302 bne 9f /* continue in V mode if we are. */ 1303 13045: 1305#ifdef CONFIG_KVM_BOOK3S_64_HANDLER 1306 /* 1307 * We are coming from kernel context. Check if we are coming from 1308 * guest. if yes, then we can continue. We will fall through 1309 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest. 1310 */ 1311 lbz r11,HSTATE_IN_GUEST(r13) 1312 cmpwi r11,0 /* Check if coming from guest */ 1313 bne 9f /* continue if we are. */ 1314#endif 1315 /* 1316 * At this point we are not sure about what context we come from. 1317 * Queue up the MCE event and return from the interrupt. 1318 * But before that, check if this is an un-recoverable exception. 1319 * If yes, then stay on emergency stack and panic. 1320 */ 1321 andi. r11,r12,MSR_RI 1322 bne 2f 13231: mfspr r11,SPRN_SRR0 1324 ld r10,PACAKBASE(r13) 1325 LOAD_HANDLER(r10,unrecover_mce) 1326 mtspr SPRN_SRR0,r10 1327 ld r10,PACAKMSR(r13) 1328 /* 1329 * We are going down. But there are chances that we might get hit by 1330 * another MCE during panic path and we may run into unstable state 1331 * with no way out. Hence, turn ME bit off while going down, so that 1332 * when another MCE is hit during panic path, system will checkstop 1333 * and hypervisor will get restarted cleanly by SP. 1334 */ 1335 li r3,MSR_ME 1336 andc r10,r10,r3 /* Turn off MSR_ME */ 1337 mtspr SPRN_SRR1,r10 1338 rfid 1339 b . 13402: 1341 /* 1342 * Check if we have successfully handled/recovered from error, if not 1343 * then stay on emergency stack and panic. 1344 */ 1345 ld r3,RESULT(r1) /* Load result */ 1346 cmpdi r3,0 /* see if we handled MCE successfully */ 1347 1348 beq 1b /* if !handled then panic */ 1349 /* 1350 * Return from MC interrupt. 1351 * Queue up the MCE event so that we can log it later, while 1352 * returning from kernel or opal call. 1353 */ 1354 bl machine_check_queue_event 1355 MACHINE_CHECK_HANDLER_WINDUP 1356 rfid 13579: 1358 /* Deliver the machine check to host kernel in V mode. */ 1359 MACHINE_CHECK_HANDLER_WINDUP 1360 b machine_check_pSeries 1361 1362unrecover_mce: 1363 /* Invoke machine_check_exception to print MCE event and panic. */ 1364 addi r3,r1,STACK_FRAME_OVERHEAD 1365 bl machine_check_exception 1366 /* 1367 * We will not reach here. Even if we did, there is no way out. Call 1368 * unrecoverable_exception and die. 1369 */ 13701: addi r3,r1,STACK_FRAME_OVERHEAD 1371 bl unrecoverable_exception 1372 b 1b 1373/* 1374 * r13 points to the PACA, r9 contains the saved CR, 1375 * r12 contain the saved SRR1, SRR0 is still ready for return 1376 * r3 has the faulting address 1377 * r9 - r13 are saved in paca->exslb. 1378 * r3 is saved in paca->slb_r3 1379 * We assume we aren't going to take any exceptions during this procedure. 1380 */ 1381slb_miss_realmode: 1382 mflr r10 1383#ifdef CONFIG_RELOCATABLE 1384 mtctr r11 1385#endif 1386 1387 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ 1388 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ 1389 1390#ifdef CONFIG_PPC_STD_MMU_64 1391BEGIN_MMU_FTR_SECTION 1392 bl slb_allocate_realmode 1393END_MMU_FTR_SECTION_IFCLR(MMU_FTR_RADIX) 1394#endif 1395 /* All done -- return from exception. */ 1396 1397 ld r10,PACA_EXSLB+EX_LR(r13) 1398 ld r3,PACA_EXSLB+EX_R3(r13) 1399 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ 1400 1401 mtlr r10 1402 andi. r10,r12,MSR_RI /* check for unrecoverable exception */ 1403BEGIN_MMU_FTR_SECTION 1404 beq- 2f 1405FTR_SECTION_ELSE 1406 b 2f 1407ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_RADIX) 1408 1409.machine push 1410.machine "power4" 1411 mtcrf 0x80,r9 1412 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ 1413.machine pop 1414 1415 RESTORE_PPR_PACA(PACA_EXSLB, r9) 1416 ld r9,PACA_EXSLB+EX_R9(r13) 1417 ld r10,PACA_EXSLB+EX_R10(r13) 1418 ld r11,PACA_EXSLB+EX_R11(r13) 1419 ld r12,PACA_EXSLB+EX_R12(r13) 1420 ld r13,PACA_EXSLB+EX_R13(r13) 1421 rfid 1422 b . /* prevent speculative execution */ 1423 14242: mfspr r11,SPRN_SRR0 1425 ld r10,PACAKBASE(r13) 1426 LOAD_HANDLER(r10,unrecov_slb) 1427 mtspr SPRN_SRR0,r10 1428 ld r10,PACAKMSR(r13) 1429 mtspr SPRN_SRR1,r10 1430 rfid 1431 b . 1432 1433unrecov_slb: 1434 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB) 1435 RECONCILE_IRQ_STATE(r10, r11) 1436 bl save_nvgprs 14371: addi r3,r1,STACK_FRAME_OVERHEAD 1438 bl unrecoverable_exception 1439 b 1b 1440 1441 1442#ifdef CONFIG_PPC_970_NAP 1443power4_fixup_nap: 1444 andc r9,r9,r10 1445 std r9,TI_LOCAL_FLAGS(r11) 1446 ld r10,_LINK(r1) /* make idle task do the */ 1447 std r10,_NIP(r1) /* equivalent of a blr */ 1448 blr 1449#endif 1450 1451/* 1452 * Hash table stuff 1453 */ 1454 .align 7 1455do_hash_page: 1456#ifdef CONFIG_PPC_STD_MMU_64 1457 andis. r0,r4,0xa410 /* weird error? */ 1458 bne- handle_page_fault /* if not, try to insert a HPTE */ 1459 andis. r0,r4,DSISR_DABRMATCH@h 1460 bne- handle_dabr_fault 1461 CURRENT_THREAD_INFO(r11, r1) 1462 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */ 1463 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */ 1464 bne 77f /* then don't call hash_page now */ 1465 1466 /* 1467 * r3 contains the faulting address 1468 * r4 msr 1469 * r5 contains the trap number 1470 * r6 contains dsisr 1471 * 1472 * at return r3 = 0 for success, 1 for page fault, negative for error 1473 */ 1474 mr r4,r12 1475 ld r6,_DSISR(r1) 1476 bl __hash_page /* build HPTE if possible */ 1477 cmpdi r3,0 /* see if __hash_page succeeded */ 1478 1479 /* Success */ 1480 beq fast_exc_return_irq /* Return from exception on success */ 1481 1482 /* Error */ 1483 blt- 13f 1484#endif /* CONFIG_PPC_STD_MMU_64 */ 1485 1486/* Here we have a page fault that hash_page can't handle. */ 1487handle_page_fault: 148811: ld r4,_DAR(r1) 1489 ld r5,_DSISR(r1) 1490 addi r3,r1,STACK_FRAME_OVERHEAD 1491 bl do_page_fault 1492 cmpdi r3,0 1493 beq+ 12f 1494 bl save_nvgprs 1495 mr r5,r3 1496 addi r3,r1,STACK_FRAME_OVERHEAD 1497 lwz r4,_DAR(r1) 1498 bl bad_page_fault 1499 b ret_from_except 1500 1501/* We have a data breakpoint exception - handle it */ 1502handle_dabr_fault: 1503 bl save_nvgprs 1504 ld r4,_DAR(r1) 1505 ld r5,_DSISR(r1) 1506 addi r3,r1,STACK_FRAME_OVERHEAD 1507 bl do_break 150812: b ret_from_except_lite 1509 1510 1511#ifdef CONFIG_PPC_STD_MMU_64 1512/* We have a page fault that hash_page could handle but HV refused 1513 * the PTE insertion 1514 */ 151513: bl save_nvgprs 1516 mr r5,r3 1517 addi r3,r1,STACK_FRAME_OVERHEAD 1518 ld r4,_DAR(r1) 1519 bl low_hash_fault 1520 b ret_from_except 1521#endif 1522 1523/* 1524 * We come here as a result of a DSI at a point where we don't want 1525 * to call hash_page, such as when we are accessing memory (possibly 1526 * user memory) inside a PMU interrupt that occurred while interrupts 1527 * were soft-disabled. We want to invoke the exception handler for 1528 * the access, or panic if there isn't a handler. 1529 */ 153077: bl save_nvgprs 1531 mr r4,r3 1532 addi r3,r1,STACK_FRAME_OVERHEAD 1533 li r5,SIGSEGV 1534 bl bad_page_fault 1535 b ret_from_except 1536 1537/* 1538 * Here we have detected that the kernel stack pointer is bad. 1539 * R9 contains the saved CR, r13 points to the paca, 1540 * r10 contains the (bad) kernel stack pointer, 1541 * r11 and r12 contain the saved SRR0 and SRR1. 1542 * We switch to using an emergency stack, save the registers there, 1543 * and call kernel_bad_stack(), which panics. 1544 */ 1545bad_stack: 1546 ld r1,PACAEMERGSP(r13) 1547 subi r1,r1,64+INT_FRAME_SIZE 1548 std r9,_CCR(r1) 1549 std r10,GPR1(r1) 1550 std r11,_NIP(r1) 1551 std r12,_MSR(r1) 1552 mfspr r11,SPRN_DAR 1553 mfspr r12,SPRN_DSISR 1554 std r11,_DAR(r1) 1555 std r12,_DSISR(r1) 1556 mflr r10 1557 mfctr r11 1558 mfxer r12 1559 std r10,_LINK(r1) 1560 std r11,_CTR(r1) 1561 std r12,_XER(r1) 1562 SAVE_GPR(0,r1) 1563 SAVE_GPR(2,r1) 1564 ld r10,EX_R3(r3) 1565 std r10,GPR3(r1) 1566 SAVE_GPR(4,r1) 1567 SAVE_4GPRS(5,r1) 1568 ld r9,EX_R9(r3) 1569 ld r10,EX_R10(r3) 1570 SAVE_2GPRS(9,r1) 1571 ld r9,EX_R11(r3) 1572 ld r10,EX_R12(r3) 1573 ld r11,EX_R13(r3) 1574 std r9,GPR11(r1) 1575 std r10,GPR12(r1) 1576 std r11,GPR13(r1) 1577BEGIN_FTR_SECTION 1578 ld r10,EX_CFAR(r3) 1579 std r10,ORIG_GPR3(r1) 1580END_FTR_SECTION_IFSET(CPU_FTR_CFAR) 1581 SAVE_8GPRS(14,r1) 1582 SAVE_10GPRS(22,r1) 1583 lhz r12,PACA_TRAP_SAVE(r13) 1584 std r12,_TRAP(r1) 1585 addi r11,r1,INT_FRAME_SIZE 1586 std r11,0(r1) 1587 li r12,0 1588 std r12,0(r11) 1589 ld r2,PACATOC(r13) 1590 ld r11,exception_marker@toc(r2) 1591 std r12,RESULT(r1) 1592 std r11,STACK_FRAME_OVERHEAD-16(r1) 15931: addi r3,r1,STACK_FRAME_OVERHEAD 1594 bl kernel_bad_stack 1595 b 1b 1596