1/* 2 * This file contains the 64-bit "server" PowerPC variant 3 * of the low level exception handling including exception 4 * vectors, exception return, part of the slb and stab 5 * handling and other fixed offset specific things. 6 * 7 * This file is meant to be #included from head_64.S due to 8 * position dependent assembly. 9 * 10 * Most of this originates from head_64.S and thus has the same 11 * copyright history. 12 * 13 */ 14 15#include <asm/hw_irq.h> 16#include <asm/exception-64s.h> 17#include <asm/ptrace.h> 18#include <asm/cpuidle.h> 19 20/* 21 * We layout physical memory as follows: 22 * 0x0000 - 0x00ff : Secondary processor spin code 23 * 0x0100 - 0x17ff : pSeries Interrupt prologs 24 * 0x1800 - 0x4000 : interrupt support common interrupt prologs 25 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1 26 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1 27 * 0x7000 - 0x7fff : FWNMI data area 28 * 0x8000 - 0x8fff : Initial (CPU0) segment table 29 * 0x9000 - : Early init and support code 30 */ 31 /* Syscall routine is used twice, in reloc-off and reloc-on paths */ 32#define SYSCALL_PSERIES_1 \ 33BEGIN_FTR_SECTION \ 34 cmpdi r0,0x1ebe ; \ 35 beq- 1f ; \ 36END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \ 37 mr r9,r13 ; \ 38 GET_PACA(r13) ; \ 39 mfspr r11,SPRN_SRR0 ; \ 400: 41 42#define SYSCALL_PSERIES_2_RFID \ 43 mfspr r12,SPRN_SRR1 ; \ 44 ld r10,PACAKBASE(r13) ; \ 45 LOAD_HANDLER(r10, system_call_entry) ; \ 46 mtspr SPRN_SRR0,r10 ; \ 47 ld r10,PACAKMSR(r13) ; \ 48 mtspr SPRN_SRR1,r10 ; \ 49 rfid ; \ 50 b . ; /* prevent speculative execution */ 51 52#define SYSCALL_PSERIES_3 \ 53 /* Fast LE/BE switch system call */ \ 541: mfspr r12,SPRN_SRR1 ; \ 55 xori r12,r12,MSR_LE ; \ 56 mtspr SPRN_SRR1,r12 ; \ 57 rfid ; /* return to userspace */ \ 58 b . ; /* prevent speculative execution */ 59 60#if defined(CONFIG_RELOCATABLE) 61 /* 62 * We can't branch directly so we do it via the CTR which 63 * is volatile across system calls. 64 */ 65#define SYSCALL_PSERIES_2_DIRECT \ 66 mflr r10 ; \ 67 ld r12,PACAKBASE(r13) ; \ 68 LOAD_HANDLER(r12, system_call_entry) ; \ 69 mtctr r12 ; \ 70 mfspr r12,SPRN_SRR1 ; \ 71 /* Re-use of r13... No spare regs to do this */ \ 72 li r13,MSR_RI ; \ 73 mtmsrd r13,1 ; \ 74 GET_PACA(r13) ; /* get r13 back */ \ 75 bctr ; 76#else 77 /* We can branch directly */ 78#define SYSCALL_PSERIES_2_DIRECT \ 79 mfspr r12,SPRN_SRR1 ; \ 80 li r10,MSR_RI ; \ 81 mtmsrd r10,1 ; /* Set RI (EE=0) */ \ 82 b system_call_common ; 83#endif 84 85/* 86 * This is the start of the interrupt handlers for pSeries 87 * This code runs with relocation off. 88 * Code from here to __end_interrupts gets copied down to real 89 * address 0x100 when we are running a relocatable kernel. 90 * Therefore any relative branches in this section must only 91 * branch to labels in this section. 92 */ 93 . = 0x100 94 .globl __start_interrupts 95__start_interrupts: 96 97 .globl system_reset_pSeries; 98system_reset_pSeries: 99 SET_SCRATCH0(r13) 100#ifdef CONFIG_PPC_P7_NAP 101BEGIN_FTR_SECTION 102 /* Running native on arch 2.06 or later, check if we are 103 * waking up from nap/sleep/winkle. 104 */ 105 mfspr r13,SPRN_SRR1 106 rlwinm. r13,r13,47-31,30,31 107 beq 9f 108 109 cmpwi cr3,r13,2 110 GET_PACA(r13) 111 bl pnv_restore_hyp_resource 112 113 li r0,PNV_THREAD_RUNNING 114 stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */ 115 116#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 117 li r0,KVM_HWTHREAD_IN_KERNEL 118 stb r0,HSTATE_HWTHREAD_STATE(r13) 119 /* Order setting hwthread_state vs. testing hwthread_req */ 120 sync 121 lbz r0,HSTATE_HWTHREAD_REQ(r13) 122 cmpwi r0,0 123 beq 1f 124 b kvm_start_guest 1251: 126#endif 127 128 /* Return SRR1 from power7_nap() */ 129 mfspr r3,SPRN_SRR1 130 blt cr3,2f 131 b pnv_wakeup_loss 1322: b pnv_wakeup_noloss 133 1349: 135END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) 136#endif /* CONFIG_PPC_P7_NAP */ 137 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, 138 NOTEST, 0x100) 139 140 . = 0x200 141machine_check_pSeries_1: 142 /* This is moved out of line as it can be patched by FW, but 143 * some code path might still want to branch into the original 144 * vector 145 */ 146 SET_SCRATCH0(r13) /* save r13 */ 147 /* 148 * Running native on arch 2.06 or later, we may wakeup from winkle 149 * inside machine check. If yes, then last bit of HSPGR0 would be set 150 * to 1. Hence clear it unconditionally. 151 */ 152 GET_PACA(r13) 153 clrrdi r13,r13,1 154 SET_PACA(r13) 155 EXCEPTION_PROLOG_0(PACA_EXMC) 156BEGIN_FTR_SECTION 157 b machine_check_powernv_early 158FTR_SECTION_ELSE 159 b machine_check_pSeries_0 160ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) 161 162 . = 0x300 163 .globl data_access_pSeries 164data_access_pSeries: 165 SET_SCRATCH0(r13) 166 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD, 167 KVMTEST, 0x300) 168 169 . = 0x380 170 .globl data_access_slb_pSeries 171data_access_slb_pSeries: 172 SET_SCRATCH0(r13) 173 EXCEPTION_PROLOG_0(PACA_EXSLB) 174 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380) 175 std r3,PACA_EXSLB+EX_R3(r13) 176 mfspr r3,SPRN_DAR 177 mfspr r12,SPRN_SRR1 178#ifndef CONFIG_RELOCATABLE 179 b slb_miss_realmode 180#else 181 /* 182 * We can't just use a direct branch to slb_miss_realmode 183 * because the distance from here to there depends on where 184 * the kernel ends up being put. 185 */ 186 mfctr r11 187 ld r10,PACAKBASE(r13) 188 LOAD_HANDLER(r10, slb_miss_realmode) 189 mtctr r10 190 bctr 191#endif 192 193 STD_EXCEPTION_PSERIES(0x400, instruction_access) 194 195 . = 0x480 196 .globl instruction_access_slb_pSeries 197instruction_access_slb_pSeries: 198 SET_SCRATCH0(r13) 199 EXCEPTION_PROLOG_0(PACA_EXSLB) 200 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x480) 201 std r3,PACA_EXSLB+EX_R3(r13) 202 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ 203 mfspr r12,SPRN_SRR1 204#ifndef CONFIG_RELOCATABLE 205 b slb_miss_realmode 206#else 207 mfctr r11 208 ld r10,PACAKBASE(r13) 209 LOAD_HANDLER(r10, slb_miss_realmode) 210 mtctr r10 211 bctr 212#endif 213 214 /* We open code these as we can't have a ". = x" (even with 215 * x = "." within a feature section 216 */ 217 . = 0x500; 218 .globl hardware_interrupt_pSeries; 219 .globl hardware_interrupt_hv; 220hardware_interrupt_pSeries: 221hardware_interrupt_hv: 222 BEGIN_FTR_SECTION 223 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt, 224 EXC_HV, SOFTEN_TEST_HV) 225 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502) 226 FTR_SECTION_ELSE 227 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt, 228 EXC_STD, SOFTEN_TEST_PR) 229 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500) 230 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) 231 232 STD_EXCEPTION_PSERIES(0x600, alignment) 233 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x600) 234 235 STD_EXCEPTION_PSERIES(0x700, program_check) 236 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x700) 237 238 STD_EXCEPTION_PSERIES(0x800, fp_unavailable) 239 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x800) 240 241 . = 0x900 242 .globl decrementer_pSeries 243decrementer_pSeries: 244 _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR) 245 246 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer) 247 248 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super) 249 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xa00) 250 251 STD_EXCEPTION_PSERIES(0xb00, trap_0b) 252 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xb00) 253 254 . = 0xc00 255 .globl system_call_pSeries 256system_call_pSeries: 257 /* 258 * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems 259 * that support it) before changing to HMT_MEDIUM. That allows the KVM 260 * code to save that value into the guest state (it is the guest's PPR 261 * value). Otherwise just change to HMT_MEDIUM as userspace has 262 * already saved the PPR. 263 */ 264#ifdef CONFIG_KVM_BOOK3S_64_HANDLER 265 SET_SCRATCH0(r13) 266 GET_PACA(r13) 267 std r9,PACA_EXGEN+EX_R9(r13) 268 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); 269 HMT_MEDIUM; 270 std r10,PACA_EXGEN+EX_R10(r13) 271 OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR); 272 mfcr r9 273 KVMTEST(0xc00) 274 GET_SCRATCH0(r13) 275#else 276 HMT_MEDIUM; 277#endif 278 SYSCALL_PSERIES_1 279 SYSCALL_PSERIES_2_RFID 280 SYSCALL_PSERIES_3 281 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00) 282 283 STD_EXCEPTION_PSERIES(0xd00, single_step) 284 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xd00) 285 286 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch 287 * out of line to handle them 288 */ 289 . = 0xe00 290hv_data_storage_trampoline: 291 SET_SCRATCH0(r13) 292 EXCEPTION_PROLOG_0(PACA_EXGEN) 293 b h_data_storage_hv 294 295 . = 0xe20 296hv_instr_storage_trampoline: 297 SET_SCRATCH0(r13) 298 EXCEPTION_PROLOG_0(PACA_EXGEN) 299 b h_instr_storage_hv 300 301 . = 0xe40 302emulation_assist_trampoline: 303 SET_SCRATCH0(r13) 304 EXCEPTION_PROLOG_0(PACA_EXGEN) 305 b emulation_assist_hv 306 307 . = 0xe60 308hv_exception_trampoline: 309 SET_SCRATCH0(r13) 310 EXCEPTION_PROLOG_0(PACA_EXGEN) 311 b hmi_exception_early 312 313 . = 0xe80 314hv_doorbell_trampoline: 315 SET_SCRATCH0(r13) 316 EXCEPTION_PROLOG_0(PACA_EXGEN) 317 b h_doorbell_hv 318 319 . = 0xea0 320hv_virt_irq_trampoline: 321 SET_SCRATCH0(r13) 322 EXCEPTION_PROLOG_0(PACA_EXGEN) 323 b h_virt_irq_hv 324 325 /* We need to deal with the Altivec unavailable exception 326 * here which is at 0xf20, thus in the middle of the 327 * prolog code of the PerformanceMonitor one. A little 328 * trickery is thus necessary 329 */ 330 . = 0xf00 331performance_monitor_pseries_trampoline: 332 SET_SCRATCH0(r13) 333 EXCEPTION_PROLOG_0(PACA_EXGEN) 334 b performance_monitor_pSeries 335 336 . = 0xf20 337altivec_unavailable_pseries_trampoline: 338 SET_SCRATCH0(r13) 339 EXCEPTION_PROLOG_0(PACA_EXGEN) 340 b altivec_unavailable_pSeries 341 342 . = 0xf40 343vsx_unavailable_pseries_trampoline: 344 SET_SCRATCH0(r13) 345 EXCEPTION_PROLOG_0(PACA_EXGEN) 346 b vsx_unavailable_pSeries 347 348 . = 0xf60 349facility_unavailable_trampoline: 350 SET_SCRATCH0(r13) 351 EXCEPTION_PROLOG_0(PACA_EXGEN) 352 b facility_unavailable_pSeries 353 354 . = 0xf80 355hv_facility_unavailable_trampoline: 356 SET_SCRATCH0(r13) 357 EXCEPTION_PROLOG_0(PACA_EXGEN) 358 b facility_unavailable_hv 359 360#ifdef CONFIG_CBE_RAS 361 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error) 362 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202) 363#endif /* CONFIG_CBE_RAS */ 364 365 STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint) 366 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1300) 367 368 . = 0x1500 369 .global denorm_exception_hv 370denorm_exception_hv: 371 mtspr SPRN_SPRG_HSCRATCH0,r13 372 EXCEPTION_PROLOG_0(PACA_EXGEN) 373 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500) 374 375#ifdef CONFIG_PPC_DENORMALISATION 376 mfspr r10,SPRN_HSRR1 377 mfspr r11,SPRN_HSRR0 /* save HSRR0 */ 378 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */ 379 addi r11,r11,-4 /* HSRR0 is next instruction */ 380 bne+ denorm_assist 381#endif 382 383 KVMTEST(0x1500) 384 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV) 385 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500) 386 387#ifdef CONFIG_CBE_RAS 388 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance) 389 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602) 390#endif /* CONFIG_CBE_RAS */ 391 392 STD_EXCEPTION_PSERIES(0x1700, altivec_assist) 393 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x1700) 394 395#ifdef CONFIG_CBE_RAS 396 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal) 397 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802) 398#else 399 . = 0x1800 400#endif /* CONFIG_CBE_RAS */ 401 402 403/*** Out of line interrupts support ***/ 404 405 .align 7 406 /* moved from 0x200 */ 407machine_check_powernv_early: 408BEGIN_FTR_SECTION 409 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200) 410 /* 411 * Register contents: 412 * R13 = PACA 413 * R9 = CR 414 * Original R9 to R13 is saved on PACA_EXMC 415 * 416 * Switch to mc_emergency stack and handle re-entrancy (we limit 417 * the nested MCE upto level 4 to avoid stack overflow). 418 * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1 419 * 420 * We use paca->in_mce to check whether this is the first entry or 421 * nested machine check. We increment paca->in_mce to track nested 422 * machine checks. 423 * 424 * If this is the first entry then set stack pointer to 425 * paca->mc_emergency_sp, otherwise r1 is already pointing to 426 * stack frame on mc_emergency stack. 427 * 428 * NOTE: We are here with MSR_ME=0 (off), which means we risk a 429 * checkstop if we get another machine check exception before we do 430 * rfid with MSR_ME=1. 431 */ 432 mr r11,r1 /* Save r1 */ 433 lhz r10,PACA_IN_MCE(r13) 434 cmpwi r10,0 /* Are we in nested machine check */ 435 bne 0f /* Yes, we are. */ 436 /* First machine check entry */ 437 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */ 4380: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ 439 addi r10,r10,1 /* increment paca->in_mce */ 440 sth r10,PACA_IN_MCE(r13) 441 /* Limit nested MCE to level 4 to avoid stack overflow */ 442 cmpwi r10,4 443 bgt 2f /* Check if we hit limit of 4 */ 444 std r11,GPR1(r1) /* Save r1 on the stack. */ 445 std r11,0(r1) /* make stack chain pointer */ 446 mfspr r11,SPRN_SRR0 /* Save SRR0 */ 447 std r11,_NIP(r1) 448 mfspr r11,SPRN_SRR1 /* Save SRR1 */ 449 std r11,_MSR(r1) 450 mfspr r11,SPRN_DAR /* Save DAR */ 451 std r11,_DAR(r1) 452 mfspr r11,SPRN_DSISR /* Save DSISR */ 453 std r11,_DSISR(r1) 454 std r9,_CCR(r1) /* Save CR in stackframe */ 455 /* Save r9 through r13 from EXMC save area to stack frame. */ 456 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC) 457 mfmsr r11 /* get MSR value */ 458 ori r11,r11,MSR_ME /* turn on ME bit */ 459 ori r11,r11,MSR_RI /* turn on RI bit */ 460 ld r12,PACAKBASE(r13) /* get high part of &label */ 461 LOAD_HANDLER(r12, machine_check_handle_early) 4621: mtspr SPRN_SRR0,r12 463 mtspr SPRN_SRR1,r11 464 rfid 465 b . /* prevent speculative execution */ 4662: 467 /* Stack overflow. Stay on emergency stack and panic. 468 * Keep the ME bit off while panic-ing, so that if we hit 469 * another machine check we checkstop. 470 */ 471 addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */ 472 ld r11,PACAKMSR(r13) 473 ld r12,PACAKBASE(r13) 474 LOAD_HANDLER(r12, unrecover_mce) 475 li r10,MSR_ME 476 andc r11,r11,r10 /* Turn off MSR_ME */ 477 b 1b 478 b . /* prevent speculative execution */ 479END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) 480 481machine_check_pSeries: 482 .globl machine_check_fwnmi 483machine_check_fwnmi: 484 SET_SCRATCH0(r13) /* save r13 */ 485 EXCEPTION_PROLOG_0(PACA_EXMC) 486machine_check_pSeries_0: 487 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200) 488 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD) 489 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200) 490 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300) 491 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380) 492 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x400) 493 KVM_HANDLER(PACA_EXSLB, EXC_STD, 0x480) 494 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x900) 495 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982) 496 497#ifdef CONFIG_PPC_DENORMALISATION 498denorm_assist: 499BEGIN_FTR_SECTION 500/* 501 * To denormalise we need to move a copy of the register to itself. 502 * For POWER6 do that here for all FP regs. 503 */ 504 mfmsr r10 505 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1) 506 xori r10,r10,(MSR_FE0|MSR_FE1) 507 mtmsrd r10 508 sync 509 510#define FMR2(n) fmr (n), (n) ; fmr n+1, n+1 511#define FMR4(n) FMR2(n) ; FMR2(n+2) 512#define FMR8(n) FMR4(n) ; FMR4(n+4) 513#define FMR16(n) FMR8(n) ; FMR8(n+8) 514#define FMR32(n) FMR16(n) ; FMR16(n+16) 515 FMR32(0) 516 517FTR_SECTION_ELSE 518/* 519 * To denormalise we need to move a copy of the register to itself. 520 * For POWER7 do that here for the first 32 VSX registers only. 521 */ 522 mfmsr r10 523 oris r10,r10,MSR_VSX@h 524 mtmsrd r10 525 sync 526 527#define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1) 528#define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2) 529#define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4) 530#define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8) 531#define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16) 532 XVCPSGNDP32(0) 533 534ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206) 535 536BEGIN_FTR_SECTION 537 b denorm_done 538END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) 539/* 540 * To denormalise we need to move a copy of the register to itself. 541 * For POWER8 we need to do that for all 64 VSX registers 542 */ 543 XVCPSGNDP32(32) 544denorm_done: 545 mtspr SPRN_HSRR0,r11 546 mtcrf 0x80,r9 547 ld r9,PACA_EXGEN+EX_R9(r13) 548 RESTORE_PPR_PACA(PACA_EXGEN, r10) 549BEGIN_FTR_SECTION 550 ld r10,PACA_EXGEN+EX_CFAR(r13) 551 mtspr SPRN_CFAR,r10 552END_FTR_SECTION_IFSET(CPU_FTR_CFAR) 553 ld r10,PACA_EXGEN+EX_R10(r13) 554 ld r11,PACA_EXGEN+EX_R11(r13) 555 ld r12,PACA_EXGEN+EX_R12(r13) 556 ld r13,PACA_EXGEN+EX_R13(r13) 557 HRFID 558 b . 559#endif 560 561 .align 7 562 /* moved from 0xe00 */ 563 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage) 564 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02) 565 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage) 566 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22) 567 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist) 568 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42) 569 MASKABLE_EXCEPTION_HV_OOL(0xe62, hmi_exception) 570 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62) 571 572 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell) 573 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82) 574 575 MASKABLE_EXCEPTION_HV_OOL(0xea2, h_virt_irq) 576 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xea2) 577 578 /* moved from 0xf00 */ 579 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) 580 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf00) 581 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) 582 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf20) 583 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) 584 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf40) 585 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) 586 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf60) 587 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable) 588 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82) 589 590/* 591 * An interrupt came in while soft-disabled. We set paca->irq_happened, then: 592 * - If it was a decrementer interrupt, we bump the dec to max and and return. 593 * - If it was a doorbell we return immediately since doorbells are edge 594 * triggered and won't automatically refire. 595 * - If it was a HMI we return immediately since we handled it in realmode 596 * and it won't refire. 597 * - else we hard disable and return. 598 * This is called with r10 containing the value to OR to the paca field. 599 */ 600#define MASKED_INTERRUPT(_H) \ 601masked_##_H##interrupt: \ 602 std r11,PACA_EXGEN+EX_R11(r13); \ 603 lbz r11,PACAIRQHAPPENED(r13); \ 604 or r11,r11,r10; \ 605 stb r11,PACAIRQHAPPENED(r13); \ 606 cmpwi r10,PACA_IRQ_DEC; \ 607 bne 1f; \ 608 lis r10,0x7fff; \ 609 ori r10,r10,0xffff; \ 610 mtspr SPRN_DEC,r10; \ 611 b 2f; \ 6121: cmpwi r10,PACA_IRQ_DBELL; \ 613 beq 2f; \ 614 cmpwi r10,PACA_IRQ_HMI; \ 615 beq 2f; \ 616 mfspr r10,SPRN_##_H##SRR1; \ 617 rldicl r10,r10,48,1; /* clear MSR_EE */ \ 618 rotldi r10,r10,16; \ 619 mtspr SPRN_##_H##SRR1,r10; \ 6202: mtcrf 0x80,r9; \ 621 ld r9,PACA_EXGEN+EX_R9(r13); \ 622 ld r10,PACA_EXGEN+EX_R10(r13); \ 623 ld r11,PACA_EXGEN+EX_R11(r13); \ 624 GET_SCRATCH0(r13); \ 625 ##_H##rfid; \ 626 b . 627 628 MASKED_INTERRUPT() 629 MASKED_INTERRUPT(H) 630 631/* 632 * Called from arch_local_irq_enable when an interrupt needs 633 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate 634 * which kind of interrupt. MSR:EE is already off. We generate a 635 * stackframe like if a real interrupt had happened. 636 * 637 * Note: While MSR:EE is off, we need to make sure that _MSR 638 * in the generated frame has EE set to 1 or the exception 639 * handler will not properly re-enable them. 640 */ 641_GLOBAL(__replay_interrupt) 642 /* We are going to jump to the exception common code which 643 * will retrieve various register values from the PACA which 644 * we don't give a damn about, so we don't bother storing them. 645 */ 646 mfmsr r12 647 mflr r11 648 mfcr r9 649 ori r12,r12,MSR_EE 650 cmpwi r3,0x900 651 beq decrementer_common 652 cmpwi r3,0x500 653 beq hardware_interrupt_common 654BEGIN_FTR_SECTION 655 cmpwi r3,0xe80 656 beq h_doorbell_common 657 cmpwi r3,0xea0 658 beq h_virt_irq_common 659 cmpwi r3,0xe60 660 beq hmi_exception_common 661FTR_SECTION_ELSE 662 cmpwi r3,0xa00 663 beq doorbell_super_common 664ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) 665 blr 666 667#ifdef CONFIG_PPC_PSERIES 668/* 669 * Vectors for the FWNMI option. Share common code. 670 */ 671 .globl system_reset_fwnmi 672 .align 7 673system_reset_fwnmi: 674 SET_SCRATCH0(r13) /* save r13 */ 675 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, 676 NOTEST, 0x100) 677 678#endif /* CONFIG_PPC_PSERIES */ 679 680#ifdef CONFIG_KVM_BOOK3S_64_HANDLER 681kvmppc_skip_interrupt: 682 /* 683 * Here all GPRs are unchanged from when the interrupt happened 684 * except for r13, which is saved in SPRG_SCRATCH0. 685 */ 686 mfspr r13, SPRN_SRR0 687 addi r13, r13, 4 688 mtspr SPRN_SRR0, r13 689 GET_SCRATCH0(r13) 690 rfid 691 b . 692 693kvmppc_skip_Hinterrupt: 694 /* 695 * Here all GPRs are unchanged from when the interrupt happened 696 * except for r13, which is saved in SPRG_SCRATCH0. 697 */ 698 mfspr r13, SPRN_HSRR0 699 addi r13, r13, 4 700 mtspr SPRN_HSRR0, r13 701 GET_SCRATCH0(r13) 702 hrfid 703 b . 704#endif 705 706/* 707 * Ensure that any handlers that get invoked from the exception prologs 708 * above are below the first 64KB (0x10000) of the kernel image because 709 * the prologs assemble the addresses of these handlers using the 710 * LOAD_HANDLER macro, which uses an ori instruction. 711 */ 712 713/*** Common interrupt handlers ***/ 714 715 STD_EXCEPTION_COMMON(0x100, system_reset, system_reset_exception) 716 717 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ) 718 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, timer_interrupt) 719 STD_EXCEPTION_COMMON(0x980, hdecrementer, hdec_interrupt) 720#ifdef CONFIG_PPC_DOORBELL 721 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, doorbell_exception) 722#else 723 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, unknown_exception) 724#endif 725 STD_EXCEPTION_COMMON(0xb00, trap_0b, unknown_exception) 726 STD_EXCEPTION_COMMON(0xd00, single_step, single_step_exception) 727 STD_EXCEPTION_COMMON(0xe00, trap_0e, unknown_exception) 728 STD_EXCEPTION_COMMON(0xe40, emulation_assist, emulation_assist_interrupt) 729 STD_EXCEPTION_COMMON_ASYNC(0xe60, hmi_exception, handle_hmi_exception) 730#ifdef CONFIG_PPC_DOORBELL 731 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, doorbell_exception) 732#else 733 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception) 734#endif 735 STD_EXCEPTION_COMMON_ASYNC(0xea0, h_virt_irq, do_IRQ) 736 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception) 737 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception) 738 STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception) 739#ifdef CONFIG_ALTIVEC 740 STD_EXCEPTION_COMMON(0x1700, altivec_assist, altivec_assist_exception) 741#else 742 STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception) 743#endif 744 745 /* 746 * Relocation-on interrupts: A subset of the interrupts can be delivered 747 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering 748 * it. Addresses are the same as the original interrupt addresses, but 749 * offset by 0xc000000000004000. 750 * It's impossible to receive interrupts below 0x300 via this mechanism. 751 * KVM: None of these traps are from the guest ; anything that escalated 752 * to HV=1 from HV=0 is delivered via real mode handlers. 753 */ 754 755 /* 756 * This uses the standard macro, since the original 0x300 vector 757 * only has extra guff for STAB-based processors -- which never 758 * come here. 759 */ 760 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access) 761 . = 0x4380 762 .globl data_access_slb_relon_pSeries 763data_access_slb_relon_pSeries: 764 SET_SCRATCH0(r13) 765 EXCEPTION_PROLOG_0(PACA_EXSLB) 766 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380) 767 std r3,PACA_EXSLB+EX_R3(r13) 768 mfspr r3,SPRN_DAR 769 mfspr r12,SPRN_SRR1 770#ifndef CONFIG_RELOCATABLE 771 b slb_miss_realmode 772#else 773 /* 774 * We can't just use a direct branch to slb_miss_realmode 775 * because the distance from here to there depends on where 776 * the kernel ends up being put. 777 */ 778 mfctr r11 779 ld r10,PACAKBASE(r13) 780 LOAD_HANDLER(r10, slb_miss_realmode) 781 mtctr r10 782 bctr 783#endif 784 785 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access) 786 . = 0x4480 787 .globl instruction_access_slb_relon_pSeries 788instruction_access_slb_relon_pSeries: 789 SET_SCRATCH0(r13) 790 EXCEPTION_PROLOG_0(PACA_EXSLB) 791 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480) 792 std r3,PACA_EXSLB+EX_R3(r13) 793 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ 794 mfspr r12,SPRN_SRR1 795#ifndef CONFIG_RELOCATABLE 796 b slb_miss_realmode 797#else 798 mfctr r11 799 ld r10,PACAKBASE(r13) 800 LOAD_HANDLER(r10, slb_miss_realmode) 801 mtctr r10 802 bctr 803#endif 804 805 . = 0x4500 806 .globl hardware_interrupt_relon_pSeries; 807 .globl hardware_interrupt_relon_hv; 808hardware_interrupt_relon_pSeries: 809hardware_interrupt_relon_hv: 810 BEGIN_FTR_SECTION 811 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV) 812 FTR_SECTION_ELSE 813 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR) 814 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) 815 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment) 816 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check) 817 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable) 818 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer) 819 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer) 820 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super) 821 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b) 822 823 . = 0x4c00 824 .globl system_call_relon_pSeries 825system_call_relon_pSeries: 826 HMT_MEDIUM 827 SYSCALL_PSERIES_1 828 SYSCALL_PSERIES_2_DIRECT 829 SYSCALL_PSERIES_3 830 831 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step) 832 833 . = 0x4e00 834 b . /* Can't happen, see v2.07 Book III-S section 6.5 */ 835 836 . = 0x4e20 837 b . /* Can't happen, see v2.07 Book III-S section 6.5 */ 838 839 . = 0x4e40 840emulation_assist_relon_trampoline: 841 SET_SCRATCH0(r13) 842 EXCEPTION_PROLOG_0(PACA_EXGEN) 843 b emulation_assist_relon_hv 844 845 . = 0x4e60 846 b . /* Can't happen, see v2.07 Book III-S section 6.5 */ 847 848 . = 0x4e80 849h_doorbell_relon_trampoline: 850 SET_SCRATCH0(r13) 851 EXCEPTION_PROLOG_0(PACA_EXGEN) 852 b h_doorbell_relon_hv 853 854 . = 0x4ea0 855h_virt_irq_relon_trampoline: 856 SET_SCRATCH0(r13) 857 EXCEPTION_PROLOG_0(PACA_EXGEN) 858 b h_virt_irq_relon_hv 859 860 . = 0x4f00 861performance_monitor_relon_pseries_trampoline: 862 SET_SCRATCH0(r13) 863 EXCEPTION_PROLOG_0(PACA_EXGEN) 864 b performance_monitor_relon_pSeries 865 866 . = 0x4f20 867altivec_unavailable_relon_pseries_trampoline: 868 SET_SCRATCH0(r13) 869 EXCEPTION_PROLOG_0(PACA_EXGEN) 870 b altivec_unavailable_relon_pSeries 871 872 . = 0x4f40 873vsx_unavailable_relon_pseries_trampoline: 874 SET_SCRATCH0(r13) 875 EXCEPTION_PROLOG_0(PACA_EXGEN) 876 b vsx_unavailable_relon_pSeries 877 878 . = 0x4f60 879facility_unavailable_relon_trampoline: 880 SET_SCRATCH0(r13) 881 EXCEPTION_PROLOG_0(PACA_EXGEN) 882 b facility_unavailable_relon_pSeries 883 884 . = 0x4f80 885hv_facility_unavailable_relon_trampoline: 886 SET_SCRATCH0(r13) 887 EXCEPTION_PROLOG_0(PACA_EXGEN) 888 b hv_facility_unavailable_relon_hv 889 890 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint) 891#ifdef CONFIG_PPC_DENORMALISATION 892 . = 0x5500 893 b denorm_exception_hv 894#endif 895 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist) 896 897 .align 7 898system_call_entry: 899 b system_call_common 900 901ppc64_runlatch_on_trampoline: 902 b __ppc64_runlatch_on 903 904/* 905 * Here r13 points to the paca, r9 contains the saved CR, 906 * SRR0 and SRR1 are saved in r11 and r12, 907 * r9 - r13 are saved in paca->exgen. 908 */ 909 .align 7 910 .globl data_access_common 911data_access_common: 912 mfspr r10,SPRN_DAR 913 std r10,PACA_EXGEN+EX_DAR(r13) 914 mfspr r10,SPRN_DSISR 915 stw r10,PACA_EXGEN+EX_DSISR(r13) 916 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN) 917 RECONCILE_IRQ_STATE(r10, r11) 918 ld r12,_MSR(r1) 919 ld r3,PACA_EXGEN+EX_DAR(r13) 920 lwz r4,PACA_EXGEN+EX_DSISR(r13) 921 li r5,0x300 922 std r3,_DAR(r1) 923 std r4,_DSISR(r1) 924BEGIN_MMU_FTR_SECTION 925 b do_hash_page /* Try to handle as hpte fault */ 926MMU_FTR_SECTION_ELSE 927 b handle_page_fault 928ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX) 929 930 .align 7 931 .globl h_data_storage_common 932h_data_storage_common: 933 mfspr r10,SPRN_HDAR 934 std r10,PACA_EXGEN+EX_DAR(r13) 935 mfspr r10,SPRN_HDSISR 936 stw r10,PACA_EXGEN+EX_DSISR(r13) 937 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN) 938 bl save_nvgprs 939 RECONCILE_IRQ_STATE(r10, r11) 940 addi r3,r1,STACK_FRAME_OVERHEAD 941 bl unknown_exception 942 b ret_from_except 943 944 .align 7 945 .globl instruction_access_common 946instruction_access_common: 947 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN) 948 RECONCILE_IRQ_STATE(r10, r11) 949 ld r12,_MSR(r1) 950 ld r3,_NIP(r1) 951 andis. r4,r12,0x5820 952 li r5,0x400 953 std r3,_DAR(r1) 954 std r4,_DSISR(r1) 955BEGIN_MMU_FTR_SECTION 956 b do_hash_page /* Try to handle as hpte fault */ 957MMU_FTR_SECTION_ELSE 958 b handle_page_fault 959ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX) 960 961 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, unknown_exception) 962 963 /* 964 * Machine check is different because we use a different 965 * save area: PACA_EXMC instead of PACA_EXGEN. 966 */ 967 .align 7 968 .globl machine_check_common 969machine_check_common: 970 971 mfspr r10,SPRN_DAR 972 std r10,PACA_EXGEN+EX_DAR(r13) 973 mfspr r10,SPRN_DSISR 974 stw r10,PACA_EXGEN+EX_DSISR(r13) 975 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC) 976 FINISH_NAP 977 RECONCILE_IRQ_STATE(r10, r11) 978 ld r3,PACA_EXGEN+EX_DAR(r13) 979 lwz r4,PACA_EXGEN+EX_DSISR(r13) 980 std r3,_DAR(r1) 981 std r4,_DSISR(r1) 982 bl save_nvgprs 983 addi r3,r1,STACK_FRAME_OVERHEAD 984 bl machine_check_exception 985 b ret_from_except 986 987 .align 7 988 .globl alignment_common 989alignment_common: 990 mfspr r10,SPRN_DAR 991 std r10,PACA_EXGEN+EX_DAR(r13) 992 mfspr r10,SPRN_DSISR 993 stw r10,PACA_EXGEN+EX_DSISR(r13) 994 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN) 995 ld r3,PACA_EXGEN+EX_DAR(r13) 996 lwz r4,PACA_EXGEN+EX_DSISR(r13) 997 std r3,_DAR(r1) 998 std r4,_DSISR(r1) 999 bl save_nvgprs 1000 RECONCILE_IRQ_STATE(r10, r11) 1001 addi r3,r1,STACK_FRAME_OVERHEAD 1002 bl alignment_exception 1003 b ret_from_except 1004 1005 .align 7 1006 .globl program_check_common 1007program_check_common: 1008 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN) 1009 bl save_nvgprs 1010 RECONCILE_IRQ_STATE(r10, r11) 1011 addi r3,r1,STACK_FRAME_OVERHEAD 1012 bl program_check_exception 1013 b ret_from_except 1014 1015 .align 7 1016 .globl fp_unavailable_common 1017fp_unavailable_common: 1018 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN) 1019 bne 1f /* if from user, just load it up */ 1020 bl save_nvgprs 1021 RECONCILE_IRQ_STATE(r10, r11) 1022 addi r3,r1,STACK_FRAME_OVERHEAD 1023 bl kernel_fp_unavailable_exception 1024 BUG_OPCODE 10251: 1026#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1027BEGIN_FTR_SECTION 1028 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in 1029 * transaction), go do TM stuff 1030 */ 1031 rldicl. r0, r12, (64-MSR_TS_LG), (64-2) 1032 bne- 2f 1033END_FTR_SECTION_IFSET(CPU_FTR_TM) 1034#endif 1035 bl load_up_fpu 1036 b fast_exception_return 1037#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 10382: /* User process was in a transaction */ 1039 bl save_nvgprs 1040 RECONCILE_IRQ_STATE(r10, r11) 1041 addi r3,r1,STACK_FRAME_OVERHEAD 1042 bl fp_unavailable_tm 1043 b ret_from_except 1044#endif 1045 .align 7 1046 .globl altivec_unavailable_common 1047altivec_unavailable_common: 1048 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) 1049#ifdef CONFIG_ALTIVEC 1050BEGIN_FTR_SECTION 1051 beq 1f 1052#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1053 BEGIN_FTR_SECTION_NESTED(69) 1054 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in 1055 * transaction), go do TM stuff 1056 */ 1057 rldicl. r0, r12, (64-MSR_TS_LG), (64-2) 1058 bne- 2f 1059 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) 1060#endif 1061 bl load_up_altivec 1062 b fast_exception_return 1063#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 10642: /* User process was in a transaction */ 1065 bl save_nvgprs 1066 RECONCILE_IRQ_STATE(r10, r11) 1067 addi r3,r1,STACK_FRAME_OVERHEAD 1068 bl altivec_unavailable_tm 1069 b ret_from_except 1070#endif 10711: 1072END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 1073#endif 1074 bl save_nvgprs 1075 RECONCILE_IRQ_STATE(r10, r11) 1076 addi r3,r1,STACK_FRAME_OVERHEAD 1077 bl altivec_unavailable_exception 1078 b ret_from_except 1079 1080 .align 7 1081 .globl vsx_unavailable_common 1082vsx_unavailable_common: 1083 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN) 1084#ifdef CONFIG_VSX 1085BEGIN_FTR_SECTION 1086 beq 1f 1087#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1088 BEGIN_FTR_SECTION_NESTED(69) 1089 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in 1090 * transaction), go do TM stuff 1091 */ 1092 rldicl. r0, r12, (64-MSR_TS_LG), (64-2) 1093 bne- 2f 1094 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) 1095#endif 1096 b load_up_vsx 1097#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 10982: /* User process was in a transaction */ 1099 bl save_nvgprs 1100 RECONCILE_IRQ_STATE(r10, r11) 1101 addi r3,r1,STACK_FRAME_OVERHEAD 1102 bl vsx_unavailable_tm 1103 b ret_from_except 1104#endif 11051: 1106END_FTR_SECTION_IFSET(CPU_FTR_VSX) 1107#endif 1108 bl save_nvgprs 1109 RECONCILE_IRQ_STATE(r10, r11) 1110 addi r3,r1,STACK_FRAME_OVERHEAD 1111 bl vsx_unavailable_exception 1112 b ret_from_except 1113 1114 /* Equivalents to the above handlers for relocation-on interrupt vectors */ 1115 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist) 1116 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell) 1117 MASKABLE_RELON_EXCEPTION_HV_OOL(0xea0, h_virt_irq) 1118 1119 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) 1120 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) 1121 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) 1122 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) 1123 STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable) 1124 1125 /* 1126 * The __end_interrupts marker must be past the out-of-line (OOL) 1127 * handlers, so that they are copied to real address 0x100 when running 1128 * a relocatable kernel. This ensures they can be reached from the short 1129 * trampoline handlers (like 0x4f00, 0x4f20, etc.) which branch 1130 * directly, without using LOAD_HANDLER(). 1131 */ 1132 .align 7 1133 .globl __end_interrupts 1134__end_interrupts: 1135 1136#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) 1137/* 1138 * Data area reserved for FWNMI option. 1139 * This address (0x7000) is fixed by the RPA. 1140 */ 1141 .= 0x7000 1142 .globl fwnmi_data_area 1143fwnmi_data_area: 1144 1145 /* pseries and powernv need to keep the whole page from 1146 * 0x7000 to 0x8000 free for use by the firmware 1147 */ 1148 . = 0x8000 1149#endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */ 1150 1151 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception) 1152 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception) 1153 1154#ifdef CONFIG_CBE_RAS 1155 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception) 1156 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception) 1157 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception) 1158#endif /* CONFIG_CBE_RAS */ 1159 1160 .globl hmi_exception_early 1161hmi_exception_early: 1162 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, 0xe62) 1163 mr r10,r1 /* Save r1 */ 1164 ld r1,PACAEMERGSP(r13) /* Use emergency stack */ 1165 subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ 1166 std r9,_CCR(r1) /* save CR in stackframe */ 1167 mfspr r11,SPRN_HSRR0 /* Save HSRR0 */ 1168 std r11,_NIP(r1) /* save HSRR0 in stackframe */ 1169 mfspr r12,SPRN_HSRR1 /* Save SRR1 */ 1170 std r12,_MSR(r1) /* save SRR1 in stackframe */ 1171 std r10,0(r1) /* make stack chain pointer */ 1172 std r0,GPR0(r1) /* save r0 in stackframe */ 1173 std r10,GPR1(r1) /* save r1 in stackframe */ 1174 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN) 1175 EXCEPTION_PROLOG_COMMON_3(0xe60) 1176 addi r3,r1,STACK_FRAME_OVERHEAD 1177 bl hmi_exception_realmode 1178 /* Windup the stack. */ 1179 /* Move original HSRR0 and HSRR1 into the respective regs */ 1180 ld r9,_MSR(r1) 1181 mtspr SPRN_HSRR1,r9 1182 ld r3,_NIP(r1) 1183 mtspr SPRN_HSRR0,r3 1184 ld r9,_CTR(r1) 1185 mtctr r9 1186 ld r9,_XER(r1) 1187 mtxer r9 1188 ld r9,_LINK(r1) 1189 mtlr r9 1190 REST_GPR(0, r1) 1191 REST_8GPRS(2, r1) 1192 REST_GPR(10, r1) 1193 ld r11,_CCR(r1) 1194 mtcr r11 1195 REST_GPR(11, r1) 1196 REST_2GPRS(12, r1) 1197 /* restore original r1. */ 1198 ld r1,GPR1(r1) 1199 1200 /* 1201 * Go to virtual mode and pull the HMI event information from 1202 * firmware. 1203 */ 1204 .globl hmi_exception_after_realmode 1205hmi_exception_after_realmode: 1206 SET_SCRATCH0(r13) 1207 EXCEPTION_PROLOG_0(PACA_EXGEN) 1208 b hmi_exception_hv 1209 1210 1211#define MACHINE_CHECK_HANDLER_WINDUP \ 1212 /* Clear MSR_RI before setting SRR0 and SRR1. */\ 1213 li r0,MSR_RI; \ 1214 mfmsr r9; /* get MSR value */ \ 1215 andc r9,r9,r0; \ 1216 mtmsrd r9,1; /* Clear MSR_RI */ \ 1217 /* Move original SRR0 and SRR1 into the respective regs */ \ 1218 ld r9,_MSR(r1); \ 1219 mtspr SPRN_SRR1,r9; \ 1220 ld r3,_NIP(r1); \ 1221 mtspr SPRN_SRR0,r3; \ 1222 ld r9,_CTR(r1); \ 1223 mtctr r9; \ 1224 ld r9,_XER(r1); \ 1225 mtxer r9; \ 1226 ld r9,_LINK(r1); \ 1227 mtlr r9; \ 1228 REST_GPR(0, r1); \ 1229 REST_8GPRS(2, r1); \ 1230 REST_GPR(10, r1); \ 1231 ld r11,_CCR(r1); \ 1232 mtcr r11; \ 1233 /* Decrement paca->in_mce. */ \ 1234 lhz r12,PACA_IN_MCE(r13); \ 1235 subi r12,r12,1; \ 1236 sth r12,PACA_IN_MCE(r13); \ 1237 REST_GPR(11, r1); \ 1238 REST_2GPRS(12, r1); \ 1239 /* restore original r1. */ \ 1240 ld r1,GPR1(r1) 1241 1242 /* 1243 * Handle machine check early in real mode. We come here with 1244 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack. 1245 */ 1246 .align 7 1247 .globl machine_check_handle_early 1248machine_check_handle_early: 1249 std r0,GPR0(r1) /* Save r0 */ 1250 EXCEPTION_PROLOG_COMMON_3(0x200) 1251 bl save_nvgprs 1252 addi r3,r1,STACK_FRAME_OVERHEAD 1253 bl machine_check_early 1254 std r3,RESULT(r1) /* Save result */ 1255 ld r12,_MSR(r1) 1256#ifdef CONFIG_PPC_P7_NAP 1257 /* 1258 * Check if thread was in power saving mode. We come here when any 1259 * of the following is true: 1260 * a. thread wasn't in power saving mode 1261 * b. thread was in power saving mode with no state loss, 1262 * supervisor state loss or hypervisor state loss. 1263 * 1264 * Go back to nap/sleep/winkle mode again if (b) is true. 1265 */ 1266 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */ 1267 beq 4f /* No, it wasn;t */ 1268 /* Thread was in power saving mode. Go back to nap again. */ 1269 cmpwi r11,2 1270 blt 3f 1271 /* Supervisor/Hypervisor state loss */ 1272 li r0,1 1273 stb r0,PACA_NAPSTATELOST(r13) 12743: bl machine_check_queue_event 1275 MACHINE_CHECK_HANDLER_WINDUP 1276 GET_PACA(r13) 1277 ld r1,PACAR1(r13) 1278 /* 1279 * Check what idle state this CPU was in and go back to same mode 1280 * again. 1281 */ 1282 lbz r3,PACA_THREAD_IDLE_STATE(r13) 1283 cmpwi r3,PNV_THREAD_NAP 1284 bgt 10f 1285 IDLE_STATE_ENTER_SEQ(PPC_NAP) 1286 /* No return */ 128710: 1288 cmpwi r3,PNV_THREAD_SLEEP 1289 bgt 2f 1290 IDLE_STATE_ENTER_SEQ(PPC_SLEEP) 1291 /* No return */ 1292 12932: 1294 /* 1295 * Go back to winkle. Please note that this thread was woken up in 1296 * machine check from winkle and have not restored the per-subcore 1297 * state. Hence before going back to winkle, set last bit of HSPGR0 1298 * to 1. This will make sure that if this thread gets woken up 1299 * again at reset vector 0x100 then it will get chance to restore 1300 * the subcore state. 1301 */ 1302 ori r13,r13,1 1303 SET_PACA(r13) 1304 IDLE_STATE_ENTER_SEQ(PPC_WINKLE) 1305 /* No return */ 13064: 1307#endif 1308 /* 1309 * Check if we are coming from hypervisor userspace. If yes then we 1310 * continue in host kernel in V mode to deliver the MC event. 1311 */ 1312 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */ 1313 beq 5f 1314 andi. r11,r12,MSR_PR /* See if coming from user. */ 1315 bne 9f /* continue in V mode if we are. */ 1316 13175: 1318#ifdef CONFIG_KVM_BOOK3S_64_HANDLER 1319 /* 1320 * We are coming from kernel context. Check if we are coming from 1321 * guest. if yes, then we can continue. We will fall through 1322 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest. 1323 */ 1324 lbz r11,HSTATE_IN_GUEST(r13) 1325 cmpwi r11,0 /* Check if coming from guest */ 1326 bne 9f /* continue if we are. */ 1327#endif 1328 /* 1329 * At this point we are not sure about what context we come from. 1330 * Queue up the MCE event and return from the interrupt. 1331 * But before that, check if this is an un-recoverable exception. 1332 * If yes, then stay on emergency stack and panic. 1333 */ 1334 andi. r11,r12,MSR_RI 1335 bne 2f 13361: mfspr r11,SPRN_SRR0 1337 ld r10,PACAKBASE(r13) 1338 LOAD_HANDLER(r10,unrecover_mce) 1339 mtspr SPRN_SRR0,r10 1340 ld r10,PACAKMSR(r13) 1341 /* 1342 * We are going down. But there are chances that we might get hit by 1343 * another MCE during panic path and we may run into unstable state 1344 * with no way out. Hence, turn ME bit off while going down, so that 1345 * when another MCE is hit during panic path, system will checkstop 1346 * and hypervisor will get restarted cleanly by SP. 1347 */ 1348 li r3,MSR_ME 1349 andc r10,r10,r3 /* Turn off MSR_ME */ 1350 mtspr SPRN_SRR1,r10 1351 rfid 1352 b . 13532: 1354 /* 1355 * Check if we have successfully handled/recovered from error, if not 1356 * then stay on emergency stack and panic. 1357 */ 1358 ld r3,RESULT(r1) /* Load result */ 1359 cmpdi r3,0 /* see if we handled MCE successfully */ 1360 1361 beq 1b /* if !handled then panic */ 1362 /* 1363 * Return from MC interrupt. 1364 * Queue up the MCE event so that we can log it later, while 1365 * returning from kernel or opal call. 1366 */ 1367 bl machine_check_queue_event 1368 MACHINE_CHECK_HANDLER_WINDUP 1369 rfid 13709: 1371 /* Deliver the machine check to host kernel in V mode. */ 1372 MACHINE_CHECK_HANDLER_WINDUP 1373 b machine_check_pSeries 1374 1375unrecover_mce: 1376 /* Invoke machine_check_exception to print MCE event and panic. */ 1377 addi r3,r1,STACK_FRAME_OVERHEAD 1378 bl machine_check_exception 1379 /* 1380 * We will not reach here. Even if we did, there is no way out. Call 1381 * unrecoverable_exception and die. 1382 */ 13831: addi r3,r1,STACK_FRAME_OVERHEAD 1384 bl unrecoverable_exception 1385 b 1b 1386/* 1387 * r13 points to the PACA, r9 contains the saved CR, 1388 * r12 contain the saved SRR1, SRR0 is still ready for return 1389 * r3 has the faulting address 1390 * r9 - r13 are saved in paca->exslb. 1391 * r3 is saved in paca->slb_r3 1392 * We assume we aren't going to take any exceptions during this procedure. 1393 */ 1394slb_miss_realmode: 1395 mflr r10 1396#ifdef CONFIG_RELOCATABLE 1397 mtctr r11 1398#endif 1399 1400 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ 1401 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ 1402 1403#ifdef CONFIG_PPC_STD_MMU_64 1404BEGIN_MMU_FTR_SECTION 1405 bl slb_allocate_realmode 1406END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX) 1407#endif 1408 /* All done -- return from exception. */ 1409 1410 ld r10,PACA_EXSLB+EX_LR(r13) 1411 ld r3,PACA_EXSLB+EX_R3(r13) 1412 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ 1413 1414 mtlr r10 1415 andi. r10,r12,MSR_RI /* check for unrecoverable exception */ 1416BEGIN_MMU_FTR_SECTION 1417 beq- 2f 1418FTR_SECTION_ELSE 1419 b 2f 1420ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX) 1421 1422.machine push 1423.machine "power4" 1424 mtcrf 0x80,r9 1425 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ 1426.machine pop 1427 1428 RESTORE_PPR_PACA(PACA_EXSLB, r9) 1429 ld r9,PACA_EXSLB+EX_R9(r13) 1430 ld r10,PACA_EXSLB+EX_R10(r13) 1431 ld r11,PACA_EXSLB+EX_R11(r13) 1432 ld r12,PACA_EXSLB+EX_R12(r13) 1433 ld r13,PACA_EXSLB+EX_R13(r13) 1434 rfid 1435 b . /* prevent speculative execution */ 1436 14372: mfspr r11,SPRN_SRR0 1438 ld r10,PACAKBASE(r13) 1439 LOAD_HANDLER(r10,unrecov_slb) 1440 mtspr SPRN_SRR0,r10 1441 ld r10,PACAKMSR(r13) 1442 mtspr SPRN_SRR1,r10 1443 rfid 1444 b . 1445 1446unrecov_slb: 1447 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB) 1448 RECONCILE_IRQ_STATE(r10, r11) 1449 bl save_nvgprs 14501: addi r3,r1,STACK_FRAME_OVERHEAD 1451 bl unrecoverable_exception 1452 b 1b 1453 1454 1455#ifdef CONFIG_PPC_970_NAP 1456power4_fixup_nap: 1457 andc r9,r9,r10 1458 std r9,TI_LOCAL_FLAGS(r11) 1459 ld r10,_LINK(r1) /* make idle task do the */ 1460 std r10,_NIP(r1) /* equivalent of a blr */ 1461 blr 1462#endif 1463 1464/* 1465 * Hash table stuff 1466 */ 1467 .align 7 1468do_hash_page: 1469#ifdef CONFIG_PPC_STD_MMU_64 1470 andis. r0,r4,0xa410 /* weird error? */ 1471 bne- handle_page_fault /* if not, try to insert a HPTE */ 1472 andis. r0,r4,DSISR_DABRMATCH@h 1473 bne- handle_dabr_fault 1474 CURRENT_THREAD_INFO(r11, r1) 1475 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */ 1476 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */ 1477 bne 77f /* then don't call hash_page now */ 1478 1479 /* 1480 * r3 contains the faulting address 1481 * r4 msr 1482 * r5 contains the trap number 1483 * r6 contains dsisr 1484 * 1485 * at return r3 = 0 for success, 1 for page fault, negative for error 1486 */ 1487 mr r4,r12 1488 ld r6,_DSISR(r1) 1489 bl __hash_page /* build HPTE if possible */ 1490 cmpdi r3,0 /* see if __hash_page succeeded */ 1491 1492 /* Success */ 1493 beq fast_exc_return_irq /* Return from exception on success */ 1494 1495 /* Error */ 1496 blt- 13f 1497#endif /* CONFIG_PPC_STD_MMU_64 */ 1498 1499/* Here we have a page fault that hash_page can't handle. */ 1500handle_page_fault: 150111: ld r4,_DAR(r1) 1502 ld r5,_DSISR(r1) 1503 addi r3,r1,STACK_FRAME_OVERHEAD 1504 bl do_page_fault 1505 cmpdi r3,0 1506 beq+ 12f 1507 bl save_nvgprs 1508 mr r5,r3 1509 addi r3,r1,STACK_FRAME_OVERHEAD 1510 lwz r4,_DAR(r1) 1511 bl bad_page_fault 1512 b ret_from_except 1513 1514/* We have a data breakpoint exception - handle it */ 1515handle_dabr_fault: 1516 bl save_nvgprs 1517 ld r4,_DAR(r1) 1518 ld r5,_DSISR(r1) 1519 addi r3,r1,STACK_FRAME_OVERHEAD 1520 bl do_break 152112: b ret_from_except_lite 1522 1523 1524#ifdef CONFIG_PPC_STD_MMU_64 1525/* We have a page fault that hash_page could handle but HV refused 1526 * the PTE insertion 1527 */ 152813: bl save_nvgprs 1529 mr r5,r3 1530 addi r3,r1,STACK_FRAME_OVERHEAD 1531 ld r4,_DAR(r1) 1532 bl low_hash_fault 1533 b ret_from_except 1534#endif 1535 1536/* 1537 * We come here as a result of a DSI at a point where we don't want 1538 * to call hash_page, such as when we are accessing memory (possibly 1539 * user memory) inside a PMU interrupt that occurred while interrupts 1540 * were soft-disabled. We want to invoke the exception handler for 1541 * the access, or panic if there isn't a handler. 1542 */ 154377: bl save_nvgprs 1544 mr r4,r3 1545 addi r3,r1,STACK_FRAME_OVERHEAD 1546 li r5,SIGSEGV 1547 bl bad_page_fault 1548 b ret_from_except 1549 1550/* 1551 * Here we have detected that the kernel stack pointer is bad. 1552 * R9 contains the saved CR, r13 points to the paca, 1553 * r10 contains the (bad) kernel stack pointer, 1554 * r11 and r12 contain the saved SRR0 and SRR1. 1555 * We switch to using an emergency stack, save the registers there, 1556 * and call kernel_bad_stack(), which panics. 1557 */ 1558bad_stack: 1559 ld r1,PACAEMERGSP(r13) 1560 subi r1,r1,64+INT_FRAME_SIZE 1561 std r9,_CCR(r1) 1562 std r10,GPR1(r1) 1563 std r11,_NIP(r1) 1564 std r12,_MSR(r1) 1565 mfspr r11,SPRN_DAR 1566 mfspr r12,SPRN_DSISR 1567 std r11,_DAR(r1) 1568 std r12,_DSISR(r1) 1569 mflr r10 1570 mfctr r11 1571 mfxer r12 1572 std r10,_LINK(r1) 1573 std r11,_CTR(r1) 1574 std r12,_XER(r1) 1575 SAVE_GPR(0,r1) 1576 SAVE_GPR(2,r1) 1577 ld r10,EX_R3(r3) 1578 std r10,GPR3(r1) 1579 SAVE_GPR(4,r1) 1580 SAVE_4GPRS(5,r1) 1581 ld r9,EX_R9(r3) 1582 ld r10,EX_R10(r3) 1583 SAVE_2GPRS(9,r1) 1584 ld r9,EX_R11(r3) 1585 ld r10,EX_R12(r3) 1586 ld r11,EX_R13(r3) 1587 std r9,GPR11(r1) 1588 std r10,GPR12(r1) 1589 std r11,GPR13(r1) 1590BEGIN_FTR_SECTION 1591 ld r10,EX_CFAR(r3) 1592 std r10,ORIG_GPR3(r1) 1593END_FTR_SECTION_IFSET(CPU_FTR_CFAR) 1594 SAVE_8GPRS(14,r1) 1595 SAVE_10GPRS(22,r1) 1596 lhz r12,PACA_TRAP_SAVE(r13) 1597 std r12,_TRAP(r1) 1598 addi r11,r1,INT_FRAME_SIZE 1599 std r11,0(r1) 1600 li r12,0 1601 std r12,0(r11) 1602 ld r2,PACATOC(r13) 1603 ld r11,exception_marker@toc(r2) 1604 std r12,RESULT(r1) 1605 std r11,STACK_FRAME_OVERHEAD-16(r1) 16061: addi r3,r1,STACK_FRAME_OVERHEAD 1607 bl kernel_bad_stack 1608 b 1b 1609