xref: /openbmc/linux/arch/powerpc/kernel/eeh_driver.c (revision f2da4ccf)
1317f06deSGavin Shan /*
2317f06deSGavin Shan  * PCI Error Recovery Driver for RPA-compliant PPC64 platform.
3317f06deSGavin Shan  * Copyright IBM Corp. 2004 2005
4317f06deSGavin Shan  * Copyright Linas Vepstas <linas@linas.org> 2004, 2005
5317f06deSGavin Shan  *
6317f06deSGavin Shan  * All rights reserved.
7317f06deSGavin Shan  *
8317f06deSGavin Shan  * This program is free software; you can redistribute it and/or modify
9317f06deSGavin Shan  * it under the terms of the GNU General Public License as published by
10317f06deSGavin Shan  * the Free Software Foundation; either version 2 of the License, or (at
11317f06deSGavin Shan  * your option) any later version.
12317f06deSGavin Shan  *
13317f06deSGavin Shan  * This program is distributed in the hope that it will be useful, but
14317f06deSGavin Shan  * WITHOUT ANY WARRANTY; without even the implied warranty of
15317f06deSGavin Shan  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
16317f06deSGavin Shan  * NON INFRINGEMENT.  See the GNU General Public License for more
17317f06deSGavin Shan  * details.
18317f06deSGavin Shan  *
19317f06deSGavin Shan  * You should have received a copy of the GNU General Public License
20317f06deSGavin Shan  * along with this program; if not, write to the Free Software
21317f06deSGavin Shan  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22317f06deSGavin Shan  *
23317f06deSGavin Shan  * Send comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24317f06deSGavin Shan  */
25317f06deSGavin Shan #include <linux/delay.h>
26317f06deSGavin Shan #include <linux/interrupt.h>
27317f06deSGavin Shan #include <linux/irq.h>
28317f06deSGavin Shan #include <linux/module.h>
29317f06deSGavin Shan #include <linux/pci.h>
30317f06deSGavin Shan #include <asm/eeh.h>
31317f06deSGavin Shan #include <asm/eeh_event.h>
32317f06deSGavin Shan #include <asm/ppc-pci.h>
33317f06deSGavin Shan #include <asm/pci-bridge.h>
34317f06deSGavin Shan #include <asm/prom.h>
35317f06deSGavin Shan #include <asm/rtas.h>
36317f06deSGavin Shan 
37317f06deSGavin Shan /**
38317f06deSGavin Shan  * eeh_pcid_name - Retrieve name of PCI device driver
39317f06deSGavin Shan  * @pdev: PCI device
40317f06deSGavin Shan  *
41317f06deSGavin Shan  * This routine is used to retrieve the name of PCI device driver
42317f06deSGavin Shan  * if that's valid.
43317f06deSGavin Shan  */
44317f06deSGavin Shan static inline const char *eeh_pcid_name(struct pci_dev *pdev)
45317f06deSGavin Shan {
46317f06deSGavin Shan 	if (pdev && pdev->dev.driver)
47317f06deSGavin Shan 		return pdev->dev.driver->name;
48317f06deSGavin Shan 	return "";
49317f06deSGavin Shan }
50317f06deSGavin Shan 
51317f06deSGavin Shan /**
52317f06deSGavin Shan  * eeh_pcid_get - Get the PCI device driver
53317f06deSGavin Shan  * @pdev: PCI device
54317f06deSGavin Shan  *
55317f06deSGavin Shan  * The function is used to retrieve the PCI device driver for
56317f06deSGavin Shan  * the indicated PCI device. Besides, we will increase the reference
57317f06deSGavin Shan  * of the PCI device driver to prevent that being unloaded on
58317f06deSGavin Shan  * the fly. Otherwise, kernel crash would be seen.
59317f06deSGavin Shan  */
60317f06deSGavin Shan static inline struct pci_driver *eeh_pcid_get(struct pci_dev *pdev)
61317f06deSGavin Shan {
62317f06deSGavin Shan 	if (!pdev || !pdev->driver)
63317f06deSGavin Shan 		return NULL;
64317f06deSGavin Shan 
65317f06deSGavin Shan 	if (!try_module_get(pdev->driver->driver.owner))
66317f06deSGavin Shan 		return NULL;
67317f06deSGavin Shan 
68317f06deSGavin Shan 	return pdev->driver;
69317f06deSGavin Shan }
70317f06deSGavin Shan 
71317f06deSGavin Shan /**
72317f06deSGavin Shan  * eeh_pcid_put - Dereference on the PCI device driver
73317f06deSGavin Shan  * @pdev: PCI device
74317f06deSGavin Shan  *
75317f06deSGavin Shan  * The function is called to do dereference on the PCI device
76317f06deSGavin Shan  * driver of the indicated PCI device.
77317f06deSGavin Shan  */
78317f06deSGavin Shan static inline void eeh_pcid_put(struct pci_dev *pdev)
79317f06deSGavin Shan {
80317f06deSGavin Shan 	if (!pdev || !pdev->driver)
81317f06deSGavin Shan 		return;
82317f06deSGavin Shan 
83317f06deSGavin Shan 	module_put(pdev->driver->driver.owner);
84317f06deSGavin Shan }
85317f06deSGavin Shan 
86317f06deSGavin Shan /**
87317f06deSGavin Shan  * eeh_disable_irq - Disable interrupt for the recovering device
88317f06deSGavin Shan  * @dev: PCI device
89317f06deSGavin Shan  *
90317f06deSGavin Shan  * This routine must be called when reporting temporary or permanent
91317f06deSGavin Shan  * error to the particular PCI device to disable interrupt of that
92317f06deSGavin Shan  * device. If the device has enabled MSI or MSI-X interrupt, we needn't
93317f06deSGavin Shan  * do real work because EEH should freeze DMA transfers for those PCI
94317f06deSGavin Shan  * devices encountering EEH errors, which includes MSI or MSI-X.
95317f06deSGavin Shan  */
96317f06deSGavin Shan static void eeh_disable_irq(struct pci_dev *dev)
97317f06deSGavin Shan {
98317f06deSGavin Shan 	struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
99317f06deSGavin Shan 
100317f06deSGavin Shan 	/* Don't disable MSI and MSI-X interrupts. They are
101317f06deSGavin Shan 	 * effectively disabled by the DMA Stopped state
102317f06deSGavin Shan 	 * when an EEH error occurs.
103317f06deSGavin Shan 	 */
104317f06deSGavin Shan 	if (dev->msi_enabled || dev->msix_enabled)
105317f06deSGavin Shan 		return;
106317f06deSGavin Shan 
107317f06deSGavin Shan 	if (!irq_has_action(dev->irq))
108317f06deSGavin Shan 		return;
109317f06deSGavin Shan 
110317f06deSGavin Shan 	edev->mode |= EEH_DEV_IRQ_DISABLED;
111317f06deSGavin Shan 	disable_irq_nosync(dev->irq);
112317f06deSGavin Shan }
113317f06deSGavin Shan 
114317f06deSGavin Shan /**
115317f06deSGavin Shan  * eeh_enable_irq - Enable interrupt for the recovering device
116317f06deSGavin Shan  * @dev: PCI device
117317f06deSGavin Shan  *
118317f06deSGavin Shan  * This routine must be called to enable interrupt while failed
119317f06deSGavin Shan  * device could be resumed.
120317f06deSGavin Shan  */
121317f06deSGavin Shan static void eeh_enable_irq(struct pci_dev *dev)
122317f06deSGavin Shan {
123317f06deSGavin Shan 	struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
124317f06deSGavin Shan 
125317f06deSGavin Shan 	if ((edev->mode) & EEH_DEV_IRQ_DISABLED) {
126317f06deSGavin Shan 		edev->mode &= ~EEH_DEV_IRQ_DISABLED;
127b8a9a11bSThomas Gleixner 		/*
128b8a9a11bSThomas Gleixner 		 * FIXME !!!!!
129b8a9a11bSThomas Gleixner 		 *
130b8a9a11bSThomas Gleixner 		 * This is just ass backwards. This maze has
131b8a9a11bSThomas Gleixner 		 * unbalanced irq_enable/disable calls. So instead of
132b8a9a11bSThomas Gleixner 		 * finding the root cause it works around the warning
133b8a9a11bSThomas Gleixner 		 * in the irq_enable code by conditionally calling
134b8a9a11bSThomas Gleixner 		 * into it.
135b8a9a11bSThomas Gleixner 		 *
136b8a9a11bSThomas Gleixner 		 * That's just wrong.The warning in the core code is
137b8a9a11bSThomas Gleixner 		 * there to tell people to fix their assymetries in
138b8a9a11bSThomas Gleixner 		 * their own code, not by abusing the core information
139b8a9a11bSThomas Gleixner 		 * to avoid it.
140b8a9a11bSThomas Gleixner 		 *
141b8a9a11bSThomas Gleixner 		 * I so wish that the assymetry would be the other way
142b8a9a11bSThomas Gleixner 		 * round and a few more irq_disable calls render that
143b8a9a11bSThomas Gleixner 		 * shit unusable forever.
144b8a9a11bSThomas Gleixner 		 *
145b8a9a11bSThomas Gleixner 		 *	tglx
146b8a9a11bSThomas Gleixner 		 */
14757310c3cSThomas Gleixner 		if (irqd_irq_disabled(irq_get_irq_data(dev->irq)))
148317f06deSGavin Shan 			enable_irq(dev->irq);
149317f06deSGavin Shan 	}
15057310c3cSThomas Gleixner }
151317f06deSGavin Shan 
152d2b0f6f7SGavin Shan static bool eeh_dev_removed(struct eeh_dev *edev)
153d2b0f6f7SGavin Shan {
154d2b0f6f7SGavin Shan 	/* EEH device removed ? */
155d2b0f6f7SGavin Shan 	if (!edev || (edev->mode & EEH_DEV_REMOVED))
156d2b0f6f7SGavin Shan 		return true;
157d2b0f6f7SGavin Shan 
158d2b0f6f7SGavin Shan 	return false;
159d2b0f6f7SGavin Shan }
160d2b0f6f7SGavin Shan 
1615cfb20b9SGavin Shan static void *eeh_dev_save_state(void *data, void *userdata)
1625cfb20b9SGavin Shan {
1635cfb20b9SGavin Shan 	struct eeh_dev *edev = data;
1645cfb20b9SGavin Shan 	struct pci_dev *pdev;
1655cfb20b9SGavin Shan 
1665cfb20b9SGavin Shan 	if (!edev)
1675cfb20b9SGavin Shan 		return NULL;
1685cfb20b9SGavin Shan 
1695cfb20b9SGavin Shan 	pdev = eeh_dev_to_pci_dev(edev);
1705cfb20b9SGavin Shan 	if (!pdev)
1715cfb20b9SGavin Shan 		return NULL;
1725cfb20b9SGavin Shan 
1735cfb20b9SGavin Shan 	pci_save_state(pdev);
1745cfb20b9SGavin Shan 	return NULL;
1755cfb20b9SGavin Shan }
1765cfb20b9SGavin Shan 
177317f06deSGavin Shan /**
178317f06deSGavin Shan  * eeh_report_error - Report pci error to each device driver
179317f06deSGavin Shan  * @data: eeh device
180317f06deSGavin Shan  * @userdata: return value
181317f06deSGavin Shan  *
182317f06deSGavin Shan  * Report an EEH error to each device driver, collect up and
183317f06deSGavin Shan  * merge the device driver responses. Cumulative response
184317f06deSGavin Shan  * passed back in "userdata".
185317f06deSGavin Shan  */
186317f06deSGavin Shan static void *eeh_report_error(void *data, void *userdata)
187317f06deSGavin Shan {
188317f06deSGavin Shan 	struct eeh_dev *edev = (struct eeh_dev *)data;
189317f06deSGavin Shan 	struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
190317f06deSGavin Shan 	enum pci_ers_result rc, *res = userdata;
191317f06deSGavin Shan 	struct pci_driver *driver;
192317f06deSGavin Shan 
193d2b0f6f7SGavin Shan 	if (!dev || eeh_dev_removed(edev))
194d2b0f6f7SGavin Shan 		return NULL;
195317f06deSGavin Shan 	dev->error_state = pci_channel_io_frozen;
196317f06deSGavin Shan 
197317f06deSGavin Shan 	driver = eeh_pcid_get(dev);
198317f06deSGavin Shan 	if (!driver) return NULL;
199317f06deSGavin Shan 
200317f06deSGavin Shan 	eeh_disable_irq(dev);
201317f06deSGavin Shan 
202317f06deSGavin Shan 	if (!driver->err_handler ||
203317f06deSGavin Shan 	    !driver->err_handler->error_detected) {
204317f06deSGavin Shan 		eeh_pcid_put(dev);
205317f06deSGavin Shan 		return NULL;
206317f06deSGavin Shan 	}
207317f06deSGavin Shan 
208317f06deSGavin Shan 	rc = driver->err_handler->error_detected(dev, pci_channel_io_frozen);
209317f06deSGavin Shan 
210317f06deSGavin Shan 	/* A driver that needs a reset trumps all others */
211317f06deSGavin Shan 	if (rc == PCI_ERS_RESULT_NEED_RESET) *res = rc;
212317f06deSGavin Shan 	if (*res == PCI_ERS_RESULT_NONE) *res = rc;
213317f06deSGavin Shan 
214317f06deSGavin Shan 	eeh_pcid_put(dev);
215317f06deSGavin Shan 	return NULL;
216317f06deSGavin Shan }
217317f06deSGavin Shan 
218317f06deSGavin Shan /**
219317f06deSGavin Shan  * eeh_report_mmio_enabled - Tell drivers that MMIO has been enabled
220317f06deSGavin Shan  * @data: eeh device
221317f06deSGavin Shan  * @userdata: return value
222317f06deSGavin Shan  *
223317f06deSGavin Shan  * Tells each device driver that IO ports, MMIO and config space I/O
224317f06deSGavin Shan  * are now enabled. Collects up and merges the device driver responses.
225317f06deSGavin Shan  * Cumulative response passed back in "userdata".
226317f06deSGavin Shan  */
227317f06deSGavin Shan static void *eeh_report_mmio_enabled(void *data, void *userdata)
228317f06deSGavin Shan {
229317f06deSGavin Shan 	struct eeh_dev *edev = (struct eeh_dev *)data;
230317f06deSGavin Shan 	struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
231317f06deSGavin Shan 	enum pci_ers_result rc, *res = userdata;
232317f06deSGavin Shan 	struct pci_driver *driver;
233317f06deSGavin Shan 
234d2b0f6f7SGavin Shan 	if (!dev || eeh_dev_removed(edev))
235d2b0f6f7SGavin Shan 		return NULL;
236d2b0f6f7SGavin Shan 
237317f06deSGavin Shan 	driver = eeh_pcid_get(dev);
238317f06deSGavin Shan 	if (!driver) return NULL;
239317f06deSGavin Shan 
240317f06deSGavin Shan 	if (!driver->err_handler ||
241f26c7a03SGavin Shan 	    !driver->err_handler->mmio_enabled ||
242f26c7a03SGavin Shan 	    (edev->mode & EEH_DEV_NO_HANDLER)) {
243317f06deSGavin Shan 		eeh_pcid_put(dev);
244317f06deSGavin Shan 		return NULL;
245317f06deSGavin Shan 	}
246317f06deSGavin Shan 
247317f06deSGavin Shan 	rc = driver->err_handler->mmio_enabled(dev);
248317f06deSGavin Shan 
249317f06deSGavin Shan 	/* A driver that needs a reset trumps all others */
250317f06deSGavin Shan 	if (rc == PCI_ERS_RESULT_NEED_RESET) *res = rc;
251317f06deSGavin Shan 	if (*res == PCI_ERS_RESULT_NONE) *res = rc;
252317f06deSGavin Shan 
253317f06deSGavin Shan 	eeh_pcid_put(dev);
254317f06deSGavin Shan 	return NULL;
255317f06deSGavin Shan }
256317f06deSGavin Shan 
257317f06deSGavin Shan /**
258317f06deSGavin Shan  * eeh_report_reset - Tell device that slot has been reset
259317f06deSGavin Shan  * @data: eeh device
260317f06deSGavin Shan  * @userdata: return value
261317f06deSGavin Shan  *
262317f06deSGavin Shan  * This routine must be called while EEH tries to reset particular
263317f06deSGavin Shan  * PCI device so that the associated PCI device driver could take
264317f06deSGavin Shan  * some actions, usually to save data the driver needs so that the
265317f06deSGavin Shan  * driver can work again while the device is recovered.
266317f06deSGavin Shan  */
267317f06deSGavin Shan static void *eeh_report_reset(void *data, void *userdata)
268317f06deSGavin Shan {
269317f06deSGavin Shan 	struct eeh_dev *edev = (struct eeh_dev *)data;
270317f06deSGavin Shan 	struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
271317f06deSGavin Shan 	enum pci_ers_result rc, *res = userdata;
272317f06deSGavin Shan 	struct pci_driver *driver;
273317f06deSGavin Shan 
274d2b0f6f7SGavin Shan 	if (!dev || eeh_dev_removed(edev))
275d2b0f6f7SGavin Shan 		return NULL;
276317f06deSGavin Shan 	dev->error_state = pci_channel_io_normal;
277317f06deSGavin Shan 
278317f06deSGavin Shan 	driver = eeh_pcid_get(dev);
279317f06deSGavin Shan 	if (!driver) return NULL;
280317f06deSGavin Shan 
281317f06deSGavin Shan 	eeh_enable_irq(dev);
282317f06deSGavin Shan 
283317f06deSGavin Shan 	if (!driver->err_handler ||
284f26c7a03SGavin Shan 	    !driver->err_handler->slot_reset ||
285f26c7a03SGavin Shan 	    (edev->mode & EEH_DEV_NO_HANDLER)) {
286317f06deSGavin Shan 		eeh_pcid_put(dev);
287317f06deSGavin Shan 		return NULL;
288317f06deSGavin Shan 	}
289317f06deSGavin Shan 
290317f06deSGavin Shan 	rc = driver->err_handler->slot_reset(dev);
291317f06deSGavin Shan 	if ((*res == PCI_ERS_RESULT_NONE) ||
292317f06deSGavin Shan 	    (*res == PCI_ERS_RESULT_RECOVERED)) *res = rc;
293317f06deSGavin Shan 	if (*res == PCI_ERS_RESULT_DISCONNECT &&
294317f06deSGavin Shan 	     rc == PCI_ERS_RESULT_NEED_RESET) *res = rc;
295317f06deSGavin Shan 
296317f06deSGavin Shan 	eeh_pcid_put(dev);
297317f06deSGavin Shan 	return NULL;
298317f06deSGavin Shan }
299317f06deSGavin Shan 
3005cfb20b9SGavin Shan static void *eeh_dev_restore_state(void *data, void *userdata)
3015cfb20b9SGavin Shan {
3025cfb20b9SGavin Shan 	struct eeh_dev *edev = data;
3035cfb20b9SGavin Shan 	struct pci_dev *pdev;
3045cfb20b9SGavin Shan 
3055cfb20b9SGavin Shan 	if (!edev)
3065cfb20b9SGavin Shan 		return NULL;
3075cfb20b9SGavin Shan 
3085cfb20b9SGavin Shan 	pdev = eeh_dev_to_pci_dev(edev);
3095cfb20b9SGavin Shan 	if (!pdev)
3105cfb20b9SGavin Shan 		return NULL;
3115cfb20b9SGavin Shan 
3125cfb20b9SGavin Shan 	pci_restore_state(pdev);
3135cfb20b9SGavin Shan 	return NULL;
3145cfb20b9SGavin Shan }
3155cfb20b9SGavin Shan 
316317f06deSGavin Shan /**
317317f06deSGavin Shan  * eeh_report_resume - Tell device to resume normal operations
318317f06deSGavin Shan  * @data: eeh device
319317f06deSGavin Shan  * @userdata: return value
320317f06deSGavin Shan  *
321317f06deSGavin Shan  * This routine must be called to notify the device driver that it
322317f06deSGavin Shan  * could resume so that the device driver can do some initialization
323317f06deSGavin Shan  * to make the recovered device work again.
324317f06deSGavin Shan  */
325317f06deSGavin Shan static void *eeh_report_resume(void *data, void *userdata)
326317f06deSGavin Shan {
327317f06deSGavin Shan 	struct eeh_dev *edev = (struct eeh_dev *)data;
328317f06deSGavin Shan 	struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
329317f06deSGavin Shan 	struct pci_driver *driver;
330317f06deSGavin Shan 
331d2b0f6f7SGavin Shan 	if (!dev || eeh_dev_removed(edev))
332d2b0f6f7SGavin Shan 		return NULL;
333317f06deSGavin Shan 	dev->error_state = pci_channel_io_normal;
334317f06deSGavin Shan 
335317f06deSGavin Shan 	driver = eeh_pcid_get(dev);
336317f06deSGavin Shan 	if (!driver) return NULL;
337317f06deSGavin Shan 
338317f06deSGavin Shan 	eeh_enable_irq(dev);
339317f06deSGavin Shan 
340317f06deSGavin Shan 	if (!driver->err_handler ||
341f26c7a03SGavin Shan 	    !driver->err_handler->resume ||
342f26c7a03SGavin Shan 	    (edev->mode & EEH_DEV_NO_HANDLER)) {
343f26c7a03SGavin Shan 		edev->mode &= ~EEH_DEV_NO_HANDLER;
344317f06deSGavin Shan 		eeh_pcid_put(dev);
345317f06deSGavin Shan 		return NULL;
346317f06deSGavin Shan 	}
347317f06deSGavin Shan 
348317f06deSGavin Shan 	driver->err_handler->resume(dev);
349317f06deSGavin Shan 
350317f06deSGavin Shan 	eeh_pcid_put(dev);
351317f06deSGavin Shan 	return NULL;
352317f06deSGavin Shan }
353317f06deSGavin Shan 
354317f06deSGavin Shan /**
355317f06deSGavin Shan  * eeh_report_failure - Tell device driver that device is dead.
356317f06deSGavin Shan  * @data: eeh device
357317f06deSGavin Shan  * @userdata: return value
358317f06deSGavin Shan  *
359317f06deSGavin Shan  * This informs the device driver that the device is permanently
360317f06deSGavin Shan  * dead, and that no further recovery attempts will be made on it.
361317f06deSGavin Shan  */
362317f06deSGavin Shan static void *eeh_report_failure(void *data, void *userdata)
363317f06deSGavin Shan {
364317f06deSGavin Shan 	struct eeh_dev *edev = (struct eeh_dev *)data;
365317f06deSGavin Shan 	struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
366317f06deSGavin Shan 	struct pci_driver *driver;
367317f06deSGavin Shan 
368d2b0f6f7SGavin Shan 	if (!dev || eeh_dev_removed(edev))
369d2b0f6f7SGavin Shan 		return NULL;
370317f06deSGavin Shan 	dev->error_state = pci_channel_io_perm_failure;
371317f06deSGavin Shan 
372317f06deSGavin Shan 	driver = eeh_pcid_get(dev);
373317f06deSGavin Shan 	if (!driver) return NULL;
374317f06deSGavin Shan 
375317f06deSGavin Shan 	eeh_disable_irq(dev);
376317f06deSGavin Shan 
377317f06deSGavin Shan 	if (!driver->err_handler ||
378317f06deSGavin Shan 	    !driver->err_handler->error_detected) {
379317f06deSGavin Shan 		eeh_pcid_put(dev);
380317f06deSGavin Shan 		return NULL;
381317f06deSGavin Shan 	}
382317f06deSGavin Shan 
383317f06deSGavin Shan 	driver->err_handler->error_detected(dev, pci_channel_io_perm_failure);
384317f06deSGavin Shan 
385317f06deSGavin Shan 	eeh_pcid_put(dev);
386317f06deSGavin Shan 	return NULL;
387317f06deSGavin Shan }
388317f06deSGavin Shan 
389f5c57710SGavin Shan static void *eeh_rmv_device(void *data, void *userdata)
390f5c57710SGavin Shan {
391f5c57710SGavin Shan 	struct pci_driver *driver;
392f5c57710SGavin Shan 	struct eeh_dev *edev = (struct eeh_dev *)data;
393f5c57710SGavin Shan 	struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
394f5c57710SGavin Shan 	int *removed = (int *)userdata;
395f5c57710SGavin Shan 
396f5c57710SGavin Shan 	/*
397f5c57710SGavin Shan 	 * Actually, we should remove the PCI bridges as well.
398f5c57710SGavin Shan 	 * However, that's lots of complexity to do that,
399f5c57710SGavin Shan 	 * particularly some of devices under the bridge might
400f5c57710SGavin Shan 	 * support EEH. So we just care about PCI devices for
401f5c57710SGavin Shan 	 * simplicity here.
402f5c57710SGavin Shan 	 */
403f5c57710SGavin Shan 	if (!dev || (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE))
404f5c57710SGavin Shan 		return NULL;
4058cc6b6cdSThadeu Lima de Souza Cascardo 
406d2b0f6f7SGavin Shan 	/*
407d2b0f6f7SGavin Shan 	 * We rely on count-based pcibios_release_device() to
408d2b0f6f7SGavin Shan 	 * detach permanently offlined PEs. Unfortunately, that's
409d2b0f6f7SGavin Shan 	 * not reliable enough. We might have the permanently
410d2b0f6f7SGavin Shan 	 * offlined PEs attached, but we needn't take care of
411d2b0f6f7SGavin Shan 	 * them and their child devices.
412d2b0f6f7SGavin Shan 	 */
413d2b0f6f7SGavin Shan 	if (eeh_dev_removed(edev))
414d2b0f6f7SGavin Shan 		return NULL;
415d2b0f6f7SGavin Shan 
416f5c57710SGavin Shan 	driver = eeh_pcid_get(dev);
4178cc6b6cdSThadeu Lima de Souza Cascardo 	if (driver) {
4188cc6b6cdSThadeu Lima de Souza Cascardo 		eeh_pcid_put(dev);
419f2da4ccfSGavin Shan 		if (driver->err_handler &&
420f2da4ccfSGavin Shan 		    driver->err_handler->error_detected &&
421f2da4ccfSGavin Shan 		    driver->err_handler->slot_reset &&
422f2da4ccfSGavin Shan 		    driver->err_handler->resume)
423f5c57710SGavin Shan 			return NULL;
4248cc6b6cdSThadeu Lima de Souza Cascardo 	}
425f5c57710SGavin Shan 
426f5c57710SGavin Shan 	/* Remove it from PCI subsystem */
427f5c57710SGavin Shan 	pr_debug("EEH: Removing %s without EEH sensitive driver\n",
428f5c57710SGavin Shan 		 pci_name(dev));
429f5c57710SGavin Shan 	edev->bus = dev->bus;
430f5c57710SGavin Shan 	edev->mode |= EEH_DEV_DISCONNECTED;
431f5c57710SGavin Shan 	(*removed)++;
432f5c57710SGavin Shan 
4331c2042c8SRafael J. Wysocki 	pci_lock_rescan_remove();
434f5c57710SGavin Shan 	pci_stop_and_remove_bus_device(dev);
4351c2042c8SRafael J. Wysocki 	pci_unlock_rescan_remove();
436f5c57710SGavin Shan 
437f5c57710SGavin Shan 	return NULL;
438f5c57710SGavin Shan }
439f5c57710SGavin Shan 
440f5c57710SGavin Shan static void *eeh_pe_detach_dev(void *data, void *userdata)
441f5c57710SGavin Shan {
442f5c57710SGavin Shan 	struct eeh_pe *pe = (struct eeh_pe *)data;
443f5c57710SGavin Shan 	struct eeh_dev *edev, *tmp;
444f5c57710SGavin Shan 
445f5c57710SGavin Shan 	eeh_pe_for_each_dev(pe, edev, tmp) {
446f5c57710SGavin Shan 		if (!(edev->mode & EEH_DEV_DISCONNECTED))
447f5c57710SGavin Shan 			continue;
448f5c57710SGavin Shan 
449f5c57710SGavin Shan 		edev->mode &= ~(EEH_DEV_DISCONNECTED | EEH_DEV_IRQ_DISABLED);
450f5c57710SGavin Shan 		eeh_rmv_from_parent_pe(edev);
451f5c57710SGavin Shan 	}
452f5c57710SGavin Shan 
453f5c57710SGavin Shan 	return NULL;
454f5c57710SGavin Shan }
455f5c57710SGavin Shan 
45678954700SGavin Shan /*
45778954700SGavin Shan  * Explicitly clear PE's frozen state for PowerNV where
45878954700SGavin Shan  * we have frozen PE until BAR restore is completed. It's
45978954700SGavin Shan  * harmless to clear it for pSeries. To be consistent with
46078954700SGavin Shan  * PE reset (for 3 times), we try to clear the frozen state
46178954700SGavin Shan  * for 3 times as well.
46278954700SGavin Shan  */
4632c665992SGavin Shan static void *__eeh_clear_pe_frozen_state(void *data, void *flag)
46478954700SGavin Shan {
4652c665992SGavin Shan 	struct eeh_pe *pe = (struct eeh_pe *)data;
4665cfb20b9SGavin Shan 	bool *clear_sw_state = flag;
467c9dd0143SGavin Shan 	int i, rc = 1;
46878954700SGavin Shan 
469c9dd0143SGavin Shan 	for (i = 0; rc && i < 3; i++)
4705cfb20b9SGavin Shan 		rc = eeh_unfreeze_pe(pe, clear_sw_state);
47178954700SGavin Shan 
472c9dd0143SGavin Shan 	/* Stop immediately on any errors */
4732c665992SGavin Shan 	if (rc) {
474c9dd0143SGavin Shan 		pr_warn("%s: Failure %d unfreezing PHB#%x-PE#%x\n",
475c9dd0143SGavin Shan 			__func__, rc, pe->phb->global_number, pe->addr);
4762c665992SGavin Shan 		return (void *)pe;
4772c665992SGavin Shan 	}
4782c665992SGavin Shan 
4792c665992SGavin Shan 	return NULL;
4802c665992SGavin Shan }
4812c665992SGavin Shan 
4825cfb20b9SGavin Shan static int eeh_clear_pe_frozen_state(struct eeh_pe *pe,
4835cfb20b9SGavin Shan 				     bool clear_sw_state)
4842c665992SGavin Shan {
4852c665992SGavin Shan 	void *rc;
4862c665992SGavin Shan 
4875cfb20b9SGavin Shan 	rc = eeh_pe_traverse(pe, __eeh_clear_pe_frozen_state, &clear_sw_state);
4882c665992SGavin Shan 	if (!rc)
48978954700SGavin Shan 		eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
49078954700SGavin Shan 
4912c665992SGavin Shan 	return rc ? -EIO : 0;
49278954700SGavin Shan }
49378954700SGavin Shan 
4945cfb20b9SGavin Shan int eeh_pe_reset_and_recover(struct eeh_pe *pe)
4955cfb20b9SGavin Shan {
4965cfb20b9SGavin Shan 	int result, ret;
4975cfb20b9SGavin Shan 
4985cfb20b9SGavin Shan 	/* Bail if the PE is being recovered */
4995cfb20b9SGavin Shan 	if (pe->state & EEH_PE_RECOVERING)
5005cfb20b9SGavin Shan 		return 0;
5015cfb20b9SGavin Shan 
5025cfb20b9SGavin Shan 	/* Put the PE into recovery mode */
5035cfb20b9SGavin Shan 	eeh_pe_state_mark(pe, EEH_PE_RECOVERING);
5045cfb20b9SGavin Shan 
5055cfb20b9SGavin Shan 	/* Save states */
5065cfb20b9SGavin Shan 	eeh_pe_dev_traverse(pe, eeh_dev_save_state, NULL);
5075cfb20b9SGavin Shan 
5085cfb20b9SGavin Shan 	/* Report error */
5095cfb20b9SGavin Shan 	eeh_pe_dev_traverse(pe, eeh_report_error, &result);
5105cfb20b9SGavin Shan 
5115cfb20b9SGavin Shan 	/* Issue reset */
5125cfb20b9SGavin Shan 	ret = eeh_reset_pe(pe);
5135cfb20b9SGavin Shan 	if (ret) {
51428bf36f9SGavin Shan 		eeh_pe_state_clear(pe, EEH_PE_RECOVERING);
5155cfb20b9SGavin Shan 		return ret;
5165cfb20b9SGavin Shan 	}
5175cfb20b9SGavin Shan 
5185cfb20b9SGavin Shan 	/* Unfreeze the PE */
5195cfb20b9SGavin Shan 	ret = eeh_clear_pe_frozen_state(pe, true);
5205cfb20b9SGavin Shan 	if (ret) {
5215cfb20b9SGavin Shan 		eeh_pe_state_clear(pe, EEH_PE_RECOVERING);
5225cfb20b9SGavin Shan 		return ret;
5235cfb20b9SGavin Shan 	}
5245cfb20b9SGavin Shan 
5255cfb20b9SGavin Shan 	/* Notify completion of reset */
5265cfb20b9SGavin Shan 	eeh_pe_dev_traverse(pe, eeh_report_reset, &result);
5275cfb20b9SGavin Shan 
5285cfb20b9SGavin Shan 	/* Restore device state */
5295cfb20b9SGavin Shan 	eeh_pe_dev_traverse(pe, eeh_dev_restore_state, NULL);
5305cfb20b9SGavin Shan 
5315cfb20b9SGavin Shan 	/* Resume */
5325cfb20b9SGavin Shan 	eeh_pe_dev_traverse(pe, eeh_report_resume, NULL);
5335cfb20b9SGavin Shan 
5345cfb20b9SGavin Shan 	/* Clear recovery mode */
5355cfb20b9SGavin Shan 	eeh_pe_state_clear(pe, EEH_PE_RECOVERING);
5365cfb20b9SGavin Shan 
5375cfb20b9SGavin Shan 	return 0;
5385cfb20b9SGavin Shan }
5395cfb20b9SGavin Shan 
540317f06deSGavin Shan /**
541317f06deSGavin Shan  * eeh_reset_device - Perform actual reset of a pci slot
542317f06deSGavin Shan  * @pe: EEH PE
543317f06deSGavin Shan  * @bus: PCI bus corresponding to the isolcated slot
544317f06deSGavin Shan  *
545317f06deSGavin Shan  * This routine must be called to do reset on the indicated PE.
546317f06deSGavin Shan  * During the reset, udev might be invoked because those affected
547317f06deSGavin Shan  * PCI devices will be removed and then added.
548317f06deSGavin Shan  */
549317f06deSGavin Shan static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
550317f06deSGavin Shan {
551f5c57710SGavin Shan 	struct pci_bus *frozen_bus = eeh_pe_bus_get(pe);
5525a71978eSGavin Shan 	struct timeval tstamp;
553f5c57710SGavin Shan 	int cnt, rc, removed = 0;
554317f06deSGavin Shan 
555317f06deSGavin Shan 	/* pcibios will clear the counter; save the value */
556317f06deSGavin Shan 	cnt = pe->freeze_count;
5575a71978eSGavin Shan 	tstamp = pe->tstamp;
558317f06deSGavin Shan 
559317f06deSGavin Shan 	/*
560317f06deSGavin Shan 	 * We don't remove the corresponding PE instances because
561317f06deSGavin Shan 	 * we need the information afterwords. The attached EEH
562317f06deSGavin Shan 	 * devices are expected to be attached soon when calling
563317f06deSGavin Shan 	 * into pcibios_add_pci_devices().
564317f06deSGavin Shan 	 */
565807a827dSGavin Shan 	eeh_pe_state_mark(pe, EEH_PE_KEEP);
5661c2042c8SRafael J. Wysocki 	if (bus) {
5671c2042c8SRafael J. Wysocki 		pci_lock_rescan_remove();
568807a827dSGavin Shan 		pcibios_remove_pci_devices(bus);
5691c2042c8SRafael J. Wysocki 		pci_unlock_rescan_remove();
5701c2042c8SRafael J. Wysocki 	} else if (frozen_bus) {
571f5c57710SGavin Shan 		eeh_pe_dev_traverse(pe, eeh_rmv_device, &removed);
5721c2042c8SRafael J. Wysocki 	}
573317f06deSGavin Shan 
574d0914f50SGavin Shan 	/*
575d0914f50SGavin Shan 	 * Reset the pci controller. (Asserts RST#; resets config space).
576317f06deSGavin Shan 	 * Reconfigure bridges and devices. Don't try to bring the system
577317f06deSGavin Shan 	 * up if the reset failed for some reason.
578d0914f50SGavin Shan 	 *
579d0914f50SGavin Shan 	 * During the reset, it's very dangerous to have uncontrolled PCI
580d0914f50SGavin Shan 	 * config accesses. So we prefer to block them. However, controlled
581d0914f50SGavin Shan 	 * PCI config accesses initiated from EEH itself are allowed.
582317f06deSGavin Shan 	 */
583317f06deSGavin Shan 	rc = eeh_reset_pe(pe);
58428bf36f9SGavin Shan 	if (rc)
585317f06deSGavin Shan 		return rc;
586317f06deSGavin Shan 
5871c2042c8SRafael J. Wysocki 	pci_lock_rescan_remove();
5881c2042c8SRafael J. Wysocki 
589317f06deSGavin Shan 	/* Restore PE */
590317f06deSGavin Shan 	eeh_ops->configure_bridge(pe);
591317f06deSGavin Shan 	eeh_pe_restore_bars(pe);
592317f06deSGavin Shan 
593527d10efSGavin Shan 	/*
594527d10efSGavin Shan 	 * If it's PHB PE, the frozen state on all available PEs should have
595527d10efSGavin Shan 	 * been cleared by the PHB reset. Otherwise, we unfreeze the PE and its
596527d10efSGavin Shan 	 * child PEs because they might be in frozen state.
597527d10efSGavin Shan 	 */
598527d10efSGavin Shan 	if (!(pe->type & EEH_PE_PHB)) {
5995cfb20b9SGavin Shan 		rc = eeh_clear_pe_frozen_state(pe, false);
60078954700SGavin Shan 		if (rc)
60178954700SGavin Shan 			return rc;
602527d10efSGavin Shan 	}
60378954700SGavin Shan 
604317f06deSGavin Shan 	/* Give the system 5 seconds to finish running the user-space
605317f06deSGavin Shan 	 * hotplug shutdown scripts, e.g. ifdown for ethernet.  Yes,
606317f06deSGavin Shan 	 * this is a hack, but if we don't do this, and try to bring
607317f06deSGavin Shan 	 * the device up before the scripts have taken it down,
608317f06deSGavin Shan 	 * potentially weird things happen.
609317f06deSGavin Shan 	 */
610317f06deSGavin Shan 	if (bus) {
611f5c57710SGavin Shan 		pr_info("EEH: Sleep 5s ahead of complete hotplug\n");
612317f06deSGavin Shan 		ssleep(5);
613f5c57710SGavin Shan 
614f5c57710SGavin Shan 		/*
615f5c57710SGavin Shan 		 * The EEH device is still connected with its parent
616f5c57710SGavin Shan 		 * PE. We should disconnect it so the binding can be
617f5c57710SGavin Shan 		 * rebuilt when adding PCI devices.
618f5c57710SGavin Shan 		 */
619f5c57710SGavin Shan 		eeh_pe_traverse(pe, eeh_pe_detach_dev, NULL);
620317f06deSGavin Shan 		pcibios_add_pci_devices(bus);
621f5c57710SGavin Shan 	} else if (frozen_bus && removed) {
622f5c57710SGavin Shan 		pr_info("EEH: Sleep 5s ahead of partial hotplug\n");
623f5c57710SGavin Shan 		ssleep(5);
624f5c57710SGavin Shan 
625f5c57710SGavin Shan 		eeh_pe_traverse(pe, eeh_pe_detach_dev, NULL);
626f5c57710SGavin Shan 		pcibios_add_pci_devices(frozen_bus);
627317f06deSGavin Shan 	}
628f5c57710SGavin Shan 	eeh_pe_state_clear(pe, EEH_PE_KEEP);
6295a71978eSGavin Shan 
6305a71978eSGavin Shan 	pe->tstamp = tstamp;
631317f06deSGavin Shan 	pe->freeze_count = cnt;
632317f06deSGavin Shan 
6331c2042c8SRafael J. Wysocki 	pci_unlock_rescan_remove();
634317f06deSGavin Shan 	return 0;
635317f06deSGavin Shan }
636317f06deSGavin Shan 
637317f06deSGavin Shan /* The longest amount of time to wait for a pci device
638317f06deSGavin Shan  * to come back on line, in seconds.
639317f06deSGavin Shan  */
640fb48dc22SBrian King #define MAX_WAIT_FOR_RECOVERY 300
641317f06deSGavin Shan 
6428a6b1bc7SGavin Shan static void eeh_handle_normal_event(struct eeh_pe *pe)
643317f06deSGavin Shan {
644317f06deSGavin Shan 	struct pci_bus *frozen_bus;
645317f06deSGavin Shan 	int rc = 0;
646317f06deSGavin Shan 	enum pci_ers_result result = PCI_ERS_RESULT_NONE;
647317f06deSGavin Shan 
648317f06deSGavin Shan 	frozen_bus = eeh_pe_bus_get(pe);
649317f06deSGavin Shan 	if (!frozen_bus) {
650317f06deSGavin Shan 		pr_err("%s: Cannot find PCI bus for PHB#%d-PE#%x\n",
651317f06deSGavin Shan 			__func__, pe->phb->global_number, pe->addr);
652317f06deSGavin Shan 		return;
653317f06deSGavin Shan 	}
654317f06deSGavin Shan 
6555a71978eSGavin Shan 	eeh_pe_update_time_stamp(pe);
656317f06deSGavin Shan 	pe->freeze_count++;
6571b28f170SGavin Shan 	if (pe->freeze_count > eeh_max_freezes)
658317f06deSGavin Shan 		goto excess_failures;
6590dae2743SGavin Shan 	pr_warn("EEH: This PCI device has failed %d times in the last hour\n",
660317f06deSGavin Shan 		pe->freeze_count);
661317f06deSGavin Shan 
662317f06deSGavin Shan 	/* Walk the various device drivers attached to this slot through
663317f06deSGavin Shan 	 * a reset sequence, giving each an opportunity to do what it needs
664317f06deSGavin Shan 	 * to accomplish the reset.  Each child gets a report of the
665317f06deSGavin Shan 	 * status ... if any child can't handle the reset, then the entire
666317f06deSGavin Shan 	 * slot is dlpar removed and added.
667317f06deSGavin Shan 	 */
66856ca4fdeSGavin Shan 	pr_info("EEH: Notify device drivers to shutdown\n");
669317f06deSGavin Shan 	eeh_pe_dev_traverse(pe, eeh_report_error, &result);
670317f06deSGavin Shan 
671317f06deSGavin Shan 	/* Get the current PCI slot state. This can take a long time,
6722ac3990cSWei Yang 	 * sometimes over 300 seconds for certain systems.
673317f06deSGavin Shan 	 */
674317f06deSGavin Shan 	rc = eeh_ops->wait_state(pe, MAX_WAIT_FOR_RECOVERY*1000);
675317f06deSGavin Shan 	if (rc < 0 || rc == EEH_STATE_NOT_SUPPORT) {
6760dae2743SGavin Shan 		pr_warn("EEH: Permanent failure\n");
677317f06deSGavin Shan 		goto hard_fail;
678317f06deSGavin Shan 	}
679317f06deSGavin Shan 
680317f06deSGavin Shan 	/* Since rtas may enable MMIO when posting the error log,
681317f06deSGavin Shan 	 * don't post the error log until after all dev drivers
682317f06deSGavin Shan 	 * have been informed.
683317f06deSGavin Shan 	 */
68456ca4fdeSGavin Shan 	pr_info("EEH: Collect temporary log\n");
685317f06deSGavin Shan 	eeh_slot_error_detail(pe, EEH_LOG_TEMP);
686317f06deSGavin Shan 
687317f06deSGavin Shan 	/* If all device drivers were EEH-unaware, then shut
688317f06deSGavin Shan 	 * down all of the device drivers, and hope they
689317f06deSGavin Shan 	 * go down willingly, without panicing the system.
690317f06deSGavin Shan 	 */
691317f06deSGavin Shan 	if (result == PCI_ERS_RESULT_NONE) {
69256ca4fdeSGavin Shan 		pr_info("EEH: Reset with hotplug activity\n");
693317f06deSGavin Shan 		rc = eeh_reset_device(pe, frozen_bus);
694317f06deSGavin Shan 		if (rc) {
6950dae2743SGavin Shan 			pr_warn("%s: Unable to reset, err=%d\n",
69656ca4fdeSGavin Shan 				__func__, rc);
697317f06deSGavin Shan 			goto hard_fail;
698317f06deSGavin Shan 		}
699317f06deSGavin Shan 	}
700317f06deSGavin Shan 
701317f06deSGavin Shan 	/* If all devices reported they can proceed, then re-enable MMIO */
702317f06deSGavin Shan 	if (result == PCI_ERS_RESULT_CAN_RECOVER) {
70356ca4fdeSGavin Shan 		pr_info("EEH: Enable I/O for affected devices\n");
704317f06deSGavin Shan 		rc = eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
705317f06deSGavin Shan 
706317f06deSGavin Shan 		if (rc < 0)
707317f06deSGavin Shan 			goto hard_fail;
708317f06deSGavin Shan 		if (rc) {
709317f06deSGavin Shan 			result = PCI_ERS_RESULT_NEED_RESET;
710317f06deSGavin Shan 		} else {
71156ca4fdeSGavin Shan 			pr_info("EEH: Notify device drivers to resume I/O\n");
712317f06deSGavin Shan 			eeh_pe_dev_traverse(pe, eeh_report_mmio_enabled, &result);
713317f06deSGavin Shan 		}
714317f06deSGavin Shan 	}
715317f06deSGavin Shan 
716317f06deSGavin Shan 	/* If all devices reported they can proceed, then re-enable DMA */
717317f06deSGavin Shan 	if (result == PCI_ERS_RESULT_CAN_RECOVER) {
71856ca4fdeSGavin Shan 		pr_info("EEH: Enabled DMA for affected devices\n");
719317f06deSGavin Shan 		rc = eeh_pci_enable(pe, EEH_OPT_THAW_DMA);
720317f06deSGavin Shan 
721317f06deSGavin Shan 		if (rc < 0)
722317f06deSGavin Shan 			goto hard_fail;
72335845a78SGavin Shan 		if (rc) {
724317f06deSGavin Shan 			result = PCI_ERS_RESULT_NEED_RESET;
72535845a78SGavin Shan 		} else {
72635845a78SGavin Shan 			/*
72735845a78SGavin Shan 			 * We didn't do PE reset for the case. The PE
72835845a78SGavin Shan 			 * is still in frozen state. Clear it before
72935845a78SGavin Shan 			 * resuming the PE.
73035845a78SGavin Shan 			 */
73135845a78SGavin Shan 			eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
732317f06deSGavin Shan 			result = PCI_ERS_RESULT_RECOVERED;
733317f06deSGavin Shan 		}
73435845a78SGavin Shan 	}
735317f06deSGavin Shan 
736317f06deSGavin Shan 	/* If any device has a hard failure, then shut off everything. */
737317f06deSGavin Shan 	if (result == PCI_ERS_RESULT_DISCONNECT) {
7380dae2743SGavin Shan 		pr_warn("EEH: Device driver gave up\n");
739317f06deSGavin Shan 		goto hard_fail;
740317f06deSGavin Shan 	}
741317f06deSGavin Shan 
742317f06deSGavin Shan 	/* If any device called out for a reset, then reset the slot */
743317f06deSGavin Shan 	if (result == PCI_ERS_RESULT_NEED_RESET) {
74456ca4fdeSGavin Shan 		pr_info("EEH: Reset without hotplug activity\n");
745317f06deSGavin Shan 		rc = eeh_reset_device(pe, NULL);
746317f06deSGavin Shan 		if (rc) {
7470dae2743SGavin Shan 			pr_warn("%s: Cannot reset, err=%d\n",
74856ca4fdeSGavin Shan 				__func__, rc);
749317f06deSGavin Shan 			goto hard_fail;
750317f06deSGavin Shan 		}
75156ca4fdeSGavin Shan 
75256ca4fdeSGavin Shan 		pr_info("EEH: Notify device drivers "
75356ca4fdeSGavin Shan 			"the completion of reset\n");
754317f06deSGavin Shan 		result = PCI_ERS_RESULT_NONE;
755317f06deSGavin Shan 		eeh_pe_dev_traverse(pe, eeh_report_reset, &result);
756317f06deSGavin Shan 	}
757317f06deSGavin Shan 
758317f06deSGavin Shan 	/* All devices should claim they have recovered by now. */
759317f06deSGavin Shan 	if ((result != PCI_ERS_RESULT_RECOVERED) &&
760317f06deSGavin Shan 	    (result != PCI_ERS_RESULT_NONE)) {
7610dae2743SGavin Shan 		pr_warn("EEH: Not recovered\n");
762317f06deSGavin Shan 		goto hard_fail;
763317f06deSGavin Shan 	}
764317f06deSGavin Shan 
765317f06deSGavin Shan 	/* Tell all device drivers that they can resume operations */
76656ca4fdeSGavin Shan 	pr_info("EEH: Notify device driver to resume\n");
767317f06deSGavin Shan 	eeh_pe_dev_traverse(pe, eeh_report_resume, NULL);
768317f06deSGavin Shan 
769317f06deSGavin Shan 	return;
770317f06deSGavin Shan 
771317f06deSGavin Shan excess_failures:
772317f06deSGavin Shan 	/*
773317f06deSGavin Shan 	 * About 90% of all real-life EEH failures in the field
774317f06deSGavin Shan 	 * are due to poorly seated PCI cards. Only 10% or so are
775317f06deSGavin Shan 	 * due to actual, failed cards.
776317f06deSGavin Shan 	 */
777317f06deSGavin Shan 	pr_err("EEH: PHB#%d-PE#%x has failed %d times in the\n"
778317f06deSGavin Shan 	       "last hour and has been permanently disabled.\n"
779317f06deSGavin Shan 	       "Please try reseating or replacing it.\n",
780317f06deSGavin Shan 		pe->phb->global_number, pe->addr,
781317f06deSGavin Shan 		pe->freeze_count);
782317f06deSGavin Shan 	goto perm_error;
783317f06deSGavin Shan 
784317f06deSGavin Shan hard_fail:
785317f06deSGavin Shan 	pr_err("EEH: Unable to recover from failure from PHB#%d-PE#%x.\n"
786317f06deSGavin Shan 	       "Please try reseating or replacing it\n",
787317f06deSGavin Shan 		pe->phb->global_number, pe->addr);
788317f06deSGavin Shan 
789317f06deSGavin Shan perm_error:
790317f06deSGavin Shan 	eeh_slot_error_detail(pe, EEH_LOG_PERM);
791317f06deSGavin Shan 
792317f06deSGavin Shan 	/* Notify all devices that they're about to go down. */
793317f06deSGavin Shan 	eeh_pe_dev_traverse(pe, eeh_report_failure, NULL);
794317f06deSGavin Shan 
795d2b0f6f7SGavin Shan 	/* Mark the PE to be removed permanently */
796432227e9SGavin Shan 	eeh_pe_state_mark(pe, EEH_PE_REMOVED);
797d2b0f6f7SGavin Shan 
798d2b0f6f7SGavin Shan 	/*
799d2b0f6f7SGavin Shan 	 * Shut down the device drivers for good. We mark
800d2b0f6f7SGavin Shan 	 * all removed devices correctly to avoid access
801d2b0f6f7SGavin Shan 	 * the their PCI config any more.
802d2b0f6f7SGavin Shan 	 */
8031c2042c8SRafael J. Wysocki 	if (frozen_bus) {
804d2b0f6f7SGavin Shan 		eeh_pe_dev_mode_mark(pe, EEH_DEV_REMOVED);
805d2b0f6f7SGavin Shan 
8061c2042c8SRafael J. Wysocki 		pci_lock_rescan_remove();
807317f06deSGavin Shan 		pcibios_remove_pci_devices(frozen_bus);
8081c2042c8SRafael J. Wysocki 		pci_unlock_rescan_remove();
8091c2042c8SRafael J. Wysocki 	}
810317f06deSGavin Shan }
8118a6b1bc7SGavin Shan 
8128a6b1bc7SGavin Shan static void eeh_handle_special_event(void)
8138a6b1bc7SGavin Shan {
8148a6b1bc7SGavin Shan 	struct eeh_pe *pe, *phb_pe;
8158a6b1bc7SGavin Shan 	struct pci_bus *bus;
8167e4e7867SGavin Shan 	struct pci_controller *hose;
8178a6b1bc7SGavin Shan 	unsigned long flags;
8187e4e7867SGavin Shan 	int rc;
8198a6b1bc7SGavin Shan 
8207e4e7867SGavin Shan 
8217e4e7867SGavin Shan 	do {
8228a6b1bc7SGavin Shan 		rc = eeh_ops->next_error(&pe);
8238a6b1bc7SGavin Shan 
8248a6b1bc7SGavin Shan 		switch (rc) {
8257e4e7867SGavin Shan 		case EEH_NEXT_ERR_DEAD_IOC:
8268a6b1bc7SGavin Shan 			/* Mark all PHBs in dead state */
8278a6b1bc7SGavin Shan 			eeh_serialize_lock(&flags);
8287e4e7867SGavin Shan 
8297e4e7867SGavin Shan 			/* Purge all events */
8305c7a35e3SGavin Shan 			eeh_remove_event(NULL, true);
8317e4e7867SGavin Shan 
8327e4e7867SGavin Shan 			list_for_each_entry(hose, &hose_list, list_node) {
8338a6b1bc7SGavin Shan 				phb_pe = eeh_phb_pe_get(hose);
8348a6b1bc7SGavin Shan 				if (!phb_pe) continue;
8358a6b1bc7SGavin Shan 
8369e049375SGavin Shan 				eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
8378a6b1bc7SGavin Shan 			}
8387e4e7867SGavin Shan 
8398a6b1bc7SGavin Shan 			eeh_serialize_unlock(flags);
8408a6b1bc7SGavin Shan 
8418a6b1bc7SGavin Shan 			break;
8427e4e7867SGavin Shan 		case EEH_NEXT_ERR_FROZEN_PE:
8437e4e7867SGavin Shan 		case EEH_NEXT_ERR_FENCED_PHB:
8447e4e7867SGavin Shan 		case EEH_NEXT_ERR_DEAD_PHB:
8458a6b1bc7SGavin Shan 			/* Mark the PE in fenced state */
8468a6b1bc7SGavin Shan 			eeh_serialize_lock(&flags);
8477e4e7867SGavin Shan 
8487e4e7867SGavin Shan 			/* Purge all events of the PHB */
8495c7a35e3SGavin Shan 			eeh_remove_event(pe, true);
8507e4e7867SGavin Shan 
8517e4e7867SGavin Shan 			if (rc == EEH_NEXT_ERR_DEAD_PHB)
8529e049375SGavin Shan 				eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
8538a6b1bc7SGavin Shan 			else
8548a6b1bc7SGavin Shan 				eeh_pe_state_mark(pe,
8558a6b1bc7SGavin Shan 					EEH_PE_ISOLATED | EEH_PE_RECOVERING);
8567e4e7867SGavin Shan 
8578a6b1bc7SGavin Shan 			eeh_serialize_unlock(flags);
8588a6b1bc7SGavin Shan 
8598a6b1bc7SGavin Shan 			break;
8607e4e7867SGavin Shan 		case EEH_NEXT_ERR_NONE:
8617e4e7867SGavin Shan 			return;
8628a6b1bc7SGavin Shan 		default:
8637e4e7867SGavin Shan 			pr_warn("%s: Invalid value %d from next_error()\n",
8648a6b1bc7SGavin Shan 				__func__, rc);
8658a6b1bc7SGavin Shan 			return;
8668a6b1bc7SGavin Shan 		}
8678a6b1bc7SGavin Shan 
8688a6b1bc7SGavin Shan 		/*
8698a6b1bc7SGavin Shan 		 * For fenced PHB and frozen PE, it's handled as normal
8708a6b1bc7SGavin Shan 		 * event. We have to remove the affected PHBs for dead
8718a6b1bc7SGavin Shan 		 * PHB and IOC
8728a6b1bc7SGavin Shan 		 */
8737e4e7867SGavin Shan 		if (rc == EEH_NEXT_ERR_FROZEN_PE ||
8747e4e7867SGavin Shan 		    rc == EEH_NEXT_ERR_FENCED_PHB) {
8758a6b1bc7SGavin Shan 			eeh_handle_normal_event(pe);
8769e049375SGavin Shan 			eeh_pe_state_clear(pe, EEH_PE_RECOVERING);
8777e4e7867SGavin Shan 		} else {
8781c2042c8SRafael J. Wysocki 			pci_lock_rescan_remove();
8797e4e7867SGavin Shan 			list_for_each_entry(hose, &hose_list, list_node) {
8808a6b1bc7SGavin Shan 				phb_pe = eeh_phb_pe_get(hose);
8817e4e7867SGavin Shan 				if (!phb_pe ||
8829e049375SGavin Shan 				    !(phb_pe->state & EEH_PE_ISOLATED) ||
8839e049375SGavin Shan 				    (phb_pe->state & EEH_PE_RECOVERING))
8848a6b1bc7SGavin Shan 					continue;
8858a6b1bc7SGavin Shan 
8867e4e7867SGavin Shan 				/* Notify all devices to be down */
8878a6b1bc7SGavin Shan 				bus = eeh_pe_bus_get(phb_pe);
8887e4e7867SGavin Shan 				eeh_pe_dev_traverse(pe,
8897e4e7867SGavin Shan 					eeh_report_failure, NULL);
8908a6b1bc7SGavin Shan 				pcibios_remove_pci_devices(bus);
8918a6b1bc7SGavin Shan 			}
8921c2042c8SRafael J. Wysocki 			pci_unlock_rescan_remove();
8938a6b1bc7SGavin Shan 		}
8947e4e7867SGavin Shan 
8957e4e7867SGavin Shan 		/*
8967e4e7867SGavin Shan 		 * If we have detected dead IOC, we needn't proceed
8977e4e7867SGavin Shan 		 * any more since all PHBs would have been removed
8987e4e7867SGavin Shan 		 */
8997e4e7867SGavin Shan 		if (rc == EEH_NEXT_ERR_DEAD_IOC)
9007e4e7867SGavin Shan 			break;
9017e4e7867SGavin Shan 	} while (rc != EEH_NEXT_ERR_NONE);
9028a6b1bc7SGavin Shan }
9038a6b1bc7SGavin Shan 
9048a6b1bc7SGavin Shan /**
9058a6b1bc7SGavin Shan  * eeh_handle_event - Reset a PCI device after hard lockup.
9068a6b1bc7SGavin Shan  * @pe: EEH PE
9078a6b1bc7SGavin Shan  *
9088a6b1bc7SGavin Shan  * While PHB detects address or data parity errors on particular PCI
9098a6b1bc7SGavin Shan  * slot, the associated PE will be frozen. Besides, DMA's occurring
9108a6b1bc7SGavin Shan  * to wild addresses (which usually happen due to bugs in device
9118a6b1bc7SGavin Shan  * drivers or in PCI adapter firmware) can cause EEH error. #SERR,
9128a6b1bc7SGavin Shan  * #PERR or other misc PCI-related errors also can trigger EEH errors.
9138a6b1bc7SGavin Shan  *
9148a6b1bc7SGavin Shan  * Recovery process consists of unplugging the device driver (which
9158a6b1bc7SGavin Shan  * generated hotplug events to userspace), then issuing a PCI #RST to
9168a6b1bc7SGavin Shan  * the device, then reconfiguring the PCI config space for all bridges
9178a6b1bc7SGavin Shan  * & devices under this slot, and then finally restarting the device
9188a6b1bc7SGavin Shan  * drivers (which cause a second set of hotplug events to go out to
9198a6b1bc7SGavin Shan  * userspace).
9208a6b1bc7SGavin Shan  */
9218a6b1bc7SGavin Shan void eeh_handle_event(struct eeh_pe *pe)
9228a6b1bc7SGavin Shan {
9238a6b1bc7SGavin Shan 	if (pe)
9248a6b1bc7SGavin Shan 		eeh_handle_normal_event(pe);
9258a6b1bc7SGavin Shan 	else
9268a6b1bc7SGavin Shan 		eeh_handle_special_event();
9278a6b1bc7SGavin Shan }
928