1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * PCI address cache; allows the lookup of PCI devices based on I/O address 4 * 5 * Copyright IBM Corporation 2004 6 * Copyright Linas Vepstas <linas@austin.ibm.com> 2004 7 */ 8 9 #include <linux/list.h> 10 #include <linux/pci.h> 11 #include <linux/rbtree.h> 12 #include <linux/slab.h> 13 #include <linux/spinlock.h> 14 #include <linux/atomic.h> 15 #include <asm/pci-bridge.h> 16 #include <asm/debugfs.h> 17 #include <asm/ppc-pci.h> 18 19 20 /** 21 * The pci address cache subsystem. This subsystem places 22 * PCI device address resources into a red-black tree, sorted 23 * according to the address range, so that given only an i/o 24 * address, the corresponding PCI device can be **quickly** 25 * found. It is safe to perform an address lookup in an interrupt 26 * context; this ability is an important feature. 27 * 28 * Currently, the only customer of this code is the EEH subsystem; 29 * thus, this code has been somewhat tailored to suit EEH better. 30 * In particular, the cache does *not* hold the addresses of devices 31 * for which EEH is not enabled. 32 * 33 * (Implementation Note: The RB tree seems to be better/faster 34 * than any hash algo I could think of for this problem, even 35 * with the penalty of slow pointer chases for d-cache misses). 36 */ 37 struct pci_io_addr_range { 38 struct rb_node rb_node; 39 resource_size_t addr_lo; 40 resource_size_t addr_hi; 41 struct eeh_dev *edev; 42 struct pci_dev *pcidev; 43 unsigned long flags; 44 }; 45 46 static struct pci_io_addr_cache { 47 struct rb_root rb_root; 48 spinlock_t piar_lock; 49 } pci_io_addr_cache_root; 50 51 static inline struct eeh_dev *__eeh_addr_cache_get_device(unsigned long addr) 52 { 53 struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node; 54 55 while (n) { 56 struct pci_io_addr_range *piar; 57 piar = rb_entry(n, struct pci_io_addr_range, rb_node); 58 59 if (addr < piar->addr_lo) 60 n = n->rb_left; 61 else if (addr > piar->addr_hi) 62 n = n->rb_right; 63 else 64 return piar->edev; 65 } 66 67 return NULL; 68 } 69 70 /** 71 * eeh_addr_cache_get_dev - Get device, given only address 72 * @addr: mmio (PIO) phys address or i/o port number 73 * 74 * Given an mmio phys address, or a port number, find a pci device 75 * that implements this address. I/O port numbers are assumed to be offset 76 * from zero (that is, they do *not* have pci_io_addr added in). 77 * It is safe to call this function within an interrupt. 78 */ 79 struct eeh_dev *eeh_addr_cache_get_dev(unsigned long addr) 80 { 81 struct eeh_dev *edev; 82 unsigned long flags; 83 84 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags); 85 edev = __eeh_addr_cache_get_device(addr); 86 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags); 87 return edev; 88 } 89 90 #ifdef DEBUG 91 /* 92 * Handy-dandy debug print routine, does nothing more 93 * than print out the contents of our addr cache. 94 */ 95 static void eeh_addr_cache_print(struct pci_io_addr_cache *cache) 96 { 97 struct rb_node *n; 98 int cnt = 0; 99 100 n = rb_first(&cache->rb_root); 101 while (n) { 102 struct pci_io_addr_range *piar; 103 piar = rb_entry(n, struct pci_io_addr_range, rb_node); 104 pr_info("PCI: %s addr range %d [%pap-%pap]: %s\n", 105 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt, 106 &piar->addr_lo, &piar->addr_hi, pci_name(piar->pcidev)); 107 cnt++; 108 n = rb_next(n); 109 } 110 } 111 #endif 112 113 /* Insert address range into the rb tree. */ 114 static struct pci_io_addr_range * 115 eeh_addr_cache_insert(struct pci_dev *dev, resource_size_t alo, 116 resource_size_t ahi, unsigned long flags) 117 { 118 struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node; 119 struct rb_node *parent = NULL; 120 struct pci_io_addr_range *piar; 121 122 /* Walk tree, find a place to insert into tree */ 123 while (*p) { 124 parent = *p; 125 piar = rb_entry(parent, struct pci_io_addr_range, rb_node); 126 if (ahi < piar->addr_lo) { 127 p = &parent->rb_left; 128 } else if (alo > piar->addr_hi) { 129 p = &parent->rb_right; 130 } else { 131 if (dev != piar->pcidev || 132 alo != piar->addr_lo || ahi != piar->addr_hi) { 133 pr_warn("PIAR: overlapping address range\n"); 134 } 135 return piar; 136 } 137 } 138 piar = kzalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC); 139 if (!piar) 140 return NULL; 141 142 piar->addr_lo = alo; 143 piar->addr_hi = ahi; 144 piar->edev = pci_dev_to_eeh_dev(dev); 145 piar->pcidev = dev; 146 piar->flags = flags; 147 148 pr_debug("PIAR: insert range=[%pap:%pap] dev=%s\n", 149 &alo, &ahi, pci_name(dev)); 150 151 rb_link_node(&piar->rb_node, parent, p); 152 rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root); 153 154 return piar; 155 } 156 157 static void __eeh_addr_cache_insert_dev(struct pci_dev *dev) 158 { 159 struct pci_dn *pdn; 160 struct eeh_dev *edev; 161 int i; 162 163 pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn); 164 if (!pdn) { 165 pr_warn("PCI: no pci dn found for dev=%s\n", 166 pci_name(dev)); 167 return; 168 } 169 170 edev = pdn_to_eeh_dev(pdn); 171 if (!edev) { 172 pr_warn("PCI: no EEH dev found for %s\n", 173 pci_name(dev)); 174 return; 175 } 176 177 /* Skip any devices for which EEH is not enabled. */ 178 if (!edev->pe) { 179 dev_dbg(&dev->dev, "EEH: Skip building address cache\n"); 180 return; 181 } 182 183 /* 184 * Walk resources on this device, poke the first 7 (6 normal BAR and 1 185 * ROM BAR) into the tree. 186 */ 187 for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 188 resource_size_t start = pci_resource_start(dev,i); 189 resource_size_t end = pci_resource_end(dev,i); 190 unsigned long flags = pci_resource_flags(dev,i); 191 192 /* We are interested only bus addresses, not dma or other stuff */ 193 if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM))) 194 continue; 195 if (start == 0 || ~start == 0 || end == 0 || ~end == 0) 196 continue; 197 eeh_addr_cache_insert(dev, start, end, flags); 198 } 199 } 200 201 /** 202 * eeh_addr_cache_insert_dev - Add a device to the address cache 203 * @dev: PCI device whose I/O addresses we are interested in. 204 * 205 * In order to support the fast lookup of devices based on addresses, 206 * we maintain a cache of devices that can be quickly searched. 207 * This routine adds a device to that cache. 208 */ 209 void eeh_addr_cache_insert_dev(struct pci_dev *dev) 210 { 211 unsigned long flags; 212 213 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags); 214 __eeh_addr_cache_insert_dev(dev); 215 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags); 216 } 217 218 static inline void __eeh_addr_cache_rmv_dev(struct pci_dev *dev) 219 { 220 struct rb_node *n; 221 222 restart: 223 n = rb_first(&pci_io_addr_cache_root.rb_root); 224 while (n) { 225 struct pci_io_addr_range *piar; 226 piar = rb_entry(n, struct pci_io_addr_range, rb_node); 227 228 if (piar->pcidev == dev) { 229 pr_debug("PIAR: remove range=[%pap:%pap] dev=%s\n", 230 &piar->addr_lo, &piar->addr_hi, pci_name(dev)); 231 rb_erase(n, &pci_io_addr_cache_root.rb_root); 232 kfree(piar); 233 goto restart; 234 } 235 n = rb_next(n); 236 } 237 } 238 239 /** 240 * eeh_addr_cache_rmv_dev - remove pci device from addr cache 241 * @dev: device to remove 242 * 243 * Remove a device from the addr-cache tree. 244 * This is potentially expensive, since it will walk 245 * the tree multiple times (once per resource). 246 * But so what; device removal doesn't need to be that fast. 247 */ 248 void eeh_addr_cache_rmv_dev(struct pci_dev *dev) 249 { 250 unsigned long flags; 251 252 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags); 253 __eeh_addr_cache_rmv_dev(dev); 254 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags); 255 } 256 257 /** 258 * eeh_addr_cache_build - Build a cache of I/O addresses 259 * 260 * Build a cache of pci i/o addresses. This cache will be used to 261 * find the pci device that corresponds to a given address. 262 * This routine scans all pci busses to build the cache. 263 * Must be run late in boot process, after the pci controllers 264 * have been scanned for devices (after all device resources are known). 265 */ 266 void eeh_addr_cache_build(void) 267 { 268 struct pci_dn *pdn; 269 struct eeh_dev *edev; 270 struct pci_dev *dev = NULL; 271 272 spin_lock_init(&pci_io_addr_cache_root.piar_lock); 273 274 for_each_pci_dev(dev) { 275 pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn); 276 if (!pdn) 277 continue; 278 279 edev = pdn_to_eeh_dev(pdn); 280 if (!edev) 281 continue; 282 283 dev->dev.archdata.edev = edev; 284 edev->pdev = dev; 285 286 eeh_addr_cache_insert_dev(dev); 287 eeh_sysfs_add_device(dev); 288 } 289 } 290 291 static int eeh_addr_cache_show(struct seq_file *s, void *v) 292 { 293 struct pci_io_addr_range *piar; 294 struct rb_node *n; 295 296 spin_lock(&pci_io_addr_cache_root.piar_lock); 297 for (n = rb_first(&pci_io_addr_cache_root.rb_root); n; n = rb_next(n)) { 298 piar = rb_entry(n, struct pci_io_addr_range, rb_node); 299 300 seq_printf(s, "%s addr range [%pap-%pap]: %s\n", 301 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", 302 &piar->addr_lo, &piar->addr_hi, pci_name(piar->pcidev)); 303 } 304 spin_unlock(&pci_io_addr_cache_root.piar_lock); 305 306 return 0; 307 } 308 DEFINE_SHOW_ATTRIBUTE(eeh_addr_cache); 309 310 void eeh_cache_debugfs_init(void) 311 { 312 debugfs_create_file_unsafe("eeh_address_cache", 0400, 313 powerpc_debugfs_root, NULL, 314 &eeh_addr_cache_fops); 315 } 316