1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * PCI address cache; allows the lookup of PCI devices based on I/O address 4 * 5 * Copyright IBM Corporation 2004 6 * Copyright Linas Vepstas <linas@austin.ibm.com> 2004 7 */ 8 9 #include <linux/list.h> 10 #include <linux/pci.h> 11 #include <linux/rbtree.h> 12 #include <linux/slab.h> 13 #include <linux/spinlock.h> 14 #include <linux/atomic.h> 15 #include <asm/pci-bridge.h> 16 #include <asm/debugfs.h> 17 #include <asm/ppc-pci.h> 18 19 20 /** 21 * DOC: Overview 22 * 23 * The pci address cache subsystem. This subsystem places 24 * PCI device address resources into a red-black tree, sorted 25 * according to the address range, so that given only an i/o 26 * address, the corresponding PCI device can be **quickly** 27 * found. It is safe to perform an address lookup in an interrupt 28 * context; this ability is an important feature. 29 * 30 * Currently, the only customer of this code is the EEH subsystem; 31 * thus, this code has been somewhat tailored to suit EEH better. 32 * In particular, the cache does *not* hold the addresses of devices 33 * for which EEH is not enabled. 34 * 35 * (Implementation Note: The RB tree seems to be better/faster 36 * than any hash algo I could think of for this problem, even 37 * with the penalty of slow pointer chases for d-cache misses). 38 */ 39 40 struct pci_io_addr_range { 41 struct rb_node rb_node; 42 resource_size_t addr_lo; 43 resource_size_t addr_hi; 44 struct eeh_dev *edev; 45 struct pci_dev *pcidev; 46 unsigned long flags; 47 }; 48 49 static struct pci_io_addr_cache { 50 struct rb_root rb_root; 51 spinlock_t piar_lock; 52 } pci_io_addr_cache_root; 53 54 static inline struct eeh_dev *__eeh_addr_cache_get_device(unsigned long addr) 55 { 56 struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node; 57 58 while (n) { 59 struct pci_io_addr_range *piar; 60 piar = rb_entry(n, struct pci_io_addr_range, rb_node); 61 62 if (addr < piar->addr_lo) 63 n = n->rb_left; 64 else if (addr > piar->addr_hi) 65 n = n->rb_right; 66 else 67 return piar->edev; 68 } 69 70 return NULL; 71 } 72 73 /** 74 * eeh_addr_cache_get_dev - Get device, given only address 75 * @addr: mmio (PIO) phys address or i/o port number 76 * 77 * Given an mmio phys address, or a port number, find a pci device 78 * that implements this address. I/O port numbers are assumed to be offset 79 * from zero (that is, they do *not* have pci_io_addr added in). 80 * It is safe to call this function within an interrupt. 81 */ 82 struct eeh_dev *eeh_addr_cache_get_dev(unsigned long addr) 83 { 84 struct eeh_dev *edev; 85 unsigned long flags; 86 87 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags); 88 edev = __eeh_addr_cache_get_device(addr); 89 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags); 90 return edev; 91 } 92 93 #ifdef DEBUG 94 /* 95 * Handy-dandy debug print routine, does nothing more 96 * than print out the contents of our addr cache. 97 */ 98 static void eeh_addr_cache_print(struct pci_io_addr_cache *cache) 99 { 100 struct rb_node *n; 101 int cnt = 0; 102 103 n = rb_first(&cache->rb_root); 104 while (n) { 105 struct pci_io_addr_range *piar; 106 piar = rb_entry(n, struct pci_io_addr_range, rb_node); 107 pr_info("PCI: %s addr range %d [%pap-%pap]: %s\n", 108 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt, 109 &piar->addr_lo, &piar->addr_hi, pci_name(piar->pcidev)); 110 cnt++; 111 n = rb_next(n); 112 } 113 } 114 #endif 115 116 /* Insert address range into the rb tree. */ 117 static struct pci_io_addr_range * 118 eeh_addr_cache_insert(struct pci_dev *dev, resource_size_t alo, 119 resource_size_t ahi, unsigned long flags) 120 { 121 struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node; 122 struct rb_node *parent = NULL; 123 struct pci_io_addr_range *piar; 124 125 /* Walk tree, find a place to insert into tree */ 126 while (*p) { 127 parent = *p; 128 piar = rb_entry(parent, struct pci_io_addr_range, rb_node); 129 if (ahi < piar->addr_lo) { 130 p = &parent->rb_left; 131 } else if (alo > piar->addr_hi) { 132 p = &parent->rb_right; 133 } else { 134 if (dev != piar->pcidev || 135 alo != piar->addr_lo || ahi != piar->addr_hi) { 136 pr_warn("PIAR: overlapping address range\n"); 137 } 138 return piar; 139 } 140 } 141 piar = kzalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC); 142 if (!piar) 143 return NULL; 144 145 piar->addr_lo = alo; 146 piar->addr_hi = ahi; 147 piar->edev = pci_dev_to_eeh_dev(dev); 148 piar->pcidev = dev; 149 piar->flags = flags; 150 151 pr_debug("PIAR: insert range=[%pap:%pap] dev=%s\n", 152 &alo, &ahi, pci_name(dev)); 153 154 rb_link_node(&piar->rb_node, parent, p); 155 rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root); 156 157 return piar; 158 } 159 160 static void __eeh_addr_cache_insert_dev(struct pci_dev *dev) 161 { 162 struct pci_dn *pdn; 163 struct eeh_dev *edev; 164 int i; 165 166 pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn); 167 if (!pdn) { 168 pr_warn("PCI: no pci dn found for dev=%s\n", 169 pci_name(dev)); 170 return; 171 } 172 173 edev = pdn_to_eeh_dev(pdn); 174 if (!edev) { 175 pr_warn("PCI: no EEH dev found for %s\n", 176 pci_name(dev)); 177 return; 178 } 179 180 /* Skip any devices for which EEH is not enabled. */ 181 if (!edev->pe) { 182 dev_dbg(&dev->dev, "EEH: Skip building address cache\n"); 183 return; 184 } 185 186 /* 187 * Walk resources on this device, poke the first 7 (6 normal BAR and 1 188 * ROM BAR) into the tree. 189 */ 190 for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 191 resource_size_t start = pci_resource_start(dev,i); 192 resource_size_t end = pci_resource_end(dev,i); 193 unsigned long flags = pci_resource_flags(dev,i); 194 195 /* We are interested only bus addresses, not dma or other stuff */ 196 if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM))) 197 continue; 198 if (start == 0 || ~start == 0 || end == 0 || ~end == 0) 199 continue; 200 eeh_addr_cache_insert(dev, start, end, flags); 201 } 202 } 203 204 /** 205 * eeh_addr_cache_insert_dev - Add a device to the address cache 206 * @dev: PCI device whose I/O addresses we are interested in. 207 * 208 * In order to support the fast lookup of devices based on addresses, 209 * we maintain a cache of devices that can be quickly searched. 210 * This routine adds a device to that cache. 211 */ 212 void eeh_addr_cache_insert_dev(struct pci_dev *dev) 213 { 214 unsigned long flags; 215 216 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags); 217 __eeh_addr_cache_insert_dev(dev); 218 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags); 219 } 220 221 static inline void __eeh_addr_cache_rmv_dev(struct pci_dev *dev) 222 { 223 struct rb_node *n; 224 225 restart: 226 n = rb_first(&pci_io_addr_cache_root.rb_root); 227 while (n) { 228 struct pci_io_addr_range *piar; 229 piar = rb_entry(n, struct pci_io_addr_range, rb_node); 230 231 if (piar->pcidev == dev) { 232 pr_debug("PIAR: remove range=[%pap:%pap] dev=%s\n", 233 &piar->addr_lo, &piar->addr_hi, pci_name(dev)); 234 rb_erase(n, &pci_io_addr_cache_root.rb_root); 235 kfree(piar); 236 goto restart; 237 } 238 n = rb_next(n); 239 } 240 } 241 242 /** 243 * eeh_addr_cache_rmv_dev - remove pci device from addr cache 244 * @dev: device to remove 245 * 246 * Remove a device from the addr-cache tree. 247 * This is potentially expensive, since it will walk 248 * the tree multiple times (once per resource). 249 * But so what; device removal doesn't need to be that fast. 250 */ 251 void eeh_addr_cache_rmv_dev(struct pci_dev *dev) 252 { 253 unsigned long flags; 254 255 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags); 256 __eeh_addr_cache_rmv_dev(dev); 257 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags); 258 } 259 260 /** 261 * eeh_addr_cache_build - Build a cache of I/O addresses 262 * 263 * Build a cache of pci i/o addresses. This cache will be used to 264 * find the pci device that corresponds to a given address. 265 * This routine scans all pci busses to build the cache. 266 * Must be run late in boot process, after the pci controllers 267 * have been scanned for devices (after all device resources are known). 268 */ 269 void eeh_addr_cache_build(void) 270 { 271 struct pci_dn *pdn; 272 struct eeh_dev *edev; 273 struct pci_dev *dev = NULL; 274 275 spin_lock_init(&pci_io_addr_cache_root.piar_lock); 276 277 for_each_pci_dev(dev) { 278 pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn); 279 if (!pdn) 280 continue; 281 282 edev = pdn_to_eeh_dev(pdn); 283 if (!edev) 284 continue; 285 286 dev->dev.archdata.edev = edev; 287 edev->pdev = dev; 288 289 eeh_addr_cache_insert_dev(dev); 290 eeh_sysfs_add_device(dev); 291 } 292 } 293 294 static int eeh_addr_cache_show(struct seq_file *s, void *v) 295 { 296 struct pci_io_addr_range *piar; 297 struct rb_node *n; 298 299 spin_lock(&pci_io_addr_cache_root.piar_lock); 300 for (n = rb_first(&pci_io_addr_cache_root.rb_root); n; n = rb_next(n)) { 301 piar = rb_entry(n, struct pci_io_addr_range, rb_node); 302 303 seq_printf(s, "%s addr range [%pap-%pap]: %s\n", 304 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", 305 &piar->addr_lo, &piar->addr_hi, pci_name(piar->pcidev)); 306 } 307 spin_unlock(&pci_io_addr_cache_root.piar_lock); 308 309 return 0; 310 } 311 DEFINE_SHOW_ATTRIBUTE(eeh_addr_cache); 312 313 void eeh_cache_debugfs_init(void) 314 { 315 debugfs_create_file_unsafe("eeh_address_cache", 0400, 316 powerpc_debugfs_root, NULL, 317 &eeh_addr_cache_fops); 318 } 319