1 /* 2 * Copyright IBM Corporation 2001, 2005, 2006 3 * Copyright Dave Engebretsen & Todd Inglett 2001 4 * Copyright Linas Vepstas 2005, 2006 5 * Copyright 2001-2012 IBM Corporation. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * 21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com> 22 */ 23 24 #include <linux/delay.h> 25 #include <linux/sched.h> 26 #include <linux/init.h> 27 #include <linux/list.h> 28 #include <linux/pci.h> 29 #include <linux/iommu.h> 30 #include <linux/proc_fs.h> 31 #include <linux/rbtree.h> 32 #include <linux/reboot.h> 33 #include <linux/seq_file.h> 34 #include <linux/spinlock.h> 35 #include <linux/export.h> 36 #include <linux/of.h> 37 38 #include <linux/atomic.h> 39 #include <asm/debugfs.h> 40 #include <asm/eeh.h> 41 #include <asm/eeh_event.h> 42 #include <asm/io.h> 43 #include <asm/iommu.h> 44 #include <asm/machdep.h> 45 #include <asm/ppc-pci.h> 46 #include <asm/rtas.h> 47 #include <asm/pte-walk.h> 48 49 50 /** Overview: 51 * EEH, or "Enhanced Error Handling" is a PCI bridge technology for 52 * dealing with PCI bus errors that can't be dealt with within the 53 * usual PCI framework, except by check-stopping the CPU. Systems 54 * that are designed for high-availability/reliability cannot afford 55 * to crash due to a "mere" PCI error, thus the need for EEH. 56 * An EEH-capable bridge operates by converting a detected error 57 * into a "slot freeze", taking the PCI adapter off-line, making 58 * the slot behave, from the OS'es point of view, as if the slot 59 * were "empty": all reads return 0xff's and all writes are silently 60 * ignored. EEH slot isolation events can be triggered by parity 61 * errors on the address or data busses (e.g. during posted writes), 62 * which in turn might be caused by low voltage on the bus, dust, 63 * vibration, humidity, radioactivity or plain-old failed hardware. 64 * 65 * Note, however, that one of the leading causes of EEH slot 66 * freeze events are buggy device drivers, buggy device microcode, 67 * or buggy device hardware. This is because any attempt by the 68 * device to bus-master data to a memory address that is not 69 * assigned to the device will trigger a slot freeze. (The idea 70 * is to prevent devices-gone-wild from corrupting system memory). 71 * Buggy hardware/drivers will have a miserable time co-existing 72 * with EEH. 73 * 74 * Ideally, a PCI device driver, when suspecting that an isolation 75 * event has occurred (e.g. by reading 0xff's), will then ask EEH 76 * whether this is the case, and then take appropriate steps to 77 * reset the PCI slot, the PCI device, and then resume operations. 78 * However, until that day, the checking is done here, with the 79 * eeh_check_failure() routine embedded in the MMIO macros. If 80 * the slot is found to be isolated, an "EEH Event" is synthesized 81 * and sent out for processing. 82 */ 83 84 /* If a device driver keeps reading an MMIO register in an interrupt 85 * handler after a slot isolation event, it might be broken. 86 * This sets the threshold for how many read attempts we allow 87 * before printing an error message. 88 */ 89 #define EEH_MAX_FAILS 2100000 90 91 /* Time to wait for a PCI slot to report status, in milliseconds */ 92 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000) 93 94 /* 95 * EEH probe mode support, which is part of the flags, 96 * is to support multiple platforms for EEH. Some platforms 97 * like pSeries do PCI emunation based on device tree. 98 * However, other platforms like powernv probe PCI devices 99 * from hardware. The flag is used to distinguish that. 100 * In addition, struct eeh_ops::probe would be invoked for 101 * particular OF node or PCI device so that the corresponding 102 * PE would be created there. 103 */ 104 int eeh_subsystem_flags; 105 EXPORT_SYMBOL(eeh_subsystem_flags); 106 107 /* 108 * EEH allowed maximal frozen times. If one particular PE's 109 * frozen count in last hour exceeds this limit, the PE will 110 * be forced to be offline permanently. 111 */ 112 int eeh_max_freezes = 5; 113 114 /* Platform dependent EEH operations */ 115 struct eeh_ops *eeh_ops = NULL; 116 117 /* Lock to avoid races due to multiple reports of an error */ 118 DEFINE_RAW_SPINLOCK(confirm_error_lock); 119 EXPORT_SYMBOL_GPL(confirm_error_lock); 120 121 /* Lock to protect passed flags */ 122 static DEFINE_MUTEX(eeh_dev_mutex); 123 124 /* Buffer for reporting pci register dumps. Its here in BSS, and 125 * not dynamically alloced, so that it ends up in RMO where RTAS 126 * can access it. 127 */ 128 #define EEH_PCI_REGS_LOG_LEN 8192 129 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN]; 130 131 /* 132 * The struct is used to maintain the EEH global statistic 133 * information. Besides, the EEH global statistics will be 134 * exported to user space through procfs 135 */ 136 struct eeh_stats { 137 u64 no_device; /* PCI device not found */ 138 u64 no_dn; /* OF node not found */ 139 u64 no_cfg_addr; /* Config address not found */ 140 u64 ignored_check; /* EEH check skipped */ 141 u64 total_mmio_ffs; /* Total EEH checks */ 142 u64 false_positives; /* Unnecessary EEH checks */ 143 u64 slot_resets; /* PE reset */ 144 }; 145 146 static struct eeh_stats eeh_stats; 147 148 static int __init eeh_setup(char *str) 149 { 150 if (!strcmp(str, "off")) 151 eeh_add_flag(EEH_FORCE_DISABLED); 152 else if (!strcmp(str, "early_log")) 153 eeh_add_flag(EEH_EARLY_DUMP_LOG); 154 155 return 1; 156 } 157 __setup("eeh=", eeh_setup); 158 159 /* 160 * This routine captures assorted PCI configuration space data 161 * for the indicated PCI device, and puts them into a buffer 162 * for RTAS error logging. 163 */ 164 static size_t eeh_dump_dev_log(struct eeh_dev *edev, char *buf, size_t len) 165 { 166 struct pci_dn *pdn = eeh_dev_to_pdn(edev); 167 u32 cfg; 168 int cap, i; 169 int n = 0, l = 0; 170 char buffer[128]; 171 172 n += scnprintf(buf+n, len-n, "%04x:%02x:%02x.%01x\n", 173 pdn->phb->global_number, pdn->busno, 174 PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn)); 175 pr_warn("EEH: of node=%04x:%02x:%02x.%01x\n", 176 pdn->phb->global_number, pdn->busno, 177 PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn)); 178 179 eeh_ops->read_config(pdn, PCI_VENDOR_ID, 4, &cfg); 180 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg); 181 pr_warn("EEH: PCI device/vendor: %08x\n", cfg); 182 183 eeh_ops->read_config(pdn, PCI_COMMAND, 4, &cfg); 184 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg); 185 pr_warn("EEH: PCI cmd/status register: %08x\n", cfg); 186 187 /* Gather bridge-specific registers */ 188 if (edev->mode & EEH_DEV_BRIDGE) { 189 eeh_ops->read_config(pdn, PCI_SEC_STATUS, 2, &cfg); 190 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg); 191 pr_warn("EEH: Bridge secondary status: %04x\n", cfg); 192 193 eeh_ops->read_config(pdn, PCI_BRIDGE_CONTROL, 2, &cfg); 194 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg); 195 pr_warn("EEH: Bridge control: %04x\n", cfg); 196 } 197 198 /* Dump out the PCI-X command and status regs */ 199 cap = edev->pcix_cap; 200 if (cap) { 201 eeh_ops->read_config(pdn, cap, 4, &cfg); 202 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg); 203 pr_warn("EEH: PCI-X cmd: %08x\n", cfg); 204 205 eeh_ops->read_config(pdn, cap+4, 4, &cfg); 206 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg); 207 pr_warn("EEH: PCI-X status: %08x\n", cfg); 208 } 209 210 /* If PCI-E capable, dump PCI-E cap 10 */ 211 cap = edev->pcie_cap; 212 if (cap) { 213 n += scnprintf(buf+n, len-n, "pci-e cap10:\n"); 214 pr_warn("EEH: PCI-E capabilities and status follow:\n"); 215 216 for (i=0; i<=8; i++) { 217 eeh_ops->read_config(pdn, cap+4*i, 4, &cfg); 218 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg); 219 220 if ((i % 4) == 0) { 221 if (i != 0) 222 pr_warn("%s\n", buffer); 223 224 l = scnprintf(buffer, sizeof(buffer), 225 "EEH: PCI-E %02x: %08x ", 226 4*i, cfg); 227 } else { 228 l += scnprintf(buffer+l, sizeof(buffer)-l, 229 "%08x ", cfg); 230 } 231 232 } 233 234 pr_warn("%s\n", buffer); 235 } 236 237 /* If AER capable, dump it */ 238 cap = edev->aer_cap; 239 if (cap) { 240 n += scnprintf(buf+n, len-n, "pci-e AER:\n"); 241 pr_warn("EEH: PCI-E AER capability register set follows:\n"); 242 243 for (i=0; i<=13; i++) { 244 eeh_ops->read_config(pdn, cap+4*i, 4, &cfg); 245 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg); 246 247 if ((i % 4) == 0) { 248 if (i != 0) 249 pr_warn("%s\n", buffer); 250 251 l = scnprintf(buffer, sizeof(buffer), 252 "EEH: PCI-E AER %02x: %08x ", 253 4*i, cfg); 254 } else { 255 l += scnprintf(buffer+l, sizeof(buffer)-l, 256 "%08x ", cfg); 257 } 258 } 259 260 pr_warn("%s\n", buffer); 261 } 262 263 return n; 264 } 265 266 static void *eeh_dump_pe_log(void *data, void *flag) 267 { 268 struct eeh_pe *pe = data; 269 struct eeh_dev *edev, *tmp; 270 size_t *plen = flag; 271 272 eeh_pe_for_each_dev(pe, edev, tmp) 273 *plen += eeh_dump_dev_log(edev, pci_regs_buf + *plen, 274 EEH_PCI_REGS_LOG_LEN - *plen); 275 276 return NULL; 277 } 278 279 /** 280 * eeh_slot_error_detail - Generate combined log including driver log and error log 281 * @pe: EEH PE 282 * @severity: temporary or permanent error log 283 * 284 * This routine should be called to generate the combined log, which 285 * is comprised of driver log and error log. The driver log is figured 286 * out from the config space of the corresponding PCI device, while 287 * the error log is fetched through platform dependent function call. 288 */ 289 void eeh_slot_error_detail(struct eeh_pe *pe, int severity) 290 { 291 size_t loglen = 0; 292 293 /* 294 * When the PHB is fenced or dead, it's pointless to collect 295 * the data from PCI config space because it should return 296 * 0xFF's. For ER, we still retrieve the data from the PCI 297 * config space. 298 * 299 * For pHyp, we have to enable IO for log retrieval. Otherwise, 300 * 0xFF's is always returned from PCI config space. 301 * 302 * When the @severity is EEH_LOG_PERM, the PE is going to be 303 * removed. Prior to that, the drivers for devices included in 304 * the PE will be closed. The drivers rely on working IO path 305 * to bring the devices to quiet state. Otherwise, PCI traffic 306 * from those devices after they are removed is like to cause 307 * another unexpected EEH error. 308 */ 309 if (!(pe->type & EEH_PE_PHB)) { 310 if (eeh_has_flag(EEH_ENABLE_IO_FOR_LOG) || 311 severity == EEH_LOG_PERM) 312 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO); 313 314 /* 315 * The config space of some PCI devices can't be accessed 316 * when their PEs are in frozen state. Otherwise, fenced 317 * PHB might be seen. Those PEs are identified with flag 318 * EEH_PE_CFG_RESTRICTED, indicating EEH_PE_CFG_BLOCKED 319 * is set automatically when the PE is put to EEH_PE_ISOLATED. 320 * 321 * Restoring BARs possibly triggers PCI config access in 322 * (OPAL) firmware and then causes fenced PHB. If the 323 * PCI config is blocked with flag EEH_PE_CFG_BLOCKED, it's 324 * pointless to restore BARs and dump config space. 325 */ 326 eeh_ops->configure_bridge(pe); 327 if (!(pe->state & EEH_PE_CFG_BLOCKED)) { 328 eeh_pe_restore_bars(pe); 329 330 pci_regs_buf[0] = 0; 331 eeh_pe_traverse(pe, eeh_dump_pe_log, &loglen); 332 } 333 } 334 335 eeh_ops->get_log(pe, severity, pci_regs_buf, loglen); 336 } 337 338 /** 339 * eeh_token_to_phys - Convert EEH address token to phys address 340 * @token: I/O token, should be address in the form 0xA.... 341 * 342 * This routine should be called to convert virtual I/O address 343 * to physical one. 344 */ 345 static inline unsigned long eeh_token_to_phys(unsigned long token) 346 { 347 pte_t *ptep; 348 unsigned long pa; 349 int hugepage_shift; 350 351 /* 352 * We won't find hugepages here(this is iomem). Hence we are not 353 * worried about _PAGE_SPLITTING/collapse. Also we will not hit 354 * page table free, because of init_mm. 355 */ 356 ptep = find_init_mm_pte(token, &hugepage_shift); 357 if (!ptep) 358 return token; 359 WARN_ON(hugepage_shift); 360 pa = pte_pfn(*ptep) << PAGE_SHIFT; 361 362 return pa | (token & (PAGE_SIZE-1)); 363 } 364 365 /* 366 * On PowerNV platform, we might already have fenced PHB there. 367 * For that case, it's meaningless to recover frozen PE. Intead, 368 * We have to handle fenced PHB firstly. 369 */ 370 static int eeh_phb_check_failure(struct eeh_pe *pe) 371 { 372 struct eeh_pe *phb_pe; 373 unsigned long flags; 374 int ret; 375 376 if (!eeh_has_flag(EEH_PROBE_MODE_DEV)) 377 return -EPERM; 378 379 /* Find the PHB PE */ 380 phb_pe = eeh_phb_pe_get(pe->phb); 381 if (!phb_pe) { 382 pr_warn("%s Can't find PE for PHB#%x\n", 383 __func__, pe->phb->global_number); 384 return -EEXIST; 385 } 386 387 /* If the PHB has been in problematic state */ 388 eeh_serialize_lock(&flags); 389 if (phb_pe->state & EEH_PE_ISOLATED) { 390 ret = 0; 391 goto out; 392 } 393 394 /* Check PHB state */ 395 ret = eeh_ops->get_state(phb_pe, NULL); 396 if ((ret < 0) || 397 (ret == EEH_STATE_NOT_SUPPORT) || 398 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) == 399 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) { 400 ret = 0; 401 goto out; 402 } 403 404 /* Isolate the PHB and send event */ 405 eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED); 406 eeh_serialize_unlock(flags); 407 408 pr_err("EEH: PHB#%x failure detected, location: %s\n", 409 phb_pe->phb->global_number, eeh_pe_loc_get(phb_pe)); 410 dump_stack(); 411 eeh_send_failure_event(phb_pe); 412 413 return 1; 414 out: 415 eeh_serialize_unlock(flags); 416 return ret; 417 } 418 419 /** 420 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze 421 * @edev: eeh device 422 * 423 * Check for an EEH failure for the given device node. Call this 424 * routine if the result of a read was all 0xff's and you want to 425 * find out if this is due to an EEH slot freeze. This routine 426 * will query firmware for the EEH status. 427 * 428 * Returns 0 if there has not been an EEH error; otherwise returns 429 * a non-zero value and queues up a slot isolation event notification. 430 * 431 * It is safe to call this routine in an interrupt context. 432 */ 433 int eeh_dev_check_failure(struct eeh_dev *edev) 434 { 435 int ret; 436 int active_flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE); 437 unsigned long flags; 438 struct device_node *dn; 439 struct pci_dev *dev; 440 struct eeh_pe *pe, *parent_pe, *phb_pe; 441 int rc = 0; 442 const char *location = NULL; 443 444 eeh_stats.total_mmio_ffs++; 445 446 if (!eeh_enabled()) 447 return 0; 448 449 if (!edev) { 450 eeh_stats.no_dn++; 451 return 0; 452 } 453 dev = eeh_dev_to_pci_dev(edev); 454 pe = eeh_dev_to_pe(edev); 455 456 /* Access to IO BARs might get this far and still not want checking. */ 457 if (!pe) { 458 eeh_stats.ignored_check++; 459 pr_debug("EEH: Ignored check for %s\n", 460 eeh_pci_name(dev)); 461 return 0; 462 } 463 464 if (!pe->addr && !pe->config_addr) { 465 eeh_stats.no_cfg_addr++; 466 return 0; 467 } 468 469 /* 470 * On PowerNV platform, we might already have fenced PHB 471 * there and we need take care of that firstly. 472 */ 473 ret = eeh_phb_check_failure(pe); 474 if (ret > 0) 475 return ret; 476 477 /* 478 * If the PE isn't owned by us, we shouldn't check the 479 * state. Instead, let the owner handle it if the PE has 480 * been frozen. 481 */ 482 if (eeh_pe_passed(pe)) 483 return 0; 484 485 /* If we already have a pending isolation event for this 486 * slot, we know it's bad already, we don't need to check. 487 * Do this checking under a lock; as multiple PCI devices 488 * in one slot might report errors simultaneously, and we 489 * only want one error recovery routine running. 490 */ 491 eeh_serialize_lock(&flags); 492 rc = 1; 493 if (pe->state & EEH_PE_ISOLATED) { 494 pe->check_count++; 495 if (pe->check_count % EEH_MAX_FAILS == 0) { 496 dn = pci_device_to_OF_node(dev); 497 if (dn) 498 location = of_get_property(dn, "ibm,loc-code", 499 NULL); 500 printk(KERN_ERR "EEH: %d reads ignored for recovering device at " 501 "location=%s driver=%s pci addr=%s\n", 502 pe->check_count, 503 location ? location : "unknown", 504 eeh_driver_name(dev), eeh_pci_name(dev)); 505 printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n", 506 eeh_driver_name(dev)); 507 dump_stack(); 508 } 509 goto dn_unlock; 510 } 511 512 /* 513 * Now test for an EEH failure. This is VERY expensive. 514 * Note that the eeh_config_addr may be a parent device 515 * in the case of a device behind a bridge, or it may be 516 * function zero of a multi-function device. 517 * In any case they must share a common PHB. 518 */ 519 ret = eeh_ops->get_state(pe, NULL); 520 521 /* Note that config-io to empty slots may fail; 522 * they are empty when they don't have children. 523 * We will punt with the following conditions: Failure to get 524 * PE's state, EEH not support and Permanently unavailable 525 * state, PE is in good state. 526 */ 527 if ((ret < 0) || 528 (ret == EEH_STATE_NOT_SUPPORT) || 529 ((ret & active_flags) == active_flags)) { 530 eeh_stats.false_positives++; 531 pe->false_positives++; 532 rc = 0; 533 goto dn_unlock; 534 } 535 536 /* 537 * It should be corner case that the parent PE has been 538 * put into frozen state as well. We should take care 539 * that at first. 540 */ 541 parent_pe = pe->parent; 542 while (parent_pe) { 543 /* Hit the ceiling ? */ 544 if (parent_pe->type & EEH_PE_PHB) 545 break; 546 547 /* Frozen parent PE ? */ 548 ret = eeh_ops->get_state(parent_pe, NULL); 549 if (ret > 0 && 550 (ret & active_flags) != active_flags) 551 pe = parent_pe; 552 553 /* Next parent level */ 554 parent_pe = parent_pe->parent; 555 } 556 557 eeh_stats.slot_resets++; 558 559 /* Avoid repeated reports of this failure, including problems 560 * with other functions on this device, and functions under 561 * bridges. 562 */ 563 eeh_pe_state_mark(pe, EEH_PE_ISOLATED); 564 eeh_serialize_unlock(flags); 565 566 /* Most EEH events are due to device driver bugs. Having 567 * a stack trace will help the device-driver authors figure 568 * out what happened. So print that out. 569 */ 570 phb_pe = eeh_phb_pe_get(pe->phb); 571 pr_err("EEH: Frozen PHB#%x-PE#%x detected\n", 572 pe->phb->global_number, pe->addr); 573 pr_err("EEH: PE location: %s, PHB location: %s\n", 574 eeh_pe_loc_get(pe), eeh_pe_loc_get(phb_pe)); 575 dump_stack(); 576 577 eeh_send_failure_event(pe); 578 579 return 1; 580 581 dn_unlock: 582 eeh_serialize_unlock(flags); 583 return rc; 584 } 585 586 EXPORT_SYMBOL_GPL(eeh_dev_check_failure); 587 588 /** 589 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze 590 * @token: I/O address 591 * 592 * Check for an EEH failure at the given I/O address. Call this 593 * routine if the result of a read was all 0xff's and you want to 594 * find out if this is due to an EEH slot freeze event. This routine 595 * will query firmware for the EEH status. 596 * 597 * Note this routine is safe to call in an interrupt context. 598 */ 599 int eeh_check_failure(const volatile void __iomem *token) 600 { 601 unsigned long addr; 602 struct eeh_dev *edev; 603 604 /* Finding the phys addr + pci device; this is pretty quick. */ 605 addr = eeh_token_to_phys((unsigned long __force) token); 606 edev = eeh_addr_cache_get_dev(addr); 607 if (!edev) { 608 eeh_stats.no_device++; 609 return 0; 610 } 611 612 return eeh_dev_check_failure(edev); 613 } 614 EXPORT_SYMBOL(eeh_check_failure); 615 616 617 /** 618 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot 619 * @pe: EEH PE 620 * 621 * This routine should be called to reenable frozen MMIO or DMA 622 * so that it would work correctly again. It's useful while doing 623 * recovery or log collection on the indicated device. 624 */ 625 int eeh_pci_enable(struct eeh_pe *pe, int function) 626 { 627 int active_flag, rc; 628 629 /* 630 * pHyp doesn't allow to enable IO or DMA on unfrozen PE. 631 * Also, it's pointless to enable them on unfrozen PE. So 632 * we have to check before enabling IO or DMA. 633 */ 634 switch (function) { 635 case EEH_OPT_THAW_MMIO: 636 active_flag = EEH_STATE_MMIO_ACTIVE | EEH_STATE_MMIO_ENABLED; 637 break; 638 case EEH_OPT_THAW_DMA: 639 active_flag = EEH_STATE_DMA_ACTIVE; 640 break; 641 case EEH_OPT_DISABLE: 642 case EEH_OPT_ENABLE: 643 case EEH_OPT_FREEZE_PE: 644 active_flag = 0; 645 break; 646 default: 647 pr_warn("%s: Invalid function %d\n", 648 __func__, function); 649 return -EINVAL; 650 } 651 652 /* 653 * Check if IO or DMA has been enabled before 654 * enabling them. 655 */ 656 if (active_flag) { 657 rc = eeh_ops->get_state(pe, NULL); 658 if (rc < 0) 659 return rc; 660 661 /* Needn't enable it at all */ 662 if (rc == EEH_STATE_NOT_SUPPORT) 663 return 0; 664 665 /* It's already enabled */ 666 if (rc & active_flag) 667 return 0; 668 } 669 670 671 /* Issue the request */ 672 rc = eeh_ops->set_option(pe, function); 673 if (rc) 674 pr_warn("%s: Unexpected state change %d on " 675 "PHB#%x-PE#%x, err=%d\n", 676 __func__, function, pe->phb->global_number, 677 pe->addr, rc); 678 679 /* Check if the request is finished successfully */ 680 if (active_flag) { 681 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC); 682 if (rc < 0) 683 return rc; 684 685 if (rc & active_flag) 686 return 0; 687 688 return -EIO; 689 } 690 691 return rc; 692 } 693 694 static void *eeh_disable_and_save_dev_state(void *data, void *userdata) 695 { 696 struct eeh_dev *edev = data; 697 struct pci_dev *pdev = eeh_dev_to_pci_dev(edev); 698 struct pci_dev *dev = userdata; 699 700 /* 701 * The caller should have disabled and saved the 702 * state for the specified device 703 */ 704 if (!pdev || pdev == dev) 705 return NULL; 706 707 /* Ensure we have D0 power state */ 708 pci_set_power_state(pdev, PCI_D0); 709 710 /* Save device state */ 711 pci_save_state(pdev); 712 713 /* 714 * Disable device to avoid any DMA traffic and 715 * interrupt from the device 716 */ 717 pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE); 718 719 return NULL; 720 } 721 722 static void *eeh_restore_dev_state(void *data, void *userdata) 723 { 724 struct eeh_dev *edev = data; 725 struct pci_dn *pdn = eeh_dev_to_pdn(edev); 726 struct pci_dev *pdev = eeh_dev_to_pci_dev(edev); 727 struct pci_dev *dev = userdata; 728 729 if (!pdev) 730 return NULL; 731 732 /* Apply customization from firmware */ 733 if (pdn && eeh_ops->restore_config) 734 eeh_ops->restore_config(pdn); 735 736 /* The caller should restore state for the specified device */ 737 if (pdev != dev) 738 pci_restore_state(pdev); 739 740 return NULL; 741 } 742 743 /** 744 * pcibios_set_pcie_reset_state - Set PCI-E reset state 745 * @dev: pci device struct 746 * @state: reset state to enter 747 * 748 * Return value: 749 * 0 if success 750 */ 751 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state) 752 { 753 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev); 754 struct eeh_pe *pe = eeh_dev_to_pe(edev); 755 756 if (!pe) { 757 pr_err("%s: No PE found on PCI device %s\n", 758 __func__, pci_name(dev)); 759 return -EINVAL; 760 } 761 762 switch (state) { 763 case pcie_deassert_reset: 764 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE); 765 eeh_unfreeze_pe(pe, false); 766 if (!(pe->type & EEH_PE_VF)) 767 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED); 768 eeh_pe_dev_traverse(pe, eeh_restore_dev_state, dev); 769 eeh_pe_state_clear(pe, EEH_PE_ISOLATED); 770 break; 771 case pcie_hot_reset: 772 eeh_pe_state_mark_with_cfg(pe, EEH_PE_ISOLATED); 773 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE); 774 eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev); 775 if (!(pe->type & EEH_PE_VF)) 776 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED); 777 eeh_ops->reset(pe, EEH_RESET_HOT); 778 break; 779 case pcie_warm_reset: 780 eeh_pe_state_mark_with_cfg(pe, EEH_PE_ISOLATED); 781 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE); 782 eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev); 783 if (!(pe->type & EEH_PE_VF)) 784 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED); 785 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL); 786 break; 787 default: 788 eeh_pe_state_clear(pe, EEH_PE_ISOLATED | EEH_PE_CFG_BLOCKED); 789 return -EINVAL; 790 }; 791 792 return 0; 793 } 794 795 /** 796 * eeh_set_pe_freset - Check the required reset for the indicated device 797 * @data: EEH device 798 * @flag: return value 799 * 800 * Each device might have its preferred reset type: fundamental or 801 * hot reset. The routine is used to collected the information for 802 * the indicated device and its children so that the bunch of the 803 * devices could be reset properly. 804 */ 805 static void *eeh_set_dev_freset(void *data, void *flag) 806 { 807 struct pci_dev *dev; 808 unsigned int *freset = (unsigned int *)flag; 809 struct eeh_dev *edev = (struct eeh_dev *)data; 810 811 dev = eeh_dev_to_pci_dev(edev); 812 if (dev) 813 *freset |= dev->needs_freset; 814 815 return NULL; 816 } 817 818 /** 819 * eeh_pe_reset_full - Complete a full reset process on the indicated PE 820 * @pe: EEH PE 821 * 822 * This function executes a full reset procedure on a PE, including setting 823 * the appropriate flags, performing a fundamental or hot reset, and then 824 * deactivating the reset status. It is designed to be used within the EEH 825 * subsystem, as opposed to eeh_pe_reset which is exported to drivers and 826 * only performs a single operation at a time. 827 * 828 * This function will attempt to reset a PE three times before failing. 829 */ 830 int eeh_pe_reset_full(struct eeh_pe *pe) 831 { 832 int active_flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE); 833 int reset_state = (EEH_PE_RESET | EEH_PE_CFG_BLOCKED); 834 int type = EEH_RESET_HOT; 835 unsigned int freset = 0; 836 int i, state, ret; 837 838 /* 839 * Determine the type of reset to perform - hot or fundamental. 840 * Hot reset is the default operation, unless any device under the 841 * PE requires a fundamental reset. 842 */ 843 eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset); 844 845 if (freset) 846 type = EEH_RESET_FUNDAMENTAL; 847 848 /* Mark the PE as in reset state and block config space accesses */ 849 eeh_pe_state_mark(pe, reset_state); 850 851 /* Make three attempts at resetting the bus */ 852 for (i = 0; i < 3; i++) { 853 ret = eeh_pe_reset(pe, type); 854 if (ret) 855 break; 856 857 ret = eeh_pe_reset(pe, EEH_RESET_DEACTIVATE); 858 if (ret) 859 break; 860 861 /* Wait until the PE is in a functioning state */ 862 state = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC); 863 if ((state & active_flags) == active_flags) 864 break; 865 866 if (state < 0) { 867 pr_warn("%s: Unrecoverable slot failure on PHB#%x-PE#%x", 868 __func__, pe->phb->global_number, pe->addr); 869 ret = -ENOTRECOVERABLE; 870 break; 871 } 872 873 /* Set error in case this is our last attempt */ 874 ret = -EIO; 875 pr_warn("%s: Failure %d resetting PHB#%x-PE#%x\n (%d)\n", 876 __func__, state, pe->phb->global_number, pe->addr, (i + 1)); 877 } 878 879 eeh_pe_state_clear(pe, reset_state); 880 return ret; 881 } 882 883 /** 884 * eeh_save_bars - Save device bars 885 * @edev: PCI device associated EEH device 886 * 887 * Save the values of the device bars. Unlike the restore 888 * routine, this routine is *not* recursive. This is because 889 * PCI devices are added individually; but, for the restore, 890 * an entire slot is reset at a time. 891 */ 892 void eeh_save_bars(struct eeh_dev *edev) 893 { 894 struct pci_dn *pdn; 895 int i; 896 897 pdn = eeh_dev_to_pdn(edev); 898 if (!pdn) 899 return; 900 901 for (i = 0; i < 16; i++) 902 eeh_ops->read_config(pdn, i * 4, 4, &edev->config_space[i]); 903 904 /* 905 * For PCI bridges including root port, we need enable bus 906 * master explicitly. Otherwise, it can't fetch IODA table 907 * entries correctly. So we cache the bit in advance so that 908 * we can restore it after reset, either PHB range or PE range. 909 */ 910 if (edev->mode & EEH_DEV_BRIDGE) 911 edev->config_space[1] |= PCI_COMMAND_MASTER; 912 } 913 914 /** 915 * eeh_ops_register - Register platform dependent EEH operations 916 * @ops: platform dependent EEH operations 917 * 918 * Register the platform dependent EEH operation callback 919 * functions. The platform should call this function before 920 * any other EEH operations. 921 */ 922 int __init eeh_ops_register(struct eeh_ops *ops) 923 { 924 if (!ops->name) { 925 pr_warn("%s: Invalid EEH ops name for %p\n", 926 __func__, ops); 927 return -EINVAL; 928 } 929 930 if (eeh_ops && eeh_ops != ops) { 931 pr_warn("%s: EEH ops of platform %s already existing (%s)\n", 932 __func__, eeh_ops->name, ops->name); 933 return -EEXIST; 934 } 935 936 eeh_ops = ops; 937 938 return 0; 939 } 940 941 /** 942 * eeh_ops_unregister - Unreigster platform dependent EEH operations 943 * @name: name of EEH platform operations 944 * 945 * Unregister the platform dependent EEH operation callback 946 * functions. 947 */ 948 int __exit eeh_ops_unregister(const char *name) 949 { 950 if (!name || !strlen(name)) { 951 pr_warn("%s: Invalid EEH ops name\n", 952 __func__); 953 return -EINVAL; 954 } 955 956 if (eeh_ops && !strcmp(eeh_ops->name, name)) { 957 eeh_ops = NULL; 958 return 0; 959 } 960 961 return -EEXIST; 962 } 963 964 static int eeh_reboot_notifier(struct notifier_block *nb, 965 unsigned long action, void *unused) 966 { 967 eeh_clear_flag(EEH_ENABLED); 968 return NOTIFY_DONE; 969 } 970 971 static struct notifier_block eeh_reboot_nb = { 972 .notifier_call = eeh_reboot_notifier, 973 }; 974 975 /** 976 * eeh_init - EEH initialization 977 * 978 * Initialize EEH by trying to enable it for all of the adapters in the system. 979 * As a side effect we can determine here if eeh is supported at all. 980 * Note that we leave EEH on so failed config cycles won't cause a machine 981 * check. If a user turns off EEH for a particular adapter they are really 982 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't 983 * grant access to a slot if EEH isn't enabled, and so we always enable 984 * EEH for all slots/all devices. 985 * 986 * The eeh-force-off option disables EEH checking globally, for all slots. 987 * Even if force-off is set, the EEH hardware is still enabled, so that 988 * newer systems can boot. 989 */ 990 int eeh_init(void) 991 { 992 struct pci_controller *hose, *tmp; 993 struct pci_dn *pdn; 994 static int cnt = 0; 995 int ret = 0; 996 997 /* 998 * We have to delay the initialization on PowerNV after 999 * the PCI hierarchy tree has been built because the PEs 1000 * are figured out based on PCI devices instead of device 1001 * tree nodes 1002 */ 1003 if (machine_is(powernv) && cnt++ <= 0) 1004 return ret; 1005 1006 /* Register reboot notifier */ 1007 ret = register_reboot_notifier(&eeh_reboot_nb); 1008 if (ret) { 1009 pr_warn("%s: Failed to register notifier (%d)\n", 1010 __func__, ret); 1011 return ret; 1012 } 1013 1014 /* call platform initialization function */ 1015 if (!eeh_ops) { 1016 pr_warn("%s: Platform EEH operation not found\n", 1017 __func__); 1018 return -EEXIST; 1019 } else if ((ret = eeh_ops->init())) 1020 return ret; 1021 1022 /* Initialize PHB PEs */ 1023 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) 1024 eeh_dev_phb_init_dynamic(hose); 1025 1026 /* Initialize EEH event */ 1027 ret = eeh_event_init(); 1028 if (ret) 1029 return ret; 1030 1031 /* Enable EEH for all adapters */ 1032 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { 1033 pdn = hose->pci_data; 1034 traverse_pci_dn(pdn, eeh_ops->probe, NULL); 1035 } 1036 1037 /* 1038 * Call platform post-initialization. Actually, It's good chance 1039 * to inform platform that EEH is ready to supply service if the 1040 * I/O cache stuff has been built up. 1041 */ 1042 if (eeh_ops->post_init) { 1043 ret = eeh_ops->post_init(); 1044 if (ret) 1045 return ret; 1046 } 1047 1048 if (eeh_enabled()) 1049 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n"); 1050 else 1051 pr_info("EEH: No capable adapters found\n"); 1052 1053 return ret; 1054 } 1055 1056 core_initcall_sync(eeh_init); 1057 1058 /** 1059 * eeh_add_device_early - Enable EEH for the indicated device node 1060 * @pdn: PCI device node for which to set up EEH 1061 * 1062 * This routine must be used to perform EEH initialization for PCI 1063 * devices that were added after system boot (e.g. hotplug, dlpar). 1064 * This routine must be called before any i/o is performed to the 1065 * adapter (inluding any config-space i/o). 1066 * Whether this actually enables EEH or not for this device depends 1067 * on the CEC architecture, type of the device, on earlier boot 1068 * command-line arguments & etc. 1069 */ 1070 void eeh_add_device_early(struct pci_dn *pdn) 1071 { 1072 struct pci_controller *phb = pdn ? pdn->phb : NULL; 1073 struct eeh_dev *edev = pdn_to_eeh_dev(pdn); 1074 1075 if (!edev) 1076 return; 1077 1078 if (!eeh_has_flag(EEH_PROBE_MODE_DEVTREE)) 1079 return; 1080 1081 /* USB Bus children of PCI devices will not have BUID's */ 1082 if (NULL == phb || 1083 (eeh_has_flag(EEH_PROBE_MODE_DEVTREE) && 0 == phb->buid)) 1084 return; 1085 1086 eeh_ops->probe(pdn, NULL); 1087 } 1088 1089 /** 1090 * eeh_add_device_tree_early - Enable EEH for the indicated device 1091 * @pdn: PCI device node 1092 * 1093 * This routine must be used to perform EEH initialization for the 1094 * indicated PCI device that was added after system boot (e.g. 1095 * hotplug, dlpar). 1096 */ 1097 void eeh_add_device_tree_early(struct pci_dn *pdn) 1098 { 1099 struct pci_dn *n; 1100 1101 if (!pdn) 1102 return; 1103 1104 list_for_each_entry(n, &pdn->child_list, list) 1105 eeh_add_device_tree_early(n); 1106 eeh_add_device_early(pdn); 1107 } 1108 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early); 1109 1110 /** 1111 * eeh_add_device_late - Perform EEH initialization for the indicated pci device 1112 * @dev: pci device for which to set up EEH 1113 * 1114 * This routine must be used to complete EEH initialization for PCI 1115 * devices that were added after system boot (e.g. hotplug, dlpar). 1116 */ 1117 void eeh_add_device_late(struct pci_dev *dev) 1118 { 1119 struct pci_dn *pdn; 1120 struct eeh_dev *edev; 1121 1122 if (!dev || !eeh_enabled()) 1123 return; 1124 1125 pr_debug("EEH: Adding device %s\n", pci_name(dev)); 1126 1127 pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn); 1128 edev = pdn_to_eeh_dev(pdn); 1129 if (edev->pdev == dev) { 1130 pr_debug("EEH: Already referenced !\n"); 1131 return; 1132 } 1133 1134 /* 1135 * The EEH cache might not be removed correctly because of 1136 * unbalanced kref to the device during unplug time, which 1137 * relies on pcibios_release_device(). So we have to remove 1138 * that here explicitly. 1139 */ 1140 if (edev->pdev) { 1141 eeh_rmv_from_parent_pe(edev); 1142 eeh_addr_cache_rmv_dev(edev->pdev); 1143 eeh_sysfs_remove_device(edev->pdev); 1144 edev->mode &= ~EEH_DEV_SYSFS; 1145 1146 /* 1147 * We definitely should have the PCI device removed 1148 * though it wasn't correctly. So we needn't call 1149 * into error handler afterwards. 1150 */ 1151 edev->mode |= EEH_DEV_NO_HANDLER; 1152 1153 edev->pdev = NULL; 1154 dev->dev.archdata.edev = NULL; 1155 } 1156 1157 if (eeh_has_flag(EEH_PROBE_MODE_DEV)) 1158 eeh_ops->probe(pdn, NULL); 1159 1160 edev->pdev = dev; 1161 dev->dev.archdata.edev = edev; 1162 1163 eeh_addr_cache_insert_dev(dev); 1164 } 1165 1166 /** 1167 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus 1168 * @bus: PCI bus 1169 * 1170 * This routine must be used to perform EEH initialization for PCI 1171 * devices which are attached to the indicated PCI bus. The PCI bus 1172 * is added after system boot through hotplug or dlpar. 1173 */ 1174 void eeh_add_device_tree_late(struct pci_bus *bus) 1175 { 1176 struct pci_dev *dev; 1177 1178 list_for_each_entry(dev, &bus->devices, bus_list) { 1179 eeh_add_device_late(dev); 1180 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { 1181 struct pci_bus *subbus = dev->subordinate; 1182 if (subbus) 1183 eeh_add_device_tree_late(subbus); 1184 } 1185 } 1186 } 1187 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late); 1188 1189 /** 1190 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus 1191 * @bus: PCI bus 1192 * 1193 * This routine must be used to add EEH sysfs files for PCI 1194 * devices which are attached to the indicated PCI bus. The PCI bus 1195 * is added after system boot through hotplug or dlpar. 1196 */ 1197 void eeh_add_sysfs_files(struct pci_bus *bus) 1198 { 1199 struct pci_dev *dev; 1200 1201 list_for_each_entry(dev, &bus->devices, bus_list) { 1202 eeh_sysfs_add_device(dev); 1203 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { 1204 struct pci_bus *subbus = dev->subordinate; 1205 if (subbus) 1206 eeh_add_sysfs_files(subbus); 1207 } 1208 } 1209 } 1210 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files); 1211 1212 /** 1213 * eeh_remove_device - Undo EEH setup for the indicated pci device 1214 * @dev: pci device to be removed 1215 * 1216 * This routine should be called when a device is removed from 1217 * a running system (e.g. by hotplug or dlpar). It unregisters 1218 * the PCI device from the EEH subsystem. I/O errors affecting 1219 * this device will no longer be detected after this call; thus, 1220 * i/o errors affecting this slot may leave this device unusable. 1221 */ 1222 void eeh_remove_device(struct pci_dev *dev) 1223 { 1224 struct eeh_dev *edev; 1225 1226 if (!dev || !eeh_enabled()) 1227 return; 1228 edev = pci_dev_to_eeh_dev(dev); 1229 1230 /* Unregister the device with the EEH/PCI address search system */ 1231 pr_debug("EEH: Removing device %s\n", pci_name(dev)); 1232 1233 if (!edev || !edev->pdev || !edev->pe) { 1234 pr_debug("EEH: Not referenced !\n"); 1235 return; 1236 } 1237 1238 /* 1239 * During the hotplug for EEH error recovery, we need the EEH 1240 * device attached to the parent PE in order for BAR restore 1241 * a bit later. So we keep it for BAR restore and remove it 1242 * from the parent PE during the BAR resotre. 1243 */ 1244 edev->pdev = NULL; 1245 1246 /* 1247 * The flag "in_error" is used to trace EEH devices for VFs 1248 * in error state or not. It's set in eeh_report_error(). If 1249 * it's not set, eeh_report_{reset,resume}() won't be called 1250 * for the VF EEH device. 1251 */ 1252 edev->in_error = false; 1253 dev->dev.archdata.edev = NULL; 1254 if (!(edev->pe->state & EEH_PE_KEEP)) 1255 eeh_rmv_from_parent_pe(edev); 1256 else 1257 edev->mode |= EEH_DEV_DISCONNECTED; 1258 1259 /* 1260 * We're removing from the PCI subsystem, that means 1261 * the PCI device driver can't support EEH or not 1262 * well. So we rely on hotplug completely to do recovery 1263 * for the specific PCI device. 1264 */ 1265 edev->mode |= EEH_DEV_NO_HANDLER; 1266 1267 eeh_addr_cache_rmv_dev(dev); 1268 eeh_sysfs_remove_device(dev); 1269 edev->mode &= ~EEH_DEV_SYSFS; 1270 } 1271 1272 int eeh_unfreeze_pe(struct eeh_pe *pe, bool sw_state) 1273 { 1274 int ret; 1275 1276 ret = eeh_pci_enable(pe, EEH_OPT_THAW_MMIO); 1277 if (ret) { 1278 pr_warn("%s: Failure %d enabling IO on PHB#%x-PE#%x\n", 1279 __func__, ret, pe->phb->global_number, pe->addr); 1280 return ret; 1281 } 1282 1283 ret = eeh_pci_enable(pe, EEH_OPT_THAW_DMA); 1284 if (ret) { 1285 pr_warn("%s: Failure %d enabling DMA on PHB#%x-PE#%x\n", 1286 __func__, ret, pe->phb->global_number, pe->addr); 1287 return ret; 1288 } 1289 1290 /* Clear software isolated state */ 1291 if (sw_state && (pe->state & EEH_PE_ISOLATED)) 1292 eeh_pe_state_clear(pe, EEH_PE_ISOLATED); 1293 1294 return ret; 1295 } 1296 1297 1298 static struct pci_device_id eeh_reset_ids[] = { 1299 { PCI_DEVICE(0x19a2, 0x0710) }, /* Emulex, BE */ 1300 { PCI_DEVICE(0x10df, 0xe220) }, /* Emulex, Lancer */ 1301 { PCI_DEVICE(0x14e4, 0x1657) }, /* Broadcom BCM5719 */ 1302 { 0 } 1303 }; 1304 1305 static int eeh_pe_change_owner(struct eeh_pe *pe) 1306 { 1307 struct eeh_dev *edev, *tmp; 1308 struct pci_dev *pdev; 1309 struct pci_device_id *id; 1310 int flags, ret; 1311 1312 /* Check PE state */ 1313 flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE); 1314 ret = eeh_ops->get_state(pe, NULL); 1315 if (ret < 0 || ret == EEH_STATE_NOT_SUPPORT) 1316 return 0; 1317 1318 /* Unfrozen PE, nothing to do */ 1319 if ((ret & flags) == flags) 1320 return 0; 1321 1322 /* Frozen PE, check if it needs PE level reset */ 1323 eeh_pe_for_each_dev(pe, edev, tmp) { 1324 pdev = eeh_dev_to_pci_dev(edev); 1325 if (!pdev) 1326 continue; 1327 1328 for (id = &eeh_reset_ids[0]; id->vendor != 0; id++) { 1329 if (id->vendor != PCI_ANY_ID && 1330 id->vendor != pdev->vendor) 1331 continue; 1332 if (id->device != PCI_ANY_ID && 1333 id->device != pdev->device) 1334 continue; 1335 if (id->subvendor != PCI_ANY_ID && 1336 id->subvendor != pdev->subsystem_vendor) 1337 continue; 1338 if (id->subdevice != PCI_ANY_ID && 1339 id->subdevice != pdev->subsystem_device) 1340 continue; 1341 1342 return eeh_pe_reset_and_recover(pe); 1343 } 1344 } 1345 1346 return eeh_unfreeze_pe(pe, true); 1347 } 1348 1349 /** 1350 * eeh_dev_open - Increase count of pass through devices for PE 1351 * @pdev: PCI device 1352 * 1353 * Increase count of passed through devices for the indicated 1354 * PE. In the result, the EEH errors detected on the PE won't be 1355 * reported. The PE owner will be responsible for detection 1356 * and recovery. 1357 */ 1358 int eeh_dev_open(struct pci_dev *pdev) 1359 { 1360 struct eeh_dev *edev; 1361 int ret = -ENODEV; 1362 1363 mutex_lock(&eeh_dev_mutex); 1364 1365 /* No PCI device ? */ 1366 if (!pdev) 1367 goto out; 1368 1369 /* No EEH device or PE ? */ 1370 edev = pci_dev_to_eeh_dev(pdev); 1371 if (!edev || !edev->pe) 1372 goto out; 1373 1374 /* 1375 * The PE might have been put into frozen state, but we 1376 * didn't detect that yet. The passed through PCI devices 1377 * in frozen PE won't work properly. Clear the frozen state 1378 * in advance. 1379 */ 1380 ret = eeh_pe_change_owner(edev->pe); 1381 if (ret) 1382 goto out; 1383 1384 /* Increase PE's pass through count */ 1385 atomic_inc(&edev->pe->pass_dev_cnt); 1386 mutex_unlock(&eeh_dev_mutex); 1387 1388 return 0; 1389 out: 1390 mutex_unlock(&eeh_dev_mutex); 1391 return ret; 1392 } 1393 EXPORT_SYMBOL_GPL(eeh_dev_open); 1394 1395 /** 1396 * eeh_dev_release - Decrease count of pass through devices for PE 1397 * @pdev: PCI device 1398 * 1399 * Decrease count of pass through devices for the indicated PE. If 1400 * there is no passed through device in PE, the EEH errors detected 1401 * on the PE will be reported and handled as usual. 1402 */ 1403 void eeh_dev_release(struct pci_dev *pdev) 1404 { 1405 struct eeh_dev *edev; 1406 1407 mutex_lock(&eeh_dev_mutex); 1408 1409 /* No PCI device ? */ 1410 if (!pdev) 1411 goto out; 1412 1413 /* No EEH device ? */ 1414 edev = pci_dev_to_eeh_dev(pdev); 1415 if (!edev || !edev->pe || !eeh_pe_passed(edev->pe)) 1416 goto out; 1417 1418 /* Decrease PE's pass through count */ 1419 WARN_ON(atomic_dec_if_positive(&edev->pe->pass_dev_cnt) < 0); 1420 eeh_pe_change_owner(edev->pe); 1421 out: 1422 mutex_unlock(&eeh_dev_mutex); 1423 } 1424 EXPORT_SYMBOL(eeh_dev_release); 1425 1426 #ifdef CONFIG_IOMMU_API 1427 1428 static int dev_has_iommu_table(struct device *dev, void *data) 1429 { 1430 struct pci_dev *pdev = to_pci_dev(dev); 1431 struct pci_dev **ppdev = data; 1432 1433 if (!dev) 1434 return 0; 1435 1436 if (dev->iommu_group) { 1437 *ppdev = pdev; 1438 return 1; 1439 } 1440 1441 return 0; 1442 } 1443 1444 /** 1445 * eeh_iommu_group_to_pe - Convert IOMMU group to EEH PE 1446 * @group: IOMMU group 1447 * 1448 * The routine is called to convert IOMMU group to EEH PE. 1449 */ 1450 struct eeh_pe *eeh_iommu_group_to_pe(struct iommu_group *group) 1451 { 1452 struct pci_dev *pdev = NULL; 1453 struct eeh_dev *edev; 1454 int ret; 1455 1456 /* No IOMMU group ? */ 1457 if (!group) 1458 return NULL; 1459 1460 ret = iommu_group_for_each_dev(group, &pdev, dev_has_iommu_table); 1461 if (!ret || !pdev) 1462 return NULL; 1463 1464 /* No EEH device or PE ? */ 1465 edev = pci_dev_to_eeh_dev(pdev); 1466 if (!edev || !edev->pe) 1467 return NULL; 1468 1469 return edev->pe; 1470 } 1471 EXPORT_SYMBOL_GPL(eeh_iommu_group_to_pe); 1472 1473 #endif /* CONFIG_IOMMU_API */ 1474 1475 /** 1476 * eeh_pe_set_option - Set options for the indicated PE 1477 * @pe: EEH PE 1478 * @option: requested option 1479 * 1480 * The routine is called to enable or disable EEH functionality 1481 * on the indicated PE, to enable IO or DMA for the frozen PE. 1482 */ 1483 int eeh_pe_set_option(struct eeh_pe *pe, int option) 1484 { 1485 int ret = 0; 1486 1487 /* Invalid PE ? */ 1488 if (!pe) 1489 return -ENODEV; 1490 1491 /* 1492 * EEH functionality could possibly be disabled, just 1493 * return error for the case. And the EEH functinality 1494 * isn't expected to be disabled on one specific PE. 1495 */ 1496 switch (option) { 1497 case EEH_OPT_ENABLE: 1498 if (eeh_enabled()) { 1499 ret = eeh_pe_change_owner(pe); 1500 break; 1501 } 1502 ret = -EIO; 1503 break; 1504 case EEH_OPT_DISABLE: 1505 break; 1506 case EEH_OPT_THAW_MMIO: 1507 case EEH_OPT_THAW_DMA: 1508 case EEH_OPT_FREEZE_PE: 1509 if (!eeh_ops || !eeh_ops->set_option) { 1510 ret = -ENOENT; 1511 break; 1512 } 1513 1514 ret = eeh_pci_enable(pe, option); 1515 break; 1516 default: 1517 pr_debug("%s: Option %d out of range (%d, %d)\n", 1518 __func__, option, EEH_OPT_DISABLE, EEH_OPT_THAW_DMA); 1519 ret = -EINVAL; 1520 } 1521 1522 return ret; 1523 } 1524 EXPORT_SYMBOL_GPL(eeh_pe_set_option); 1525 1526 /** 1527 * eeh_pe_get_state - Retrieve PE's state 1528 * @pe: EEH PE 1529 * 1530 * Retrieve the PE's state, which includes 3 aspects: enabled 1531 * DMA, enabled IO and asserted reset. 1532 */ 1533 int eeh_pe_get_state(struct eeh_pe *pe) 1534 { 1535 int result, ret = 0; 1536 bool rst_active, dma_en, mmio_en; 1537 1538 /* Existing PE ? */ 1539 if (!pe) 1540 return -ENODEV; 1541 1542 if (!eeh_ops || !eeh_ops->get_state) 1543 return -ENOENT; 1544 1545 /* 1546 * If the parent PE is owned by the host kernel and is undergoing 1547 * error recovery, we should return the PE state as temporarily 1548 * unavailable so that the error recovery on the guest is suspended 1549 * until the recovery completes on the host. 1550 */ 1551 if (pe->parent && 1552 !(pe->state & EEH_PE_REMOVED) && 1553 (pe->parent->state & (EEH_PE_ISOLATED | EEH_PE_RECOVERING))) 1554 return EEH_PE_STATE_UNAVAIL; 1555 1556 result = eeh_ops->get_state(pe, NULL); 1557 rst_active = !!(result & EEH_STATE_RESET_ACTIVE); 1558 dma_en = !!(result & EEH_STATE_DMA_ENABLED); 1559 mmio_en = !!(result & EEH_STATE_MMIO_ENABLED); 1560 1561 if (rst_active) 1562 ret = EEH_PE_STATE_RESET; 1563 else if (dma_en && mmio_en) 1564 ret = EEH_PE_STATE_NORMAL; 1565 else if (!dma_en && !mmio_en) 1566 ret = EEH_PE_STATE_STOPPED_IO_DMA; 1567 else if (!dma_en && mmio_en) 1568 ret = EEH_PE_STATE_STOPPED_DMA; 1569 else 1570 ret = EEH_PE_STATE_UNAVAIL; 1571 1572 return ret; 1573 } 1574 EXPORT_SYMBOL_GPL(eeh_pe_get_state); 1575 1576 static int eeh_pe_reenable_devices(struct eeh_pe *pe) 1577 { 1578 struct eeh_dev *edev, *tmp; 1579 struct pci_dev *pdev; 1580 int ret = 0; 1581 1582 /* Restore config space */ 1583 eeh_pe_restore_bars(pe); 1584 1585 /* 1586 * Reenable PCI devices as the devices passed 1587 * through are always enabled before the reset. 1588 */ 1589 eeh_pe_for_each_dev(pe, edev, tmp) { 1590 pdev = eeh_dev_to_pci_dev(edev); 1591 if (!pdev) 1592 continue; 1593 1594 ret = pci_reenable_device(pdev); 1595 if (ret) { 1596 pr_warn("%s: Failure %d reenabling %s\n", 1597 __func__, ret, pci_name(pdev)); 1598 return ret; 1599 } 1600 } 1601 1602 /* The PE is still in frozen state */ 1603 return eeh_unfreeze_pe(pe, true); 1604 } 1605 1606 1607 /** 1608 * eeh_pe_reset - Issue PE reset according to specified type 1609 * @pe: EEH PE 1610 * @option: reset type 1611 * 1612 * The routine is called to reset the specified PE with the 1613 * indicated type, either fundamental reset or hot reset. 1614 * PE reset is the most important part for error recovery. 1615 */ 1616 int eeh_pe_reset(struct eeh_pe *pe, int option) 1617 { 1618 int ret = 0; 1619 1620 /* Invalid PE ? */ 1621 if (!pe) 1622 return -ENODEV; 1623 1624 if (!eeh_ops || !eeh_ops->set_option || !eeh_ops->reset) 1625 return -ENOENT; 1626 1627 switch (option) { 1628 case EEH_RESET_DEACTIVATE: 1629 ret = eeh_ops->reset(pe, option); 1630 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED); 1631 if (ret) 1632 break; 1633 1634 ret = eeh_pe_reenable_devices(pe); 1635 break; 1636 case EEH_RESET_HOT: 1637 case EEH_RESET_FUNDAMENTAL: 1638 /* 1639 * Proactively freeze the PE to drop all MMIO access 1640 * during reset, which should be banned as it's always 1641 * cause recursive EEH error. 1642 */ 1643 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE); 1644 1645 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED); 1646 ret = eeh_ops->reset(pe, option); 1647 break; 1648 default: 1649 pr_debug("%s: Unsupported option %d\n", 1650 __func__, option); 1651 ret = -EINVAL; 1652 } 1653 1654 return ret; 1655 } 1656 EXPORT_SYMBOL_GPL(eeh_pe_reset); 1657 1658 /** 1659 * eeh_pe_configure - Configure PCI bridges after PE reset 1660 * @pe: EEH PE 1661 * 1662 * The routine is called to restore the PCI config space for 1663 * those PCI devices, especially PCI bridges affected by PE 1664 * reset issued previously. 1665 */ 1666 int eeh_pe_configure(struct eeh_pe *pe) 1667 { 1668 int ret = 0; 1669 1670 /* Invalid PE ? */ 1671 if (!pe) 1672 return -ENODEV; 1673 1674 return ret; 1675 } 1676 EXPORT_SYMBOL_GPL(eeh_pe_configure); 1677 1678 /** 1679 * eeh_pe_inject_err - Injecting the specified PCI error to the indicated PE 1680 * @pe: the indicated PE 1681 * @type: error type 1682 * @function: error function 1683 * @addr: address 1684 * @mask: address mask 1685 * 1686 * The routine is called to inject the specified PCI error, which 1687 * is determined by @type and @function, to the indicated PE for 1688 * testing purpose. 1689 */ 1690 int eeh_pe_inject_err(struct eeh_pe *pe, int type, int func, 1691 unsigned long addr, unsigned long mask) 1692 { 1693 /* Invalid PE ? */ 1694 if (!pe) 1695 return -ENODEV; 1696 1697 /* Unsupported operation ? */ 1698 if (!eeh_ops || !eeh_ops->err_inject) 1699 return -ENOENT; 1700 1701 /* Check on PCI error type */ 1702 if (type != EEH_ERR_TYPE_32 && type != EEH_ERR_TYPE_64) 1703 return -EINVAL; 1704 1705 /* Check on PCI error function */ 1706 if (func < EEH_ERR_FUNC_MIN || func > EEH_ERR_FUNC_MAX) 1707 return -EINVAL; 1708 1709 return eeh_ops->err_inject(pe, type, func, addr, mask); 1710 } 1711 EXPORT_SYMBOL_GPL(eeh_pe_inject_err); 1712 1713 static int proc_eeh_show(struct seq_file *m, void *v) 1714 { 1715 if (!eeh_enabled()) { 1716 seq_printf(m, "EEH Subsystem is globally disabled\n"); 1717 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs); 1718 } else { 1719 seq_printf(m, "EEH Subsystem is enabled\n"); 1720 seq_printf(m, 1721 "no device=%llu\n" 1722 "no device node=%llu\n" 1723 "no config address=%llu\n" 1724 "check not wanted=%llu\n" 1725 "eeh_total_mmio_ffs=%llu\n" 1726 "eeh_false_positives=%llu\n" 1727 "eeh_slot_resets=%llu\n", 1728 eeh_stats.no_device, 1729 eeh_stats.no_dn, 1730 eeh_stats.no_cfg_addr, 1731 eeh_stats.ignored_check, 1732 eeh_stats.total_mmio_ffs, 1733 eeh_stats.false_positives, 1734 eeh_stats.slot_resets); 1735 } 1736 1737 return 0; 1738 } 1739 1740 static int proc_eeh_open(struct inode *inode, struct file *file) 1741 { 1742 return single_open(file, proc_eeh_show, NULL); 1743 } 1744 1745 static const struct file_operations proc_eeh_operations = { 1746 .open = proc_eeh_open, 1747 .read = seq_read, 1748 .llseek = seq_lseek, 1749 .release = single_release, 1750 }; 1751 1752 #ifdef CONFIG_DEBUG_FS 1753 static int eeh_enable_dbgfs_set(void *data, u64 val) 1754 { 1755 if (val) 1756 eeh_clear_flag(EEH_FORCE_DISABLED); 1757 else 1758 eeh_add_flag(EEH_FORCE_DISABLED); 1759 1760 /* Notify the backend */ 1761 if (eeh_ops->post_init) 1762 eeh_ops->post_init(); 1763 1764 return 0; 1765 } 1766 1767 static int eeh_enable_dbgfs_get(void *data, u64 *val) 1768 { 1769 if (eeh_enabled()) 1770 *val = 0x1ul; 1771 else 1772 *val = 0x0ul; 1773 return 0; 1774 } 1775 1776 static int eeh_freeze_dbgfs_set(void *data, u64 val) 1777 { 1778 eeh_max_freezes = val; 1779 return 0; 1780 } 1781 1782 static int eeh_freeze_dbgfs_get(void *data, u64 *val) 1783 { 1784 *val = eeh_max_freezes; 1785 return 0; 1786 } 1787 1788 DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get, 1789 eeh_enable_dbgfs_set, "0x%llx\n"); 1790 DEFINE_SIMPLE_ATTRIBUTE(eeh_freeze_dbgfs_ops, eeh_freeze_dbgfs_get, 1791 eeh_freeze_dbgfs_set, "0x%llx\n"); 1792 #endif 1793 1794 static int __init eeh_init_proc(void) 1795 { 1796 if (machine_is(pseries) || machine_is(powernv)) { 1797 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations); 1798 #ifdef CONFIG_DEBUG_FS 1799 debugfs_create_file("eeh_enable", 0600, 1800 powerpc_debugfs_root, NULL, 1801 &eeh_enable_dbgfs_ops); 1802 debugfs_create_file("eeh_max_freezes", 0600, 1803 powerpc_debugfs_root, NULL, 1804 &eeh_freeze_dbgfs_ops); 1805 #endif 1806 } 1807 1808 return 0; 1809 } 1810 __initcall(eeh_init_proc); 1811