1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/export.h> 18 #include <linux/jump_label.h> 19 20 #include <asm/oprofile_impl.h> 21 #include <asm/cputable.h> 22 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 23 #include <asm/mmu.h> 24 #include <asm/setup.h> 25 26 static struct cpu_spec the_cpu_spec __read_mostly; 27 28 struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 29 EXPORT_SYMBOL(cur_cpu_spec); 30 31 /* The platform string corresponding to the real PVR */ 32 const char *powerpc_base_platform; 33 34 /* NOTE: 35 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 36 * the responsibility of the appropriate CPU save/restore functions to 37 * eventually copy these settings over. Those save/restore aren't yet 38 * part of the cputable though. That has to be fixed for both ppc32 39 * and ppc64 40 */ 41 #ifdef CONFIG_PPC32 42 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 51 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 52 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 55 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 56 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 60 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 61 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 62 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 64 #endif /* CONFIG_PPC32 */ 65 #ifdef CONFIG_PPC64 66 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 67 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 68 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 69 extern void __restore_cpu_pa6t(void); 70 extern void __restore_cpu_ppc970(void); 71 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 72 extern void __restore_cpu_power7(void); 73 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 74 extern void __restore_cpu_power8(void); 75 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); 76 extern void __restore_cpu_power9(void); 77 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 78 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 79 extern long __machine_check_early_realmode_p9(struct pt_regs *regs); 80 #endif /* CONFIG_PPC64 */ 81 #if defined(CONFIG_E500) 82 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 83 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 84 extern void __restore_cpu_e5500(void); 85 extern void __restore_cpu_e6500(void); 86 #endif /* CONFIG_E500 */ 87 88 /* This table only contains "desktop" CPUs, it need to be filled with embedded 89 * ones as well... 90 */ 91 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 92 PPC_FEATURE_HAS_MMU) 93 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 94 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 95 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 97 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 99 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 100 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 101 PPC_FEATURE_TRUE_LE | \ 102 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 103 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 104 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 105 PPC_FEATURE_TRUE_LE | \ 106 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 107 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 108 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 109 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 110 PPC_FEATURE_TRUE_LE | \ 111 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 112 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 113 PPC_FEATURE2_HTM_COMP | \ 114 PPC_FEATURE2_HTM_NOSC_COMP | \ 115 PPC_FEATURE2_DSCR | \ 116 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 117 PPC_FEATURE2_VEC_CRYPTO) 118 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 119 PPC_FEATURE_TRUE_LE | \ 120 PPC_FEATURE_HAS_ALTIVEC_COMP) 121 #define COMMON_USER_POWER9 COMMON_USER_POWER8 122 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 123 PPC_FEATURE2_ARCH_3_00 | \ 124 PPC_FEATURE2_HAS_IEEE128 | \ 125 PPC_FEATURE2_DARN ) 126 127 #ifdef CONFIG_PPC_BOOK3E_64 128 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 129 #else 130 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 131 PPC_FEATURE_BOOKE) 132 #endif 133 134 static struct cpu_spec __initdata cpu_specs[] = { 135 #ifdef CONFIG_PPC_BOOK3S_64 136 { /* Power4 */ 137 .pvr_mask = 0xffff0000, 138 .pvr_value = 0x00350000, 139 .cpu_name = "POWER4 (gp)", 140 .cpu_features = CPU_FTRS_POWER4, 141 .cpu_user_features = COMMON_USER_POWER4, 142 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA, 143 .icache_bsize = 128, 144 .dcache_bsize = 128, 145 .num_pmcs = 8, 146 .pmc_type = PPC_PMC_IBM, 147 .oprofile_cpu_type = "ppc64/power4", 148 .oprofile_type = PPC_OPROFILE_POWER4, 149 .platform = "power4", 150 }, 151 { /* Power4+ */ 152 .pvr_mask = 0xffff0000, 153 .pvr_value = 0x00380000, 154 .cpu_name = "POWER4+ (gq)", 155 .cpu_features = CPU_FTRS_POWER4, 156 .cpu_user_features = COMMON_USER_POWER4, 157 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA, 158 .icache_bsize = 128, 159 .dcache_bsize = 128, 160 .num_pmcs = 8, 161 .pmc_type = PPC_PMC_IBM, 162 .oprofile_cpu_type = "ppc64/power4", 163 .oprofile_type = PPC_OPROFILE_POWER4, 164 .platform = "power4", 165 }, 166 { /* PPC970 */ 167 .pvr_mask = 0xffff0000, 168 .pvr_value = 0x00390000, 169 .cpu_name = "PPC970", 170 .cpu_features = CPU_FTRS_PPC970, 171 .cpu_user_features = COMMON_USER_POWER4 | 172 PPC_FEATURE_HAS_ALTIVEC_COMP, 173 .mmu_features = MMU_FTRS_PPC970, 174 .icache_bsize = 128, 175 .dcache_bsize = 128, 176 .num_pmcs = 8, 177 .pmc_type = PPC_PMC_IBM, 178 .cpu_setup = __setup_cpu_ppc970, 179 .cpu_restore = __restore_cpu_ppc970, 180 .oprofile_cpu_type = "ppc64/970", 181 .oprofile_type = PPC_OPROFILE_POWER4, 182 .platform = "ppc970", 183 }, 184 { /* PPC970FX */ 185 .pvr_mask = 0xffff0000, 186 .pvr_value = 0x003c0000, 187 .cpu_name = "PPC970FX", 188 .cpu_features = CPU_FTRS_PPC970, 189 .cpu_user_features = COMMON_USER_POWER4 | 190 PPC_FEATURE_HAS_ALTIVEC_COMP, 191 .mmu_features = MMU_FTRS_PPC970, 192 .icache_bsize = 128, 193 .dcache_bsize = 128, 194 .num_pmcs = 8, 195 .pmc_type = PPC_PMC_IBM, 196 .cpu_setup = __setup_cpu_ppc970, 197 .cpu_restore = __restore_cpu_ppc970, 198 .oprofile_cpu_type = "ppc64/970", 199 .oprofile_type = PPC_OPROFILE_POWER4, 200 .platform = "ppc970", 201 }, 202 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 203 .pvr_mask = 0xffffffff, 204 .pvr_value = 0x00440100, 205 .cpu_name = "PPC970MP", 206 .cpu_features = CPU_FTRS_PPC970, 207 .cpu_user_features = COMMON_USER_POWER4 | 208 PPC_FEATURE_HAS_ALTIVEC_COMP, 209 .mmu_features = MMU_FTRS_PPC970, 210 .icache_bsize = 128, 211 .dcache_bsize = 128, 212 .num_pmcs = 8, 213 .pmc_type = PPC_PMC_IBM, 214 .cpu_setup = __setup_cpu_ppc970, 215 .cpu_restore = __restore_cpu_ppc970, 216 .oprofile_cpu_type = "ppc64/970MP", 217 .oprofile_type = PPC_OPROFILE_POWER4, 218 .platform = "ppc970", 219 }, 220 { /* PPC970MP */ 221 .pvr_mask = 0xffff0000, 222 .pvr_value = 0x00440000, 223 .cpu_name = "PPC970MP", 224 .cpu_features = CPU_FTRS_PPC970, 225 .cpu_user_features = COMMON_USER_POWER4 | 226 PPC_FEATURE_HAS_ALTIVEC_COMP, 227 .mmu_features = MMU_FTRS_PPC970, 228 .icache_bsize = 128, 229 .dcache_bsize = 128, 230 .num_pmcs = 8, 231 .pmc_type = PPC_PMC_IBM, 232 .cpu_setup = __setup_cpu_ppc970MP, 233 .cpu_restore = __restore_cpu_ppc970, 234 .oprofile_cpu_type = "ppc64/970MP", 235 .oprofile_type = PPC_OPROFILE_POWER4, 236 .platform = "ppc970", 237 }, 238 { /* PPC970GX */ 239 .pvr_mask = 0xffff0000, 240 .pvr_value = 0x00450000, 241 .cpu_name = "PPC970GX", 242 .cpu_features = CPU_FTRS_PPC970, 243 .cpu_user_features = COMMON_USER_POWER4 | 244 PPC_FEATURE_HAS_ALTIVEC_COMP, 245 .mmu_features = MMU_FTRS_PPC970, 246 .icache_bsize = 128, 247 .dcache_bsize = 128, 248 .num_pmcs = 8, 249 .pmc_type = PPC_PMC_IBM, 250 .cpu_setup = __setup_cpu_ppc970, 251 .oprofile_cpu_type = "ppc64/970", 252 .oprofile_type = PPC_OPROFILE_POWER4, 253 .platform = "ppc970", 254 }, 255 { /* Power5 GR */ 256 .pvr_mask = 0xffff0000, 257 .pvr_value = 0x003a0000, 258 .cpu_name = "POWER5 (gr)", 259 .cpu_features = CPU_FTRS_POWER5, 260 .cpu_user_features = COMMON_USER_POWER5, 261 .mmu_features = MMU_FTRS_POWER5, 262 .icache_bsize = 128, 263 .dcache_bsize = 128, 264 .num_pmcs = 6, 265 .pmc_type = PPC_PMC_IBM, 266 .oprofile_cpu_type = "ppc64/power5", 267 .oprofile_type = PPC_OPROFILE_POWER4, 268 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 269 * and above but only works on POWER5 and above 270 */ 271 .oprofile_mmcra_sihv = MMCRA_SIHV, 272 .oprofile_mmcra_sipr = MMCRA_SIPR, 273 .platform = "power5", 274 }, 275 { /* Power5++ */ 276 .pvr_mask = 0xffffff00, 277 .pvr_value = 0x003b0300, 278 .cpu_name = "POWER5+ (gs)", 279 .cpu_features = CPU_FTRS_POWER5, 280 .cpu_user_features = COMMON_USER_POWER5_PLUS, 281 .mmu_features = MMU_FTRS_POWER5, 282 .icache_bsize = 128, 283 .dcache_bsize = 128, 284 .num_pmcs = 6, 285 .oprofile_cpu_type = "ppc64/power5++", 286 .oprofile_type = PPC_OPROFILE_POWER4, 287 .oprofile_mmcra_sihv = MMCRA_SIHV, 288 .oprofile_mmcra_sipr = MMCRA_SIPR, 289 .platform = "power5+", 290 }, 291 { /* Power5 GS */ 292 .pvr_mask = 0xffff0000, 293 .pvr_value = 0x003b0000, 294 .cpu_name = "POWER5+ (gs)", 295 .cpu_features = CPU_FTRS_POWER5, 296 .cpu_user_features = COMMON_USER_POWER5_PLUS, 297 .mmu_features = MMU_FTRS_POWER5, 298 .icache_bsize = 128, 299 .dcache_bsize = 128, 300 .num_pmcs = 6, 301 .pmc_type = PPC_PMC_IBM, 302 .oprofile_cpu_type = "ppc64/power5+", 303 .oprofile_type = PPC_OPROFILE_POWER4, 304 .oprofile_mmcra_sihv = MMCRA_SIHV, 305 .oprofile_mmcra_sipr = MMCRA_SIPR, 306 .platform = "power5+", 307 }, 308 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 309 .pvr_mask = 0xffffffff, 310 .pvr_value = 0x0f000001, 311 .cpu_name = "POWER5+", 312 .cpu_features = CPU_FTRS_POWER5, 313 .cpu_user_features = COMMON_USER_POWER5_PLUS, 314 .mmu_features = MMU_FTRS_POWER5, 315 .icache_bsize = 128, 316 .dcache_bsize = 128, 317 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 318 .oprofile_type = PPC_OPROFILE_POWER4, 319 .platform = "power5+", 320 }, 321 { /* Power6 */ 322 .pvr_mask = 0xffff0000, 323 .pvr_value = 0x003e0000, 324 .cpu_name = "POWER6 (raw)", 325 .cpu_features = CPU_FTRS_POWER6, 326 .cpu_user_features = COMMON_USER_POWER6 | 327 PPC_FEATURE_POWER6_EXT, 328 .mmu_features = MMU_FTRS_POWER6, 329 .icache_bsize = 128, 330 .dcache_bsize = 128, 331 .num_pmcs = 6, 332 .pmc_type = PPC_PMC_IBM, 333 .oprofile_cpu_type = "ppc64/power6", 334 .oprofile_type = PPC_OPROFILE_POWER4, 335 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 336 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 337 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 338 POWER6_MMCRA_OTHER, 339 .platform = "power6x", 340 }, 341 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 342 .pvr_mask = 0xffffffff, 343 .pvr_value = 0x0f000002, 344 .cpu_name = "POWER6 (architected)", 345 .cpu_features = CPU_FTRS_POWER6, 346 .cpu_user_features = COMMON_USER_POWER6, 347 .mmu_features = MMU_FTRS_POWER6, 348 .icache_bsize = 128, 349 .dcache_bsize = 128, 350 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 351 .oprofile_type = PPC_OPROFILE_POWER4, 352 .platform = "power6", 353 }, 354 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 355 .pvr_mask = 0xffffffff, 356 .pvr_value = 0x0f000003, 357 .cpu_name = "POWER7 (architected)", 358 .cpu_features = CPU_FTRS_POWER7, 359 .cpu_user_features = COMMON_USER_POWER7, 360 .cpu_user_features2 = COMMON_USER2_POWER7, 361 .mmu_features = MMU_FTRS_POWER7, 362 .icache_bsize = 128, 363 .dcache_bsize = 128, 364 .oprofile_type = PPC_OPROFILE_POWER4, 365 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 366 .cpu_setup = __setup_cpu_power7, 367 .cpu_restore = __restore_cpu_power7, 368 .machine_check_early = __machine_check_early_realmode_p7, 369 .platform = "power7", 370 }, 371 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 372 .pvr_mask = 0xffffffff, 373 .pvr_value = 0x0f000004, 374 .cpu_name = "POWER8 (architected)", 375 .cpu_features = CPU_FTRS_POWER8, 376 .cpu_user_features = COMMON_USER_POWER8, 377 .cpu_user_features2 = COMMON_USER2_POWER8, 378 .mmu_features = MMU_FTRS_POWER8, 379 .icache_bsize = 128, 380 .dcache_bsize = 128, 381 .oprofile_type = PPC_OPROFILE_INVALID, 382 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 383 .cpu_setup = __setup_cpu_power8, 384 .cpu_restore = __restore_cpu_power8, 385 .machine_check_early = __machine_check_early_realmode_p8, 386 .platform = "power8", 387 }, 388 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 389 .pvr_mask = 0xffffffff, 390 .pvr_value = 0x0f000005, 391 .cpu_name = "POWER9 (architected)", 392 .cpu_features = CPU_FTRS_POWER9, 393 .cpu_user_features = COMMON_USER_POWER9, 394 .cpu_user_features2 = COMMON_USER2_POWER9, 395 .mmu_features = MMU_FTRS_POWER9, 396 .icache_bsize = 128, 397 .dcache_bsize = 128, 398 .oprofile_type = PPC_OPROFILE_INVALID, 399 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 400 .cpu_setup = __setup_cpu_power9, 401 .cpu_restore = __restore_cpu_power9, 402 .platform = "power9", 403 }, 404 { /* Power7 */ 405 .pvr_mask = 0xffff0000, 406 .pvr_value = 0x003f0000, 407 .cpu_name = "POWER7 (raw)", 408 .cpu_features = CPU_FTRS_POWER7, 409 .cpu_user_features = COMMON_USER_POWER7, 410 .cpu_user_features2 = COMMON_USER2_POWER7, 411 .mmu_features = MMU_FTRS_POWER7, 412 .icache_bsize = 128, 413 .dcache_bsize = 128, 414 .num_pmcs = 6, 415 .pmc_type = PPC_PMC_IBM, 416 .oprofile_cpu_type = "ppc64/power7", 417 .oprofile_type = PPC_OPROFILE_POWER4, 418 .cpu_setup = __setup_cpu_power7, 419 .cpu_restore = __restore_cpu_power7, 420 .machine_check_early = __machine_check_early_realmode_p7, 421 .platform = "power7", 422 }, 423 { /* Power7+ */ 424 .pvr_mask = 0xffff0000, 425 .pvr_value = 0x004A0000, 426 .cpu_name = "POWER7+ (raw)", 427 .cpu_features = CPU_FTRS_POWER7, 428 .cpu_user_features = COMMON_USER_POWER7, 429 .cpu_user_features2 = COMMON_USER2_POWER7, 430 .mmu_features = MMU_FTRS_POWER7, 431 .icache_bsize = 128, 432 .dcache_bsize = 128, 433 .num_pmcs = 6, 434 .pmc_type = PPC_PMC_IBM, 435 .oprofile_cpu_type = "ppc64/power7", 436 .oprofile_type = PPC_OPROFILE_POWER4, 437 .cpu_setup = __setup_cpu_power7, 438 .cpu_restore = __restore_cpu_power7, 439 .machine_check_early = __machine_check_early_realmode_p7, 440 .platform = "power7+", 441 }, 442 { /* Power8E */ 443 .pvr_mask = 0xffff0000, 444 .pvr_value = 0x004b0000, 445 .cpu_name = "POWER8E (raw)", 446 .cpu_features = CPU_FTRS_POWER8E, 447 .cpu_user_features = COMMON_USER_POWER8, 448 .cpu_user_features2 = COMMON_USER2_POWER8, 449 .mmu_features = MMU_FTRS_POWER8, 450 .icache_bsize = 128, 451 .dcache_bsize = 128, 452 .num_pmcs = 6, 453 .pmc_type = PPC_PMC_IBM, 454 .oprofile_cpu_type = "ppc64/power8", 455 .oprofile_type = PPC_OPROFILE_INVALID, 456 .cpu_setup = __setup_cpu_power8, 457 .cpu_restore = __restore_cpu_power8, 458 .machine_check_early = __machine_check_early_realmode_p8, 459 .platform = "power8", 460 }, 461 { /* Power8NVL */ 462 .pvr_mask = 0xffff0000, 463 .pvr_value = 0x004c0000, 464 .cpu_name = "POWER8NVL (raw)", 465 .cpu_features = CPU_FTRS_POWER8, 466 .cpu_user_features = COMMON_USER_POWER8, 467 .cpu_user_features2 = COMMON_USER2_POWER8, 468 .mmu_features = MMU_FTRS_POWER8, 469 .icache_bsize = 128, 470 .dcache_bsize = 128, 471 .num_pmcs = 6, 472 .pmc_type = PPC_PMC_IBM, 473 .oprofile_cpu_type = "ppc64/power8", 474 .oprofile_type = PPC_OPROFILE_INVALID, 475 .cpu_setup = __setup_cpu_power8, 476 .cpu_restore = __restore_cpu_power8, 477 .machine_check_early = __machine_check_early_realmode_p8, 478 .platform = "power8", 479 }, 480 { /* Power8 DD1: Does not support doorbell IPIs */ 481 .pvr_mask = 0xffffff00, 482 .pvr_value = 0x004d0100, 483 .cpu_name = "POWER8 (raw)", 484 .cpu_features = CPU_FTRS_POWER8_DD1, 485 .cpu_user_features = COMMON_USER_POWER8, 486 .cpu_user_features2 = COMMON_USER2_POWER8, 487 .mmu_features = MMU_FTRS_POWER8, 488 .icache_bsize = 128, 489 .dcache_bsize = 128, 490 .num_pmcs = 6, 491 .pmc_type = PPC_PMC_IBM, 492 .oprofile_cpu_type = "ppc64/power8", 493 .oprofile_type = PPC_OPROFILE_INVALID, 494 .cpu_setup = __setup_cpu_power8, 495 .cpu_restore = __restore_cpu_power8, 496 .machine_check_early = __machine_check_early_realmode_p8, 497 .platform = "power8", 498 }, 499 { /* Power8 */ 500 .pvr_mask = 0xffff0000, 501 .pvr_value = 0x004d0000, 502 .cpu_name = "POWER8 (raw)", 503 .cpu_features = CPU_FTRS_POWER8, 504 .cpu_user_features = COMMON_USER_POWER8, 505 .cpu_user_features2 = COMMON_USER2_POWER8, 506 .mmu_features = MMU_FTRS_POWER8, 507 .icache_bsize = 128, 508 .dcache_bsize = 128, 509 .num_pmcs = 6, 510 .pmc_type = PPC_PMC_IBM, 511 .oprofile_cpu_type = "ppc64/power8", 512 .oprofile_type = PPC_OPROFILE_INVALID, 513 .cpu_setup = __setup_cpu_power8, 514 .cpu_restore = __restore_cpu_power8, 515 .machine_check_early = __machine_check_early_realmode_p8, 516 .platform = "power8", 517 }, 518 { /* Power9 DD1*/ 519 .pvr_mask = 0xffffff00, 520 .pvr_value = 0x004e0100, 521 .cpu_name = "POWER9 (raw)", 522 .cpu_features = CPU_FTRS_POWER9_DD1, 523 .cpu_user_features = COMMON_USER_POWER9, 524 .cpu_user_features2 = COMMON_USER2_POWER9, 525 .mmu_features = MMU_FTRS_POWER9, 526 .icache_bsize = 128, 527 .dcache_bsize = 128, 528 .num_pmcs = 6, 529 .pmc_type = PPC_PMC_IBM, 530 .oprofile_cpu_type = "ppc64/power9", 531 .oprofile_type = PPC_OPROFILE_INVALID, 532 .cpu_setup = __setup_cpu_power9, 533 .cpu_restore = __restore_cpu_power9, 534 .machine_check_early = __machine_check_early_realmode_p9, 535 .platform = "power9", 536 }, 537 { /* Power9 DD2.0 */ 538 .pvr_mask = 0xffffefff, 539 .pvr_value = 0x004e0200, 540 .cpu_name = "POWER9 (raw)", 541 .cpu_features = CPU_FTRS_POWER9_DD2_0, 542 .cpu_user_features = COMMON_USER_POWER9, 543 .cpu_user_features2 = COMMON_USER2_POWER9, 544 .mmu_features = MMU_FTRS_POWER9, 545 .icache_bsize = 128, 546 .dcache_bsize = 128, 547 .num_pmcs = 6, 548 .pmc_type = PPC_PMC_IBM, 549 .oprofile_cpu_type = "ppc64/power9", 550 .oprofile_type = PPC_OPROFILE_INVALID, 551 .cpu_setup = __setup_cpu_power9, 552 .cpu_restore = __restore_cpu_power9, 553 .machine_check_early = __machine_check_early_realmode_p9, 554 .platform = "power9", 555 }, 556 { /* Power9 DD 2.1 or later (see DD2.0 above) */ 557 .pvr_mask = 0xffff0000, 558 .pvr_value = 0x004e0000, 559 .cpu_name = "POWER9 (raw)", 560 .cpu_features = CPU_FTRS_POWER9_DD2_1, 561 .cpu_user_features = COMMON_USER_POWER9, 562 .cpu_user_features2 = COMMON_USER2_POWER9, 563 .mmu_features = MMU_FTRS_POWER9, 564 .icache_bsize = 128, 565 .dcache_bsize = 128, 566 .num_pmcs = 6, 567 .pmc_type = PPC_PMC_IBM, 568 .oprofile_cpu_type = "ppc64/power9", 569 .oprofile_type = PPC_OPROFILE_INVALID, 570 .cpu_setup = __setup_cpu_power9, 571 .cpu_restore = __restore_cpu_power9, 572 .machine_check_early = __machine_check_early_realmode_p9, 573 .platform = "power9", 574 }, 575 { /* Cell Broadband Engine */ 576 .pvr_mask = 0xffff0000, 577 .pvr_value = 0x00700000, 578 .cpu_name = "Cell Broadband Engine", 579 .cpu_features = CPU_FTRS_CELL, 580 .cpu_user_features = COMMON_USER_PPC64 | 581 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 582 PPC_FEATURE_SMT, 583 .mmu_features = MMU_FTRS_CELL, 584 .icache_bsize = 128, 585 .dcache_bsize = 128, 586 .num_pmcs = 4, 587 .pmc_type = PPC_PMC_IBM, 588 .oprofile_cpu_type = "ppc64/cell-be", 589 .oprofile_type = PPC_OPROFILE_CELL, 590 .platform = "ppc-cell-be", 591 }, 592 { /* PA Semi PA6T */ 593 .pvr_mask = 0x7fff0000, 594 .pvr_value = 0x00900000, 595 .cpu_name = "PA6T", 596 .cpu_features = CPU_FTRS_PA6T, 597 .cpu_user_features = COMMON_USER_PA6T, 598 .mmu_features = MMU_FTRS_PA6T, 599 .icache_bsize = 64, 600 .dcache_bsize = 64, 601 .num_pmcs = 6, 602 .pmc_type = PPC_PMC_PA6T, 603 .cpu_setup = __setup_cpu_pa6t, 604 .cpu_restore = __restore_cpu_pa6t, 605 .oprofile_cpu_type = "ppc64/pa6t", 606 .oprofile_type = PPC_OPROFILE_PA6T, 607 .platform = "pa6t", 608 }, 609 { /* default match */ 610 .pvr_mask = 0x00000000, 611 .pvr_value = 0x00000000, 612 .cpu_name = "POWER4 (compatible)", 613 .cpu_features = CPU_FTRS_COMPATIBLE, 614 .cpu_user_features = COMMON_USER_PPC64, 615 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2, 616 .icache_bsize = 128, 617 .dcache_bsize = 128, 618 .num_pmcs = 6, 619 .pmc_type = PPC_PMC_IBM, 620 .platform = "power4", 621 } 622 #endif /* CONFIG_PPC_BOOK3S_64 */ 623 624 #ifdef CONFIG_PPC32 625 #ifdef CONFIG_PPC_BOOK3S_32 626 { /* 601 */ 627 .pvr_mask = 0xffff0000, 628 .pvr_value = 0x00010000, 629 .cpu_name = "601", 630 .cpu_features = CPU_FTRS_PPC601, 631 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 632 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 633 .mmu_features = MMU_FTR_HPTE_TABLE, 634 .icache_bsize = 32, 635 .dcache_bsize = 32, 636 .machine_check = machine_check_generic, 637 .platform = "ppc601", 638 }, 639 { /* 603 */ 640 .pvr_mask = 0xffff0000, 641 .pvr_value = 0x00030000, 642 .cpu_name = "603", 643 .cpu_features = CPU_FTRS_603, 644 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 645 .mmu_features = 0, 646 .icache_bsize = 32, 647 .dcache_bsize = 32, 648 .cpu_setup = __setup_cpu_603, 649 .machine_check = machine_check_generic, 650 .platform = "ppc603", 651 }, 652 { /* 603e */ 653 .pvr_mask = 0xffff0000, 654 .pvr_value = 0x00060000, 655 .cpu_name = "603e", 656 .cpu_features = CPU_FTRS_603, 657 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 658 .mmu_features = 0, 659 .icache_bsize = 32, 660 .dcache_bsize = 32, 661 .cpu_setup = __setup_cpu_603, 662 .machine_check = machine_check_generic, 663 .platform = "ppc603", 664 }, 665 { /* 603ev */ 666 .pvr_mask = 0xffff0000, 667 .pvr_value = 0x00070000, 668 .cpu_name = "603ev", 669 .cpu_features = CPU_FTRS_603, 670 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 671 .mmu_features = 0, 672 .icache_bsize = 32, 673 .dcache_bsize = 32, 674 .cpu_setup = __setup_cpu_603, 675 .machine_check = machine_check_generic, 676 .platform = "ppc603", 677 }, 678 { /* 604 */ 679 .pvr_mask = 0xffff0000, 680 .pvr_value = 0x00040000, 681 .cpu_name = "604", 682 .cpu_features = CPU_FTRS_604, 683 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 684 .mmu_features = MMU_FTR_HPTE_TABLE, 685 .icache_bsize = 32, 686 .dcache_bsize = 32, 687 .num_pmcs = 2, 688 .cpu_setup = __setup_cpu_604, 689 .machine_check = machine_check_generic, 690 .platform = "ppc604", 691 }, 692 { /* 604e */ 693 .pvr_mask = 0xfffff000, 694 .pvr_value = 0x00090000, 695 .cpu_name = "604e", 696 .cpu_features = CPU_FTRS_604, 697 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 698 .mmu_features = MMU_FTR_HPTE_TABLE, 699 .icache_bsize = 32, 700 .dcache_bsize = 32, 701 .num_pmcs = 4, 702 .cpu_setup = __setup_cpu_604, 703 .machine_check = machine_check_generic, 704 .platform = "ppc604", 705 }, 706 { /* 604r */ 707 .pvr_mask = 0xffff0000, 708 .pvr_value = 0x00090000, 709 .cpu_name = "604r", 710 .cpu_features = CPU_FTRS_604, 711 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 712 .mmu_features = MMU_FTR_HPTE_TABLE, 713 .icache_bsize = 32, 714 .dcache_bsize = 32, 715 .num_pmcs = 4, 716 .cpu_setup = __setup_cpu_604, 717 .machine_check = machine_check_generic, 718 .platform = "ppc604", 719 }, 720 { /* 604ev */ 721 .pvr_mask = 0xffff0000, 722 .pvr_value = 0x000a0000, 723 .cpu_name = "604ev", 724 .cpu_features = CPU_FTRS_604, 725 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 726 .mmu_features = MMU_FTR_HPTE_TABLE, 727 .icache_bsize = 32, 728 .dcache_bsize = 32, 729 .num_pmcs = 4, 730 .cpu_setup = __setup_cpu_604, 731 .machine_check = machine_check_generic, 732 .platform = "ppc604", 733 }, 734 { /* 740/750 (0x4202, don't support TAU ?) */ 735 .pvr_mask = 0xffffffff, 736 .pvr_value = 0x00084202, 737 .cpu_name = "740/750", 738 .cpu_features = CPU_FTRS_740_NOTAU, 739 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 740 .mmu_features = MMU_FTR_HPTE_TABLE, 741 .icache_bsize = 32, 742 .dcache_bsize = 32, 743 .num_pmcs = 4, 744 .cpu_setup = __setup_cpu_750, 745 .machine_check = machine_check_generic, 746 .platform = "ppc750", 747 }, 748 { /* 750CX (80100 and 8010x?) */ 749 .pvr_mask = 0xfffffff0, 750 .pvr_value = 0x00080100, 751 .cpu_name = "750CX", 752 .cpu_features = CPU_FTRS_750, 753 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 754 .mmu_features = MMU_FTR_HPTE_TABLE, 755 .icache_bsize = 32, 756 .dcache_bsize = 32, 757 .num_pmcs = 4, 758 .cpu_setup = __setup_cpu_750cx, 759 .machine_check = machine_check_generic, 760 .platform = "ppc750", 761 }, 762 { /* 750CX (82201 and 82202) */ 763 .pvr_mask = 0xfffffff0, 764 .pvr_value = 0x00082200, 765 .cpu_name = "750CX", 766 .cpu_features = CPU_FTRS_750, 767 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 768 .mmu_features = MMU_FTR_HPTE_TABLE, 769 .icache_bsize = 32, 770 .dcache_bsize = 32, 771 .num_pmcs = 4, 772 .pmc_type = PPC_PMC_IBM, 773 .cpu_setup = __setup_cpu_750cx, 774 .machine_check = machine_check_generic, 775 .platform = "ppc750", 776 }, 777 { /* 750CXe (82214) */ 778 .pvr_mask = 0xfffffff0, 779 .pvr_value = 0x00082210, 780 .cpu_name = "750CXe", 781 .cpu_features = CPU_FTRS_750, 782 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 783 .mmu_features = MMU_FTR_HPTE_TABLE, 784 .icache_bsize = 32, 785 .dcache_bsize = 32, 786 .num_pmcs = 4, 787 .pmc_type = PPC_PMC_IBM, 788 .cpu_setup = __setup_cpu_750cx, 789 .machine_check = machine_check_generic, 790 .platform = "ppc750", 791 }, 792 { /* 750CXe "Gekko" (83214) */ 793 .pvr_mask = 0xffffffff, 794 .pvr_value = 0x00083214, 795 .cpu_name = "750CXe", 796 .cpu_features = CPU_FTRS_750, 797 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 798 .mmu_features = MMU_FTR_HPTE_TABLE, 799 .icache_bsize = 32, 800 .dcache_bsize = 32, 801 .num_pmcs = 4, 802 .pmc_type = PPC_PMC_IBM, 803 .cpu_setup = __setup_cpu_750cx, 804 .machine_check = machine_check_generic, 805 .platform = "ppc750", 806 }, 807 { /* 750CL (and "Broadway") */ 808 .pvr_mask = 0xfffff0e0, 809 .pvr_value = 0x00087000, 810 .cpu_name = "750CL", 811 .cpu_features = CPU_FTRS_750CL, 812 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 813 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 814 .icache_bsize = 32, 815 .dcache_bsize = 32, 816 .num_pmcs = 4, 817 .pmc_type = PPC_PMC_IBM, 818 .cpu_setup = __setup_cpu_750, 819 .machine_check = machine_check_generic, 820 .platform = "ppc750", 821 .oprofile_cpu_type = "ppc/750", 822 .oprofile_type = PPC_OPROFILE_G4, 823 }, 824 { /* 745/755 */ 825 .pvr_mask = 0xfffff000, 826 .pvr_value = 0x00083000, 827 .cpu_name = "745/755", 828 .cpu_features = CPU_FTRS_750, 829 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 830 .mmu_features = MMU_FTR_HPTE_TABLE, 831 .icache_bsize = 32, 832 .dcache_bsize = 32, 833 .num_pmcs = 4, 834 .pmc_type = PPC_PMC_IBM, 835 .cpu_setup = __setup_cpu_750, 836 .machine_check = machine_check_generic, 837 .platform = "ppc750", 838 }, 839 { /* 750FX rev 1.x */ 840 .pvr_mask = 0xffffff00, 841 .pvr_value = 0x70000100, 842 .cpu_name = "750FX", 843 .cpu_features = CPU_FTRS_750FX1, 844 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 845 .mmu_features = MMU_FTR_HPTE_TABLE, 846 .icache_bsize = 32, 847 .dcache_bsize = 32, 848 .num_pmcs = 4, 849 .pmc_type = PPC_PMC_IBM, 850 .cpu_setup = __setup_cpu_750, 851 .machine_check = machine_check_generic, 852 .platform = "ppc750", 853 .oprofile_cpu_type = "ppc/750", 854 .oprofile_type = PPC_OPROFILE_G4, 855 }, 856 { /* 750FX rev 2.0 must disable HID0[DPM] */ 857 .pvr_mask = 0xffffffff, 858 .pvr_value = 0x70000200, 859 .cpu_name = "750FX", 860 .cpu_features = CPU_FTRS_750FX2, 861 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 862 .mmu_features = MMU_FTR_HPTE_TABLE, 863 .icache_bsize = 32, 864 .dcache_bsize = 32, 865 .num_pmcs = 4, 866 .pmc_type = PPC_PMC_IBM, 867 .cpu_setup = __setup_cpu_750, 868 .machine_check = machine_check_generic, 869 .platform = "ppc750", 870 .oprofile_cpu_type = "ppc/750", 871 .oprofile_type = PPC_OPROFILE_G4, 872 }, 873 { /* 750FX (All revs except 2.0) */ 874 .pvr_mask = 0xffff0000, 875 .pvr_value = 0x70000000, 876 .cpu_name = "750FX", 877 .cpu_features = CPU_FTRS_750FX, 878 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 879 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 880 .icache_bsize = 32, 881 .dcache_bsize = 32, 882 .num_pmcs = 4, 883 .pmc_type = PPC_PMC_IBM, 884 .cpu_setup = __setup_cpu_750fx, 885 .machine_check = machine_check_generic, 886 .platform = "ppc750", 887 .oprofile_cpu_type = "ppc/750", 888 .oprofile_type = PPC_OPROFILE_G4, 889 }, 890 { /* 750GX */ 891 .pvr_mask = 0xffff0000, 892 .pvr_value = 0x70020000, 893 .cpu_name = "750GX", 894 .cpu_features = CPU_FTRS_750GX, 895 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 896 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 897 .icache_bsize = 32, 898 .dcache_bsize = 32, 899 .num_pmcs = 4, 900 .pmc_type = PPC_PMC_IBM, 901 .cpu_setup = __setup_cpu_750fx, 902 .machine_check = machine_check_generic, 903 .platform = "ppc750", 904 .oprofile_cpu_type = "ppc/750", 905 .oprofile_type = PPC_OPROFILE_G4, 906 }, 907 { /* 740/750 (L2CR bit need fixup for 740) */ 908 .pvr_mask = 0xffff0000, 909 .pvr_value = 0x00080000, 910 .cpu_name = "740/750", 911 .cpu_features = CPU_FTRS_740, 912 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 913 .mmu_features = MMU_FTR_HPTE_TABLE, 914 .icache_bsize = 32, 915 .dcache_bsize = 32, 916 .num_pmcs = 4, 917 .pmc_type = PPC_PMC_IBM, 918 .cpu_setup = __setup_cpu_750, 919 .machine_check = machine_check_generic, 920 .platform = "ppc750", 921 }, 922 { /* 7400 rev 1.1 ? (no TAU) */ 923 .pvr_mask = 0xffffffff, 924 .pvr_value = 0x000c1101, 925 .cpu_name = "7400 (1.1)", 926 .cpu_features = CPU_FTRS_7400_NOTAU, 927 .cpu_user_features = COMMON_USER | 928 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 929 .mmu_features = MMU_FTR_HPTE_TABLE, 930 .icache_bsize = 32, 931 .dcache_bsize = 32, 932 .num_pmcs = 4, 933 .pmc_type = PPC_PMC_G4, 934 .cpu_setup = __setup_cpu_7400, 935 .machine_check = machine_check_generic, 936 .platform = "ppc7400", 937 }, 938 { /* 7400 */ 939 .pvr_mask = 0xffff0000, 940 .pvr_value = 0x000c0000, 941 .cpu_name = "7400", 942 .cpu_features = CPU_FTRS_7400, 943 .cpu_user_features = COMMON_USER | 944 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 945 .mmu_features = MMU_FTR_HPTE_TABLE, 946 .icache_bsize = 32, 947 .dcache_bsize = 32, 948 .num_pmcs = 4, 949 .pmc_type = PPC_PMC_G4, 950 .cpu_setup = __setup_cpu_7400, 951 .machine_check = machine_check_generic, 952 .platform = "ppc7400", 953 }, 954 { /* 7410 */ 955 .pvr_mask = 0xffff0000, 956 .pvr_value = 0x800c0000, 957 .cpu_name = "7410", 958 .cpu_features = CPU_FTRS_7400, 959 .cpu_user_features = COMMON_USER | 960 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 961 .mmu_features = MMU_FTR_HPTE_TABLE, 962 .icache_bsize = 32, 963 .dcache_bsize = 32, 964 .num_pmcs = 4, 965 .pmc_type = PPC_PMC_G4, 966 .cpu_setup = __setup_cpu_7410, 967 .machine_check = machine_check_generic, 968 .platform = "ppc7400", 969 }, 970 { /* 7450 2.0 - no doze/nap */ 971 .pvr_mask = 0xffffffff, 972 .pvr_value = 0x80000200, 973 .cpu_name = "7450", 974 .cpu_features = CPU_FTRS_7450_20, 975 .cpu_user_features = COMMON_USER | 976 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 977 .mmu_features = MMU_FTR_HPTE_TABLE, 978 .icache_bsize = 32, 979 .dcache_bsize = 32, 980 .num_pmcs = 6, 981 .pmc_type = PPC_PMC_G4, 982 .cpu_setup = __setup_cpu_745x, 983 .oprofile_cpu_type = "ppc/7450", 984 .oprofile_type = PPC_OPROFILE_G4, 985 .machine_check = machine_check_generic, 986 .platform = "ppc7450", 987 }, 988 { /* 7450 2.1 */ 989 .pvr_mask = 0xffffffff, 990 .pvr_value = 0x80000201, 991 .cpu_name = "7450", 992 .cpu_features = CPU_FTRS_7450_21, 993 .cpu_user_features = COMMON_USER | 994 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 995 .mmu_features = MMU_FTR_HPTE_TABLE, 996 .icache_bsize = 32, 997 .dcache_bsize = 32, 998 .num_pmcs = 6, 999 .pmc_type = PPC_PMC_G4, 1000 .cpu_setup = __setup_cpu_745x, 1001 .oprofile_cpu_type = "ppc/7450", 1002 .oprofile_type = PPC_OPROFILE_G4, 1003 .machine_check = machine_check_generic, 1004 .platform = "ppc7450", 1005 }, 1006 { /* 7450 2.3 and newer */ 1007 .pvr_mask = 0xffff0000, 1008 .pvr_value = 0x80000000, 1009 .cpu_name = "7450", 1010 .cpu_features = CPU_FTRS_7450_23, 1011 .cpu_user_features = COMMON_USER | 1012 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1013 .mmu_features = MMU_FTR_HPTE_TABLE, 1014 .icache_bsize = 32, 1015 .dcache_bsize = 32, 1016 .num_pmcs = 6, 1017 .pmc_type = PPC_PMC_G4, 1018 .cpu_setup = __setup_cpu_745x, 1019 .oprofile_cpu_type = "ppc/7450", 1020 .oprofile_type = PPC_OPROFILE_G4, 1021 .machine_check = machine_check_generic, 1022 .platform = "ppc7450", 1023 }, 1024 { /* 7455 rev 1.x */ 1025 .pvr_mask = 0xffffff00, 1026 .pvr_value = 0x80010100, 1027 .cpu_name = "7455", 1028 .cpu_features = CPU_FTRS_7455_1, 1029 .cpu_user_features = COMMON_USER | 1030 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1031 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1032 .icache_bsize = 32, 1033 .dcache_bsize = 32, 1034 .num_pmcs = 6, 1035 .pmc_type = PPC_PMC_G4, 1036 .cpu_setup = __setup_cpu_745x, 1037 .oprofile_cpu_type = "ppc/7450", 1038 .oprofile_type = PPC_OPROFILE_G4, 1039 .machine_check = machine_check_generic, 1040 .platform = "ppc7450", 1041 }, 1042 { /* 7455 rev 2.0 */ 1043 .pvr_mask = 0xffffffff, 1044 .pvr_value = 0x80010200, 1045 .cpu_name = "7455", 1046 .cpu_features = CPU_FTRS_7455_20, 1047 .cpu_user_features = COMMON_USER | 1048 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1049 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1050 .icache_bsize = 32, 1051 .dcache_bsize = 32, 1052 .num_pmcs = 6, 1053 .pmc_type = PPC_PMC_G4, 1054 .cpu_setup = __setup_cpu_745x, 1055 .oprofile_cpu_type = "ppc/7450", 1056 .oprofile_type = PPC_OPROFILE_G4, 1057 .machine_check = machine_check_generic, 1058 .platform = "ppc7450", 1059 }, 1060 { /* 7455 others */ 1061 .pvr_mask = 0xffff0000, 1062 .pvr_value = 0x80010000, 1063 .cpu_name = "7455", 1064 .cpu_features = CPU_FTRS_7455, 1065 .cpu_user_features = COMMON_USER | 1066 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1067 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1068 .icache_bsize = 32, 1069 .dcache_bsize = 32, 1070 .num_pmcs = 6, 1071 .pmc_type = PPC_PMC_G4, 1072 .cpu_setup = __setup_cpu_745x, 1073 .oprofile_cpu_type = "ppc/7450", 1074 .oprofile_type = PPC_OPROFILE_G4, 1075 .machine_check = machine_check_generic, 1076 .platform = "ppc7450", 1077 }, 1078 { /* 7447/7457 Rev 1.0 */ 1079 .pvr_mask = 0xffffffff, 1080 .pvr_value = 0x80020100, 1081 .cpu_name = "7447/7457", 1082 .cpu_features = CPU_FTRS_7447_10, 1083 .cpu_user_features = COMMON_USER | 1084 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1085 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1086 .icache_bsize = 32, 1087 .dcache_bsize = 32, 1088 .num_pmcs = 6, 1089 .pmc_type = PPC_PMC_G4, 1090 .cpu_setup = __setup_cpu_745x, 1091 .oprofile_cpu_type = "ppc/7450", 1092 .oprofile_type = PPC_OPROFILE_G4, 1093 .machine_check = machine_check_generic, 1094 .platform = "ppc7450", 1095 }, 1096 { /* 7447/7457 Rev 1.1 */ 1097 .pvr_mask = 0xffffffff, 1098 .pvr_value = 0x80020101, 1099 .cpu_name = "7447/7457", 1100 .cpu_features = CPU_FTRS_7447_10, 1101 .cpu_user_features = COMMON_USER | 1102 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1103 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1104 .icache_bsize = 32, 1105 .dcache_bsize = 32, 1106 .num_pmcs = 6, 1107 .pmc_type = PPC_PMC_G4, 1108 .cpu_setup = __setup_cpu_745x, 1109 .oprofile_cpu_type = "ppc/7450", 1110 .oprofile_type = PPC_OPROFILE_G4, 1111 .machine_check = machine_check_generic, 1112 .platform = "ppc7450", 1113 }, 1114 { /* 7447/7457 Rev 1.2 and later */ 1115 .pvr_mask = 0xffff0000, 1116 .pvr_value = 0x80020000, 1117 .cpu_name = "7447/7457", 1118 .cpu_features = CPU_FTRS_7447, 1119 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1120 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1121 .icache_bsize = 32, 1122 .dcache_bsize = 32, 1123 .num_pmcs = 6, 1124 .pmc_type = PPC_PMC_G4, 1125 .cpu_setup = __setup_cpu_745x, 1126 .oprofile_cpu_type = "ppc/7450", 1127 .oprofile_type = PPC_OPROFILE_G4, 1128 .machine_check = machine_check_generic, 1129 .platform = "ppc7450", 1130 }, 1131 { /* 7447A */ 1132 .pvr_mask = 0xffff0000, 1133 .pvr_value = 0x80030000, 1134 .cpu_name = "7447A", 1135 .cpu_features = CPU_FTRS_7447A, 1136 .cpu_user_features = COMMON_USER | 1137 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1138 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1139 .icache_bsize = 32, 1140 .dcache_bsize = 32, 1141 .num_pmcs = 6, 1142 .pmc_type = PPC_PMC_G4, 1143 .cpu_setup = __setup_cpu_745x, 1144 .oprofile_cpu_type = "ppc/7450", 1145 .oprofile_type = PPC_OPROFILE_G4, 1146 .machine_check = machine_check_generic, 1147 .platform = "ppc7450", 1148 }, 1149 { /* 7448 */ 1150 .pvr_mask = 0xffff0000, 1151 .pvr_value = 0x80040000, 1152 .cpu_name = "7448", 1153 .cpu_features = CPU_FTRS_7448, 1154 .cpu_user_features = COMMON_USER | 1155 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1156 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1157 .icache_bsize = 32, 1158 .dcache_bsize = 32, 1159 .num_pmcs = 6, 1160 .pmc_type = PPC_PMC_G4, 1161 .cpu_setup = __setup_cpu_745x, 1162 .oprofile_cpu_type = "ppc/7450", 1163 .oprofile_type = PPC_OPROFILE_G4, 1164 .machine_check = machine_check_generic, 1165 .platform = "ppc7450", 1166 }, 1167 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1168 .pvr_mask = 0x7fff0000, 1169 .pvr_value = 0x00810000, 1170 .cpu_name = "82xx", 1171 .cpu_features = CPU_FTRS_82XX, 1172 .cpu_user_features = COMMON_USER, 1173 .mmu_features = 0, 1174 .icache_bsize = 32, 1175 .dcache_bsize = 32, 1176 .cpu_setup = __setup_cpu_603, 1177 .machine_check = machine_check_generic, 1178 .platform = "ppc603", 1179 }, 1180 { /* All G2_LE (603e core, plus some) have the same pvr */ 1181 .pvr_mask = 0x7fff0000, 1182 .pvr_value = 0x00820000, 1183 .cpu_name = "G2_LE", 1184 .cpu_features = CPU_FTRS_G2_LE, 1185 .cpu_user_features = COMMON_USER, 1186 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1187 .icache_bsize = 32, 1188 .dcache_bsize = 32, 1189 .cpu_setup = __setup_cpu_603, 1190 .machine_check = machine_check_generic, 1191 .platform = "ppc603", 1192 }, 1193 { /* e300c1 (a 603e core, plus some) on 83xx */ 1194 .pvr_mask = 0x7fff0000, 1195 .pvr_value = 0x00830000, 1196 .cpu_name = "e300c1", 1197 .cpu_features = CPU_FTRS_E300, 1198 .cpu_user_features = COMMON_USER, 1199 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1200 .icache_bsize = 32, 1201 .dcache_bsize = 32, 1202 .cpu_setup = __setup_cpu_603, 1203 .machine_check = machine_check_generic, 1204 .platform = "ppc603", 1205 }, 1206 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1207 .pvr_mask = 0x7fff0000, 1208 .pvr_value = 0x00840000, 1209 .cpu_name = "e300c2", 1210 .cpu_features = CPU_FTRS_E300C2, 1211 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1212 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1213 MMU_FTR_NEED_DTLB_SW_LRU, 1214 .icache_bsize = 32, 1215 .dcache_bsize = 32, 1216 .cpu_setup = __setup_cpu_603, 1217 .machine_check = machine_check_generic, 1218 .platform = "ppc603", 1219 }, 1220 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1221 .pvr_mask = 0x7fff0000, 1222 .pvr_value = 0x00850000, 1223 .cpu_name = "e300c3", 1224 .cpu_features = CPU_FTRS_E300, 1225 .cpu_user_features = COMMON_USER, 1226 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1227 MMU_FTR_NEED_DTLB_SW_LRU, 1228 .icache_bsize = 32, 1229 .dcache_bsize = 32, 1230 .cpu_setup = __setup_cpu_603, 1231 .machine_check = machine_check_generic, 1232 .num_pmcs = 4, 1233 .oprofile_cpu_type = "ppc/e300", 1234 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1235 .platform = "ppc603", 1236 }, 1237 { /* e300c4 (e300c1, plus one IU) */ 1238 .pvr_mask = 0x7fff0000, 1239 .pvr_value = 0x00860000, 1240 .cpu_name = "e300c4", 1241 .cpu_features = CPU_FTRS_E300, 1242 .cpu_user_features = COMMON_USER, 1243 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1244 MMU_FTR_NEED_DTLB_SW_LRU, 1245 .icache_bsize = 32, 1246 .dcache_bsize = 32, 1247 .cpu_setup = __setup_cpu_603, 1248 .machine_check = machine_check_generic, 1249 .num_pmcs = 4, 1250 .oprofile_cpu_type = "ppc/e300", 1251 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1252 .platform = "ppc603", 1253 }, 1254 { /* default match, we assume split I/D cache & TB (non-601)... */ 1255 .pvr_mask = 0x00000000, 1256 .pvr_value = 0x00000000, 1257 .cpu_name = "(generic PPC)", 1258 .cpu_features = CPU_FTRS_CLASSIC32, 1259 .cpu_user_features = COMMON_USER, 1260 .mmu_features = MMU_FTR_HPTE_TABLE, 1261 .icache_bsize = 32, 1262 .dcache_bsize = 32, 1263 .machine_check = machine_check_generic, 1264 .platform = "ppc603", 1265 }, 1266 #endif /* CONFIG_PPC_BOOK3S_32 */ 1267 #ifdef CONFIG_PPC_8xx 1268 { /* 8xx */ 1269 .pvr_mask = 0xffff0000, 1270 .pvr_value = PVR_8xx, 1271 .cpu_name = "8xx", 1272 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1273 * if the 8xx code is there.... */ 1274 .cpu_features = CPU_FTRS_8XX, 1275 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1276 .mmu_features = MMU_FTR_TYPE_8xx, 1277 .icache_bsize = 16, 1278 .dcache_bsize = 16, 1279 .machine_check = machine_check_8xx, 1280 .platform = "ppc823", 1281 }, 1282 #endif /* CONFIG_PPC_8xx */ 1283 #ifdef CONFIG_40x 1284 { /* 403GC */ 1285 .pvr_mask = 0xffffff00, 1286 .pvr_value = 0x00200200, 1287 .cpu_name = "403GC", 1288 .cpu_features = CPU_FTRS_40X, 1289 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1290 .mmu_features = MMU_FTR_TYPE_40x, 1291 .icache_bsize = 16, 1292 .dcache_bsize = 16, 1293 .machine_check = machine_check_4xx, 1294 .platform = "ppc403", 1295 }, 1296 { /* 403GCX */ 1297 .pvr_mask = 0xffffff00, 1298 .pvr_value = 0x00201400, 1299 .cpu_name = "403GCX", 1300 .cpu_features = CPU_FTRS_40X, 1301 .cpu_user_features = PPC_FEATURE_32 | 1302 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1303 .mmu_features = MMU_FTR_TYPE_40x, 1304 .icache_bsize = 16, 1305 .dcache_bsize = 16, 1306 .machine_check = machine_check_4xx, 1307 .platform = "ppc403", 1308 }, 1309 { /* 403G ?? */ 1310 .pvr_mask = 0xffff0000, 1311 .pvr_value = 0x00200000, 1312 .cpu_name = "403G ??", 1313 .cpu_features = CPU_FTRS_40X, 1314 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1315 .mmu_features = MMU_FTR_TYPE_40x, 1316 .icache_bsize = 16, 1317 .dcache_bsize = 16, 1318 .machine_check = machine_check_4xx, 1319 .platform = "ppc403", 1320 }, 1321 { /* 405GP */ 1322 .pvr_mask = 0xffff0000, 1323 .pvr_value = 0x40110000, 1324 .cpu_name = "405GP", 1325 .cpu_features = CPU_FTRS_40X, 1326 .cpu_user_features = PPC_FEATURE_32 | 1327 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1328 .mmu_features = MMU_FTR_TYPE_40x, 1329 .icache_bsize = 32, 1330 .dcache_bsize = 32, 1331 .machine_check = machine_check_4xx, 1332 .platform = "ppc405", 1333 }, 1334 { /* STB 03xxx */ 1335 .pvr_mask = 0xffff0000, 1336 .pvr_value = 0x40130000, 1337 .cpu_name = "STB03xxx", 1338 .cpu_features = CPU_FTRS_40X, 1339 .cpu_user_features = PPC_FEATURE_32 | 1340 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1341 .mmu_features = MMU_FTR_TYPE_40x, 1342 .icache_bsize = 32, 1343 .dcache_bsize = 32, 1344 .machine_check = machine_check_4xx, 1345 .platform = "ppc405", 1346 }, 1347 { /* STB 04xxx */ 1348 .pvr_mask = 0xffff0000, 1349 .pvr_value = 0x41810000, 1350 .cpu_name = "STB04xxx", 1351 .cpu_features = CPU_FTRS_40X, 1352 .cpu_user_features = PPC_FEATURE_32 | 1353 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1354 .mmu_features = MMU_FTR_TYPE_40x, 1355 .icache_bsize = 32, 1356 .dcache_bsize = 32, 1357 .machine_check = machine_check_4xx, 1358 .platform = "ppc405", 1359 }, 1360 { /* NP405L */ 1361 .pvr_mask = 0xffff0000, 1362 .pvr_value = 0x41610000, 1363 .cpu_name = "NP405L", 1364 .cpu_features = CPU_FTRS_40X, 1365 .cpu_user_features = PPC_FEATURE_32 | 1366 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1367 .mmu_features = MMU_FTR_TYPE_40x, 1368 .icache_bsize = 32, 1369 .dcache_bsize = 32, 1370 .machine_check = machine_check_4xx, 1371 .platform = "ppc405", 1372 }, 1373 { /* NP4GS3 */ 1374 .pvr_mask = 0xffff0000, 1375 .pvr_value = 0x40B10000, 1376 .cpu_name = "NP4GS3", 1377 .cpu_features = CPU_FTRS_40X, 1378 .cpu_user_features = PPC_FEATURE_32 | 1379 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1380 .mmu_features = MMU_FTR_TYPE_40x, 1381 .icache_bsize = 32, 1382 .dcache_bsize = 32, 1383 .machine_check = machine_check_4xx, 1384 .platform = "ppc405", 1385 }, 1386 { /* NP405H */ 1387 .pvr_mask = 0xffff0000, 1388 .pvr_value = 0x41410000, 1389 .cpu_name = "NP405H", 1390 .cpu_features = CPU_FTRS_40X, 1391 .cpu_user_features = PPC_FEATURE_32 | 1392 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1393 .mmu_features = MMU_FTR_TYPE_40x, 1394 .icache_bsize = 32, 1395 .dcache_bsize = 32, 1396 .machine_check = machine_check_4xx, 1397 .platform = "ppc405", 1398 }, 1399 { /* 405GPr */ 1400 .pvr_mask = 0xffff0000, 1401 .pvr_value = 0x50910000, 1402 .cpu_name = "405GPr", 1403 .cpu_features = CPU_FTRS_40X, 1404 .cpu_user_features = PPC_FEATURE_32 | 1405 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1406 .mmu_features = MMU_FTR_TYPE_40x, 1407 .icache_bsize = 32, 1408 .dcache_bsize = 32, 1409 .machine_check = machine_check_4xx, 1410 .platform = "ppc405", 1411 }, 1412 { /* STBx25xx */ 1413 .pvr_mask = 0xffff0000, 1414 .pvr_value = 0x51510000, 1415 .cpu_name = "STBx25xx", 1416 .cpu_features = CPU_FTRS_40X, 1417 .cpu_user_features = PPC_FEATURE_32 | 1418 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1419 .mmu_features = MMU_FTR_TYPE_40x, 1420 .icache_bsize = 32, 1421 .dcache_bsize = 32, 1422 .machine_check = machine_check_4xx, 1423 .platform = "ppc405", 1424 }, 1425 { /* 405LP */ 1426 .pvr_mask = 0xffff0000, 1427 .pvr_value = 0x41F10000, 1428 .cpu_name = "405LP", 1429 .cpu_features = CPU_FTRS_40X, 1430 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1431 .mmu_features = MMU_FTR_TYPE_40x, 1432 .icache_bsize = 32, 1433 .dcache_bsize = 32, 1434 .machine_check = machine_check_4xx, 1435 .platform = "ppc405", 1436 }, 1437 { /* Xilinx Virtex-II Pro */ 1438 .pvr_mask = 0xfffff000, 1439 .pvr_value = 0x20010000, 1440 .cpu_name = "Virtex-II Pro", 1441 .cpu_features = CPU_FTRS_40X, 1442 .cpu_user_features = PPC_FEATURE_32 | 1443 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1444 .mmu_features = MMU_FTR_TYPE_40x, 1445 .icache_bsize = 32, 1446 .dcache_bsize = 32, 1447 .machine_check = machine_check_4xx, 1448 .platform = "ppc405", 1449 }, 1450 { /* Xilinx Virtex-4 FX */ 1451 .pvr_mask = 0xfffff000, 1452 .pvr_value = 0x20011000, 1453 .cpu_name = "Virtex-4 FX", 1454 .cpu_features = CPU_FTRS_40X, 1455 .cpu_user_features = PPC_FEATURE_32 | 1456 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1457 .mmu_features = MMU_FTR_TYPE_40x, 1458 .icache_bsize = 32, 1459 .dcache_bsize = 32, 1460 .machine_check = machine_check_4xx, 1461 .platform = "ppc405", 1462 }, 1463 { /* 405EP */ 1464 .pvr_mask = 0xffff0000, 1465 .pvr_value = 0x51210000, 1466 .cpu_name = "405EP", 1467 .cpu_features = CPU_FTRS_40X, 1468 .cpu_user_features = PPC_FEATURE_32 | 1469 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1470 .mmu_features = MMU_FTR_TYPE_40x, 1471 .icache_bsize = 32, 1472 .dcache_bsize = 32, 1473 .machine_check = machine_check_4xx, 1474 .platform = "ppc405", 1475 }, 1476 { /* 405EX Rev. A/B with Security */ 1477 .pvr_mask = 0xffff000f, 1478 .pvr_value = 0x12910007, 1479 .cpu_name = "405EX Rev. A/B", 1480 .cpu_features = CPU_FTRS_40X, 1481 .cpu_user_features = PPC_FEATURE_32 | 1482 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1483 .mmu_features = MMU_FTR_TYPE_40x, 1484 .icache_bsize = 32, 1485 .dcache_bsize = 32, 1486 .machine_check = machine_check_4xx, 1487 .platform = "ppc405", 1488 }, 1489 { /* 405EX Rev. C without Security */ 1490 .pvr_mask = 0xffff000f, 1491 .pvr_value = 0x1291000d, 1492 .cpu_name = "405EX Rev. C", 1493 .cpu_features = CPU_FTRS_40X, 1494 .cpu_user_features = PPC_FEATURE_32 | 1495 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1496 .mmu_features = MMU_FTR_TYPE_40x, 1497 .icache_bsize = 32, 1498 .dcache_bsize = 32, 1499 .machine_check = machine_check_4xx, 1500 .platform = "ppc405", 1501 }, 1502 { /* 405EX Rev. C with Security */ 1503 .pvr_mask = 0xffff000f, 1504 .pvr_value = 0x1291000f, 1505 .cpu_name = "405EX Rev. C", 1506 .cpu_features = CPU_FTRS_40X, 1507 .cpu_user_features = PPC_FEATURE_32 | 1508 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1509 .mmu_features = MMU_FTR_TYPE_40x, 1510 .icache_bsize = 32, 1511 .dcache_bsize = 32, 1512 .machine_check = machine_check_4xx, 1513 .platform = "ppc405", 1514 }, 1515 { /* 405EX Rev. D without Security */ 1516 .pvr_mask = 0xffff000f, 1517 .pvr_value = 0x12910003, 1518 .cpu_name = "405EX Rev. D", 1519 .cpu_features = CPU_FTRS_40X, 1520 .cpu_user_features = PPC_FEATURE_32 | 1521 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1522 .mmu_features = MMU_FTR_TYPE_40x, 1523 .icache_bsize = 32, 1524 .dcache_bsize = 32, 1525 .machine_check = machine_check_4xx, 1526 .platform = "ppc405", 1527 }, 1528 { /* 405EX Rev. D with Security */ 1529 .pvr_mask = 0xffff000f, 1530 .pvr_value = 0x12910005, 1531 .cpu_name = "405EX Rev. D", 1532 .cpu_features = CPU_FTRS_40X, 1533 .cpu_user_features = PPC_FEATURE_32 | 1534 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1535 .mmu_features = MMU_FTR_TYPE_40x, 1536 .icache_bsize = 32, 1537 .dcache_bsize = 32, 1538 .machine_check = machine_check_4xx, 1539 .platform = "ppc405", 1540 }, 1541 { /* 405EXr Rev. A/B without Security */ 1542 .pvr_mask = 0xffff000f, 1543 .pvr_value = 0x12910001, 1544 .cpu_name = "405EXr Rev. A/B", 1545 .cpu_features = CPU_FTRS_40X, 1546 .cpu_user_features = PPC_FEATURE_32 | 1547 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1548 .mmu_features = MMU_FTR_TYPE_40x, 1549 .icache_bsize = 32, 1550 .dcache_bsize = 32, 1551 .machine_check = machine_check_4xx, 1552 .platform = "ppc405", 1553 }, 1554 { /* 405EXr Rev. C without Security */ 1555 .pvr_mask = 0xffff000f, 1556 .pvr_value = 0x12910009, 1557 .cpu_name = "405EXr Rev. C", 1558 .cpu_features = CPU_FTRS_40X, 1559 .cpu_user_features = PPC_FEATURE_32 | 1560 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1561 .mmu_features = MMU_FTR_TYPE_40x, 1562 .icache_bsize = 32, 1563 .dcache_bsize = 32, 1564 .machine_check = machine_check_4xx, 1565 .platform = "ppc405", 1566 }, 1567 { /* 405EXr Rev. C with Security */ 1568 .pvr_mask = 0xffff000f, 1569 .pvr_value = 0x1291000b, 1570 .cpu_name = "405EXr Rev. C", 1571 .cpu_features = CPU_FTRS_40X, 1572 .cpu_user_features = PPC_FEATURE_32 | 1573 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1574 .mmu_features = MMU_FTR_TYPE_40x, 1575 .icache_bsize = 32, 1576 .dcache_bsize = 32, 1577 .machine_check = machine_check_4xx, 1578 .platform = "ppc405", 1579 }, 1580 { /* 405EXr Rev. D without Security */ 1581 .pvr_mask = 0xffff000f, 1582 .pvr_value = 0x12910000, 1583 .cpu_name = "405EXr Rev. D", 1584 .cpu_features = CPU_FTRS_40X, 1585 .cpu_user_features = PPC_FEATURE_32 | 1586 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1587 .mmu_features = MMU_FTR_TYPE_40x, 1588 .icache_bsize = 32, 1589 .dcache_bsize = 32, 1590 .machine_check = machine_check_4xx, 1591 .platform = "ppc405", 1592 }, 1593 { /* 405EXr Rev. D with Security */ 1594 .pvr_mask = 0xffff000f, 1595 .pvr_value = 0x12910002, 1596 .cpu_name = "405EXr Rev. D", 1597 .cpu_features = CPU_FTRS_40X, 1598 .cpu_user_features = PPC_FEATURE_32 | 1599 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1600 .mmu_features = MMU_FTR_TYPE_40x, 1601 .icache_bsize = 32, 1602 .dcache_bsize = 32, 1603 .machine_check = machine_check_4xx, 1604 .platform = "ppc405", 1605 }, 1606 { 1607 /* 405EZ */ 1608 .pvr_mask = 0xffff0000, 1609 .pvr_value = 0x41510000, 1610 .cpu_name = "405EZ", 1611 .cpu_features = CPU_FTRS_40X, 1612 .cpu_user_features = PPC_FEATURE_32 | 1613 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1614 .mmu_features = MMU_FTR_TYPE_40x, 1615 .icache_bsize = 32, 1616 .dcache_bsize = 32, 1617 .machine_check = machine_check_4xx, 1618 .platform = "ppc405", 1619 }, 1620 { /* APM8018X */ 1621 .pvr_mask = 0xffff0000, 1622 .pvr_value = 0x7ff11432, 1623 .cpu_name = "APM8018X", 1624 .cpu_features = CPU_FTRS_40X, 1625 .cpu_user_features = PPC_FEATURE_32 | 1626 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1627 .mmu_features = MMU_FTR_TYPE_40x, 1628 .icache_bsize = 32, 1629 .dcache_bsize = 32, 1630 .machine_check = machine_check_4xx, 1631 .platform = "ppc405", 1632 }, 1633 { /* default match */ 1634 .pvr_mask = 0x00000000, 1635 .pvr_value = 0x00000000, 1636 .cpu_name = "(generic 40x PPC)", 1637 .cpu_features = CPU_FTRS_40X, 1638 .cpu_user_features = PPC_FEATURE_32 | 1639 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1640 .mmu_features = MMU_FTR_TYPE_40x, 1641 .icache_bsize = 32, 1642 .dcache_bsize = 32, 1643 .machine_check = machine_check_4xx, 1644 .platform = "ppc405", 1645 } 1646 1647 #endif /* CONFIG_40x */ 1648 #ifdef CONFIG_44x 1649 { 1650 .pvr_mask = 0xf0000fff, 1651 .pvr_value = 0x40000850, 1652 .cpu_name = "440GR Rev. A", 1653 .cpu_features = CPU_FTRS_44X, 1654 .cpu_user_features = COMMON_USER_BOOKE, 1655 .mmu_features = MMU_FTR_TYPE_44x, 1656 .icache_bsize = 32, 1657 .dcache_bsize = 32, 1658 .machine_check = machine_check_4xx, 1659 .platform = "ppc440", 1660 }, 1661 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1662 .pvr_mask = 0xf0000fff, 1663 .pvr_value = 0x40000858, 1664 .cpu_name = "440EP Rev. A", 1665 .cpu_features = CPU_FTRS_44X, 1666 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1667 .mmu_features = MMU_FTR_TYPE_44x, 1668 .icache_bsize = 32, 1669 .dcache_bsize = 32, 1670 .cpu_setup = __setup_cpu_440ep, 1671 .machine_check = machine_check_4xx, 1672 .platform = "ppc440", 1673 }, 1674 { 1675 .pvr_mask = 0xf0000fff, 1676 .pvr_value = 0x400008d3, 1677 .cpu_name = "440GR Rev. B", 1678 .cpu_features = CPU_FTRS_44X, 1679 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1680 .mmu_features = MMU_FTR_TYPE_44x, 1681 .icache_bsize = 32, 1682 .dcache_bsize = 32, 1683 .machine_check = machine_check_4xx, 1684 .platform = "ppc440", 1685 }, 1686 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1687 .pvr_mask = 0xf0000ff7, 1688 .pvr_value = 0x400008d4, 1689 .cpu_name = "440EP Rev. C", 1690 .cpu_features = CPU_FTRS_44X, 1691 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1692 .mmu_features = MMU_FTR_TYPE_44x, 1693 .icache_bsize = 32, 1694 .dcache_bsize = 32, 1695 .cpu_setup = __setup_cpu_440ep, 1696 .machine_check = machine_check_4xx, 1697 .platform = "ppc440", 1698 }, 1699 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1700 .pvr_mask = 0xf0000fff, 1701 .pvr_value = 0x400008db, 1702 .cpu_name = "440EP Rev. B", 1703 .cpu_features = CPU_FTRS_44X, 1704 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1705 .mmu_features = MMU_FTR_TYPE_44x, 1706 .icache_bsize = 32, 1707 .dcache_bsize = 32, 1708 .cpu_setup = __setup_cpu_440ep, 1709 .machine_check = machine_check_4xx, 1710 .platform = "ppc440", 1711 }, 1712 { /* 440GRX */ 1713 .pvr_mask = 0xf0000ffb, 1714 .pvr_value = 0x200008D0, 1715 .cpu_name = "440GRX", 1716 .cpu_features = CPU_FTRS_44X, 1717 .cpu_user_features = COMMON_USER_BOOKE, 1718 .mmu_features = MMU_FTR_TYPE_44x, 1719 .icache_bsize = 32, 1720 .dcache_bsize = 32, 1721 .cpu_setup = __setup_cpu_440grx, 1722 .machine_check = machine_check_440A, 1723 .platform = "ppc440", 1724 }, 1725 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1726 .pvr_mask = 0xf0000ffb, 1727 .pvr_value = 0x200008D8, 1728 .cpu_name = "440EPX", 1729 .cpu_features = CPU_FTRS_44X, 1730 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1731 .mmu_features = MMU_FTR_TYPE_44x, 1732 .icache_bsize = 32, 1733 .dcache_bsize = 32, 1734 .cpu_setup = __setup_cpu_440epx, 1735 .machine_check = machine_check_440A, 1736 .platform = "ppc440", 1737 }, 1738 { /* 440GP Rev. B */ 1739 .pvr_mask = 0xf0000fff, 1740 .pvr_value = 0x40000440, 1741 .cpu_name = "440GP Rev. B", 1742 .cpu_features = CPU_FTRS_44X, 1743 .cpu_user_features = COMMON_USER_BOOKE, 1744 .mmu_features = MMU_FTR_TYPE_44x, 1745 .icache_bsize = 32, 1746 .dcache_bsize = 32, 1747 .machine_check = machine_check_4xx, 1748 .platform = "ppc440gp", 1749 }, 1750 { /* 440GP Rev. C */ 1751 .pvr_mask = 0xf0000fff, 1752 .pvr_value = 0x40000481, 1753 .cpu_name = "440GP Rev. C", 1754 .cpu_features = CPU_FTRS_44X, 1755 .cpu_user_features = COMMON_USER_BOOKE, 1756 .mmu_features = MMU_FTR_TYPE_44x, 1757 .icache_bsize = 32, 1758 .dcache_bsize = 32, 1759 .machine_check = machine_check_4xx, 1760 .platform = "ppc440gp", 1761 }, 1762 { /* 440GX Rev. A */ 1763 .pvr_mask = 0xf0000fff, 1764 .pvr_value = 0x50000850, 1765 .cpu_name = "440GX Rev. A", 1766 .cpu_features = CPU_FTRS_44X, 1767 .cpu_user_features = COMMON_USER_BOOKE, 1768 .mmu_features = MMU_FTR_TYPE_44x, 1769 .icache_bsize = 32, 1770 .dcache_bsize = 32, 1771 .cpu_setup = __setup_cpu_440gx, 1772 .machine_check = machine_check_440A, 1773 .platform = "ppc440", 1774 }, 1775 { /* 440GX Rev. B */ 1776 .pvr_mask = 0xf0000fff, 1777 .pvr_value = 0x50000851, 1778 .cpu_name = "440GX Rev. B", 1779 .cpu_features = CPU_FTRS_44X, 1780 .cpu_user_features = COMMON_USER_BOOKE, 1781 .mmu_features = MMU_FTR_TYPE_44x, 1782 .icache_bsize = 32, 1783 .dcache_bsize = 32, 1784 .cpu_setup = __setup_cpu_440gx, 1785 .machine_check = machine_check_440A, 1786 .platform = "ppc440", 1787 }, 1788 { /* 440GX Rev. C */ 1789 .pvr_mask = 0xf0000fff, 1790 .pvr_value = 0x50000892, 1791 .cpu_name = "440GX Rev. C", 1792 .cpu_features = CPU_FTRS_44X, 1793 .cpu_user_features = COMMON_USER_BOOKE, 1794 .mmu_features = MMU_FTR_TYPE_44x, 1795 .icache_bsize = 32, 1796 .dcache_bsize = 32, 1797 .cpu_setup = __setup_cpu_440gx, 1798 .machine_check = machine_check_440A, 1799 .platform = "ppc440", 1800 }, 1801 { /* 440GX Rev. F */ 1802 .pvr_mask = 0xf0000fff, 1803 .pvr_value = 0x50000894, 1804 .cpu_name = "440GX Rev. F", 1805 .cpu_features = CPU_FTRS_44X, 1806 .cpu_user_features = COMMON_USER_BOOKE, 1807 .mmu_features = MMU_FTR_TYPE_44x, 1808 .icache_bsize = 32, 1809 .dcache_bsize = 32, 1810 .cpu_setup = __setup_cpu_440gx, 1811 .machine_check = machine_check_440A, 1812 .platform = "ppc440", 1813 }, 1814 { /* 440SP Rev. A */ 1815 .pvr_mask = 0xfff00fff, 1816 .pvr_value = 0x53200891, 1817 .cpu_name = "440SP Rev. A", 1818 .cpu_features = CPU_FTRS_44X, 1819 .cpu_user_features = COMMON_USER_BOOKE, 1820 .mmu_features = MMU_FTR_TYPE_44x, 1821 .icache_bsize = 32, 1822 .dcache_bsize = 32, 1823 .machine_check = machine_check_4xx, 1824 .platform = "ppc440", 1825 }, 1826 { /* 440SPe Rev. A */ 1827 .pvr_mask = 0xfff00fff, 1828 .pvr_value = 0x53400890, 1829 .cpu_name = "440SPe Rev. A", 1830 .cpu_features = CPU_FTRS_44X, 1831 .cpu_user_features = COMMON_USER_BOOKE, 1832 .mmu_features = MMU_FTR_TYPE_44x, 1833 .icache_bsize = 32, 1834 .dcache_bsize = 32, 1835 .cpu_setup = __setup_cpu_440spe, 1836 .machine_check = machine_check_440A, 1837 .platform = "ppc440", 1838 }, 1839 { /* 440SPe Rev. B */ 1840 .pvr_mask = 0xfff00fff, 1841 .pvr_value = 0x53400891, 1842 .cpu_name = "440SPe Rev. B", 1843 .cpu_features = CPU_FTRS_44X, 1844 .cpu_user_features = COMMON_USER_BOOKE, 1845 .mmu_features = MMU_FTR_TYPE_44x, 1846 .icache_bsize = 32, 1847 .dcache_bsize = 32, 1848 .cpu_setup = __setup_cpu_440spe, 1849 .machine_check = machine_check_440A, 1850 .platform = "ppc440", 1851 }, 1852 { /* 440 in Xilinx Virtex-5 FXT */ 1853 .pvr_mask = 0xfffffff0, 1854 .pvr_value = 0x7ff21910, 1855 .cpu_name = "440 in Virtex-5 FXT", 1856 .cpu_features = CPU_FTRS_44X, 1857 .cpu_user_features = COMMON_USER_BOOKE, 1858 .mmu_features = MMU_FTR_TYPE_44x, 1859 .icache_bsize = 32, 1860 .dcache_bsize = 32, 1861 .cpu_setup = __setup_cpu_440x5, 1862 .machine_check = machine_check_440A, 1863 .platform = "ppc440", 1864 }, 1865 { /* 460EX */ 1866 .pvr_mask = 0xffff0006, 1867 .pvr_value = 0x13020002, 1868 .cpu_name = "460EX", 1869 .cpu_features = CPU_FTRS_440x6, 1870 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1871 .mmu_features = MMU_FTR_TYPE_44x, 1872 .icache_bsize = 32, 1873 .dcache_bsize = 32, 1874 .cpu_setup = __setup_cpu_460ex, 1875 .machine_check = machine_check_440A, 1876 .platform = "ppc440", 1877 }, 1878 { /* 460EX Rev B */ 1879 .pvr_mask = 0xffff0007, 1880 .pvr_value = 0x13020004, 1881 .cpu_name = "460EX Rev. B", 1882 .cpu_features = CPU_FTRS_440x6, 1883 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1884 .mmu_features = MMU_FTR_TYPE_44x, 1885 .icache_bsize = 32, 1886 .dcache_bsize = 32, 1887 .cpu_setup = __setup_cpu_460ex, 1888 .machine_check = machine_check_440A, 1889 .platform = "ppc440", 1890 }, 1891 { /* 460GT */ 1892 .pvr_mask = 0xffff0006, 1893 .pvr_value = 0x13020000, 1894 .cpu_name = "460GT", 1895 .cpu_features = CPU_FTRS_440x6, 1896 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1897 .mmu_features = MMU_FTR_TYPE_44x, 1898 .icache_bsize = 32, 1899 .dcache_bsize = 32, 1900 .cpu_setup = __setup_cpu_460gt, 1901 .machine_check = machine_check_440A, 1902 .platform = "ppc440", 1903 }, 1904 { /* 460GT Rev B */ 1905 .pvr_mask = 0xffff0007, 1906 .pvr_value = 0x13020005, 1907 .cpu_name = "460GT Rev. B", 1908 .cpu_features = CPU_FTRS_440x6, 1909 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1910 .mmu_features = MMU_FTR_TYPE_44x, 1911 .icache_bsize = 32, 1912 .dcache_bsize = 32, 1913 .cpu_setup = __setup_cpu_460gt, 1914 .machine_check = machine_check_440A, 1915 .platform = "ppc440", 1916 }, 1917 { /* 460SX */ 1918 .pvr_mask = 0xffffff00, 1919 .pvr_value = 0x13541800, 1920 .cpu_name = "460SX", 1921 .cpu_features = CPU_FTRS_44X, 1922 .cpu_user_features = COMMON_USER_BOOKE, 1923 .mmu_features = MMU_FTR_TYPE_44x, 1924 .icache_bsize = 32, 1925 .dcache_bsize = 32, 1926 .cpu_setup = __setup_cpu_460sx, 1927 .machine_check = machine_check_440A, 1928 .platform = "ppc440", 1929 }, 1930 { /* 464 in APM821xx */ 1931 .pvr_mask = 0xfffffff0, 1932 .pvr_value = 0x12C41C80, 1933 .cpu_name = "APM821XX", 1934 .cpu_features = CPU_FTRS_44X, 1935 .cpu_user_features = COMMON_USER_BOOKE | 1936 PPC_FEATURE_HAS_FPU, 1937 .mmu_features = MMU_FTR_TYPE_44x, 1938 .icache_bsize = 32, 1939 .dcache_bsize = 32, 1940 .cpu_setup = __setup_cpu_apm821xx, 1941 .machine_check = machine_check_440A, 1942 .platform = "ppc440", 1943 }, 1944 #ifdef CONFIG_PPC_47x 1945 { /* 476 DD2 core */ 1946 .pvr_mask = 0xffffffff, 1947 .pvr_value = 0x11a52080, 1948 .cpu_name = "476", 1949 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1950 .cpu_user_features = COMMON_USER_BOOKE | 1951 PPC_FEATURE_HAS_FPU, 1952 .mmu_features = MMU_FTR_TYPE_47x | 1953 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1954 .icache_bsize = 32, 1955 .dcache_bsize = 128, 1956 .machine_check = machine_check_47x, 1957 .platform = "ppc470", 1958 }, 1959 { /* 476fpe */ 1960 .pvr_mask = 0xffff0000, 1961 .pvr_value = 0x7ff50000, 1962 .cpu_name = "476fpe", 1963 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1964 .cpu_user_features = COMMON_USER_BOOKE | 1965 PPC_FEATURE_HAS_FPU, 1966 .mmu_features = MMU_FTR_TYPE_47x | 1967 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1968 .icache_bsize = 32, 1969 .dcache_bsize = 128, 1970 .machine_check = machine_check_47x, 1971 .platform = "ppc470", 1972 }, 1973 { /* 476 iss */ 1974 .pvr_mask = 0xffff0000, 1975 .pvr_value = 0x00050000, 1976 .cpu_name = "476", 1977 .cpu_features = CPU_FTRS_47X, 1978 .cpu_user_features = COMMON_USER_BOOKE | 1979 PPC_FEATURE_HAS_FPU, 1980 .mmu_features = MMU_FTR_TYPE_47x | 1981 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1982 .icache_bsize = 32, 1983 .dcache_bsize = 128, 1984 .machine_check = machine_check_47x, 1985 .platform = "ppc470", 1986 }, 1987 { /* 476 others */ 1988 .pvr_mask = 0xffff0000, 1989 .pvr_value = 0x11a50000, 1990 .cpu_name = "476", 1991 .cpu_features = CPU_FTRS_47X, 1992 .cpu_user_features = COMMON_USER_BOOKE | 1993 PPC_FEATURE_HAS_FPU, 1994 .mmu_features = MMU_FTR_TYPE_47x | 1995 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1996 .icache_bsize = 32, 1997 .dcache_bsize = 128, 1998 .machine_check = machine_check_47x, 1999 .platform = "ppc470", 2000 }, 2001 #endif /* CONFIG_PPC_47x */ 2002 { /* default match */ 2003 .pvr_mask = 0x00000000, 2004 .pvr_value = 0x00000000, 2005 .cpu_name = "(generic 44x PPC)", 2006 .cpu_features = CPU_FTRS_44X, 2007 .cpu_user_features = COMMON_USER_BOOKE, 2008 .mmu_features = MMU_FTR_TYPE_44x, 2009 .icache_bsize = 32, 2010 .dcache_bsize = 32, 2011 .machine_check = machine_check_4xx, 2012 .platform = "ppc440", 2013 } 2014 #endif /* CONFIG_44x */ 2015 #ifdef CONFIG_E200 2016 { /* e200z5 */ 2017 .pvr_mask = 0xfff00000, 2018 .pvr_value = 0x81000000, 2019 .cpu_name = "e200z5", 2020 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 2021 .cpu_features = CPU_FTRS_E200, 2022 .cpu_user_features = COMMON_USER_BOOKE | 2023 PPC_FEATURE_HAS_EFP_SINGLE | 2024 PPC_FEATURE_UNIFIED_CACHE, 2025 .mmu_features = MMU_FTR_TYPE_FSL_E, 2026 .dcache_bsize = 32, 2027 .machine_check = machine_check_e200, 2028 .platform = "ppc5554", 2029 }, 2030 { /* e200z6 */ 2031 .pvr_mask = 0xfff00000, 2032 .pvr_value = 0x81100000, 2033 .cpu_name = "e200z6", 2034 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 2035 .cpu_features = CPU_FTRS_E200, 2036 .cpu_user_features = COMMON_USER_BOOKE | 2037 PPC_FEATURE_HAS_SPE_COMP | 2038 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2039 PPC_FEATURE_UNIFIED_CACHE, 2040 .mmu_features = MMU_FTR_TYPE_FSL_E, 2041 .dcache_bsize = 32, 2042 .machine_check = machine_check_e200, 2043 .platform = "ppc5554", 2044 }, 2045 { /* default match */ 2046 .pvr_mask = 0x00000000, 2047 .pvr_value = 0x00000000, 2048 .cpu_name = "(generic E200 PPC)", 2049 .cpu_features = CPU_FTRS_E200, 2050 .cpu_user_features = COMMON_USER_BOOKE | 2051 PPC_FEATURE_HAS_EFP_SINGLE | 2052 PPC_FEATURE_UNIFIED_CACHE, 2053 .mmu_features = MMU_FTR_TYPE_FSL_E, 2054 .dcache_bsize = 32, 2055 .cpu_setup = __setup_cpu_e200, 2056 .machine_check = machine_check_e200, 2057 .platform = "ppc5554", 2058 } 2059 #endif /* CONFIG_E200 */ 2060 #endif /* CONFIG_PPC32 */ 2061 #ifdef CONFIG_E500 2062 #ifdef CONFIG_PPC32 2063 #ifndef CONFIG_PPC_E500MC 2064 { /* e500 */ 2065 .pvr_mask = 0xffff0000, 2066 .pvr_value = 0x80200000, 2067 .cpu_name = "e500", 2068 .cpu_features = CPU_FTRS_E500, 2069 .cpu_user_features = COMMON_USER_BOOKE | 2070 PPC_FEATURE_HAS_SPE_COMP | 2071 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2072 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2073 .mmu_features = MMU_FTR_TYPE_FSL_E, 2074 .icache_bsize = 32, 2075 .dcache_bsize = 32, 2076 .num_pmcs = 4, 2077 .oprofile_cpu_type = "ppc/e500", 2078 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2079 .cpu_setup = __setup_cpu_e500v1, 2080 .machine_check = machine_check_e500, 2081 .platform = "ppc8540", 2082 }, 2083 { /* e500v2 */ 2084 .pvr_mask = 0xffff0000, 2085 .pvr_value = 0x80210000, 2086 .cpu_name = "e500v2", 2087 .cpu_features = CPU_FTRS_E500_2, 2088 .cpu_user_features = COMMON_USER_BOOKE | 2089 PPC_FEATURE_HAS_SPE_COMP | 2090 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2091 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 2092 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2093 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 2094 .icache_bsize = 32, 2095 .dcache_bsize = 32, 2096 .num_pmcs = 4, 2097 .oprofile_cpu_type = "ppc/e500", 2098 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2099 .cpu_setup = __setup_cpu_e500v2, 2100 .machine_check = machine_check_e500, 2101 .platform = "ppc8548", 2102 .cpu_down_flush = cpu_down_flush_e500v2, 2103 }, 2104 #else 2105 { /* e500mc */ 2106 .pvr_mask = 0xffff0000, 2107 .pvr_value = 0x80230000, 2108 .cpu_name = "e500mc", 2109 .cpu_features = CPU_FTRS_E500MC, 2110 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2111 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2112 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2113 MMU_FTR_USE_TLBILX, 2114 .icache_bsize = 64, 2115 .dcache_bsize = 64, 2116 .num_pmcs = 4, 2117 .oprofile_cpu_type = "ppc/e500mc", 2118 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2119 .cpu_setup = __setup_cpu_e500mc, 2120 .machine_check = machine_check_e500mc, 2121 .platform = "ppce500mc", 2122 .cpu_down_flush = cpu_down_flush_e500mc, 2123 }, 2124 #endif /* CONFIG_PPC_E500MC */ 2125 #endif /* CONFIG_PPC32 */ 2126 #ifdef CONFIG_PPC_E500MC 2127 { /* e5500 */ 2128 .pvr_mask = 0xffff0000, 2129 .pvr_value = 0x80240000, 2130 .cpu_name = "e5500", 2131 .cpu_features = CPU_FTRS_E5500, 2132 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2133 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2134 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2135 MMU_FTR_USE_TLBILX, 2136 .icache_bsize = 64, 2137 .dcache_bsize = 64, 2138 .num_pmcs = 4, 2139 .oprofile_cpu_type = "ppc/e500mc", 2140 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2141 .cpu_setup = __setup_cpu_e5500, 2142 #ifndef CONFIG_PPC32 2143 .cpu_restore = __restore_cpu_e5500, 2144 #endif 2145 .machine_check = machine_check_e500mc, 2146 .platform = "ppce5500", 2147 .cpu_down_flush = cpu_down_flush_e5500, 2148 }, 2149 { /* e6500 */ 2150 .pvr_mask = 0xffff0000, 2151 .pvr_value = 0x80400000, 2152 .cpu_name = "e6500", 2153 .cpu_features = CPU_FTRS_E6500, 2154 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2155 PPC_FEATURE_HAS_ALTIVEC_COMP, 2156 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2157 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2158 MMU_FTR_USE_TLBILX, 2159 .icache_bsize = 64, 2160 .dcache_bsize = 64, 2161 .num_pmcs = 6, 2162 .oprofile_cpu_type = "ppc/e6500", 2163 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2164 .cpu_setup = __setup_cpu_e6500, 2165 #ifndef CONFIG_PPC32 2166 .cpu_restore = __restore_cpu_e6500, 2167 #endif 2168 .machine_check = machine_check_e500mc, 2169 .platform = "ppce6500", 2170 .cpu_down_flush = cpu_down_flush_e6500, 2171 }, 2172 #endif /* CONFIG_PPC_E500MC */ 2173 #ifdef CONFIG_PPC32 2174 { /* default match */ 2175 .pvr_mask = 0x00000000, 2176 .pvr_value = 0x00000000, 2177 .cpu_name = "(generic E500 PPC)", 2178 .cpu_features = CPU_FTRS_E500, 2179 .cpu_user_features = COMMON_USER_BOOKE | 2180 PPC_FEATURE_HAS_SPE_COMP | 2181 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2182 .mmu_features = MMU_FTR_TYPE_FSL_E, 2183 .icache_bsize = 32, 2184 .dcache_bsize = 32, 2185 .machine_check = machine_check_e500, 2186 .platform = "powerpc", 2187 } 2188 #endif /* CONFIG_PPC32 */ 2189 #endif /* CONFIG_E500 */ 2190 }; 2191 2192 void __init set_cur_cpu_spec(struct cpu_spec *s) 2193 { 2194 struct cpu_spec *t = &the_cpu_spec; 2195 2196 t = PTRRELOC(t); 2197 *t = *s; 2198 2199 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2200 } 2201 2202 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2203 struct cpu_spec *s) 2204 { 2205 struct cpu_spec *t = &the_cpu_spec; 2206 struct cpu_spec old; 2207 2208 t = PTRRELOC(t); 2209 old = *t; 2210 2211 /* Copy everything, then do fixups */ 2212 *t = *s; 2213 2214 /* 2215 * If we are overriding a previous value derived from the real 2216 * PVR with a new value obtained using a logical PVR value, 2217 * don't modify the performance monitor fields. 2218 */ 2219 if (old.num_pmcs && !s->num_pmcs) { 2220 t->num_pmcs = old.num_pmcs; 2221 t->pmc_type = old.pmc_type; 2222 t->oprofile_type = old.oprofile_type; 2223 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2224 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2225 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2226 2227 /* 2228 * If we have passed through this logic once before and 2229 * have pulled the default case because the real PVR was 2230 * not found inside cpu_specs[], then we are possibly 2231 * running in compatibility mode. In that case, let the 2232 * oprofiler know which set of compatibility counters to 2233 * pull from by making sure the oprofile_cpu_type string 2234 * is set to that of compatibility mode. If the 2235 * oprofile_cpu_type already has a value, then we are 2236 * possibly overriding a real PVR with a logical one, 2237 * and, in that case, keep the current value for 2238 * oprofile_cpu_type. 2239 */ 2240 if (old.oprofile_cpu_type != NULL) { 2241 t->oprofile_cpu_type = old.oprofile_cpu_type; 2242 t->oprofile_type = old.oprofile_type; 2243 } 2244 } 2245 2246 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2247 2248 /* 2249 * Set the base platform string once; assumes 2250 * we're called with real pvr first. 2251 */ 2252 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2253 *PTRRELOC(&powerpc_base_platform) = t->platform; 2254 2255 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2256 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2257 * that processor. I will consolidate that at a later time, for now, 2258 * just use #ifdef. We also don't need to PTRRELOC the function 2259 * pointer on ppc64 and booke as we are running at 0 in real mode 2260 * on ppc64 and reloc_offset is always 0 on booke. 2261 */ 2262 if (t->cpu_setup) { 2263 t->cpu_setup(offset, t); 2264 } 2265 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2266 2267 return t; 2268 } 2269 2270 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2271 { 2272 struct cpu_spec *s = cpu_specs; 2273 int i; 2274 2275 s = PTRRELOC(s); 2276 2277 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2278 if ((pvr & s->pvr_mask) == s->pvr_value) 2279 return setup_cpu_spec(offset, s); 2280 } 2281 2282 BUG(); 2283 2284 return NULL; 2285 } 2286 2287 /* 2288 * Used by cpufeatures to get the name for CPUs with a PVR table. 2289 * If they don't hae a PVR table, cpufeatures gets the name from 2290 * cpu device-tree node. 2291 */ 2292 void __init identify_cpu_name(unsigned int pvr) 2293 { 2294 struct cpu_spec *s = cpu_specs; 2295 struct cpu_spec *t = &the_cpu_spec; 2296 int i; 2297 2298 s = PTRRELOC(s); 2299 t = PTRRELOC(t); 2300 2301 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2302 if ((pvr & s->pvr_mask) == s->pvr_value) { 2303 t->cpu_name = s->cpu_name; 2304 return; 2305 } 2306 } 2307 } 2308 2309 2310 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2311 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2312 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2313 }; 2314 EXPORT_SYMBOL_GPL(cpu_feature_keys); 2315 2316 void __init cpu_feature_keys_init(void) 2317 { 2318 int i; 2319 2320 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2321 unsigned long f = 1ul << i; 2322 2323 if (!(cur_cpu_spec->cpu_features & f)) 2324 static_branch_disable(&cpu_feature_keys[i]); 2325 } 2326 } 2327 2328 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2329 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2330 }; 2331 EXPORT_SYMBOL_GPL(mmu_feature_keys); 2332 2333 void __init mmu_feature_keys_init(void) 2334 { 2335 int i; 2336 2337 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2338 unsigned long f = 1ul << i; 2339 2340 if (!(cur_cpu_spec->mmu_features & f)) 2341 static_branch_disable(&mmu_feature_keys[i]); 2342 } 2343 } 2344 #endif 2345