1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/module.h> 18 19 #include <asm/oprofile_impl.h> 20 #include <asm/cputable.h> 21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22 #include <asm/mmu.h> 23 24 struct cpu_spec* cur_cpu_spec = NULL; 25 EXPORT_SYMBOL(cur_cpu_spec); 26 27 /* The platform string corresponding to the real PVR */ 28 const char *powerpc_base_platform; 29 30 /* NOTE: 31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 32 * the responsibility of the appropriate CPU save/restore functions to 33 * eventually copy these settings over. Those save/restore aren't yet 34 * part of the cputable though. That has to be fixed for both ppc32 35 * and ppc64 36 */ 37 #ifdef CONFIG_PPC32 38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 51 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 52 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 59 #endif /* CONFIG_PPC32 */ 60 #ifdef CONFIG_PPC64 61 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 62 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 64 extern void __restore_cpu_pa6t(void); 65 extern void __restore_cpu_ppc970(void); 66 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 67 extern void __restore_cpu_power7(void); 68 #endif /* CONFIG_PPC64 */ 69 70 /* This table only contains "desktop" CPUs, it need to be filled with embedded 71 * ones as well... 72 */ 73 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 74 PPC_FEATURE_HAS_MMU) 75 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 76 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 77 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 78 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 79 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 80 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 81 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 82 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 83 PPC_FEATURE_TRUE_LE | \ 84 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 85 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 86 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 87 PPC_FEATURE_TRUE_LE | \ 88 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 89 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 90 PPC_FEATURE_TRUE_LE | \ 91 PPC_FEATURE_HAS_ALTIVEC_COMP) 92 #ifdef CONFIG_PPC_BOOK3E_64 93 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 94 #else 95 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 96 PPC_FEATURE_BOOKE) 97 #endif 98 99 static struct cpu_spec __initdata cpu_specs[] = { 100 #ifdef CONFIG_PPC_BOOK3S_64 101 { /* Power3 */ 102 .pvr_mask = 0xffff0000, 103 .pvr_value = 0x00400000, 104 .cpu_name = "POWER3 (630)", 105 .cpu_features = CPU_FTRS_POWER3, 106 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 107 .mmu_features = MMU_FTR_HPTE_TABLE, 108 .icache_bsize = 128, 109 .dcache_bsize = 128, 110 .num_pmcs = 8, 111 .pmc_type = PPC_PMC_IBM, 112 .oprofile_cpu_type = "ppc64/power3", 113 .oprofile_type = PPC_OPROFILE_RS64, 114 .machine_check = machine_check_generic, 115 .platform = "power3", 116 }, 117 { /* Power3+ */ 118 .pvr_mask = 0xffff0000, 119 .pvr_value = 0x00410000, 120 .cpu_name = "POWER3 (630+)", 121 .cpu_features = CPU_FTRS_POWER3, 122 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 123 .mmu_features = MMU_FTR_HPTE_TABLE, 124 .icache_bsize = 128, 125 .dcache_bsize = 128, 126 .num_pmcs = 8, 127 .pmc_type = PPC_PMC_IBM, 128 .oprofile_cpu_type = "ppc64/power3", 129 .oprofile_type = PPC_OPROFILE_RS64, 130 .machine_check = machine_check_generic, 131 .platform = "power3", 132 }, 133 { /* Northstar */ 134 .pvr_mask = 0xffff0000, 135 .pvr_value = 0x00330000, 136 .cpu_name = "RS64-II (northstar)", 137 .cpu_features = CPU_FTRS_RS64, 138 .cpu_user_features = COMMON_USER_PPC64, 139 .mmu_features = MMU_FTR_HPTE_TABLE, 140 .icache_bsize = 128, 141 .dcache_bsize = 128, 142 .num_pmcs = 8, 143 .pmc_type = PPC_PMC_IBM, 144 .oprofile_cpu_type = "ppc64/rs64", 145 .oprofile_type = PPC_OPROFILE_RS64, 146 .machine_check = machine_check_generic, 147 .platform = "rs64", 148 }, 149 { /* Pulsar */ 150 .pvr_mask = 0xffff0000, 151 .pvr_value = 0x00340000, 152 .cpu_name = "RS64-III (pulsar)", 153 .cpu_features = CPU_FTRS_RS64, 154 .cpu_user_features = COMMON_USER_PPC64, 155 .mmu_features = MMU_FTR_HPTE_TABLE, 156 .icache_bsize = 128, 157 .dcache_bsize = 128, 158 .num_pmcs = 8, 159 .pmc_type = PPC_PMC_IBM, 160 .oprofile_cpu_type = "ppc64/rs64", 161 .oprofile_type = PPC_OPROFILE_RS64, 162 .machine_check = machine_check_generic, 163 .platform = "rs64", 164 }, 165 { /* I-star */ 166 .pvr_mask = 0xffff0000, 167 .pvr_value = 0x00360000, 168 .cpu_name = "RS64-III (icestar)", 169 .cpu_features = CPU_FTRS_RS64, 170 .cpu_user_features = COMMON_USER_PPC64, 171 .mmu_features = MMU_FTR_HPTE_TABLE, 172 .icache_bsize = 128, 173 .dcache_bsize = 128, 174 .num_pmcs = 8, 175 .pmc_type = PPC_PMC_IBM, 176 .oprofile_cpu_type = "ppc64/rs64", 177 .oprofile_type = PPC_OPROFILE_RS64, 178 .machine_check = machine_check_generic, 179 .platform = "rs64", 180 }, 181 { /* S-star */ 182 .pvr_mask = 0xffff0000, 183 .pvr_value = 0x00370000, 184 .cpu_name = "RS64-IV (sstar)", 185 .cpu_features = CPU_FTRS_RS64, 186 .cpu_user_features = COMMON_USER_PPC64, 187 .mmu_features = MMU_FTR_HPTE_TABLE, 188 .icache_bsize = 128, 189 .dcache_bsize = 128, 190 .num_pmcs = 8, 191 .pmc_type = PPC_PMC_IBM, 192 .oprofile_cpu_type = "ppc64/rs64", 193 .oprofile_type = PPC_OPROFILE_RS64, 194 .machine_check = machine_check_generic, 195 .platform = "rs64", 196 }, 197 { /* Power4 */ 198 .pvr_mask = 0xffff0000, 199 .pvr_value = 0x00350000, 200 .cpu_name = "POWER4 (gp)", 201 .cpu_features = CPU_FTRS_POWER4, 202 .cpu_user_features = COMMON_USER_POWER4, 203 .mmu_features = MMU_FTR_HPTE_TABLE, 204 .icache_bsize = 128, 205 .dcache_bsize = 128, 206 .num_pmcs = 8, 207 .pmc_type = PPC_PMC_IBM, 208 .oprofile_cpu_type = "ppc64/power4", 209 .oprofile_type = PPC_OPROFILE_POWER4, 210 .machine_check = machine_check_generic, 211 .platform = "power4", 212 }, 213 { /* Power4+ */ 214 .pvr_mask = 0xffff0000, 215 .pvr_value = 0x00380000, 216 .cpu_name = "POWER4+ (gq)", 217 .cpu_features = CPU_FTRS_POWER4, 218 .cpu_user_features = COMMON_USER_POWER4, 219 .mmu_features = MMU_FTR_HPTE_TABLE, 220 .icache_bsize = 128, 221 .dcache_bsize = 128, 222 .num_pmcs = 8, 223 .pmc_type = PPC_PMC_IBM, 224 .oprofile_cpu_type = "ppc64/power4", 225 .oprofile_type = PPC_OPROFILE_POWER4, 226 .machine_check = machine_check_generic, 227 .platform = "power4", 228 }, 229 { /* PPC970 */ 230 .pvr_mask = 0xffff0000, 231 .pvr_value = 0x00390000, 232 .cpu_name = "PPC970", 233 .cpu_features = CPU_FTRS_PPC970, 234 .cpu_user_features = COMMON_USER_POWER4 | 235 PPC_FEATURE_HAS_ALTIVEC_COMP, 236 .mmu_features = MMU_FTR_HPTE_TABLE, 237 .icache_bsize = 128, 238 .dcache_bsize = 128, 239 .num_pmcs = 8, 240 .pmc_type = PPC_PMC_IBM, 241 .cpu_setup = __setup_cpu_ppc970, 242 .cpu_restore = __restore_cpu_ppc970, 243 .oprofile_cpu_type = "ppc64/970", 244 .oprofile_type = PPC_OPROFILE_POWER4, 245 .machine_check = machine_check_generic, 246 .platform = "ppc970", 247 }, 248 { /* PPC970FX */ 249 .pvr_mask = 0xffff0000, 250 .pvr_value = 0x003c0000, 251 .cpu_name = "PPC970FX", 252 .cpu_features = CPU_FTRS_PPC970, 253 .cpu_user_features = COMMON_USER_POWER4 | 254 PPC_FEATURE_HAS_ALTIVEC_COMP, 255 .mmu_features = MMU_FTR_HPTE_TABLE, 256 .icache_bsize = 128, 257 .dcache_bsize = 128, 258 .num_pmcs = 8, 259 .pmc_type = PPC_PMC_IBM, 260 .cpu_setup = __setup_cpu_ppc970, 261 .cpu_restore = __restore_cpu_ppc970, 262 .oprofile_cpu_type = "ppc64/970", 263 .oprofile_type = PPC_OPROFILE_POWER4, 264 .machine_check = machine_check_generic, 265 .platform = "ppc970", 266 }, 267 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 268 .pvr_mask = 0xffffffff, 269 .pvr_value = 0x00440100, 270 .cpu_name = "PPC970MP", 271 .cpu_features = CPU_FTRS_PPC970, 272 .cpu_user_features = COMMON_USER_POWER4 | 273 PPC_FEATURE_HAS_ALTIVEC_COMP, 274 .mmu_features = MMU_FTR_HPTE_TABLE, 275 .icache_bsize = 128, 276 .dcache_bsize = 128, 277 .num_pmcs = 8, 278 .pmc_type = PPC_PMC_IBM, 279 .cpu_setup = __setup_cpu_ppc970, 280 .cpu_restore = __restore_cpu_ppc970, 281 .oprofile_cpu_type = "ppc64/970MP", 282 .oprofile_type = PPC_OPROFILE_POWER4, 283 .machine_check = machine_check_generic, 284 .platform = "ppc970", 285 }, 286 { /* PPC970MP */ 287 .pvr_mask = 0xffff0000, 288 .pvr_value = 0x00440000, 289 .cpu_name = "PPC970MP", 290 .cpu_features = CPU_FTRS_PPC970, 291 .cpu_user_features = COMMON_USER_POWER4 | 292 PPC_FEATURE_HAS_ALTIVEC_COMP, 293 .mmu_features = MMU_FTR_HPTE_TABLE, 294 .icache_bsize = 128, 295 .dcache_bsize = 128, 296 .num_pmcs = 8, 297 .pmc_type = PPC_PMC_IBM, 298 .cpu_setup = __setup_cpu_ppc970MP, 299 .cpu_restore = __restore_cpu_ppc970, 300 .oprofile_cpu_type = "ppc64/970MP", 301 .oprofile_type = PPC_OPROFILE_POWER4, 302 .machine_check = machine_check_generic, 303 .platform = "ppc970", 304 }, 305 { /* PPC970GX */ 306 .pvr_mask = 0xffff0000, 307 .pvr_value = 0x00450000, 308 .cpu_name = "PPC970GX", 309 .cpu_features = CPU_FTRS_PPC970, 310 .cpu_user_features = COMMON_USER_POWER4 | 311 PPC_FEATURE_HAS_ALTIVEC_COMP, 312 .mmu_features = MMU_FTR_HPTE_TABLE, 313 .icache_bsize = 128, 314 .dcache_bsize = 128, 315 .num_pmcs = 8, 316 .pmc_type = PPC_PMC_IBM, 317 .cpu_setup = __setup_cpu_ppc970, 318 .oprofile_cpu_type = "ppc64/970", 319 .oprofile_type = PPC_OPROFILE_POWER4, 320 .machine_check = machine_check_generic, 321 .platform = "ppc970", 322 }, 323 { /* Power5 GR */ 324 .pvr_mask = 0xffff0000, 325 .pvr_value = 0x003a0000, 326 .cpu_name = "POWER5 (gr)", 327 .cpu_features = CPU_FTRS_POWER5, 328 .cpu_user_features = COMMON_USER_POWER5, 329 .mmu_features = MMU_FTR_HPTE_TABLE, 330 .icache_bsize = 128, 331 .dcache_bsize = 128, 332 .num_pmcs = 6, 333 .pmc_type = PPC_PMC_IBM, 334 .oprofile_cpu_type = "ppc64/power5", 335 .oprofile_type = PPC_OPROFILE_POWER4, 336 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 337 * and above but only works on POWER5 and above 338 */ 339 .oprofile_mmcra_sihv = MMCRA_SIHV, 340 .oprofile_mmcra_sipr = MMCRA_SIPR, 341 .machine_check = machine_check_generic, 342 .platform = "power5", 343 }, 344 { /* Power5++ */ 345 .pvr_mask = 0xffffff00, 346 .pvr_value = 0x003b0300, 347 .cpu_name = "POWER5+ (gs)", 348 .cpu_features = CPU_FTRS_POWER5, 349 .cpu_user_features = COMMON_USER_POWER5_PLUS, 350 .mmu_features = MMU_FTR_HPTE_TABLE, 351 .icache_bsize = 128, 352 .dcache_bsize = 128, 353 .num_pmcs = 6, 354 .oprofile_cpu_type = "ppc64/power5++", 355 .oprofile_type = PPC_OPROFILE_POWER4, 356 .oprofile_mmcra_sihv = MMCRA_SIHV, 357 .oprofile_mmcra_sipr = MMCRA_SIPR, 358 .machine_check = machine_check_generic, 359 .platform = "power5+", 360 }, 361 { /* Power5 GS */ 362 .pvr_mask = 0xffff0000, 363 .pvr_value = 0x003b0000, 364 .cpu_name = "POWER5+ (gs)", 365 .cpu_features = CPU_FTRS_POWER5, 366 .cpu_user_features = COMMON_USER_POWER5_PLUS, 367 .mmu_features = MMU_FTR_HPTE_TABLE, 368 .icache_bsize = 128, 369 .dcache_bsize = 128, 370 .num_pmcs = 6, 371 .pmc_type = PPC_PMC_IBM, 372 .oprofile_cpu_type = "ppc64/power5+", 373 .oprofile_type = PPC_OPROFILE_POWER4, 374 .oprofile_mmcra_sihv = MMCRA_SIHV, 375 .oprofile_mmcra_sipr = MMCRA_SIPR, 376 .machine_check = machine_check_generic, 377 .platform = "power5+", 378 }, 379 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 380 .pvr_mask = 0xffffffff, 381 .pvr_value = 0x0f000001, 382 .cpu_name = "POWER5+", 383 .cpu_features = CPU_FTRS_POWER5, 384 .cpu_user_features = COMMON_USER_POWER5_PLUS, 385 .mmu_features = MMU_FTR_HPTE_TABLE, 386 .icache_bsize = 128, 387 .dcache_bsize = 128, 388 .machine_check = machine_check_generic, 389 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 390 .oprofile_type = PPC_OPROFILE_POWER4, 391 .platform = "power5+", 392 }, 393 { /* Power6 */ 394 .pvr_mask = 0xffff0000, 395 .pvr_value = 0x003e0000, 396 .cpu_name = "POWER6 (raw)", 397 .cpu_features = CPU_FTRS_POWER6, 398 .cpu_user_features = COMMON_USER_POWER6 | 399 PPC_FEATURE_POWER6_EXT, 400 .mmu_features = MMU_FTR_HPTE_TABLE, 401 .icache_bsize = 128, 402 .dcache_bsize = 128, 403 .num_pmcs = 6, 404 .pmc_type = PPC_PMC_IBM, 405 .oprofile_cpu_type = "ppc64/power6", 406 .oprofile_type = PPC_OPROFILE_POWER4, 407 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 408 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 409 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 410 POWER6_MMCRA_OTHER, 411 .machine_check = machine_check_generic, 412 .platform = "power6x", 413 }, 414 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 415 .pvr_mask = 0xffffffff, 416 .pvr_value = 0x0f000002, 417 .cpu_name = "POWER6 (architected)", 418 .cpu_features = CPU_FTRS_POWER6, 419 .cpu_user_features = COMMON_USER_POWER6, 420 .mmu_features = MMU_FTR_HPTE_TABLE, 421 .icache_bsize = 128, 422 .dcache_bsize = 128, 423 .machine_check = machine_check_generic, 424 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 425 .oprofile_type = PPC_OPROFILE_POWER4, 426 .platform = "power6", 427 }, 428 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 429 .pvr_mask = 0xffffffff, 430 .pvr_value = 0x0f000003, 431 .cpu_name = "POWER7 (architected)", 432 .cpu_features = CPU_FTRS_POWER7, 433 .cpu_user_features = COMMON_USER_POWER7, 434 .mmu_features = MMU_FTR_HPTE_TABLE | 435 MMU_FTR_TLBIE_206, 436 .icache_bsize = 128, 437 .dcache_bsize = 128, 438 .machine_check = machine_check_generic, 439 .oprofile_type = PPC_OPROFILE_POWER4, 440 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 441 .platform = "power7", 442 }, 443 { /* Power7 */ 444 .pvr_mask = 0xffff0000, 445 .pvr_value = 0x003f0000, 446 .cpu_name = "POWER7 (raw)", 447 .cpu_features = CPU_FTRS_POWER7, 448 .cpu_user_features = COMMON_USER_POWER7, 449 .mmu_features = MMU_FTR_HPTE_TABLE | 450 MMU_FTR_TLBIE_206, 451 .icache_bsize = 128, 452 .dcache_bsize = 128, 453 .num_pmcs = 6, 454 .pmc_type = PPC_PMC_IBM, 455 .cpu_setup = __setup_cpu_power7, 456 .cpu_restore = __restore_cpu_power7, 457 .oprofile_cpu_type = "ppc64/power7", 458 .oprofile_type = PPC_OPROFILE_POWER4, 459 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 460 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 461 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 462 POWER6_MMCRA_OTHER, 463 .platform = "power7", 464 }, 465 { /* Cell Broadband Engine */ 466 .pvr_mask = 0xffff0000, 467 .pvr_value = 0x00700000, 468 .cpu_name = "Cell Broadband Engine", 469 .cpu_features = CPU_FTRS_CELL, 470 .cpu_user_features = COMMON_USER_PPC64 | 471 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 472 PPC_FEATURE_SMT, 473 .mmu_features = MMU_FTR_HPTE_TABLE, 474 .icache_bsize = 128, 475 .dcache_bsize = 128, 476 .num_pmcs = 4, 477 .pmc_type = PPC_PMC_IBM, 478 .oprofile_cpu_type = "ppc64/cell-be", 479 .oprofile_type = PPC_OPROFILE_CELL, 480 .machine_check = machine_check_generic, 481 .platform = "ppc-cell-be", 482 }, 483 { /* PA Semi PA6T */ 484 .pvr_mask = 0x7fff0000, 485 .pvr_value = 0x00900000, 486 .cpu_name = "PA6T", 487 .cpu_features = CPU_FTRS_PA6T, 488 .cpu_user_features = COMMON_USER_PA6T, 489 .mmu_features = MMU_FTR_HPTE_TABLE, 490 .icache_bsize = 64, 491 .dcache_bsize = 64, 492 .num_pmcs = 6, 493 .pmc_type = PPC_PMC_PA6T, 494 .cpu_setup = __setup_cpu_pa6t, 495 .cpu_restore = __restore_cpu_pa6t, 496 .oprofile_cpu_type = "ppc64/pa6t", 497 .oprofile_type = PPC_OPROFILE_PA6T, 498 .machine_check = machine_check_generic, 499 .platform = "pa6t", 500 }, 501 { /* default match */ 502 .pvr_mask = 0x00000000, 503 .pvr_value = 0x00000000, 504 .cpu_name = "POWER4 (compatible)", 505 .cpu_features = CPU_FTRS_COMPATIBLE, 506 .cpu_user_features = COMMON_USER_PPC64, 507 .mmu_features = MMU_FTR_HPTE_TABLE, 508 .icache_bsize = 128, 509 .dcache_bsize = 128, 510 .num_pmcs = 6, 511 .pmc_type = PPC_PMC_IBM, 512 .machine_check = machine_check_generic, 513 .platform = "power4", 514 } 515 #endif /* CONFIG_PPC_BOOK3S_64 */ 516 517 #ifdef CONFIG_PPC32 518 #if CLASSIC_PPC 519 { /* 601 */ 520 .pvr_mask = 0xffff0000, 521 .pvr_value = 0x00010000, 522 .cpu_name = "601", 523 .cpu_features = CPU_FTRS_PPC601, 524 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 525 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 526 .mmu_features = MMU_FTR_HPTE_TABLE, 527 .icache_bsize = 32, 528 .dcache_bsize = 32, 529 .machine_check = machine_check_generic, 530 .platform = "ppc601", 531 }, 532 { /* 603 */ 533 .pvr_mask = 0xffff0000, 534 .pvr_value = 0x00030000, 535 .cpu_name = "603", 536 .cpu_features = CPU_FTRS_603, 537 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 538 .mmu_features = 0, 539 .icache_bsize = 32, 540 .dcache_bsize = 32, 541 .cpu_setup = __setup_cpu_603, 542 .machine_check = machine_check_generic, 543 .platform = "ppc603", 544 }, 545 { /* 603e */ 546 .pvr_mask = 0xffff0000, 547 .pvr_value = 0x00060000, 548 .cpu_name = "603e", 549 .cpu_features = CPU_FTRS_603, 550 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 551 .mmu_features = 0, 552 .icache_bsize = 32, 553 .dcache_bsize = 32, 554 .cpu_setup = __setup_cpu_603, 555 .machine_check = machine_check_generic, 556 .platform = "ppc603", 557 }, 558 { /* 603ev */ 559 .pvr_mask = 0xffff0000, 560 .pvr_value = 0x00070000, 561 .cpu_name = "603ev", 562 .cpu_features = CPU_FTRS_603, 563 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 564 .mmu_features = 0, 565 .icache_bsize = 32, 566 .dcache_bsize = 32, 567 .cpu_setup = __setup_cpu_603, 568 .machine_check = machine_check_generic, 569 .platform = "ppc603", 570 }, 571 { /* 604 */ 572 .pvr_mask = 0xffff0000, 573 .pvr_value = 0x00040000, 574 .cpu_name = "604", 575 .cpu_features = CPU_FTRS_604, 576 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 577 .mmu_features = MMU_FTR_HPTE_TABLE, 578 .icache_bsize = 32, 579 .dcache_bsize = 32, 580 .num_pmcs = 2, 581 .cpu_setup = __setup_cpu_604, 582 .machine_check = machine_check_generic, 583 .platform = "ppc604", 584 }, 585 { /* 604e */ 586 .pvr_mask = 0xfffff000, 587 .pvr_value = 0x00090000, 588 .cpu_name = "604e", 589 .cpu_features = CPU_FTRS_604, 590 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 591 .mmu_features = MMU_FTR_HPTE_TABLE, 592 .icache_bsize = 32, 593 .dcache_bsize = 32, 594 .num_pmcs = 4, 595 .cpu_setup = __setup_cpu_604, 596 .machine_check = machine_check_generic, 597 .platform = "ppc604", 598 }, 599 { /* 604r */ 600 .pvr_mask = 0xffff0000, 601 .pvr_value = 0x00090000, 602 .cpu_name = "604r", 603 .cpu_features = CPU_FTRS_604, 604 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 605 .mmu_features = MMU_FTR_HPTE_TABLE, 606 .icache_bsize = 32, 607 .dcache_bsize = 32, 608 .num_pmcs = 4, 609 .cpu_setup = __setup_cpu_604, 610 .machine_check = machine_check_generic, 611 .platform = "ppc604", 612 }, 613 { /* 604ev */ 614 .pvr_mask = 0xffff0000, 615 .pvr_value = 0x000a0000, 616 .cpu_name = "604ev", 617 .cpu_features = CPU_FTRS_604, 618 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 619 .mmu_features = MMU_FTR_HPTE_TABLE, 620 .icache_bsize = 32, 621 .dcache_bsize = 32, 622 .num_pmcs = 4, 623 .cpu_setup = __setup_cpu_604, 624 .machine_check = machine_check_generic, 625 .platform = "ppc604", 626 }, 627 { /* 740/750 (0x4202, don't support TAU ?) */ 628 .pvr_mask = 0xffffffff, 629 .pvr_value = 0x00084202, 630 .cpu_name = "740/750", 631 .cpu_features = CPU_FTRS_740_NOTAU, 632 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 633 .mmu_features = MMU_FTR_HPTE_TABLE, 634 .icache_bsize = 32, 635 .dcache_bsize = 32, 636 .num_pmcs = 4, 637 .cpu_setup = __setup_cpu_750, 638 .machine_check = machine_check_generic, 639 .platform = "ppc750", 640 }, 641 { /* 750CX (80100 and 8010x?) */ 642 .pvr_mask = 0xfffffff0, 643 .pvr_value = 0x00080100, 644 .cpu_name = "750CX", 645 .cpu_features = CPU_FTRS_750, 646 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 647 .mmu_features = MMU_FTR_HPTE_TABLE, 648 .icache_bsize = 32, 649 .dcache_bsize = 32, 650 .num_pmcs = 4, 651 .cpu_setup = __setup_cpu_750cx, 652 .machine_check = machine_check_generic, 653 .platform = "ppc750", 654 }, 655 { /* 750CX (82201 and 82202) */ 656 .pvr_mask = 0xfffffff0, 657 .pvr_value = 0x00082200, 658 .cpu_name = "750CX", 659 .cpu_features = CPU_FTRS_750, 660 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 661 .mmu_features = MMU_FTR_HPTE_TABLE, 662 .icache_bsize = 32, 663 .dcache_bsize = 32, 664 .num_pmcs = 4, 665 .pmc_type = PPC_PMC_IBM, 666 .cpu_setup = __setup_cpu_750cx, 667 .machine_check = machine_check_generic, 668 .platform = "ppc750", 669 }, 670 { /* 750CXe (82214) */ 671 .pvr_mask = 0xfffffff0, 672 .pvr_value = 0x00082210, 673 .cpu_name = "750CXe", 674 .cpu_features = CPU_FTRS_750, 675 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 676 .mmu_features = MMU_FTR_HPTE_TABLE, 677 .icache_bsize = 32, 678 .dcache_bsize = 32, 679 .num_pmcs = 4, 680 .pmc_type = PPC_PMC_IBM, 681 .cpu_setup = __setup_cpu_750cx, 682 .machine_check = machine_check_generic, 683 .platform = "ppc750", 684 }, 685 { /* 750CXe "Gekko" (83214) */ 686 .pvr_mask = 0xffffffff, 687 .pvr_value = 0x00083214, 688 .cpu_name = "750CXe", 689 .cpu_features = CPU_FTRS_750, 690 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 691 .mmu_features = MMU_FTR_HPTE_TABLE, 692 .icache_bsize = 32, 693 .dcache_bsize = 32, 694 .num_pmcs = 4, 695 .pmc_type = PPC_PMC_IBM, 696 .cpu_setup = __setup_cpu_750cx, 697 .machine_check = machine_check_generic, 698 .platform = "ppc750", 699 }, 700 { /* 750CL */ 701 .pvr_mask = 0xfffff0f0, 702 .pvr_value = 0x00087010, 703 .cpu_name = "750CL", 704 .cpu_features = CPU_FTRS_750CL, 705 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 706 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 707 .icache_bsize = 32, 708 .dcache_bsize = 32, 709 .num_pmcs = 4, 710 .pmc_type = PPC_PMC_IBM, 711 .cpu_setup = __setup_cpu_750, 712 .machine_check = machine_check_generic, 713 .platform = "ppc750", 714 }, 715 { /* 745/755 */ 716 .pvr_mask = 0xfffff000, 717 .pvr_value = 0x00083000, 718 .cpu_name = "745/755", 719 .cpu_features = CPU_FTRS_750, 720 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 721 .mmu_features = MMU_FTR_HPTE_TABLE, 722 .icache_bsize = 32, 723 .dcache_bsize = 32, 724 .num_pmcs = 4, 725 .pmc_type = PPC_PMC_IBM, 726 .cpu_setup = __setup_cpu_750, 727 .machine_check = machine_check_generic, 728 .platform = "ppc750", 729 }, 730 { /* 750FX rev 1.x */ 731 .pvr_mask = 0xffffff00, 732 .pvr_value = 0x70000100, 733 .cpu_name = "750FX", 734 .cpu_features = CPU_FTRS_750FX1, 735 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 736 .mmu_features = MMU_FTR_HPTE_TABLE, 737 .icache_bsize = 32, 738 .dcache_bsize = 32, 739 .num_pmcs = 4, 740 .pmc_type = PPC_PMC_IBM, 741 .cpu_setup = __setup_cpu_750, 742 .machine_check = machine_check_generic, 743 .platform = "ppc750", 744 .oprofile_cpu_type = "ppc/750", 745 .oprofile_type = PPC_OPROFILE_G4, 746 }, 747 { /* 750FX rev 2.0 must disable HID0[DPM] */ 748 .pvr_mask = 0xffffffff, 749 .pvr_value = 0x70000200, 750 .cpu_name = "750FX", 751 .cpu_features = CPU_FTRS_750FX2, 752 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 753 .mmu_features = MMU_FTR_HPTE_TABLE, 754 .icache_bsize = 32, 755 .dcache_bsize = 32, 756 .num_pmcs = 4, 757 .pmc_type = PPC_PMC_IBM, 758 .cpu_setup = __setup_cpu_750, 759 .machine_check = machine_check_generic, 760 .platform = "ppc750", 761 .oprofile_cpu_type = "ppc/750", 762 .oprofile_type = PPC_OPROFILE_G4, 763 }, 764 { /* 750FX (All revs except 2.0) */ 765 .pvr_mask = 0xffff0000, 766 .pvr_value = 0x70000000, 767 .cpu_name = "750FX", 768 .cpu_features = CPU_FTRS_750FX, 769 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 770 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 771 .icache_bsize = 32, 772 .dcache_bsize = 32, 773 .num_pmcs = 4, 774 .pmc_type = PPC_PMC_IBM, 775 .cpu_setup = __setup_cpu_750fx, 776 .machine_check = machine_check_generic, 777 .platform = "ppc750", 778 .oprofile_cpu_type = "ppc/750", 779 .oprofile_type = PPC_OPROFILE_G4, 780 }, 781 { /* 750GX */ 782 .pvr_mask = 0xffff0000, 783 .pvr_value = 0x70020000, 784 .cpu_name = "750GX", 785 .cpu_features = CPU_FTRS_750GX, 786 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 787 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 788 .icache_bsize = 32, 789 .dcache_bsize = 32, 790 .num_pmcs = 4, 791 .pmc_type = PPC_PMC_IBM, 792 .cpu_setup = __setup_cpu_750fx, 793 .machine_check = machine_check_generic, 794 .platform = "ppc750", 795 .oprofile_cpu_type = "ppc/750", 796 .oprofile_type = PPC_OPROFILE_G4, 797 }, 798 { /* 740/750 (L2CR bit need fixup for 740) */ 799 .pvr_mask = 0xffff0000, 800 .pvr_value = 0x00080000, 801 .cpu_name = "740/750", 802 .cpu_features = CPU_FTRS_740, 803 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 804 .mmu_features = MMU_FTR_HPTE_TABLE, 805 .icache_bsize = 32, 806 .dcache_bsize = 32, 807 .num_pmcs = 4, 808 .pmc_type = PPC_PMC_IBM, 809 .cpu_setup = __setup_cpu_750, 810 .machine_check = machine_check_generic, 811 .platform = "ppc750", 812 }, 813 { /* 7400 rev 1.1 ? (no TAU) */ 814 .pvr_mask = 0xffffffff, 815 .pvr_value = 0x000c1101, 816 .cpu_name = "7400 (1.1)", 817 .cpu_features = CPU_FTRS_7400_NOTAU, 818 .cpu_user_features = COMMON_USER | 819 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 820 .mmu_features = MMU_FTR_HPTE_TABLE, 821 .icache_bsize = 32, 822 .dcache_bsize = 32, 823 .num_pmcs = 4, 824 .pmc_type = PPC_PMC_G4, 825 .cpu_setup = __setup_cpu_7400, 826 .machine_check = machine_check_generic, 827 .platform = "ppc7400", 828 }, 829 { /* 7400 */ 830 .pvr_mask = 0xffff0000, 831 .pvr_value = 0x000c0000, 832 .cpu_name = "7400", 833 .cpu_features = CPU_FTRS_7400, 834 .cpu_user_features = COMMON_USER | 835 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 836 .mmu_features = MMU_FTR_HPTE_TABLE, 837 .icache_bsize = 32, 838 .dcache_bsize = 32, 839 .num_pmcs = 4, 840 .pmc_type = PPC_PMC_G4, 841 .cpu_setup = __setup_cpu_7400, 842 .machine_check = machine_check_generic, 843 .platform = "ppc7400", 844 }, 845 { /* 7410 */ 846 .pvr_mask = 0xffff0000, 847 .pvr_value = 0x800c0000, 848 .cpu_name = "7410", 849 .cpu_features = CPU_FTRS_7400, 850 .cpu_user_features = COMMON_USER | 851 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 852 .mmu_features = MMU_FTR_HPTE_TABLE, 853 .icache_bsize = 32, 854 .dcache_bsize = 32, 855 .num_pmcs = 4, 856 .pmc_type = PPC_PMC_G4, 857 .cpu_setup = __setup_cpu_7410, 858 .machine_check = machine_check_generic, 859 .platform = "ppc7400", 860 }, 861 { /* 7450 2.0 - no doze/nap */ 862 .pvr_mask = 0xffffffff, 863 .pvr_value = 0x80000200, 864 .cpu_name = "7450", 865 .cpu_features = CPU_FTRS_7450_20, 866 .cpu_user_features = COMMON_USER | 867 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 868 .mmu_features = MMU_FTR_HPTE_TABLE, 869 .icache_bsize = 32, 870 .dcache_bsize = 32, 871 .num_pmcs = 6, 872 .pmc_type = PPC_PMC_G4, 873 .cpu_setup = __setup_cpu_745x, 874 .oprofile_cpu_type = "ppc/7450", 875 .oprofile_type = PPC_OPROFILE_G4, 876 .machine_check = machine_check_generic, 877 .platform = "ppc7450", 878 }, 879 { /* 7450 2.1 */ 880 .pvr_mask = 0xffffffff, 881 .pvr_value = 0x80000201, 882 .cpu_name = "7450", 883 .cpu_features = CPU_FTRS_7450_21, 884 .cpu_user_features = COMMON_USER | 885 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 886 .mmu_features = MMU_FTR_HPTE_TABLE, 887 .icache_bsize = 32, 888 .dcache_bsize = 32, 889 .num_pmcs = 6, 890 .pmc_type = PPC_PMC_G4, 891 .cpu_setup = __setup_cpu_745x, 892 .oprofile_cpu_type = "ppc/7450", 893 .oprofile_type = PPC_OPROFILE_G4, 894 .machine_check = machine_check_generic, 895 .platform = "ppc7450", 896 }, 897 { /* 7450 2.3 and newer */ 898 .pvr_mask = 0xffff0000, 899 .pvr_value = 0x80000000, 900 .cpu_name = "7450", 901 .cpu_features = CPU_FTRS_7450_23, 902 .cpu_user_features = COMMON_USER | 903 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 904 .mmu_features = MMU_FTR_HPTE_TABLE, 905 .icache_bsize = 32, 906 .dcache_bsize = 32, 907 .num_pmcs = 6, 908 .pmc_type = PPC_PMC_G4, 909 .cpu_setup = __setup_cpu_745x, 910 .oprofile_cpu_type = "ppc/7450", 911 .oprofile_type = PPC_OPROFILE_G4, 912 .machine_check = machine_check_generic, 913 .platform = "ppc7450", 914 }, 915 { /* 7455 rev 1.x */ 916 .pvr_mask = 0xffffff00, 917 .pvr_value = 0x80010100, 918 .cpu_name = "7455", 919 .cpu_features = CPU_FTRS_7455_1, 920 .cpu_user_features = COMMON_USER | 921 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 922 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 923 .icache_bsize = 32, 924 .dcache_bsize = 32, 925 .num_pmcs = 6, 926 .pmc_type = PPC_PMC_G4, 927 .cpu_setup = __setup_cpu_745x, 928 .oprofile_cpu_type = "ppc/7450", 929 .oprofile_type = PPC_OPROFILE_G4, 930 .machine_check = machine_check_generic, 931 .platform = "ppc7450", 932 }, 933 { /* 7455 rev 2.0 */ 934 .pvr_mask = 0xffffffff, 935 .pvr_value = 0x80010200, 936 .cpu_name = "7455", 937 .cpu_features = CPU_FTRS_7455_20, 938 .cpu_user_features = COMMON_USER | 939 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 940 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 941 .icache_bsize = 32, 942 .dcache_bsize = 32, 943 .num_pmcs = 6, 944 .pmc_type = PPC_PMC_G4, 945 .cpu_setup = __setup_cpu_745x, 946 .oprofile_cpu_type = "ppc/7450", 947 .oprofile_type = PPC_OPROFILE_G4, 948 .machine_check = machine_check_generic, 949 .platform = "ppc7450", 950 }, 951 { /* 7455 others */ 952 .pvr_mask = 0xffff0000, 953 .pvr_value = 0x80010000, 954 .cpu_name = "7455", 955 .cpu_features = CPU_FTRS_7455, 956 .cpu_user_features = COMMON_USER | 957 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 958 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 959 .icache_bsize = 32, 960 .dcache_bsize = 32, 961 .num_pmcs = 6, 962 .pmc_type = PPC_PMC_G4, 963 .cpu_setup = __setup_cpu_745x, 964 .oprofile_cpu_type = "ppc/7450", 965 .oprofile_type = PPC_OPROFILE_G4, 966 .machine_check = machine_check_generic, 967 .platform = "ppc7450", 968 }, 969 { /* 7447/7457 Rev 1.0 */ 970 .pvr_mask = 0xffffffff, 971 .pvr_value = 0x80020100, 972 .cpu_name = "7447/7457", 973 .cpu_features = CPU_FTRS_7447_10, 974 .cpu_user_features = COMMON_USER | 975 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 976 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 977 .icache_bsize = 32, 978 .dcache_bsize = 32, 979 .num_pmcs = 6, 980 .pmc_type = PPC_PMC_G4, 981 .cpu_setup = __setup_cpu_745x, 982 .oprofile_cpu_type = "ppc/7450", 983 .oprofile_type = PPC_OPROFILE_G4, 984 .machine_check = machine_check_generic, 985 .platform = "ppc7450", 986 }, 987 { /* 7447/7457 Rev 1.1 */ 988 .pvr_mask = 0xffffffff, 989 .pvr_value = 0x80020101, 990 .cpu_name = "7447/7457", 991 .cpu_features = CPU_FTRS_7447_10, 992 .cpu_user_features = COMMON_USER | 993 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 994 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 995 .icache_bsize = 32, 996 .dcache_bsize = 32, 997 .num_pmcs = 6, 998 .pmc_type = PPC_PMC_G4, 999 .cpu_setup = __setup_cpu_745x, 1000 .oprofile_cpu_type = "ppc/7450", 1001 .oprofile_type = PPC_OPROFILE_G4, 1002 .machine_check = machine_check_generic, 1003 .platform = "ppc7450", 1004 }, 1005 { /* 7447/7457 Rev 1.2 and later */ 1006 .pvr_mask = 0xffff0000, 1007 .pvr_value = 0x80020000, 1008 .cpu_name = "7447/7457", 1009 .cpu_features = CPU_FTRS_7447, 1010 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1011 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1012 .icache_bsize = 32, 1013 .dcache_bsize = 32, 1014 .num_pmcs = 6, 1015 .pmc_type = PPC_PMC_G4, 1016 .cpu_setup = __setup_cpu_745x, 1017 .oprofile_cpu_type = "ppc/7450", 1018 .oprofile_type = PPC_OPROFILE_G4, 1019 .machine_check = machine_check_generic, 1020 .platform = "ppc7450", 1021 }, 1022 { /* 7447A */ 1023 .pvr_mask = 0xffff0000, 1024 .pvr_value = 0x80030000, 1025 .cpu_name = "7447A", 1026 .cpu_features = CPU_FTRS_7447A, 1027 .cpu_user_features = COMMON_USER | 1028 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1029 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1030 .icache_bsize = 32, 1031 .dcache_bsize = 32, 1032 .num_pmcs = 6, 1033 .pmc_type = PPC_PMC_G4, 1034 .cpu_setup = __setup_cpu_745x, 1035 .oprofile_cpu_type = "ppc/7450", 1036 .oprofile_type = PPC_OPROFILE_G4, 1037 .machine_check = machine_check_generic, 1038 .platform = "ppc7450", 1039 }, 1040 { /* 7448 */ 1041 .pvr_mask = 0xffff0000, 1042 .pvr_value = 0x80040000, 1043 .cpu_name = "7448", 1044 .cpu_features = CPU_FTRS_7448, 1045 .cpu_user_features = COMMON_USER | 1046 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1047 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1048 .icache_bsize = 32, 1049 .dcache_bsize = 32, 1050 .num_pmcs = 6, 1051 .pmc_type = PPC_PMC_G4, 1052 .cpu_setup = __setup_cpu_745x, 1053 .oprofile_cpu_type = "ppc/7450", 1054 .oprofile_type = PPC_OPROFILE_G4, 1055 .machine_check = machine_check_generic, 1056 .platform = "ppc7450", 1057 }, 1058 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1059 .pvr_mask = 0x7fff0000, 1060 .pvr_value = 0x00810000, 1061 .cpu_name = "82xx", 1062 .cpu_features = CPU_FTRS_82XX, 1063 .cpu_user_features = COMMON_USER, 1064 .mmu_features = 0, 1065 .icache_bsize = 32, 1066 .dcache_bsize = 32, 1067 .cpu_setup = __setup_cpu_603, 1068 .machine_check = machine_check_generic, 1069 .platform = "ppc603", 1070 }, 1071 { /* All G2_LE (603e core, plus some) have the same pvr */ 1072 .pvr_mask = 0x7fff0000, 1073 .pvr_value = 0x00820000, 1074 .cpu_name = "G2_LE", 1075 .cpu_features = CPU_FTRS_G2_LE, 1076 .cpu_user_features = COMMON_USER, 1077 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1078 .icache_bsize = 32, 1079 .dcache_bsize = 32, 1080 .cpu_setup = __setup_cpu_603, 1081 .machine_check = machine_check_generic, 1082 .platform = "ppc603", 1083 }, 1084 { /* e300c1 (a 603e core, plus some) on 83xx */ 1085 .pvr_mask = 0x7fff0000, 1086 .pvr_value = 0x00830000, 1087 .cpu_name = "e300c1", 1088 .cpu_features = CPU_FTRS_E300, 1089 .cpu_user_features = COMMON_USER, 1090 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1091 .icache_bsize = 32, 1092 .dcache_bsize = 32, 1093 .cpu_setup = __setup_cpu_603, 1094 .machine_check = machine_check_generic, 1095 .platform = "ppc603", 1096 }, 1097 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1098 .pvr_mask = 0x7fff0000, 1099 .pvr_value = 0x00840000, 1100 .cpu_name = "e300c2", 1101 .cpu_features = CPU_FTRS_E300C2, 1102 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1103 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1104 MMU_FTR_NEED_DTLB_SW_LRU, 1105 .icache_bsize = 32, 1106 .dcache_bsize = 32, 1107 .cpu_setup = __setup_cpu_603, 1108 .machine_check = machine_check_generic, 1109 .platform = "ppc603", 1110 }, 1111 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1112 .pvr_mask = 0x7fff0000, 1113 .pvr_value = 0x00850000, 1114 .cpu_name = "e300c3", 1115 .cpu_features = CPU_FTRS_E300, 1116 .cpu_user_features = COMMON_USER, 1117 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1118 MMU_FTR_NEED_DTLB_SW_LRU, 1119 .icache_bsize = 32, 1120 .dcache_bsize = 32, 1121 .cpu_setup = __setup_cpu_603, 1122 .num_pmcs = 4, 1123 .oprofile_cpu_type = "ppc/e300", 1124 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1125 .platform = "ppc603", 1126 }, 1127 { /* e300c4 (e300c1, plus one IU) */ 1128 .pvr_mask = 0x7fff0000, 1129 .pvr_value = 0x00860000, 1130 .cpu_name = "e300c4", 1131 .cpu_features = CPU_FTRS_E300, 1132 .cpu_user_features = COMMON_USER, 1133 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1134 MMU_FTR_NEED_DTLB_SW_LRU, 1135 .icache_bsize = 32, 1136 .dcache_bsize = 32, 1137 .cpu_setup = __setup_cpu_603, 1138 .machine_check = machine_check_generic, 1139 .num_pmcs = 4, 1140 .oprofile_cpu_type = "ppc/e300", 1141 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1142 .platform = "ppc603", 1143 }, 1144 { /* default match, we assume split I/D cache & TB (non-601)... */ 1145 .pvr_mask = 0x00000000, 1146 .pvr_value = 0x00000000, 1147 .cpu_name = "(generic PPC)", 1148 .cpu_features = CPU_FTRS_CLASSIC32, 1149 .cpu_user_features = COMMON_USER, 1150 .mmu_features = MMU_FTR_HPTE_TABLE, 1151 .icache_bsize = 32, 1152 .dcache_bsize = 32, 1153 .machine_check = machine_check_generic, 1154 .platform = "ppc603", 1155 }, 1156 #endif /* CLASSIC_PPC */ 1157 #ifdef CONFIG_8xx 1158 { /* 8xx */ 1159 .pvr_mask = 0xffff0000, 1160 .pvr_value = 0x00500000, 1161 .cpu_name = "8xx", 1162 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1163 * if the 8xx code is there.... */ 1164 .cpu_features = CPU_FTRS_8XX, 1165 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1166 .mmu_features = MMU_FTR_TYPE_8xx, 1167 .icache_bsize = 16, 1168 .dcache_bsize = 16, 1169 .platform = "ppc823", 1170 }, 1171 #endif /* CONFIG_8xx */ 1172 #ifdef CONFIG_40x 1173 { /* 403GC */ 1174 .pvr_mask = 0xffffff00, 1175 .pvr_value = 0x00200200, 1176 .cpu_name = "403GC", 1177 .cpu_features = CPU_FTRS_40X, 1178 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1179 .mmu_features = MMU_FTR_TYPE_40x, 1180 .icache_bsize = 16, 1181 .dcache_bsize = 16, 1182 .machine_check = machine_check_4xx, 1183 .platform = "ppc403", 1184 }, 1185 { /* 403GCX */ 1186 .pvr_mask = 0xffffff00, 1187 .pvr_value = 0x00201400, 1188 .cpu_name = "403GCX", 1189 .cpu_features = CPU_FTRS_40X, 1190 .cpu_user_features = PPC_FEATURE_32 | 1191 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1192 .mmu_features = MMU_FTR_TYPE_40x, 1193 .icache_bsize = 16, 1194 .dcache_bsize = 16, 1195 .machine_check = machine_check_4xx, 1196 .platform = "ppc403", 1197 }, 1198 { /* 403G ?? */ 1199 .pvr_mask = 0xffff0000, 1200 .pvr_value = 0x00200000, 1201 .cpu_name = "403G ??", 1202 .cpu_features = CPU_FTRS_40X, 1203 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1204 .mmu_features = MMU_FTR_TYPE_40x, 1205 .icache_bsize = 16, 1206 .dcache_bsize = 16, 1207 .machine_check = machine_check_4xx, 1208 .platform = "ppc403", 1209 }, 1210 { /* 405GP */ 1211 .pvr_mask = 0xffff0000, 1212 .pvr_value = 0x40110000, 1213 .cpu_name = "405GP", 1214 .cpu_features = CPU_FTRS_40X, 1215 .cpu_user_features = PPC_FEATURE_32 | 1216 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1217 .mmu_features = MMU_FTR_TYPE_40x, 1218 .icache_bsize = 32, 1219 .dcache_bsize = 32, 1220 .machine_check = machine_check_4xx, 1221 .platform = "ppc405", 1222 }, 1223 { /* STB 03xxx */ 1224 .pvr_mask = 0xffff0000, 1225 .pvr_value = 0x40130000, 1226 .cpu_name = "STB03xxx", 1227 .cpu_features = CPU_FTRS_40X, 1228 .cpu_user_features = PPC_FEATURE_32 | 1229 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1230 .mmu_features = MMU_FTR_TYPE_40x, 1231 .icache_bsize = 32, 1232 .dcache_bsize = 32, 1233 .machine_check = machine_check_4xx, 1234 .platform = "ppc405", 1235 }, 1236 { /* STB 04xxx */ 1237 .pvr_mask = 0xffff0000, 1238 .pvr_value = 0x41810000, 1239 .cpu_name = "STB04xxx", 1240 .cpu_features = CPU_FTRS_40X, 1241 .cpu_user_features = PPC_FEATURE_32 | 1242 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1243 .mmu_features = MMU_FTR_TYPE_40x, 1244 .icache_bsize = 32, 1245 .dcache_bsize = 32, 1246 .machine_check = machine_check_4xx, 1247 .platform = "ppc405", 1248 }, 1249 { /* NP405L */ 1250 .pvr_mask = 0xffff0000, 1251 .pvr_value = 0x41610000, 1252 .cpu_name = "NP405L", 1253 .cpu_features = CPU_FTRS_40X, 1254 .cpu_user_features = PPC_FEATURE_32 | 1255 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1256 .mmu_features = MMU_FTR_TYPE_40x, 1257 .icache_bsize = 32, 1258 .dcache_bsize = 32, 1259 .machine_check = machine_check_4xx, 1260 .platform = "ppc405", 1261 }, 1262 { /* NP4GS3 */ 1263 .pvr_mask = 0xffff0000, 1264 .pvr_value = 0x40B10000, 1265 .cpu_name = "NP4GS3", 1266 .cpu_features = CPU_FTRS_40X, 1267 .cpu_user_features = PPC_FEATURE_32 | 1268 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1269 .mmu_features = MMU_FTR_TYPE_40x, 1270 .icache_bsize = 32, 1271 .dcache_bsize = 32, 1272 .machine_check = machine_check_4xx, 1273 .platform = "ppc405", 1274 }, 1275 { /* NP405H */ 1276 .pvr_mask = 0xffff0000, 1277 .pvr_value = 0x41410000, 1278 .cpu_name = "NP405H", 1279 .cpu_features = CPU_FTRS_40X, 1280 .cpu_user_features = PPC_FEATURE_32 | 1281 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1282 .mmu_features = MMU_FTR_TYPE_40x, 1283 .icache_bsize = 32, 1284 .dcache_bsize = 32, 1285 .machine_check = machine_check_4xx, 1286 .platform = "ppc405", 1287 }, 1288 { /* 405GPr */ 1289 .pvr_mask = 0xffff0000, 1290 .pvr_value = 0x50910000, 1291 .cpu_name = "405GPr", 1292 .cpu_features = CPU_FTRS_40X, 1293 .cpu_user_features = PPC_FEATURE_32 | 1294 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1295 .mmu_features = MMU_FTR_TYPE_40x, 1296 .icache_bsize = 32, 1297 .dcache_bsize = 32, 1298 .machine_check = machine_check_4xx, 1299 .platform = "ppc405", 1300 }, 1301 { /* STBx25xx */ 1302 .pvr_mask = 0xffff0000, 1303 .pvr_value = 0x51510000, 1304 .cpu_name = "STBx25xx", 1305 .cpu_features = CPU_FTRS_40X, 1306 .cpu_user_features = PPC_FEATURE_32 | 1307 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1308 .mmu_features = MMU_FTR_TYPE_40x, 1309 .icache_bsize = 32, 1310 .dcache_bsize = 32, 1311 .machine_check = machine_check_4xx, 1312 .platform = "ppc405", 1313 }, 1314 { /* 405LP */ 1315 .pvr_mask = 0xffff0000, 1316 .pvr_value = 0x41F10000, 1317 .cpu_name = "405LP", 1318 .cpu_features = CPU_FTRS_40X, 1319 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1320 .mmu_features = MMU_FTR_TYPE_40x, 1321 .icache_bsize = 32, 1322 .dcache_bsize = 32, 1323 .machine_check = machine_check_4xx, 1324 .platform = "ppc405", 1325 }, 1326 { /* Xilinx Virtex-II Pro */ 1327 .pvr_mask = 0xfffff000, 1328 .pvr_value = 0x20010000, 1329 .cpu_name = "Virtex-II Pro", 1330 .cpu_features = CPU_FTRS_40X, 1331 .cpu_user_features = PPC_FEATURE_32 | 1332 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1333 .mmu_features = MMU_FTR_TYPE_40x, 1334 .icache_bsize = 32, 1335 .dcache_bsize = 32, 1336 .machine_check = machine_check_4xx, 1337 .platform = "ppc405", 1338 }, 1339 { /* Xilinx Virtex-4 FX */ 1340 .pvr_mask = 0xfffff000, 1341 .pvr_value = 0x20011000, 1342 .cpu_name = "Virtex-4 FX", 1343 .cpu_features = CPU_FTRS_40X, 1344 .cpu_user_features = PPC_FEATURE_32 | 1345 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1346 .mmu_features = MMU_FTR_TYPE_40x, 1347 .icache_bsize = 32, 1348 .dcache_bsize = 32, 1349 .machine_check = machine_check_4xx, 1350 .platform = "ppc405", 1351 }, 1352 { /* 405EP */ 1353 .pvr_mask = 0xffff0000, 1354 .pvr_value = 0x51210000, 1355 .cpu_name = "405EP", 1356 .cpu_features = CPU_FTRS_40X, 1357 .cpu_user_features = PPC_FEATURE_32 | 1358 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1359 .mmu_features = MMU_FTR_TYPE_40x, 1360 .icache_bsize = 32, 1361 .dcache_bsize = 32, 1362 .machine_check = machine_check_4xx, 1363 .platform = "ppc405", 1364 }, 1365 { /* 405EX */ 1366 .pvr_mask = 0xffff0004, 1367 .pvr_value = 0x12910004, 1368 .cpu_name = "405EX", 1369 .cpu_features = CPU_FTRS_40X, 1370 .cpu_user_features = PPC_FEATURE_32 | 1371 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1372 .mmu_features = MMU_FTR_TYPE_40x, 1373 .icache_bsize = 32, 1374 .dcache_bsize = 32, 1375 .machine_check = machine_check_4xx, 1376 .platform = "ppc405", 1377 }, 1378 { /* 405EXr */ 1379 .pvr_mask = 0xffff0004, 1380 .pvr_value = 0x12910000, 1381 .cpu_name = "405EXr", 1382 .cpu_features = CPU_FTRS_40X, 1383 .cpu_user_features = PPC_FEATURE_32 | 1384 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1385 .mmu_features = MMU_FTR_TYPE_40x, 1386 .icache_bsize = 32, 1387 .dcache_bsize = 32, 1388 .machine_check = machine_check_4xx, 1389 .platform = "ppc405", 1390 }, 1391 { 1392 /* 405EZ */ 1393 .pvr_mask = 0xffff0000, 1394 .pvr_value = 0x41510000, 1395 .cpu_name = "405EZ", 1396 .cpu_features = CPU_FTRS_40X, 1397 .cpu_user_features = PPC_FEATURE_32 | 1398 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1399 .mmu_features = MMU_FTR_TYPE_40x, 1400 .icache_bsize = 32, 1401 .dcache_bsize = 32, 1402 .machine_check = machine_check_4xx, 1403 .platform = "ppc405", 1404 }, 1405 { /* default match */ 1406 .pvr_mask = 0x00000000, 1407 .pvr_value = 0x00000000, 1408 .cpu_name = "(generic 40x PPC)", 1409 .cpu_features = CPU_FTRS_40X, 1410 .cpu_user_features = PPC_FEATURE_32 | 1411 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1412 .mmu_features = MMU_FTR_TYPE_40x, 1413 .icache_bsize = 32, 1414 .dcache_bsize = 32, 1415 .machine_check = machine_check_4xx, 1416 .platform = "ppc405", 1417 } 1418 1419 #endif /* CONFIG_40x */ 1420 #ifdef CONFIG_44x 1421 { 1422 .pvr_mask = 0xf0000fff, 1423 .pvr_value = 0x40000850, 1424 .cpu_name = "440GR Rev. A", 1425 .cpu_features = CPU_FTRS_44X, 1426 .cpu_user_features = COMMON_USER_BOOKE, 1427 .mmu_features = MMU_FTR_TYPE_44x, 1428 .icache_bsize = 32, 1429 .dcache_bsize = 32, 1430 .machine_check = machine_check_4xx, 1431 .platform = "ppc440", 1432 }, 1433 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1434 .pvr_mask = 0xf0000fff, 1435 .pvr_value = 0x40000858, 1436 .cpu_name = "440EP Rev. A", 1437 .cpu_features = CPU_FTRS_44X, 1438 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1439 .mmu_features = MMU_FTR_TYPE_44x, 1440 .icache_bsize = 32, 1441 .dcache_bsize = 32, 1442 .cpu_setup = __setup_cpu_440ep, 1443 .machine_check = machine_check_4xx, 1444 .platform = "ppc440", 1445 }, 1446 { 1447 .pvr_mask = 0xf0000fff, 1448 .pvr_value = 0x400008d3, 1449 .cpu_name = "440GR Rev. B", 1450 .cpu_features = CPU_FTRS_44X, 1451 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1452 .mmu_features = MMU_FTR_TYPE_44x, 1453 .icache_bsize = 32, 1454 .dcache_bsize = 32, 1455 .machine_check = machine_check_4xx, 1456 .platform = "ppc440", 1457 }, 1458 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1459 .pvr_mask = 0xf0000ff7, 1460 .pvr_value = 0x400008d4, 1461 .cpu_name = "440EP Rev. C", 1462 .cpu_features = CPU_FTRS_44X, 1463 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1464 .mmu_features = MMU_FTR_TYPE_44x, 1465 .icache_bsize = 32, 1466 .dcache_bsize = 32, 1467 .cpu_setup = __setup_cpu_440ep, 1468 .machine_check = machine_check_4xx, 1469 .platform = "ppc440", 1470 }, 1471 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1472 .pvr_mask = 0xf0000fff, 1473 .pvr_value = 0x400008db, 1474 .cpu_name = "440EP Rev. B", 1475 .cpu_features = CPU_FTRS_44X, 1476 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1477 .mmu_features = MMU_FTR_TYPE_44x, 1478 .icache_bsize = 32, 1479 .dcache_bsize = 32, 1480 .cpu_setup = __setup_cpu_440ep, 1481 .machine_check = machine_check_4xx, 1482 .platform = "ppc440", 1483 }, 1484 { /* 440GRX */ 1485 .pvr_mask = 0xf0000ffb, 1486 .pvr_value = 0x200008D0, 1487 .cpu_name = "440GRX", 1488 .cpu_features = CPU_FTRS_44X, 1489 .cpu_user_features = COMMON_USER_BOOKE, 1490 .mmu_features = MMU_FTR_TYPE_44x, 1491 .icache_bsize = 32, 1492 .dcache_bsize = 32, 1493 .cpu_setup = __setup_cpu_440grx, 1494 .machine_check = machine_check_440A, 1495 .platform = "ppc440", 1496 }, 1497 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1498 .pvr_mask = 0xf0000ffb, 1499 .pvr_value = 0x200008D8, 1500 .cpu_name = "440EPX", 1501 .cpu_features = CPU_FTRS_44X, 1502 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1503 .mmu_features = MMU_FTR_TYPE_44x, 1504 .icache_bsize = 32, 1505 .dcache_bsize = 32, 1506 .cpu_setup = __setup_cpu_440epx, 1507 .machine_check = machine_check_440A, 1508 .platform = "ppc440", 1509 }, 1510 { /* 440GP Rev. B */ 1511 .pvr_mask = 0xf0000fff, 1512 .pvr_value = 0x40000440, 1513 .cpu_name = "440GP Rev. B", 1514 .cpu_features = CPU_FTRS_44X, 1515 .cpu_user_features = COMMON_USER_BOOKE, 1516 .mmu_features = MMU_FTR_TYPE_44x, 1517 .icache_bsize = 32, 1518 .dcache_bsize = 32, 1519 .machine_check = machine_check_4xx, 1520 .platform = "ppc440gp", 1521 }, 1522 { /* 440GP Rev. C */ 1523 .pvr_mask = 0xf0000fff, 1524 .pvr_value = 0x40000481, 1525 .cpu_name = "440GP Rev. C", 1526 .cpu_features = CPU_FTRS_44X, 1527 .cpu_user_features = COMMON_USER_BOOKE, 1528 .mmu_features = MMU_FTR_TYPE_44x, 1529 .icache_bsize = 32, 1530 .dcache_bsize = 32, 1531 .machine_check = machine_check_4xx, 1532 .platform = "ppc440gp", 1533 }, 1534 { /* 440GX Rev. A */ 1535 .pvr_mask = 0xf0000fff, 1536 .pvr_value = 0x50000850, 1537 .cpu_name = "440GX Rev. A", 1538 .cpu_features = CPU_FTRS_44X, 1539 .cpu_user_features = COMMON_USER_BOOKE, 1540 .mmu_features = MMU_FTR_TYPE_44x, 1541 .icache_bsize = 32, 1542 .dcache_bsize = 32, 1543 .cpu_setup = __setup_cpu_440gx, 1544 .machine_check = machine_check_440A, 1545 .platform = "ppc440", 1546 }, 1547 { /* 440GX Rev. B */ 1548 .pvr_mask = 0xf0000fff, 1549 .pvr_value = 0x50000851, 1550 .cpu_name = "440GX Rev. B", 1551 .cpu_features = CPU_FTRS_44X, 1552 .cpu_user_features = COMMON_USER_BOOKE, 1553 .mmu_features = MMU_FTR_TYPE_44x, 1554 .icache_bsize = 32, 1555 .dcache_bsize = 32, 1556 .cpu_setup = __setup_cpu_440gx, 1557 .machine_check = machine_check_440A, 1558 .platform = "ppc440", 1559 }, 1560 { /* 440GX Rev. C */ 1561 .pvr_mask = 0xf0000fff, 1562 .pvr_value = 0x50000892, 1563 .cpu_name = "440GX Rev. C", 1564 .cpu_features = CPU_FTRS_44X, 1565 .cpu_user_features = COMMON_USER_BOOKE, 1566 .mmu_features = MMU_FTR_TYPE_44x, 1567 .icache_bsize = 32, 1568 .dcache_bsize = 32, 1569 .cpu_setup = __setup_cpu_440gx, 1570 .machine_check = machine_check_440A, 1571 .platform = "ppc440", 1572 }, 1573 { /* 440GX Rev. F */ 1574 .pvr_mask = 0xf0000fff, 1575 .pvr_value = 0x50000894, 1576 .cpu_name = "440GX Rev. F", 1577 .cpu_features = CPU_FTRS_44X, 1578 .cpu_user_features = COMMON_USER_BOOKE, 1579 .mmu_features = MMU_FTR_TYPE_44x, 1580 .icache_bsize = 32, 1581 .dcache_bsize = 32, 1582 .cpu_setup = __setup_cpu_440gx, 1583 .machine_check = machine_check_440A, 1584 .platform = "ppc440", 1585 }, 1586 { /* 440SP Rev. A */ 1587 .pvr_mask = 0xfff00fff, 1588 .pvr_value = 0x53200891, 1589 .cpu_name = "440SP Rev. A", 1590 .cpu_features = CPU_FTRS_44X, 1591 .cpu_user_features = COMMON_USER_BOOKE, 1592 .mmu_features = MMU_FTR_TYPE_44x, 1593 .icache_bsize = 32, 1594 .dcache_bsize = 32, 1595 .machine_check = machine_check_4xx, 1596 .platform = "ppc440", 1597 }, 1598 { /* 440SPe Rev. A */ 1599 .pvr_mask = 0xfff00fff, 1600 .pvr_value = 0x53400890, 1601 .cpu_name = "440SPe Rev. A", 1602 .cpu_features = CPU_FTRS_44X, 1603 .cpu_user_features = COMMON_USER_BOOKE, 1604 .mmu_features = MMU_FTR_TYPE_44x, 1605 .icache_bsize = 32, 1606 .dcache_bsize = 32, 1607 .cpu_setup = __setup_cpu_440spe, 1608 .machine_check = machine_check_440A, 1609 .platform = "ppc440", 1610 }, 1611 { /* 440SPe Rev. B */ 1612 .pvr_mask = 0xfff00fff, 1613 .pvr_value = 0x53400891, 1614 .cpu_name = "440SPe Rev. B", 1615 .cpu_features = CPU_FTRS_44X, 1616 .cpu_user_features = COMMON_USER_BOOKE, 1617 .mmu_features = MMU_FTR_TYPE_44x, 1618 .icache_bsize = 32, 1619 .dcache_bsize = 32, 1620 .cpu_setup = __setup_cpu_440spe, 1621 .machine_check = machine_check_440A, 1622 .platform = "ppc440", 1623 }, 1624 { /* 440 in Xilinx Virtex-5 FXT */ 1625 .pvr_mask = 0xfffffff0, 1626 .pvr_value = 0x7ff21910, 1627 .cpu_name = "440 in Virtex-5 FXT", 1628 .cpu_features = CPU_FTRS_44X, 1629 .cpu_user_features = COMMON_USER_BOOKE, 1630 .mmu_features = MMU_FTR_TYPE_44x, 1631 .icache_bsize = 32, 1632 .dcache_bsize = 32, 1633 .cpu_setup = __setup_cpu_440x5, 1634 .machine_check = machine_check_440A, 1635 .platform = "ppc440", 1636 }, 1637 { /* 460EX */ 1638 .pvr_mask = 0xffff0006, 1639 .pvr_value = 0x13020002, 1640 .cpu_name = "460EX", 1641 .cpu_features = CPU_FTRS_440x6, 1642 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1643 .mmu_features = MMU_FTR_TYPE_44x, 1644 .icache_bsize = 32, 1645 .dcache_bsize = 32, 1646 .cpu_setup = __setup_cpu_460ex, 1647 .machine_check = machine_check_440A, 1648 .platform = "ppc440", 1649 }, 1650 { /* 460EX Rev B */ 1651 .pvr_mask = 0xffff0007, 1652 .pvr_value = 0x13020004, 1653 .cpu_name = "460EX Rev. B", 1654 .cpu_features = CPU_FTRS_440x6, 1655 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1656 .mmu_features = MMU_FTR_TYPE_44x, 1657 .icache_bsize = 32, 1658 .dcache_bsize = 32, 1659 .cpu_setup = __setup_cpu_460ex, 1660 .machine_check = machine_check_440A, 1661 .platform = "ppc440", 1662 }, 1663 { /* 460GT */ 1664 .pvr_mask = 0xffff0006, 1665 .pvr_value = 0x13020000, 1666 .cpu_name = "460GT", 1667 .cpu_features = CPU_FTRS_440x6, 1668 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1669 .mmu_features = MMU_FTR_TYPE_44x, 1670 .icache_bsize = 32, 1671 .dcache_bsize = 32, 1672 .cpu_setup = __setup_cpu_460gt, 1673 .machine_check = machine_check_440A, 1674 .platform = "ppc440", 1675 }, 1676 { /* 460GT Rev B */ 1677 .pvr_mask = 0xffff0007, 1678 .pvr_value = 0x13020005, 1679 .cpu_name = "460GT Rev. B", 1680 .cpu_features = CPU_FTRS_440x6, 1681 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1682 .mmu_features = MMU_FTR_TYPE_44x, 1683 .icache_bsize = 32, 1684 .dcache_bsize = 32, 1685 .cpu_setup = __setup_cpu_460gt, 1686 .machine_check = machine_check_440A, 1687 .platform = "ppc440", 1688 }, 1689 { /* 460SX */ 1690 .pvr_mask = 0xffffff00, 1691 .pvr_value = 0x13541800, 1692 .cpu_name = "460SX", 1693 .cpu_features = CPU_FTRS_44X, 1694 .cpu_user_features = COMMON_USER_BOOKE, 1695 .mmu_features = MMU_FTR_TYPE_44x, 1696 .icache_bsize = 32, 1697 .dcache_bsize = 32, 1698 .cpu_setup = __setup_cpu_460sx, 1699 .machine_check = machine_check_440A, 1700 .platform = "ppc440", 1701 }, 1702 { /* default match */ 1703 .pvr_mask = 0x00000000, 1704 .pvr_value = 0x00000000, 1705 .cpu_name = "(generic 44x PPC)", 1706 .cpu_features = CPU_FTRS_44X, 1707 .cpu_user_features = COMMON_USER_BOOKE, 1708 .mmu_features = MMU_FTR_TYPE_44x, 1709 .icache_bsize = 32, 1710 .dcache_bsize = 32, 1711 .machine_check = machine_check_4xx, 1712 .platform = "ppc440", 1713 } 1714 #endif /* CONFIG_44x */ 1715 #ifdef CONFIG_E200 1716 { /* e200z5 */ 1717 .pvr_mask = 0xfff00000, 1718 .pvr_value = 0x81000000, 1719 .cpu_name = "e200z5", 1720 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1721 .cpu_features = CPU_FTRS_E200, 1722 .cpu_user_features = COMMON_USER_BOOKE | 1723 PPC_FEATURE_HAS_EFP_SINGLE | 1724 PPC_FEATURE_UNIFIED_CACHE, 1725 .mmu_features = MMU_FTR_TYPE_FSL_E, 1726 .dcache_bsize = 32, 1727 .machine_check = machine_check_e200, 1728 .platform = "ppc5554", 1729 }, 1730 { /* e200z6 */ 1731 .pvr_mask = 0xfff00000, 1732 .pvr_value = 0x81100000, 1733 .cpu_name = "e200z6", 1734 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1735 .cpu_features = CPU_FTRS_E200, 1736 .cpu_user_features = COMMON_USER_BOOKE | 1737 PPC_FEATURE_HAS_SPE_COMP | 1738 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1739 PPC_FEATURE_UNIFIED_CACHE, 1740 .mmu_features = MMU_FTR_TYPE_FSL_E, 1741 .dcache_bsize = 32, 1742 .machine_check = machine_check_e200, 1743 .platform = "ppc5554", 1744 }, 1745 { /* default match */ 1746 .pvr_mask = 0x00000000, 1747 .pvr_value = 0x00000000, 1748 .cpu_name = "(generic E200 PPC)", 1749 .cpu_features = CPU_FTRS_E200, 1750 .cpu_user_features = COMMON_USER_BOOKE | 1751 PPC_FEATURE_HAS_EFP_SINGLE | 1752 PPC_FEATURE_UNIFIED_CACHE, 1753 .mmu_features = MMU_FTR_TYPE_FSL_E, 1754 .dcache_bsize = 32, 1755 .cpu_setup = __setup_cpu_e200, 1756 .machine_check = machine_check_e200, 1757 .platform = "ppc5554", 1758 } 1759 #endif /* CONFIG_E200 */ 1760 #ifdef CONFIG_E500 1761 { /* e500 */ 1762 .pvr_mask = 0xffff0000, 1763 .pvr_value = 0x80200000, 1764 .cpu_name = "e500", 1765 .cpu_features = CPU_FTRS_E500, 1766 .cpu_user_features = COMMON_USER_BOOKE | 1767 PPC_FEATURE_HAS_SPE_COMP | 1768 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1769 .mmu_features = MMU_FTR_TYPE_FSL_E, 1770 .icache_bsize = 32, 1771 .dcache_bsize = 32, 1772 .num_pmcs = 4, 1773 .oprofile_cpu_type = "ppc/e500", 1774 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1775 .cpu_setup = __setup_cpu_e500v1, 1776 .machine_check = machine_check_e500, 1777 .platform = "ppc8540", 1778 }, 1779 { /* e500v2 */ 1780 .pvr_mask = 0xffff0000, 1781 .pvr_value = 0x80210000, 1782 .cpu_name = "e500v2", 1783 .cpu_features = CPU_FTRS_E500_2, 1784 .cpu_user_features = COMMON_USER_BOOKE | 1785 PPC_FEATURE_HAS_SPE_COMP | 1786 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1787 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1788 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1789 .icache_bsize = 32, 1790 .dcache_bsize = 32, 1791 .num_pmcs = 4, 1792 .oprofile_cpu_type = "ppc/e500", 1793 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1794 .cpu_setup = __setup_cpu_e500v2, 1795 .machine_check = machine_check_e500, 1796 .platform = "ppc8548", 1797 }, 1798 { /* e500mc */ 1799 .pvr_mask = 0xffff0000, 1800 .pvr_value = 0x80230000, 1801 .cpu_name = "e500mc", 1802 .cpu_features = CPU_FTRS_E500MC, 1803 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1804 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1805 MMU_FTR_USE_TLBILX, 1806 .icache_bsize = 64, 1807 .dcache_bsize = 64, 1808 .num_pmcs = 4, 1809 .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ 1810 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1811 .cpu_setup = __setup_cpu_e500mc, 1812 .machine_check = machine_check_e500, 1813 .platform = "ppce500mc", 1814 }, 1815 { /* default match */ 1816 .pvr_mask = 0x00000000, 1817 .pvr_value = 0x00000000, 1818 .cpu_name = "(generic E500 PPC)", 1819 .cpu_features = CPU_FTRS_E500, 1820 .cpu_user_features = COMMON_USER_BOOKE | 1821 PPC_FEATURE_HAS_SPE_COMP | 1822 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1823 .mmu_features = MMU_FTR_TYPE_FSL_E, 1824 .icache_bsize = 32, 1825 .dcache_bsize = 32, 1826 .machine_check = machine_check_e500, 1827 .platform = "powerpc", 1828 } 1829 #endif /* CONFIG_E500 */ 1830 #endif /* CONFIG_PPC32 */ 1831 1832 #ifdef CONFIG_PPC_BOOK3E_64 1833 { /* This is a default entry to get going, to be replaced by 1834 * a real one at some stage 1835 */ 1836 #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \ 1837 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \ 1838 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) 1839 .pvr_mask = 0x00000000, 1840 .pvr_value = 0x00000000, 1841 .cpu_name = "Book3E", 1842 .cpu_features = CPU_FTRS_BASE_BOOK3E, 1843 .cpu_user_features = COMMON_USER_PPC64, 1844 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX | 1845 MMU_FTR_USE_TLBIVAX_BCAST | 1846 MMU_FTR_LOCK_BCAST_INVAL, 1847 .icache_bsize = 64, 1848 .dcache_bsize = 64, 1849 .num_pmcs = 0, 1850 .machine_check = machine_check_generic, 1851 .platform = "power6", 1852 }, 1853 #endif 1854 }; 1855 1856 static struct cpu_spec the_cpu_spec; 1857 1858 static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s) 1859 { 1860 struct cpu_spec *t = &the_cpu_spec; 1861 struct cpu_spec old; 1862 1863 t = PTRRELOC(t); 1864 old = *t; 1865 1866 /* Copy everything, then do fixups */ 1867 *t = *s; 1868 1869 /* 1870 * If we are overriding a previous value derived from the real 1871 * PVR with a new value obtained using a logical PVR value, 1872 * don't modify the performance monitor fields. 1873 */ 1874 if (old.num_pmcs && !s->num_pmcs) { 1875 t->num_pmcs = old.num_pmcs; 1876 t->pmc_type = old.pmc_type; 1877 t->oprofile_type = old.oprofile_type; 1878 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 1879 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 1880 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 1881 1882 /* 1883 * If we have passed through this logic once before and 1884 * have pulled the default case because the real PVR was 1885 * not found inside cpu_specs[], then we are possibly 1886 * running in compatibility mode. In that case, let the 1887 * oprofiler know which set of compatibility counters to 1888 * pull from by making sure the oprofile_cpu_type string 1889 * is set to that of compatibility mode. If the 1890 * oprofile_cpu_type already has a value, then we are 1891 * possibly overriding a real PVR with a logical one, 1892 * and, in that case, keep the current value for 1893 * oprofile_cpu_type. 1894 */ 1895 if (old.oprofile_cpu_type != NULL) { 1896 t->oprofile_cpu_type = old.oprofile_cpu_type; 1897 t->oprofile_type = old.oprofile_type; 1898 } 1899 } 1900 1901 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 1902 1903 /* 1904 * Set the base platform string once; assumes 1905 * we're called with real pvr first. 1906 */ 1907 if (*PTRRELOC(&powerpc_base_platform) == NULL) 1908 *PTRRELOC(&powerpc_base_platform) = t->platform; 1909 1910 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 1911 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 1912 * that processor. I will consolidate that at a later time, for now, 1913 * just use #ifdef. We also don't need to PTRRELOC the function 1914 * pointer on ppc64 and booke as we are running at 0 in real mode 1915 * on ppc64 and reloc_offset is always 0 on booke. 1916 */ 1917 if (s->cpu_setup) { 1918 s->cpu_setup(offset, s); 1919 } 1920 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 1921 } 1922 1923 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 1924 { 1925 struct cpu_spec *s = cpu_specs; 1926 int i; 1927 1928 s = PTRRELOC(s); 1929 1930 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 1931 if ((pvr & s->pvr_mask) == s->pvr_value) { 1932 setup_cpu_spec(offset, s); 1933 return s; 1934 } 1935 } 1936 1937 BUG(); 1938 1939 return NULL; 1940 } 1941