1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 4 * 5 * Modifications for ppc64: 6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 7 */ 8 9 #include <linux/string.h> 10 #include <linux/sched.h> 11 #include <linux/threads.h> 12 #include <linux/init.h> 13 #include <linux/export.h> 14 #include <linux/jump_label.h> 15 16 #include <asm/oprofile_impl.h> 17 #include <asm/cputable.h> 18 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 19 #include <asm/mce.h> 20 #include <asm/mmu.h> 21 #include <asm/setup.h> 22 23 static struct cpu_spec the_cpu_spec __read_mostly; 24 25 struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 26 EXPORT_SYMBOL(cur_cpu_spec); 27 28 /* The platform string corresponding to the real PVR */ 29 const char *powerpc_base_platform; 30 31 /* NOTE: 32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 33 * the responsibility of the appropriate CPU save/restore functions to 34 * eventually copy these settings over. Those save/restore aren't yet 35 * part of the cputable though. That has to be fixed for both ppc32 36 * and ppc64 37 */ 38 #ifdef CONFIG_PPC32 39 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 51 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 52 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 53 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 60 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 61 #endif /* CONFIG_PPC32 */ 62 #ifdef CONFIG_PPC64 63 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 64 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 65 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 66 extern void __restore_cpu_pa6t(void); 67 extern void __restore_cpu_ppc970(void); 68 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 69 extern void __restore_cpu_power7(void); 70 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 71 extern void __restore_cpu_power8(void); 72 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); 73 extern void __restore_cpu_power9(void); 74 extern void __setup_cpu_power10(unsigned long offset, struct cpu_spec* spec); 75 extern void __restore_cpu_power10(void); 76 #endif /* CONFIG_PPC64 */ 77 #if defined(CONFIG_E500) 78 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 79 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 80 extern void __restore_cpu_e5500(void); 81 extern void __restore_cpu_e6500(void); 82 #endif /* CONFIG_E500 */ 83 84 /* This table only contains "desktop" CPUs, it need to be filled with embedded 85 * ones as well... 86 */ 87 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 88 PPC_FEATURE_HAS_MMU) 89 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 90 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 91 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 92 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 93 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 95 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 97 PPC_FEATURE_TRUE_LE | \ 98 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 99 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 100 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 101 PPC_FEATURE_TRUE_LE | \ 102 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 103 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 104 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 105 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 106 PPC_FEATURE_TRUE_LE | \ 107 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 108 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 109 PPC_FEATURE2_HTM_COMP | \ 110 PPC_FEATURE2_HTM_NOSC_COMP | \ 111 PPC_FEATURE2_DSCR | \ 112 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 113 PPC_FEATURE2_VEC_CRYPTO) 114 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 115 PPC_FEATURE_TRUE_LE | \ 116 PPC_FEATURE_HAS_ALTIVEC_COMP) 117 #define COMMON_USER_POWER9 COMMON_USER_POWER8 118 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 119 PPC_FEATURE2_ARCH_3_00 | \ 120 PPC_FEATURE2_HAS_IEEE128 | \ 121 PPC_FEATURE2_DARN | \ 122 PPC_FEATURE2_SCV) 123 #define COMMON_USER_POWER10 COMMON_USER_POWER9 124 #define COMMON_USER2_POWER10 (COMMON_USER2_POWER9 | \ 125 PPC_FEATURE2_ARCH_3_1 | \ 126 PPC_FEATURE2_MMA) 127 128 #ifdef CONFIG_PPC_BOOK3E_64 129 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 130 #else 131 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 132 PPC_FEATURE_BOOKE) 133 #endif 134 135 static struct cpu_spec __initdata cpu_specs[] = { 136 #ifdef CONFIG_PPC_BOOK3S_64 137 { /* PPC970 */ 138 .pvr_mask = 0xffff0000, 139 .pvr_value = 0x00390000, 140 .cpu_name = "PPC970", 141 .cpu_features = CPU_FTRS_PPC970, 142 .cpu_user_features = COMMON_USER_POWER4 | 143 PPC_FEATURE_HAS_ALTIVEC_COMP, 144 .mmu_features = MMU_FTRS_PPC970, 145 .icache_bsize = 128, 146 .dcache_bsize = 128, 147 .num_pmcs = 8, 148 .pmc_type = PPC_PMC_IBM, 149 .cpu_setup = __setup_cpu_ppc970, 150 .cpu_restore = __restore_cpu_ppc970, 151 .oprofile_cpu_type = "ppc64/970", 152 .oprofile_type = PPC_OPROFILE_POWER4, 153 .platform = "ppc970", 154 }, 155 { /* PPC970FX */ 156 .pvr_mask = 0xffff0000, 157 .pvr_value = 0x003c0000, 158 .cpu_name = "PPC970FX", 159 .cpu_features = CPU_FTRS_PPC970, 160 .cpu_user_features = COMMON_USER_POWER4 | 161 PPC_FEATURE_HAS_ALTIVEC_COMP, 162 .mmu_features = MMU_FTRS_PPC970, 163 .icache_bsize = 128, 164 .dcache_bsize = 128, 165 .num_pmcs = 8, 166 .pmc_type = PPC_PMC_IBM, 167 .cpu_setup = __setup_cpu_ppc970, 168 .cpu_restore = __restore_cpu_ppc970, 169 .oprofile_cpu_type = "ppc64/970", 170 .oprofile_type = PPC_OPROFILE_POWER4, 171 .platform = "ppc970", 172 }, 173 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 174 .pvr_mask = 0xffffffff, 175 .pvr_value = 0x00440100, 176 .cpu_name = "PPC970MP", 177 .cpu_features = CPU_FTRS_PPC970, 178 .cpu_user_features = COMMON_USER_POWER4 | 179 PPC_FEATURE_HAS_ALTIVEC_COMP, 180 .mmu_features = MMU_FTRS_PPC970, 181 .icache_bsize = 128, 182 .dcache_bsize = 128, 183 .num_pmcs = 8, 184 .pmc_type = PPC_PMC_IBM, 185 .cpu_setup = __setup_cpu_ppc970, 186 .cpu_restore = __restore_cpu_ppc970, 187 .oprofile_cpu_type = "ppc64/970MP", 188 .oprofile_type = PPC_OPROFILE_POWER4, 189 .platform = "ppc970", 190 }, 191 { /* PPC970MP */ 192 .pvr_mask = 0xffff0000, 193 .pvr_value = 0x00440000, 194 .cpu_name = "PPC970MP", 195 .cpu_features = CPU_FTRS_PPC970, 196 .cpu_user_features = COMMON_USER_POWER4 | 197 PPC_FEATURE_HAS_ALTIVEC_COMP, 198 .mmu_features = MMU_FTRS_PPC970, 199 .icache_bsize = 128, 200 .dcache_bsize = 128, 201 .num_pmcs = 8, 202 .pmc_type = PPC_PMC_IBM, 203 .cpu_setup = __setup_cpu_ppc970MP, 204 .cpu_restore = __restore_cpu_ppc970, 205 .oprofile_cpu_type = "ppc64/970MP", 206 .oprofile_type = PPC_OPROFILE_POWER4, 207 .platform = "ppc970", 208 }, 209 { /* PPC970GX */ 210 .pvr_mask = 0xffff0000, 211 .pvr_value = 0x00450000, 212 .cpu_name = "PPC970GX", 213 .cpu_features = CPU_FTRS_PPC970, 214 .cpu_user_features = COMMON_USER_POWER4 | 215 PPC_FEATURE_HAS_ALTIVEC_COMP, 216 .mmu_features = MMU_FTRS_PPC970, 217 .icache_bsize = 128, 218 .dcache_bsize = 128, 219 .num_pmcs = 8, 220 .pmc_type = PPC_PMC_IBM, 221 .cpu_setup = __setup_cpu_ppc970, 222 .oprofile_cpu_type = "ppc64/970", 223 .oprofile_type = PPC_OPROFILE_POWER4, 224 .platform = "ppc970", 225 }, 226 { /* Power5 GR */ 227 .pvr_mask = 0xffff0000, 228 .pvr_value = 0x003a0000, 229 .cpu_name = "POWER5 (gr)", 230 .cpu_features = CPU_FTRS_POWER5, 231 .cpu_user_features = COMMON_USER_POWER5, 232 .mmu_features = MMU_FTRS_POWER5, 233 .icache_bsize = 128, 234 .dcache_bsize = 128, 235 .num_pmcs = 6, 236 .pmc_type = PPC_PMC_IBM, 237 .oprofile_cpu_type = "ppc64/power5", 238 .oprofile_type = PPC_OPROFILE_POWER4, 239 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 240 * and above but only works on POWER5 and above 241 */ 242 .oprofile_mmcra_sihv = MMCRA_SIHV, 243 .oprofile_mmcra_sipr = MMCRA_SIPR, 244 .platform = "power5", 245 }, 246 { /* Power5++ */ 247 .pvr_mask = 0xffffff00, 248 .pvr_value = 0x003b0300, 249 .cpu_name = "POWER5+ (gs)", 250 .cpu_features = CPU_FTRS_POWER5, 251 .cpu_user_features = COMMON_USER_POWER5_PLUS, 252 .mmu_features = MMU_FTRS_POWER5, 253 .icache_bsize = 128, 254 .dcache_bsize = 128, 255 .num_pmcs = 6, 256 .oprofile_cpu_type = "ppc64/power5++", 257 .oprofile_type = PPC_OPROFILE_POWER4, 258 .oprofile_mmcra_sihv = MMCRA_SIHV, 259 .oprofile_mmcra_sipr = MMCRA_SIPR, 260 .platform = "power5+", 261 }, 262 { /* Power5 GS */ 263 .pvr_mask = 0xffff0000, 264 .pvr_value = 0x003b0000, 265 .cpu_name = "POWER5+ (gs)", 266 .cpu_features = CPU_FTRS_POWER5, 267 .cpu_user_features = COMMON_USER_POWER5_PLUS, 268 .mmu_features = MMU_FTRS_POWER5, 269 .icache_bsize = 128, 270 .dcache_bsize = 128, 271 .num_pmcs = 6, 272 .pmc_type = PPC_PMC_IBM, 273 .oprofile_cpu_type = "ppc64/power5+", 274 .oprofile_type = PPC_OPROFILE_POWER4, 275 .oprofile_mmcra_sihv = MMCRA_SIHV, 276 .oprofile_mmcra_sipr = MMCRA_SIPR, 277 .platform = "power5+", 278 }, 279 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 280 .pvr_mask = 0xffffffff, 281 .pvr_value = 0x0f000001, 282 .cpu_name = "POWER5+", 283 .cpu_features = CPU_FTRS_POWER5, 284 .cpu_user_features = COMMON_USER_POWER5_PLUS, 285 .mmu_features = MMU_FTRS_POWER5, 286 .icache_bsize = 128, 287 .dcache_bsize = 128, 288 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 289 .oprofile_type = PPC_OPROFILE_POWER4, 290 .platform = "power5+", 291 }, 292 { /* Power6 */ 293 .pvr_mask = 0xffff0000, 294 .pvr_value = 0x003e0000, 295 .cpu_name = "POWER6 (raw)", 296 .cpu_features = CPU_FTRS_POWER6, 297 .cpu_user_features = COMMON_USER_POWER6 | 298 PPC_FEATURE_POWER6_EXT, 299 .mmu_features = MMU_FTRS_POWER6, 300 .icache_bsize = 128, 301 .dcache_bsize = 128, 302 .num_pmcs = 6, 303 .pmc_type = PPC_PMC_IBM, 304 .oprofile_cpu_type = "ppc64/power6", 305 .oprofile_type = PPC_OPROFILE_POWER4, 306 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 307 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 308 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 309 POWER6_MMCRA_OTHER, 310 .platform = "power6x", 311 }, 312 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 313 .pvr_mask = 0xffffffff, 314 .pvr_value = 0x0f000002, 315 .cpu_name = "POWER6 (architected)", 316 .cpu_features = CPU_FTRS_POWER6, 317 .cpu_user_features = COMMON_USER_POWER6, 318 .mmu_features = MMU_FTRS_POWER6, 319 .icache_bsize = 128, 320 .dcache_bsize = 128, 321 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 322 .oprofile_type = PPC_OPROFILE_POWER4, 323 .platform = "power6", 324 }, 325 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 326 .pvr_mask = 0xffffffff, 327 .pvr_value = 0x0f000003, 328 .cpu_name = "POWER7 (architected)", 329 .cpu_features = CPU_FTRS_POWER7, 330 .cpu_user_features = COMMON_USER_POWER7, 331 .cpu_user_features2 = COMMON_USER2_POWER7, 332 .mmu_features = MMU_FTRS_POWER7, 333 .icache_bsize = 128, 334 .dcache_bsize = 128, 335 .oprofile_type = PPC_OPROFILE_POWER4, 336 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 337 .cpu_setup = __setup_cpu_power7, 338 .cpu_restore = __restore_cpu_power7, 339 .machine_check_early = __machine_check_early_realmode_p7, 340 .platform = "power7", 341 }, 342 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 343 .pvr_mask = 0xffffffff, 344 .pvr_value = 0x0f000004, 345 .cpu_name = "POWER8 (architected)", 346 .cpu_features = CPU_FTRS_POWER8, 347 .cpu_user_features = COMMON_USER_POWER8, 348 .cpu_user_features2 = COMMON_USER2_POWER8, 349 .mmu_features = MMU_FTRS_POWER8, 350 .icache_bsize = 128, 351 .dcache_bsize = 128, 352 .oprofile_type = PPC_OPROFILE_INVALID, 353 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 354 .cpu_setup = __setup_cpu_power8, 355 .cpu_restore = __restore_cpu_power8, 356 .machine_check_early = __machine_check_early_realmode_p8, 357 .platform = "power8", 358 }, 359 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 360 .pvr_mask = 0xffffffff, 361 .pvr_value = 0x0f000005, 362 .cpu_name = "POWER9 (architected)", 363 .cpu_features = CPU_FTRS_POWER9, 364 .cpu_user_features = COMMON_USER_POWER9, 365 .cpu_user_features2 = COMMON_USER2_POWER9, 366 .mmu_features = MMU_FTRS_POWER9, 367 .icache_bsize = 128, 368 .dcache_bsize = 128, 369 .oprofile_type = PPC_OPROFILE_INVALID, 370 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 371 .cpu_setup = __setup_cpu_power9, 372 .cpu_restore = __restore_cpu_power9, 373 .platform = "power9", 374 }, 375 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */ 376 .pvr_mask = 0xffffffff, 377 .pvr_value = 0x0f000006, 378 .cpu_name = "POWER10 (architected)", 379 .cpu_features = CPU_FTRS_POWER10, 380 .cpu_user_features = COMMON_USER_POWER10, 381 .cpu_user_features2 = COMMON_USER2_POWER10, 382 .mmu_features = MMU_FTRS_POWER10, 383 .icache_bsize = 128, 384 .dcache_bsize = 128, 385 .oprofile_type = PPC_OPROFILE_INVALID, 386 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 387 .cpu_setup = __setup_cpu_power10, 388 .cpu_restore = __restore_cpu_power10, 389 .platform = "power10", 390 }, 391 { /* Power7 */ 392 .pvr_mask = 0xffff0000, 393 .pvr_value = 0x003f0000, 394 .cpu_name = "POWER7 (raw)", 395 .cpu_features = CPU_FTRS_POWER7, 396 .cpu_user_features = COMMON_USER_POWER7, 397 .cpu_user_features2 = COMMON_USER2_POWER7, 398 .mmu_features = MMU_FTRS_POWER7, 399 .icache_bsize = 128, 400 .dcache_bsize = 128, 401 .num_pmcs = 6, 402 .pmc_type = PPC_PMC_IBM, 403 .oprofile_cpu_type = "ppc64/power7", 404 .oprofile_type = PPC_OPROFILE_POWER4, 405 .cpu_setup = __setup_cpu_power7, 406 .cpu_restore = __restore_cpu_power7, 407 .machine_check_early = __machine_check_early_realmode_p7, 408 .platform = "power7", 409 }, 410 { /* Power7+ */ 411 .pvr_mask = 0xffff0000, 412 .pvr_value = 0x004A0000, 413 .cpu_name = "POWER7+ (raw)", 414 .cpu_features = CPU_FTRS_POWER7, 415 .cpu_user_features = COMMON_USER_POWER7, 416 .cpu_user_features2 = COMMON_USER2_POWER7, 417 .mmu_features = MMU_FTRS_POWER7, 418 .icache_bsize = 128, 419 .dcache_bsize = 128, 420 .num_pmcs = 6, 421 .pmc_type = PPC_PMC_IBM, 422 .oprofile_cpu_type = "ppc64/power7", 423 .oprofile_type = PPC_OPROFILE_POWER4, 424 .cpu_setup = __setup_cpu_power7, 425 .cpu_restore = __restore_cpu_power7, 426 .machine_check_early = __machine_check_early_realmode_p7, 427 .platform = "power7+", 428 }, 429 { /* Power8E */ 430 .pvr_mask = 0xffff0000, 431 .pvr_value = 0x004b0000, 432 .cpu_name = "POWER8E (raw)", 433 .cpu_features = CPU_FTRS_POWER8E, 434 .cpu_user_features = COMMON_USER_POWER8, 435 .cpu_user_features2 = COMMON_USER2_POWER8, 436 .mmu_features = MMU_FTRS_POWER8, 437 .icache_bsize = 128, 438 .dcache_bsize = 128, 439 .num_pmcs = 6, 440 .pmc_type = PPC_PMC_IBM, 441 .oprofile_cpu_type = "ppc64/power8", 442 .oprofile_type = PPC_OPROFILE_INVALID, 443 .cpu_setup = __setup_cpu_power8, 444 .cpu_restore = __restore_cpu_power8, 445 .machine_check_early = __machine_check_early_realmode_p8, 446 .platform = "power8", 447 }, 448 { /* Power8NVL */ 449 .pvr_mask = 0xffff0000, 450 .pvr_value = 0x004c0000, 451 .cpu_name = "POWER8NVL (raw)", 452 .cpu_features = CPU_FTRS_POWER8, 453 .cpu_user_features = COMMON_USER_POWER8, 454 .cpu_user_features2 = COMMON_USER2_POWER8, 455 .mmu_features = MMU_FTRS_POWER8, 456 .icache_bsize = 128, 457 .dcache_bsize = 128, 458 .num_pmcs = 6, 459 .pmc_type = PPC_PMC_IBM, 460 .oprofile_cpu_type = "ppc64/power8", 461 .oprofile_type = PPC_OPROFILE_INVALID, 462 .cpu_setup = __setup_cpu_power8, 463 .cpu_restore = __restore_cpu_power8, 464 .machine_check_early = __machine_check_early_realmode_p8, 465 .platform = "power8", 466 }, 467 { /* Power8 */ 468 .pvr_mask = 0xffff0000, 469 .pvr_value = 0x004d0000, 470 .cpu_name = "POWER8 (raw)", 471 .cpu_features = CPU_FTRS_POWER8, 472 .cpu_user_features = COMMON_USER_POWER8, 473 .cpu_user_features2 = COMMON_USER2_POWER8, 474 .mmu_features = MMU_FTRS_POWER8, 475 .icache_bsize = 128, 476 .dcache_bsize = 128, 477 .num_pmcs = 6, 478 .pmc_type = PPC_PMC_IBM, 479 .oprofile_cpu_type = "ppc64/power8", 480 .oprofile_type = PPC_OPROFILE_INVALID, 481 .cpu_setup = __setup_cpu_power8, 482 .cpu_restore = __restore_cpu_power8, 483 .machine_check_early = __machine_check_early_realmode_p8, 484 .platform = "power8", 485 }, 486 { /* Power9 DD2.0 */ 487 .pvr_mask = 0xffffefff, 488 .pvr_value = 0x004e0200, 489 .cpu_name = "POWER9 (raw)", 490 .cpu_features = CPU_FTRS_POWER9_DD2_0, 491 .cpu_user_features = COMMON_USER_POWER9, 492 .cpu_user_features2 = COMMON_USER2_POWER9, 493 .mmu_features = MMU_FTRS_POWER9, 494 .icache_bsize = 128, 495 .dcache_bsize = 128, 496 .num_pmcs = 6, 497 .pmc_type = PPC_PMC_IBM, 498 .oprofile_cpu_type = "ppc64/power9", 499 .oprofile_type = PPC_OPROFILE_INVALID, 500 .cpu_setup = __setup_cpu_power9, 501 .cpu_restore = __restore_cpu_power9, 502 .machine_check_early = __machine_check_early_realmode_p9, 503 .platform = "power9", 504 }, 505 { /* Power9 DD 2.1 */ 506 .pvr_mask = 0xffffefff, 507 .pvr_value = 0x004e0201, 508 .cpu_name = "POWER9 (raw)", 509 .cpu_features = CPU_FTRS_POWER9_DD2_1, 510 .cpu_user_features = COMMON_USER_POWER9, 511 .cpu_user_features2 = COMMON_USER2_POWER9, 512 .mmu_features = MMU_FTRS_POWER9, 513 .icache_bsize = 128, 514 .dcache_bsize = 128, 515 .num_pmcs = 6, 516 .pmc_type = PPC_PMC_IBM, 517 .oprofile_cpu_type = "ppc64/power9", 518 .oprofile_type = PPC_OPROFILE_INVALID, 519 .cpu_setup = __setup_cpu_power9, 520 .cpu_restore = __restore_cpu_power9, 521 .machine_check_early = __machine_check_early_realmode_p9, 522 .platform = "power9", 523 }, 524 { /* Power9 DD2.2 or later */ 525 .pvr_mask = 0xffff0000, 526 .pvr_value = 0x004e0000, 527 .cpu_name = "POWER9 (raw)", 528 .cpu_features = CPU_FTRS_POWER9_DD2_2, 529 .cpu_user_features = COMMON_USER_POWER9, 530 .cpu_user_features2 = COMMON_USER2_POWER9, 531 .mmu_features = MMU_FTRS_POWER9, 532 .icache_bsize = 128, 533 .dcache_bsize = 128, 534 .num_pmcs = 6, 535 .pmc_type = PPC_PMC_IBM, 536 .oprofile_cpu_type = "ppc64/power9", 537 .oprofile_type = PPC_OPROFILE_INVALID, 538 .cpu_setup = __setup_cpu_power9, 539 .cpu_restore = __restore_cpu_power9, 540 .machine_check_early = __machine_check_early_realmode_p9, 541 .platform = "power9", 542 }, 543 { /* Power10 */ 544 .pvr_mask = 0xffff0000, 545 .pvr_value = 0x00800000, 546 .cpu_name = "POWER10 (raw)", 547 .cpu_features = CPU_FTRS_POWER10, 548 .cpu_user_features = COMMON_USER_POWER10, 549 .cpu_user_features2 = COMMON_USER2_POWER10, 550 .mmu_features = MMU_FTRS_POWER10, 551 .icache_bsize = 128, 552 .dcache_bsize = 128, 553 .num_pmcs = 6, 554 .pmc_type = PPC_PMC_IBM, 555 .oprofile_cpu_type = "ppc64/power10", 556 .oprofile_type = PPC_OPROFILE_INVALID, 557 .cpu_setup = __setup_cpu_power10, 558 .cpu_restore = __restore_cpu_power10, 559 .machine_check_early = __machine_check_early_realmode_p10, 560 .platform = "power10", 561 }, 562 { /* Cell Broadband Engine */ 563 .pvr_mask = 0xffff0000, 564 .pvr_value = 0x00700000, 565 .cpu_name = "Cell Broadband Engine", 566 .cpu_features = CPU_FTRS_CELL, 567 .cpu_user_features = COMMON_USER_PPC64 | 568 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 569 PPC_FEATURE_SMT, 570 .mmu_features = MMU_FTRS_CELL, 571 .icache_bsize = 128, 572 .dcache_bsize = 128, 573 .num_pmcs = 4, 574 .pmc_type = PPC_PMC_IBM, 575 .oprofile_cpu_type = "ppc64/cell-be", 576 .oprofile_type = PPC_OPROFILE_CELL, 577 .platform = "ppc-cell-be", 578 }, 579 { /* PA Semi PA6T */ 580 .pvr_mask = 0x7fff0000, 581 .pvr_value = 0x00900000, 582 .cpu_name = "PA6T", 583 .cpu_features = CPU_FTRS_PA6T, 584 .cpu_user_features = COMMON_USER_PA6T, 585 .mmu_features = MMU_FTRS_PA6T, 586 .icache_bsize = 64, 587 .dcache_bsize = 64, 588 .num_pmcs = 6, 589 .pmc_type = PPC_PMC_PA6T, 590 .cpu_setup = __setup_cpu_pa6t, 591 .cpu_restore = __restore_cpu_pa6t, 592 .oprofile_cpu_type = "ppc64/pa6t", 593 .oprofile_type = PPC_OPROFILE_PA6T, 594 .platform = "pa6t", 595 }, 596 { /* default match */ 597 .pvr_mask = 0x00000000, 598 .pvr_value = 0x00000000, 599 .cpu_name = "POWER5 (compatible)", 600 .cpu_features = CPU_FTRS_COMPATIBLE, 601 .cpu_user_features = COMMON_USER_PPC64, 602 .mmu_features = MMU_FTRS_POWER, 603 .icache_bsize = 128, 604 .dcache_bsize = 128, 605 .num_pmcs = 6, 606 .pmc_type = PPC_PMC_IBM, 607 .platform = "power5", 608 } 609 #endif /* CONFIG_PPC_BOOK3S_64 */ 610 611 #ifdef CONFIG_PPC32 612 #ifdef CONFIG_PPC_BOOK3S_6xx 613 { /* 603 */ 614 .pvr_mask = 0xffff0000, 615 .pvr_value = 0x00030000, 616 .cpu_name = "603", 617 .cpu_features = CPU_FTRS_603, 618 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 619 .mmu_features = 0, 620 .icache_bsize = 32, 621 .dcache_bsize = 32, 622 .cpu_setup = __setup_cpu_603, 623 .machine_check = machine_check_generic, 624 .platform = "ppc603", 625 }, 626 { /* 603e */ 627 .pvr_mask = 0xffff0000, 628 .pvr_value = 0x00060000, 629 .cpu_name = "603e", 630 .cpu_features = CPU_FTRS_603, 631 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 632 .mmu_features = 0, 633 .icache_bsize = 32, 634 .dcache_bsize = 32, 635 .cpu_setup = __setup_cpu_603, 636 .machine_check = machine_check_generic, 637 .platform = "ppc603", 638 }, 639 { /* 603ev */ 640 .pvr_mask = 0xffff0000, 641 .pvr_value = 0x00070000, 642 .cpu_name = "603ev", 643 .cpu_features = CPU_FTRS_603, 644 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 645 .mmu_features = 0, 646 .icache_bsize = 32, 647 .dcache_bsize = 32, 648 .cpu_setup = __setup_cpu_603, 649 .machine_check = machine_check_generic, 650 .platform = "ppc603", 651 }, 652 { /* 604 */ 653 .pvr_mask = 0xffff0000, 654 .pvr_value = 0x00040000, 655 .cpu_name = "604", 656 .cpu_features = CPU_FTRS_604, 657 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 658 .mmu_features = MMU_FTR_HPTE_TABLE, 659 .icache_bsize = 32, 660 .dcache_bsize = 32, 661 .num_pmcs = 2, 662 .cpu_setup = __setup_cpu_604, 663 .machine_check = machine_check_generic, 664 .platform = "ppc604", 665 }, 666 { /* 604e */ 667 .pvr_mask = 0xfffff000, 668 .pvr_value = 0x00090000, 669 .cpu_name = "604e", 670 .cpu_features = CPU_FTRS_604, 671 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 672 .mmu_features = MMU_FTR_HPTE_TABLE, 673 .icache_bsize = 32, 674 .dcache_bsize = 32, 675 .num_pmcs = 4, 676 .cpu_setup = __setup_cpu_604, 677 .machine_check = machine_check_generic, 678 .platform = "ppc604", 679 }, 680 { /* 604r */ 681 .pvr_mask = 0xffff0000, 682 .pvr_value = 0x00090000, 683 .cpu_name = "604r", 684 .cpu_features = CPU_FTRS_604, 685 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 686 .mmu_features = MMU_FTR_HPTE_TABLE, 687 .icache_bsize = 32, 688 .dcache_bsize = 32, 689 .num_pmcs = 4, 690 .cpu_setup = __setup_cpu_604, 691 .machine_check = machine_check_generic, 692 .platform = "ppc604", 693 }, 694 { /* 604ev */ 695 .pvr_mask = 0xffff0000, 696 .pvr_value = 0x000a0000, 697 .cpu_name = "604ev", 698 .cpu_features = CPU_FTRS_604, 699 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 700 .mmu_features = MMU_FTR_HPTE_TABLE, 701 .icache_bsize = 32, 702 .dcache_bsize = 32, 703 .num_pmcs = 4, 704 .cpu_setup = __setup_cpu_604, 705 .machine_check = machine_check_generic, 706 .platform = "ppc604", 707 }, 708 { /* 740/750 (0x4202, don't support TAU ?) */ 709 .pvr_mask = 0xffffffff, 710 .pvr_value = 0x00084202, 711 .cpu_name = "740/750", 712 .cpu_features = CPU_FTRS_740_NOTAU, 713 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 714 .mmu_features = MMU_FTR_HPTE_TABLE, 715 .icache_bsize = 32, 716 .dcache_bsize = 32, 717 .num_pmcs = 4, 718 .cpu_setup = __setup_cpu_750, 719 .machine_check = machine_check_generic, 720 .platform = "ppc750", 721 }, 722 { /* 750CX (80100 and 8010x?) */ 723 .pvr_mask = 0xfffffff0, 724 .pvr_value = 0x00080100, 725 .cpu_name = "750CX", 726 .cpu_features = CPU_FTRS_750, 727 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 728 .mmu_features = MMU_FTR_HPTE_TABLE, 729 .icache_bsize = 32, 730 .dcache_bsize = 32, 731 .num_pmcs = 4, 732 .cpu_setup = __setup_cpu_750cx, 733 .machine_check = machine_check_generic, 734 .platform = "ppc750", 735 }, 736 { /* 750CX (82201 and 82202) */ 737 .pvr_mask = 0xfffffff0, 738 .pvr_value = 0x00082200, 739 .cpu_name = "750CX", 740 .cpu_features = CPU_FTRS_750, 741 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 742 .mmu_features = MMU_FTR_HPTE_TABLE, 743 .icache_bsize = 32, 744 .dcache_bsize = 32, 745 .num_pmcs = 4, 746 .pmc_type = PPC_PMC_IBM, 747 .cpu_setup = __setup_cpu_750cx, 748 .machine_check = machine_check_generic, 749 .platform = "ppc750", 750 }, 751 { /* 750CXe (82214) */ 752 .pvr_mask = 0xfffffff0, 753 .pvr_value = 0x00082210, 754 .cpu_name = "750CXe", 755 .cpu_features = CPU_FTRS_750, 756 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 757 .mmu_features = MMU_FTR_HPTE_TABLE, 758 .icache_bsize = 32, 759 .dcache_bsize = 32, 760 .num_pmcs = 4, 761 .pmc_type = PPC_PMC_IBM, 762 .cpu_setup = __setup_cpu_750cx, 763 .machine_check = machine_check_generic, 764 .platform = "ppc750", 765 }, 766 { /* 750CXe "Gekko" (83214) */ 767 .pvr_mask = 0xffffffff, 768 .pvr_value = 0x00083214, 769 .cpu_name = "750CXe", 770 .cpu_features = CPU_FTRS_750, 771 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 772 .mmu_features = MMU_FTR_HPTE_TABLE, 773 .icache_bsize = 32, 774 .dcache_bsize = 32, 775 .num_pmcs = 4, 776 .pmc_type = PPC_PMC_IBM, 777 .cpu_setup = __setup_cpu_750cx, 778 .machine_check = machine_check_generic, 779 .platform = "ppc750", 780 }, 781 { /* 750CL (and "Broadway") */ 782 .pvr_mask = 0xfffff0e0, 783 .pvr_value = 0x00087000, 784 .cpu_name = "750CL", 785 .cpu_features = CPU_FTRS_750CL, 786 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 787 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 788 .icache_bsize = 32, 789 .dcache_bsize = 32, 790 .num_pmcs = 4, 791 .pmc_type = PPC_PMC_IBM, 792 .cpu_setup = __setup_cpu_750, 793 .machine_check = machine_check_generic, 794 .platform = "ppc750", 795 .oprofile_cpu_type = "ppc/750", 796 .oprofile_type = PPC_OPROFILE_G4, 797 }, 798 { /* 745/755 */ 799 .pvr_mask = 0xfffff000, 800 .pvr_value = 0x00083000, 801 .cpu_name = "745/755", 802 .cpu_features = CPU_FTRS_750, 803 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 804 .mmu_features = MMU_FTR_HPTE_TABLE, 805 .icache_bsize = 32, 806 .dcache_bsize = 32, 807 .num_pmcs = 4, 808 .pmc_type = PPC_PMC_IBM, 809 .cpu_setup = __setup_cpu_750, 810 .machine_check = machine_check_generic, 811 .platform = "ppc750", 812 }, 813 { /* 750FX rev 1.x */ 814 .pvr_mask = 0xffffff00, 815 .pvr_value = 0x70000100, 816 .cpu_name = "750FX", 817 .cpu_features = CPU_FTRS_750FX1, 818 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 819 .mmu_features = MMU_FTR_HPTE_TABLE, 820 .icache_bsize = 32, 821 .dcache_bsize = 32, 822 .num_pmcs = 4, 823 .pmc_type = PPC_PMC_IBM, 824 .cpu_setup = __setup_cpu_750, 825 .machine_check = machine_check_generic, 826 .platform = "ppc750", 827 .oprofile_cpu_type = "ppc/750", 828 .oprofile_type = PPC_OPROFILE_G4, 829 }, 830 { /* 750FX rev 2.0 must disable HID0[DPM] */ 831 .pvr_mask = 0xffffffff, 832 .pvr_value = 0x70000200, 833 .cpu_name = "750FX", 834 .cpu_features = CPU_FTRS_750FX2, 835 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 836 .mmu_features = MMU_FTR_HPTE_TABLE, 837 .icache_bsize = 32, 838 .dcache_bsize = 32, 839 .num_pmcs = 4, 840 .pmc_type = PPC_PMC_IBM, 841 .cpu_setup = __setup_cpu_750, 842 .machine_check = machine_check_generic, 843 .platform = "ppc750", 844 .oprofile_cpu_type = "ppc/750", 845 .oprofile_type = PPC_OPROFILE_G4, 846 }, 847 { /* 750FX (All revs except 2.0) */ 848 .pvr_mask = 0xffff0000, 849 .pvr_value = 0x70000000, 850 .cpu_name = "750FX", 851 .cpu_features = CPU_FTRS_750FX, 852 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 853 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 854 .icache_bsize = 32, 855 .dcache_bsize = 32, 856 .num_pmcs = 4, 857 .pmc_type = PPC_PMC_IBM, 858 .cpu_setup = __setup_cpu_750fx, 859 .machine_check = machine_check_generic, 860 .platform = "ppc750", 861 .oprofile_cpu_type = "ppc/750", 862 .oprofile_type = PPC_OPROFILE_G4, 863 }, 864 { /* 750GX */ 865 .pvr_mask = 0xffff0000, 866 .pvr_value = 0x70020000, 867 .cpu_name = "750GX", 868 .cpu_features = CPU_FTRS_750GX, 869 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 870 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 871 .icache_bsize = 32, 872 .dcache_bsize = 32, 873 .num_pmcs = 4, 874 .pmc_type = PPC_PMC_IBM, 875 .cpu_setup = __setup_cpu_750fx, 876 .machine_check = machine_check_generic, 877 .platform = "ppc750", 878 .oprofile_cpu_type = "ppc/750", 879 .oprofile_type = PPC_OPROFILE_G4, 880 }, 881 { /* 740/750 (L2CR bit need fixup for 740) */ 882 .pvr_mask = 0xffff0000, 883 .pvr_value = 0x00080000, 884 .cpu_name = "740/750", 885 .cpu_features = CPU_FTRS_740, 886 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 887 .mmu_features = MMU_FTR_HPTE_TABLE, 888 .icache_bsize = 32, 889 .dcache_bsize = 32, 890 .num_pmcs = 4, 891 .pmc_type = PPC_PMC_IBM, 892 .cpu_setup = __setup_cpu_750, 893 .machine_check = machine_check_generic, 894 .platform = "ppc750", 895 }, 896 { /* 7400 rev 1.1 ? (no TAU) */ 897 .pvr_mask = 0xffffffff, 898 .pvr_value = 0x000c1101, 899 .cpu_name = "7400 (1.1)", 900 .cpu_features = CPU_FTRS_7400_NOTAU, 901 .cpu_user_features = COMMON_USER | 902 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 903 .mmu_features = MMU_FTR_HPTE_TABLE, 904 .icache_bsize = 32, 905 .dcache_bsize = 32, 906 .num_pmcs = 4, 907 .pmc_type = PPC_PMC_G4, 908 .cpu_setup = __setup_cpu_7400, 909 .machine_check = machine_check_generic, 910 .platform = "ppc7400", 911 }, 912 { /* 7400 */ 913 .pvr_mask = 0xffff0000, 914 .pvr_value = 0x000c0000, 915 .cpu_name = "7400", 916 .cpu_features = CPU_FTRS_7400, 917 .cpu_user_features = COMMON_USER | 918 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 919 .mmu_features = MMU_FTR_HPTE_TABLE, 920 .icache_bsize = 32, 921 .dcache_bsize = 32, 922 .num_pmcs = 4, 923 .pmc_type = PPC_PMC_G4, 924 .cpu_setup = __setup_cpu_7400, 925 .machine_check = machine_check_generic, 926 .platform = "ppc7400", 927 }, 928 { /* 7410 */ 929 .pvr_mask = 0xffff0000, 930 .pvr_value = 0x800c0000, 931 .cpu_name = "7410", 932 .cpu_features = CPU_FTRS_7400, 933 .cpu_user_features = COMMON_USER | 934 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 935 .mmu_features = MMU_FTR_HPTE_TABLE, 936 .icache_bsize = 32, 937 .dcache_bsize = 32, 938 .num_pmcs = 4, 939 .pmc_type = PPC_PMC_G4, 940 .cpu_setup = __setup_cpu_7410, 941 .machine_check = machine_check_generic, 942 .platform = "ppc7400", 943 }, 944 { /* 7450 2.0 - no doze/nap */ 945 .pvr_mask = 0xffffffff, 946 .pvr_value = 0x80000200, 947 .cpu_name = "7450", 948 .cpu_features = CPU_FTRS_7450_20, 949 .cpu_user_features = COMMON_USER | 950 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 951 .mmu_features = MMU_FTR_HPTE_TABLE, 952 .icache_bsize = 32, 953 .dcache_bsize = 32, 954 .num_pmcs = 6, 955 .pmc_type = PPC_PMC_G4, 956 .cpu_setup = __setup_cpu_745x, 957 .oprofile_cpu_type = "ppc/7450", 958 .oprofile_type = PPC_OPROFILE_G4, 959 .machine_check = machine_check_generic, 960 .platform = "ppc7450", 961 }, 962 { /* 7450 2.1 */ 963 .pvr_mask = 0xffffffff, 964 .pvr_value = 0x80000201, 965 .cpu_name = "7450", 966 .cpu_features = CPU_FTRS_7450_21, 967 .cpu_user_features = COMMON_USER | 968 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 969 .mmu_features = MMU_FTR_HPTE_TABLE, 970 .icache_bsize = 32, 971 .dcache_bsize = 32, 972 .num_pmcs = 6, 973 .pmc_type = PPC_PMC_G4, 974 .cpu_setup = __setup_cpu_745x, 975 .oprofile_cpu_type = "ppc/7450", 976 .oprofile_type = PPC_OPROFILE_G4, 977 .machine_check = machine_check_generic, 978 .platform = "ppc7450", 979 }, 980 { /* 7450 2.3 and newer */ 981 .pvr_mask = 0xffff0000, 982 .pvr_value = 0x80000000, 983 .cpu_name = "7450", 984 .cpu_features = CPU_FTRS_7450_23, 985 .cpu_user_features = COMMON_USER | 986 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 987 .mmu_features = MMU_FTR_HPTE_TABLE, 988 .icache_bsize = 32, 989 .dcache_bsize = 32, 990 .num_pmcs = 6, 991 .pmc_type = PPC_PMC_G4, 992 .cpu_setup = __setup_cpu_745x, 993 .oprofile_cpu_type = "ppc/7450", 994 .oprofile_type = PPC_OPROFILE_G4, 995 .machine_check = machine_check_generic, 996 .platform = "ppc7450", 997 }, 998 { /* 7455 rev 1.x */ 999 .pvr_mask = 0xffffff00, 1000 .pvr_value = 0x80010100, 1001 .cpu_name = "7455", 1002 .cpu_features = CPU_FTRS_7455_1, 1003 .cpu_user_features = COMMON_USER | 1004 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1005 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1006 .icache_bsize = 32, 1007 .dcache_bsize = 32, 1008 .num_pmcs = 6, 1009 .pmc_type = PPC_PMC_G4, 1010 .cpu_setup = __setup_cpu_745x, 1011 .oprofile_cpu_type = "ppc/7450", 1012 .oprofile_type = PPC_OPROFILE_G4, 1013 .machine_check = machine_check_generic, 1014 .platform = "ppc7450", 1015 }, 1016 { /* 7455 rev 2.0 */ 1017 .pvr_mask = 0xffffffff, 1018 .pvr_value = 0x80010200, 1019 .cpu_name = "7455", 1020 .cpu_features = CPU_FTRS_7455_20, 1021 .cpu_user_features = COMMON_USER | 1022 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1023 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1024 .icache_bsize = 32, 1025 .dcache_bsize = 32, 1026 .num_pmcs = 6, 1027 .pmc_type = PPC_PMC_G4, 1028 .cpu_setup = __setup_cpu_745x, 1029 .oprofile_cpu_type = "ppc/7450", 1030 .oprofile_type = PPC_OPROFILE_G4, 1031 .machine_check = machine_check_generic, 1032 .platform = "ppc7450", 1033 }, 1034 { /* 7455 others */ 1035 .pvr_mask = 0xffff0000, 1036 .pvr_value = 0x80010000, 1037 .cpu_name = "7455", 1038 .cpu_features = CPU_FTRS_7455, 1039 .cpu_user_features = COMMON_USER | 1040 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1041 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1042 .icache_bsize = 32, 1043 .dcache_bsize = 32, 1044 .num_pmcs = 6, 1045 .pmc_type = PPC_PMC_G4, 1046 .cpu_setup = __setup_cpu_745x, 1047 .oprofile_cpu_type = "ppc/7450", 1048 .oprofile_type = PPC_OPROFILE_G4, 1049 .machine_check = machine_check_generic, 1050 .platform = "ppc7450", 1051 }, 1052 { /* 7447/7457 Rev 1.0 */ 1053 .pvr_mask = 0xffffffff, 1054 .pvr_value = 0x80020100, 1055 .cpu_name = "7447/7457", 1056 .cpu_features = CPU_FTRS_7447_10, 1057 .cpu_user_features = COMMON_USER | 1058 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1059 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1060 .icache_bsize = 32, 1061 .dcache_bsize = 32, 1062 .num_pmcs = 6, 1063 .pmc_type = PPC_PMC_G4, 1064 .cpu_setup = __setup_cpu_745x, 1065 .oprofile_cpu_type = "ppc/7450", 1066 .oprofile_type = PPC_OPROFILE_G4, 1067 .machine_check = machine_check_generic, 1068 .platform = "ppc7450", 1069 }, 1070 { /* 7447/7457 Rev 1.1 */ 1071 .pvr_mask = 0xffffffff, 1072 .pvr_value = 0x80020101, 1073 .cpu_name = "7447/7457", 1074 .cpu_features = CPU_FTRS_7447_10, 1075 .cpu_user_features = COMMON_USER | 1076 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1077 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1078 .icache_bsize = 32, 1079 .dcache_bsize = 32, 1080 .num_pmcs = 6, 1081 .pmc_type = PPC_PMC_G4, 1082 .cpu_setup = __setup_cpu_745x, 1083 .oprofile_cpu_type = "ppc/7450", 1084 .oprofile_type = PPC_OPROFILE_G4, 1085 .machine_check = machine_check_generic, 1086 .platform = "ppc7450", 1087 }, 1088 { /* 7447/7457 Rev 1.2 and later */ 1089 .pvr_mask = 0xffff0000, 1090 .pvr_value = 0x80020000, 1091 .cpu_name = "7447/7457", 1092 .cpu_features = CPU_FTRS_7447, 1093 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1094 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1095 .icache_bsize = 32, 1096 .dcache_bsize = 32, 1097 .num_pmcs = 6, 1098 .pmc_type = PPC_PMC_G4, 1099 .cpu_setup = __setup_cpu_745x, 1100 .oprofile_cpu_type = "ppc/7450", 1101 .oprofile_type = PPC_OPROFILE_G4, 1102 .machine_check = machine_check_generic, 1103 .platform = "ppc7450", 1104 }, 1105 { /* 7447A */ 1106 .pvr_mask = 0xffff0000, 1107 .pvr_value = 0x80030000, 1108 .cpu_name = "7447A", 1109 .cpu_features = CPU_FTRS_7447A, 1110 .cpu_user_features = COMMON_USER | 1111 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1112 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1113 .icache_bsize = 32, 1114 .dcache_bsize = 32, 1115 .num_pmcs = 6, 1116 .pmc_type = PPC_PMC_G4, 1117 .cpu_setup = __setup_cpu_745x, 1118 .oprofile_cpu_type = "ppc/7450", 1119 .oprofile_type = PPC_OPROFILE_G4, 1120 .machine_check = machine_check_generic, 1121 .platform = "ppc7450", 1122 }, 1123 { /* 7448 */ 1124 .pvr_mask = 0xffff0000, 1125 .pvr_value = 0x80040000, 1126 .cpu_name = "7448", 1127 .cpu_features = CPU_FTRS_7448, 1128 .cpu_user_features = COMMON_USER | 1129 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1130 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1131 .icache_bsize = 32, 1132 .dcache_bsize = 32, 1133 .num_pmcs = 6, 1134 .pmc_type = PPC_PMC_G4, 1135 .cpu_setup = __setup_cpu_745x, 1136 .oprofile_cpu_type = "ppc/7450", 1137 .oprofile_type = PPC_OPROFILE_G4, 1138 .machine_check = machine_check_generic, 1139 .platform = "ppc7450", 1140 }, 1141 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1142 .pvr_mask = 0x7fff0000, 1143 .pvr_value = 0x00810000, 1144 .cpu_name = "82xx", 1145 .cpu_features = CPU_FTRS_82XX, 1146 .cpu_user_features = COMMON_USER, 1147 .mmu_features = 0, 1148 .icache_bsize = 32, 1149 .dcache_bsize = 32, 1150 .cpu_setup = __setup_cpu_603, 1151 .machine_check = machine_check_generic, 1152 .platform = "ppc603", 1153 }, 1154 { /* All G2_LE (603e core, plus some) have the same pvr */ 1155 .pvr_mask = 0x7fff0000, 1156 .pvr_value = 0x00820000, 1157 .cpu_name = "G2_LE", 1158 .cpu_features = CPU_FTRS_G2_LE, 1159 .cpu_user_features = COMMON_USER, 1160 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1161 .icache_bsize = 32, 1162 .dcache_bsize = 32, 1163 .cpu_setup = __setup_cpu_603, 1164 .machine_check = machine_check_generic, 1165 .platform = "ppc603", 1166 }, 1167 #ifdef CONFIG_PPC_83xx 1168 { /* e300c1 (a 603e core, plus some) on 83xx */ 1169 .pvr_mask = 0x7fff0000, 1170 .pvr_value = 0x00830000, 1171 .cpu_name = "e300c1", 1172 .cpu_features = CPU_FTRS_E300, 1173 .cpu_user_features = COMMON_USER, 1174 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1175 .icache_bsize = 32, 1176 .dcache_bsize = 32, 1177 .cpu_setup = __setup_cpu_603, 1178 .machine_check = machine_check_83xx, 1179 .platform = "ppc603", 1180 }, 1181 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1182 .pvr_mask = 0x7fff0000, 1183 .pvr_value = 0x00840000, 1184 .cpu_name = "e300c2", 1185 .cpu_features = CPU_FTRS_E300C2, 1186 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1187 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1188 MMU_FTR_NEED_DTLB_SW_LRU, 1189 .icache_bsize = 32, 1190 .dcache_bsize = 32, 1191 .cpu_setup = __setup_cpu_603, 1192 .machine_check = machine_check_83xx, 1193 .platform = "ppc603", 1194 }, 1195 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1196 .pvr_mask = 0x7fff0000, 1197 .pvr_value = 0x00850000, 1198 .cpu_name = "e300c3", 1199 .cpu_features = CPU_FTRS_E300, 1200 .cpu_user_features = COMMON_USER, 1201 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1202 MMU_FTR_NEED_DTLB_SW_LRU, 1203 .icache_bsize = 32, 1204 .dcache_bsize = 32, 1205 .cpu_setup = __setup_cpu_603, 1206 .machine_check = machine_check_83xx, 1207 .num_pmcs = 4, 1208 .oprofile_cpu_type = "ppc/e300", 1209 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1210 .platform = "ppc603", 1211 }, 1212 { /* e300c4 (e300c1, plus one IU) */ 1213 .pvr_mask = 0x7fff0000, 1214 .pvr_value = 0x00860000, 1215 .cpu_name = "e300c4", 1216 .cpu_features = CPU_FTRS_E300, 1217 .cpu_user_features = COMMON_USER, 1218 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1219 MMU_FTR_NEED_DTLB_SW_LRU, 1220 .icache_bsize = 32, 1221 .dcache_bsize = 32, 1222 .cpu_setup = __setup_cpu_603, 1223 .machine_check = machine_check_83xx, 1224 .num_pmcs = 4, 1225 .oprofile_cpu_type = "ppc/e300", 1226 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1227 .platform = "ppc603", 1228 }, 1229 #endif 1230 { /* default match, we assume split I/D cache & TB (non-601)... */ 1231 .pvr_mask = 0x00000000, 1232 .pvr_value = 0x00000000, 1233 .cpu_name = "(generic PPC)", 1234 .cpu_features = CPU_FTRS_CLASSIC32, 1235 .cpu_user_features = COMMON_USER, 1236 .mmu_features = MMU_FTR_HPTE_TABLE, 1237 .icache_bsize = 32, 1238 .dcache_bsize = 32, 1239 .machine_check = machine_check_generic, 1240 .platform = "ppc603", 1241 }, 1242 #endif /* CONFIG_PPC_BOOK3S_6xx */ 1243 #ifdef CONFIG_PPC_8xx 1244 { /* 8xx */ 1245 .pvr_mask = 0xffff0000, 1246 .pvr_value = PVR_8xx, 1247 .cpu_name = "8xx", 1248 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1249 * if the 8xx code is there.... */ 1250 .cpu_features = CPU_FTRS_8XX, 1251 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1252 .mmu_features = MMU_FTR_TYPE_8xx, 1253 .icache_bsize = 16, 1254 .dcache_bsize = 16, 1255 .machine_check = machine_check_8xx, 1256 .platform = "ppc823", 1257 }, 1258 #endif /* CONFIG_PPC_8xx */ 1259 #ifdef CONFIG_40x 1260 { /* STB 04xxx */ 1261 .pvr_mask = 0xffff0000, 1262 .pvr_value = 0x41810000, 1263 .cpu_name = "STB04xxx", 1264 .cpu_features = CPU_FTRS_40X, 1265 .cpu_user_features = PPC_FEATURE_32 | 1266 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1267 .mmu_features = MMU_FTR_TYPE_40x, 1268 .icache_bsize = 32, 1269 .dcache_bsize = 32, 1270 .machine_check = machine_check_4xx, 1271 .platform = "ppc405", 1272 }, 1273 { /* NP405L */ 1274 .pvr_mask = 0xffff0000, 1275 .pvr_value = 0x41610000, 1276 .cpu_name = "NP405L", 1277 .cpu_features = CPU_FTRS_40X, 1278 .cpu_user_features = PPC_FEATURE_32 | 1279 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1280 .mmu_features = MMU_FTR_TYPE_40x, 1281 .icache_bsize = 32, 1282 .dcache_bsize = 32, 1283 .machine_check = machine_check_4xx, 1284 .platform = "ppc405", 1285 }, 1286 { /* NP4GS3 */ 1287 .pvr_mask = 0xffff0000, 1288 .pvr_value = 0x40B10000, 1289 .cpu_name = "NP4GS3", 1290 .cpu_features = CPU_FTRS_40X, 1291 .cpu_user_features = PPC_FEATURE_32 | 1292 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1293 .mmu_features = MMU_FTR_TYPE_40x, 1294 .icache_bsize = 32, 1295 .dcache_bsize = 32, 1296 .machine_check = machine_check_4xx, 1297 .platform = "ppc405", 1298 }, 1299 { /* NP405H */ 1300 .pvr_mask = 0xffff0000, 1301 .pvr_value = 0x41410000, 1302 .cpu_name = "NP405H", 1303 .cpu_features = CPU_FTRS_40X, 1304 .cpu_user_features = PPC_FEATURE_32 | 1305 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1306 .mmu_features = MMU_FTR_TYPE_40x, 1307 .icache_bsize = 32, 1308 .dcache_bsize = 32, 1309 .machine_check = machine_check_4xx, 1310 .platform = "ppc405", 1311 }, 1312 { /* 405GPr */ 1313 .pvr_mask = 0xffff0000, 1314 .pvr_value = 0x50910000, 1315 .cpu_name = "405GPr", 1316 .cpu_features = CPU_FTRS_40X, 1317 .cpu_user_features = PPC_FEATURE_32 | 1318 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1319 .mmu_features = MMU_FTR_TYPE_40x, 1320 .icache_bsize = 32, 1321 .dcache_bsize = 32, 1322 .machine_check = machine_check_4xx, 1323 .platform = "ppc405", 1324 }, 1325 { /* STBx25xx */ 1326 .pvr_mask = 0xffff0000, 1327 .pvr_value = 0x51510000, 1328 .cpu_name = "STBx25xx", 1329 .cpu_features = CPU_FTRS_40X, 1330 .cpu_user_features = PPC_FEATURE_32 | 1331 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1332 .mmu_features = MMU_FTR_TYPE_40x, 1333 .icache_bsize = 32, 1334 .dcache_bsize = 32, 1335 .machine_check = machine_check_4xx, 1336 .platform = "ppc405", 1337 }, 1338 { /* 405LP */ 1339 .pvr_mask = 0xffff0000, 1340 .pvr_value = 0x41F10000, 1341 .cpu_name = "405LP", 1342 .cpu_features = CPU_FTRS_40X, 1343 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1344 .mmu_features = MMU_FTR_TYPE_40x, 1345 .icache_bsize = 32, 1346 .dcache_bsize = 32, 1347 .machine_check = machine_check_4xx, 1348 .platform = "ppc405", 1349 }, 1350 { /* 405EP */ 1351 .pvr_mask = 0xffff0000, 1352 .pvr_value = 0x51210000, 1353 .cpu_name = "405EP", 1354 .cpu_features = CPU_FTRS_40X, 1355 .cpu_user_features = PPC_FEATURE_32 | 1356 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1357 .mmu_features = MMU_FTR_TYPE_40x, 1358 .icache_bsize = 32, 1359 .dcache_bsize = 32, 1360 .machine_check = machine_check_4xx, 1361 .platform = "ppc405", 1362 }, 1363 { /* 405EX Rev. A/B with Security */ 1364 .pvr_mask = 0xffff000f, 1365 .pvr_value = 0x12910007, 1366 .cpu_name = "405EX Rev. A/B", 1367 .cpu_features = CPU_FTRS_40X, 1368 .cpu_user_features = PPC_FEATURE_32 | 1369 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1370 .mmu_features = MMU_FTR_TYPE_40x, 1371 .icache_bsize = 32, 1372 .dcache_bsize = 32, 1373 .machine_check = machine_check_4xx, 1374 .platform = "ppc405", 1375 }, 1376 { /* 405EX Rev. C without Security */ 1377 .pvr_mask = 0xffff000f, 1378 .pvr_value = 0x1291000d, 1379 .cpu_name = "405EX Rev. C", 1380 .cpu_features = CPU_FTRS_40X, 1381 .cpu_user_features = PPC_FEATURE_32 | 1382 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1383 .mmu_features = MMU_FTR_TYPE_40x, 1384 .icache_bsize = 32, 1385 .dcache_bsize = 32, 1386 .machine_check = machine_check_4xx, 1387 .platform = "ppc405", 1388 }, 1389 { /* 405EX Rev. C with Security */ 1390 .pvr_mask = 0xffff000f, 1391 .pvr_value = 0x1291000f, 1392 .cpu_name = "405EX Rev. C", 1393 .cpu_features = CPU_FTRS_40X, 1394 .cpu_user_features = PPC_FEATURE_32 | 1395 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1396 .mmu_features = MMU_FTR_TYPE_40x, 1397 .icache_bsize = 32, 1398 .dcache_bsize = 32, 1399 .machine_check = machine_check_4xx, 1400 .platform = "ppc405", 1401 }, 1402 { /* 405EX Rev. D without Security */ 1403 .pvr_mask = 0xffff000f, 1404 .pvr_value = 0x12910003, 1405 .cpu_name = "405EX Rev. D", 1406 .cpu_features = CPU_FTRS_40X, 1407 .cpu_user_features = PPC_FEATURE_32 | 1408 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1409 .mmu_features = MMU_FTR_TYPE_40x, 1410 .icache_bsize = 32, 1411 .dcache_bsize = 32, 1412 .machine_check = machine_check_4xx, 1413 .platform = "ppc405", 1414 }, 1415 { /* 405EX Rev. D with Security */ 1416 .pvr_mask = 0xffff000f, 1417 .pvr_value = 0x12910005, 1418 .cpu_name = "405EX Rev. D", 1419 .cpu_features = CPU_FTRS_40X, 1420 .cpu_user_features = PPC_FEATURE_32 | 1421 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1422 .mmu_features = MMU_FTR_TYPE_40x, 1423 .icache_bsize = 32, 1424 .dcache_bsize = 32, 1425 .machine_check = machine_check_4xx, 1426 .platform = "ppc405", 1427 }, 1428 { /* 405EXr Rev. A/B without Security */ 1429 .pvr_mask = 0xffff000f, 1430 .pvr_value = 0x12910001, 1431 .cpu_name = "405EXr Rev. A/B", 1432 .cpu_features = CPU_FTRS_40X, 1433 .cpu_user_features = PPC_FEATURE_32 | 1434 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1435 .mmu_features = MMU_FTR_TYPE_40x, 1436 .icache_bsize = 32, 1437 .dcache_bsize = 32, 1438 .machine_check = machine_check_4xx, 1439 .platform = "ppc405", 1440 }, 1441 { /* 405EXr Rev. C without Security */ 1442 .pvr_mask = 0xffff000f, 1443 .pvr_value = 0x12910009, 1444 .cpu_name = "405EXr Rev. C", 1445 .cpu_features = CPU_FTRS_40X, 1446 .cpu_user_features = PPC_FEATURE_32 | 1447 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1448 .mmu_features = MMU_FTR_TYPE_40x, 1449 .icache_bsize = 32, 1450 .dcache_bsize = 32, 1451 .machine_check = machine_check_4xx, 1452 .platform = "ppc405", 1453 }, 1454 { /* 405EXr Rev. C with Security */ 1455 .pvr_mask = 0xffff000f, 1456 .pvr_value = 0x1291000b, 1457 .cpu_name = "405EXr Rev. C", 1458 .cpu_features = CPU_FTRS_40X, 1459 .cpu_user_features = PPC_FEATURE_32 | 1460 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1461 .mmu_features = MMU_FTR_TYPE_40x, 1462 .icache_bsize = 32, 1463 .dcache_bsize = 32, 1464 .machine_check = machine_check_4xx, 1465 .platform = "ppc405", 1466 }, 1467 { /* 405EXr Rev. D without Security */ 1468 .pvr_mask = 0xffff000f, 1469 .pvr_value = 0x12910000, 1470 .cpu_name = "405EXr Rev. D", 1471 .cpu_features = CPU_FTRS_40X, 1472 .cpu_user_features = PPC_FEATURE_32 | 1473 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1474 .mmu_features = MMU_FTR_TYPE_40x, 1475 .icache_bsize = 32, 1476 .dcache_bsize = 32, 1477 .machine_check = machine_check_4xx, 1478 .platform = "ppc405", 1479 }, 1480 { /* 405EXr Rev. D with Security */ 1481 .pvr_mask = 0xffff000f, 1482 .pvr_value = 0x12910002, 1483 .cpu_name = "405EXr Rev. D", 1484 .cpu_features = CPU_FTRS_40X, 1485 .cpu_user_features = PPC_FEATURE_32 | 1486 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1487 .mmu_features = MMU_FTR_TYPE_40x, 1488 .icache_bsize = 32, 1489 .dcache_bsize = 32, 1490 .machine_check = machine_check_4xx, 1491 .platform = "ppc405", 1492 }, 1493 { 1494 /* 405EZ */ 1495 .pvr_mask = 0xffff0000, 1496 .pvr_value = 0x41510000, 1497 .cpu_name = "405EZ", 1498 .cpu_features = CPU_FTRS_40X, 1499 .cpu_user_features = PPC_FEATURE_32 | 1500 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1501 .mmu_features = MMU_FTR_TYPE_40x, 1502 .icache_bsize = 32, 1503 .dcache_bsize = 32, 1504 .machine_check = machine_check_4xx, 1505 .platform = "ppc405", 1506 }, 1507 { /* APM8018X */ 1508 .pvr_mask = 0xffff0000, 1509 .pvr_value = 0x7ff11432, 1510 .cpu_name = "APM8018X", 1511 .cpu_features = CPU_FTRS_40X, 1512 .cpu_user_features = PPC_FEATURE_32 | 1513 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1514 .mmu_features = MMU_FTR_TYPE_40x, 1515 .icache_bsize = 32, 1516 .dcache_bsize = 32, 1517 .machine_check = machine_check_4xx, 1518 .platform = "ppc405", 1519 }, 1520 { /* default match */ 1521 .pvr_mask = 0x00000000, 1522 .pvr_value = 0x00000000, 1523 .cpu_name = "(generic 40x PPC)", 1524 .cpu_features = CPU_FTRS_40X, 1525 .cpu_user_features = PPC_FEATURE_32 | 1526 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1527 .mmu_features = MMU_FTR_TYPE_40x, 1528 .icache_bsize = 32, 1529 .dcache_bsize = 32, 1530 .machine_check = machine_check_4xx, 1531 .platform = "ppc405", 1532 } 1533 1534 #endif /* CONFIG_40x */ 1535 #ifdef CONFIG_44x 1536 { 1537 .pvr_mask = 0xf0000fff, 1538 .pvr_value = 0x40000850, 1539 .cpu_name = "440GR Rev. A", 1540 .cpu_features = CPU_FTRS_44X, 1541 .cpu_user_features = COMMON_USER_BOOKE, 1542 .mmu_features = MMU_FTR_TYPE_44x, 1543 .icache_bsize = 32, 1544 .dcache_bsize = 32, 1545 .machine_check = machine_check_4xx, 1546 .platform = "ppc440", 1547 }, 1548 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1549 .pvr_mask = 0xf0000fff, 1550 .pvr_value = 0x40000858, 1551 .cpu_name = "440EP Rev. A", 1552 .cpu_features = CPU_FTRS_44X, 1553 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1554 .mmu_features = MMU_FTR_TYPE_44x, 1555 .icache_bsize = 32, 1556 .dcache_bsize = 32, 1557 .cpu_setup = __setup_cpu_440ep, 1558 .machine_check = machine_check_4xx, 1559 .platform = "ppc440", 1560 }, 1561 { 1562 .pvr_mask = 0xf0000fff, 1563 .pvr_value = 0x400008d3, 1564 .cpu_name = "440GR Rev. B", 1565 .cpu_features = CPU_FTRS_44X, 1566 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1567 .mmu_features = MMU_FTR_TYPE_44x, 1568 .icache_bsize = 32, 1569 .dcache_bsize = 32, 1570 .machine_check = machine_check_4xx, 1571 .platform = "ppc440", 1572 }, 1573 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1574 .pvr_mask = 0xf0000ff7, 1575 .pvr_value = 0x400008d4, 1576 .cpu_name = "440EP Rev. C", 1577 .cpu_features = CPU_FTRS_44X, 1578 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1579 .mmu_features = MMU_FTR_TYPE_44x, 1580 .icache_bsize = 32, 1581 .dcache_bsize = 32, 1582 .cpu_setup = __setup_cpu_440ep, 1583 .machine_check = machine_check_4xx, 1584 .platform = "ppc440", 1585 }, 1586 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1587 .pvr_mask = 0xf0000fff, 1588 .pvr_value = 0x400008db, 1589 .cpu_name = "440EP Rev. B", 1590 .cpu_features = CPU_FTRS_44X, 1591 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1592 .mmu_features = MMU_FTR_TYPE_44x, 1593 .icache_bsize = 32, 1594 .dcache_bsize = 32, 1595 .cpu_setup = __setup_cpu_440ep, 1596 .machine_check = machine_check_4xx, 1597 .platform = "ppc440", 1598 }, 1599 { /* 440GRX */ 1600 .pvr_mask = 0xf0000ffb, 1601 .pvr_value = 0x200008D0, 1602 .cpu_name = "440GRX", 1603 .cpu_features = CPU_FTRS_44X, 1604 .cpu_user_features = COMMON_USER_BOOKE, 1605 .mmu_features = MMU_FTR_TYPE_44x, 1606 .icache_bsize = 32, 1607 .dcache_bsize = 32, 1608 .cpu_setup = __setup_cpu_440grx, 1609 .machine_check = machine_check_440A, 1610 .platform = "ppc440", 1611 }, 1612 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1613 .pvr_mask = 0xf0000ffb, 1614 .pvr_value = 0x200008D8, 1615 .cpu_name = "440EPX", 1616 .cpu_features = CPU_FTRS_44X, 1617 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1618 .mmu_features = MMU_FTR_TYPE_44x, 1619 .icache_bsize = 32, 1620 .dcache_bsize = 32, 1621 .cpu_setup = __setup_cpu_440epx, 1622 .machine_check = machine_check_440A, 1623 .platform = "ppc440", 1624 }, 1625 { /* 440GP Rev. B */ 1626 .pvr_mask = 0xf0000fff, 1627 .pvr_value = 0x40000440, 1628 .cpu_name = "440GP Rev. B", 1629 .cpu_features = CPU_FTRS_44X, 1630 .cpu_user_features = COMMON_USER_BOOKE, 1631 .mmu_features = MMU_FTR_TYPE_44x, 1632 .icache_bsize = 32, 1633 .dcache_bsize = 32, 1634 .machine_check = machine_check_4xx, 1635 .platform = "ppc440gp", 1636 }, 1637 { /* 440GP Rev. C */ 1638 .pvr_mask = 0xf0000fff, 1639 .pvr_value = 0x40000481, 1640 .cpu_name = "440GP Rev. C", 1641 .cpu_features = CPU_FTRS_44X, 1642 .cpu_user_features = COMMON_USER_BOOKE, 1643 .mmu_features = MMU_FTR_TYPE_44x, 1644 .icache_bsize = 32, 1645 .dcache_bsize = 32, 1646 .machine_check = machine_check_4xx, 1647 .platform = "ppc440gp", 1648 }, 1649 { /* 440GX Rev. A */ 1650 .pvr_mask = 0xf0000fff, 1651 .pvr_value = 0x50000850, 1652 .cpu_name = "440GX Rev. A", 1653 .cpu_features = CPU_FTRS_44X, 1654 .cpu_user_features = COMMON_USER_BOOKE, 1655 .mmu_features = MMU_FTR_TYPE_44x, 1656 .icache_bsize = 32, 1657 .dcache_bsize = 32, 1658 .cpu_setup = __setup_cpu_440gx, 1659 .machine_check = machine_check_440A, 1660 .platform = "ppc440", 1661 }, 1662 { /* 440GX Rev. B */ 1663 .pvr_mask = 0xf0000fff, 1664 .pvr_value = 0x50000851, 1665 .cpu_name = "440GX Rev. B", 1666 .cpu_features = CPU_FTRS_44X, 1667 .cpu_user_features = COMMON_USER_BOOKE, 1668 .mmu_features = MMU_FTR_TYPE_44x, 1669 .icache_bsize = 32, 1670 .dcache_bsize = 32, 1671 .cpu_setup = __setup_cpu_440gx, 1672 .machine_check = machine_check_440A, 1673 .platform = "ppc440", 1674 }, 1675 { /* 440GX Rev. C */ 1676 .pvr_mask = 0xf0000fff, 1677 .pvr_value = 0x50000892, 1678 .cpu_name = "440GX Rev. C", 1679 .cpu_features = CPU_FTRS_44X, 1680 .cpu_user_features = COMMON_USER_BOOKE, 1681 .mmu_features = MMU_FTR_TYPE_44x, 1682 .icache_bsize = 32, 1683 .dcache_bsize = 32, 1684 .cpu_setup = __setup_cpu_440gx, 1685 .machine_check = machine_check_440A, 1686 .platform = "ppc440", 1687 }, 1688 { /* 440GX Rev. F */ 1689 .pvr_mask = 0xf0000fff, 1690 .pvr_value = 0x50000894, 1691 .cpu_name = "440GX Rev. F", 1692 .cpu_features = CPU_FTRS_44X, 1693 .cpu_user_features = COMMON_USER_BOOKE, 1694 .mmu_features = MMU_FTR_TYPE_44x, 1695 .icache_bsize = 32, 1696 .dcache_bsize = 32, 1697 .cpu_setup = __setup_cpu_440gx, 1698 .machine_check = machine_check_440A, 1699 .platform = "ppc440", 1700 }, 1701 { /* 440SP Rev. A */ 1702 .pvr_mask = 0xfff00fff, 1703 .pvr_value = 0x53200891, 1704 .cpu_name = "440SP Rev. A", 1705 .cpu_features = CPU_FTRS_44X, 1706 .cpu_user_features = COMMON_USER_BOOKE, 1707 .mmu_features = MMU_FTR_TYPE_44x, 1708 .icache_bsize = 32, 1709 .dcache_bsize = 32, 1710 .machine_check = machine_check_4xx, 1711 .platform = "ppc440", 1712 }, 1713 { /* 440SPe Rev. A */ 1714 .pvr_mask = 0xfff00fff, 1715 .pvr_value = 0x53400890, 1716 .cpu_name = "440SPe Rev. A", 1717 .cpu_features = CPU_FTRS_44X, 1718 .cpu_user_features = COMMON_USER_BOOKE, 1719 .mmu_features = MMU_FTR_TYPE_44x, 1720 .icache_bsize = 32, 1721 .dcache_bsize = 32, 1722 .cpu_setup = __setup_cpu_440spe, 1723 .machine_check = machine_check_440A, 1724 .platform = "ppc440", 1725 }, 1726 { /* 440SPe Rev. B */ 1727 .pvr_mask = 0xfff00fff, 1728 .pvr_value = 0x53400891, 1729 .cpu_name = "440SPe Rev. B", 1730 .cpu_features = CPU_FTRS_44X, 1731 .cpu_user_features = COMMON_USER_BOOKE, 1732 .mmu_features = MMU_FTR_TYPE_44x, 1733 .icache_bsize = 32, 1734 .dcache_bsize = 32, 1735 .cpu_setup = __setup_cpu_440spe, 1736 .machine_check = machine_check_440A, 1737 .platform = "ppc440", 1738 }, 1739 { /* 460EX */ 1740 .pvr_mask = 0xffff0006, 1741 .pvr_value = 0x13020002, 1742 .cpu_name = "460EX", 1743 .cpu_features = CPU_FTRS_440x6, 1744 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1745 .mmu_features = MMU_FTR_TYPE_44x, 1746 .icache_bsize = 32, 1747 .dcache_bsize = 32, 1748 .cpu_setup = __setup_cpu_460ex, 1749 .machine_check = machine_check_440A, 1750 .platform = "ppc440", 1751 }, 1752 { /* 460EX Rev B */ 1753 .pvr_mask = 0xffff0007, 1754 .pvr_value = 0x13020004, 1755 .cpu_name = "460EX Rev. B", 1756 .cpu_features = CPU_FTRS_440x6, 1757 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1758 .mmu_features = MMU_FTR_TYPE_44x, 1759 .icache_bsize = 32, 1760 .dcache_bsize = 32, 1761 .cpu_setup = __setup_cpu_460ex, 1762 .machine_check = machine_check_440A, 1763 .platform = "ppc440", 1764 }, 1765 { /* 460GT */ 1766 .pvr_mask = 0xffff0006, 1767 .pvr_value = 0x13020000, 1768 .cpu_name = "460GT", 1769 .cpu_features = CPU_FTRS_440x6, 1770 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1771 .mmu_features = MMU_FTR_TYPE_44x, 1772 .icache_bsize = 32, 1773 .dcache_bsize = 32, 1774 .cpu_setup = __setup_cpu_460gt, 1775 .machine_check = machine_check_440A, 1776 .platform = "ppc440", 1777 }, 1778 { /* 460GT Rev B */ 1779 .pvr_mask = 0xffff0007, 1780 .pvr_value = 0x13020005, 1781 .cpu_name = "460GT Rev. B", 1782 .cpu_features = CPU_FTRS_440x6, 1783 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1784 .mmu_features = MMU_FTR_TYPE_44x, 1785 .icache_bsize = 32, 1786 .dcache_bsize = 32, 1787 .cpu_setup = __setup_cpu_460gt, 1788 .machine_check = machine_check_440A, 1789 .platform = "ppc440", 1790 }, 1791 { /* 460SX */ 1792 .pvr_mask = 0xffffff00, 1793 .pvr_value = 0x13541800, 1794 .cpu_name = "460SX", 1795 .cpu_features = CPU_FTRS_44X, 1796 .cpu_user_features = COMMON_USER_BOOKE, 1797 .mmu_features = MMU_FTR_TYPE_44x, 1798 .icache_bsize = 32, 1799 .dcache_bsize = 32, 1800 .cpu_setup = __setup_cpu_460sx, 1801 .machine_check = machine_check_440A, 1802 .platform = "ppc440", 1803 }, 1804 { /* 464 in APM821xx */ 1805 .pvr_mask = 0xfffffff0, 1806 .pvr_value = 0x12C41C80, 1807 .cpu_name = "APM821XX", 1808 .cpu_features = CPU_FTRS_44X, 1809 .cpu_user_features = COMMON_USER_BOOKE | 1810 PPC_FEATURE_HAS_FPU, 1811 .mmu_features = MMU_FTR_TYPE_44x, 1812 .icache_bsize = 32, 1813 .dcache_bsize = 32, 1814 .cpu_setup = __setup_cpu_apm821xx, 1815 .machine_check = machine_check_440A, 1816 .platform = "ppc440", 1817 }, 1818 #ifdef CONFIG_PPC_47x 1819 { /* 476 DD2 core */ 1820 .pvr_mask = 0xffffffff, 1821 .pvr_value = 0x11a52080, 1822 .cpu_name = "476", 1823 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1824 .cpu_user_features = COMMON_USER_BOOKE | 1825 PPC_FEATURE_HAS_FPU, 1826 .mmu_features = MMU_FTR_TYPE_47x | 1827 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1828 .icache_bsize = 32, 1829 .dcache_bsize = 128, 1830 .machine_check = machine_check_47x, 1831 .platform = "ppc470", 1832 }, 1833 { /* 476fpe */ 1834 .pvr_mask = 0xffff0000, 1835 .pvr_value = 0x7ff50000, 1836 .cpu_name = "476fpe", 1837 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1838 .cpu_user_features = COMMON_USER_BOOKE | 1839 PPC_FEATURE_HAS_FPU, 1840 .mmu_features = MMU_FTR_TYPE_47x | 1841 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1842 .icache_bsize = 32, 1843 .dcache_bsize = 128, 1844 .machine_check = machine_check_47x, 1845 .platform = "ppc470", 1846 }, 1847 { /* 476 iss */ 1848 .pvr_mask = 0xffff0000, 1849 .pvr_value = 0x00050000, 1850 .cpu_name = "476", 1851 .cpu_features = CPU_FTRS_47X, 1852 .cpu_user_features = COMMON_USER_BOOKE | 1853 PPC_FEATURE_HAS_FPU, 1854 .mmu_features = MMU_FTR_TYPE_47x | 1855 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1856 .icache_bsize = 32, 1857 .dcache_bsize = 128, 1858 .machine_check = machine_check_47x, 1859 .platform = "ppc470", 1860 }, 1861 { /* 476 others */ 1862 .pvr_mask = 0xffff0000, 1863 .pvr_value = 0x11a50000, 1864 .cpu_name = "476", 1865 .cpu_features = CPU_FTRS_47X, 1866 .cpu_user_features = COMMON_USER_BOOKE | 1867 PPC_FEATURE_HAS_FPU, 1868 .mmu_features = MMU_FTR_TYPE_47x | 1869 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1870 .icache_bsize = 32, 1871 .dcache_bsize = 128, 1872 .machine_check = machine_check_47x, 1873 .platform = "ppc470", 1874 }, 1875 #endif /* CONFIG_PPC_47x */ 1876 { /* default match */ 1877 .pvr_mask = 0x00000000, 1878 .pvr_value = 0x00000000, 1879 .cpu_name = "(generic 44x PPC)", 1880 .cpu_features = CPU_FTRS_44X, 1881 .cpu_user_features = COMMON_USER_BOOKE, 1882 .mmu_features = MMU_FTR_TYPE_44x, 1883 .icache_bsize = 32, 1884 .dcache_bsize = 32, 1885 .machine_check = machine_check_4xx, 1886 .platform = "ppc440", 1887 } 1888 #endif /* CONFIG_44x */ 1889 #ifdef CONFIG_E200 1890 { /* e200z5 */ 1891 .pvr_mask = 0xfff00000, 1892 .pvr_value = 0x81000000, 1893 .cpu_name = "e200z5", 1894 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1895 .cpu_features = CPU_FTRS_E200, 1896 .cpu_user_features = COMMON_USER_BOOKE | 1897 PPC_FEATURE_HAS_EFP_SINGLE | 1898 PPC_FEATURE_UNIFIED_CACHE, 1899 .mmu_features = MMU_FTR_TYPE_FSL_E, 1900 .dcache_bsize = 32, 1901 .machine_check = machine_check_e200, 1902 .platform = "ppc5554", 1903 }, 1904 { /* e200z6 */ 1905 .pvr_mask = 0xfff00000, 1906 .pvr_value = 0x81100000, 1907 .cpu_name = "e200z6", 1908 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1909 .cpu_features = CPU_FTRS_E200, 1910 .cpu_user_features = COMMON_USER_BOOKE | 1911 PPC_FEATURE_HAS_SPE_COMP | 1912 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1913 PPC_FEATURE_UNIFIED_CACHE, 1914 .mmu_features = MMU_FTR_TYPE_FSL_E, 1915 .dcache_bsize = 32, 1916 .machine_check = machine_check_e200, 1917 .platform = "ppc5554", 1918 }, 1919 { /* default match */ 1920 .pvr_mask = 0x00000000, 1921 .pvr_value = 0x00000000, 1922 .cpu_name = "(generic E200 PPC)", 1923 .cpu_features = CPU_FTRS_E200, 1924 .cpu_user_features = COMMON_USER_BOOKE | 1925 PPC_FEATURE_HAS_EFP_SINGLE | 1926 PPC_FEATURE_UNIFIED_CACHE, 1927 .mmu_features = MMU_FTR_TYPE_FSL_E, 1928 .dcache_bsize = 32, 1929 .cpu_setup = __setup_cpu_e200, 1930 .machine_check = machine_check_e200, 1931 .platform = "ppc5554", 1932 } 1933 #endif /* CONFIG_E200 */ 1934 #endif /* CONFIG_PPC32 */ 1935 #ifdef CONFIG_E500 1936 #ifdef CONFIG_PPC32 1937 #ifndef CONFIG_PPC_E500MC 1938 { /* e500 */ 1939 .pvr_mask = 0xffff0000, 1940 .pvr_value = 0x80200000, 1941 .cpu_name = "e500", 1942 .cpu_features = CPU_FTRS_E500, 1943 .cpu_user_features = COMMON_USER_BOOKE | 1944 PPC_FEATURE_HAS_SPE_COMP | 1945 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1946 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1947 .mmu_features = MMU_FTR_TYPE_FSL_E, 1948 .icache_bsize = 32, 1949 .dcache_bsize = 32, 1950 .num_pmcs = 4, 1951 .oprofile_cpu_type = "ppc/e500", 1952 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1953 .cpu_setup = __setup_cpu_e500v1, 1954 .machine_check = machine_check_e500, 1955 .platform = "ppc8540", 1956 }, 1957 { /* e500v2 */ 1958 .pvr_mask = 0xffff0000, 1959 .pvr_value = 0x80210000, 1960 .cpu_name = "e500v2", 1961 .cpu_features = CPU_FTRS_E500_2, 1962 .cpu_user_features = COMMON_USER_BOOKE | 1963 PPC_FEATURE_HAS_SPE_COMP | 1964 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1965 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1966 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1967 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1968 .icache_bsize = 32, 1969 .dcache_bsize = 32, 1970 .num_pmcs = 4, 1971 .oprofile_cpu_type = "ppc/e500", 1972 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1973 .cpu_setup = __setup_cpu_e500v2, 1974 .machine_check = machine_check_e500, 1975 .platform = "ppc8548", 1976 .cpu_down_flush = cpu_down_flush_e500v2, 1977 }, 1978 #else 1979 { /* e500mc */ 1980 .pvr_mask = 0xffff0000, 1981 .pvr_value = 0x80230000, 1982 .cpu_name = "e500mc", 1983 .cpu_features = CPU_FTRS_E500MC, 1984 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1985 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1986 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1987 MMU_FTR_USE_TLBILX, 1988 .icache_bsize = 64, 1989 .dcache_bsize = 64, 1990 .num_pmcs = 4, 1991 .oprofile_cpu_type = "ppc/e500mc", 1992 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1993 .cpu_setup = __setup_cpu_e500mc, 1994 .machine_check = machine_check_e500mc, 1995 .platform = "ppce500mc", 1996 .cpu_down_flush = cpu_down_flush_e500mc, 1997 }, 1998 #endif /* CONFIG_PPC_E500MC */ 1999 #endif /* CONFIG_PPC32 */ 2000 #ifdef CONFIG_PPC_E500MC 2001 { /* e5500 */ 2002 .pvr_mask = 0xffff0000, 2003 .pvr_value = 0x80240000, 2004 .cpu_name = "e5500", 2005 .cpu_features = CPU_FTRS_E5500, 2006 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2007 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2008 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2009 MMU_FTR_USE_TLBILX, 2010 .icache_bsize = 64, 2011 .dcache_bsize = 64, 2012 .num_pmcs = 4, 2013 .oprofile_cpu_type = "ppc/e500mc", 2014 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2015 .cpu_setup = __setup_cpu_e5500, 2016 #ifndef CONFIG_PPC32 2017 .cpu_restore = __restore_cpu_e5500, 2018 #endif 2019 .machine_check = machine_check_e500mc, 2020 .platform = "ppce5500", 2021 .cpu_down_flush = cpu_down_flush_e5500, 2022 }, 2023 { /* e6500 */ 2024 .pvr_mask = 0xffff0000, 2025 .pvr_value = 0x80400000, 2026 .cpu_name = "e6500", 2027 .cpu_features = CPU_FTRS_E6500, 2028 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2029 PPC_FEATURE_HAS_ALTIVEC_COMP, 2030 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2031 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2032 MMU_FTR_USE_TLBILX, 2033 .icache_bsize = 64, 2034 .dcache_bsize = 64, 2035 .num_pmcs = 6, 2036 .oprofile_cpu_type = "ppc/e6500", 2037 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2038 .cpu_setup = __setup_cpu_e6500, 2039 #ifndef CONFIG_PPC32 2040 .cpu_restore = __restore_cpu_e6500, 2041 #endif 2042 .machine_check = machine_check_e500mc, 2043 .platform = "ppce6500", 2044 .cpu_down_flush = cpu_down_flush_e6500, 2045 }, 2046 #endif /* CONFIG_PPC_E500MC */ 2047 #ifdef CONFIG_PPC32 2048 { /* default match */ 2049 .pvr_mask = 0x00000000, 2050 .pvr_value = 0x00000000, 2051 .cpu_name = "(generic E500 PPC)", 2052 .cpu_features = CPU_FTRS_E500, 2053 .cpu_user_features = COMMON_USER_BOOKE | 2054 PPC_FEATURE_HAS_SPE_COMP | 2055 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2056 .mmu_features = MMU_FTR_TYPE_FSL_E, 2057 .icache_bsize = 32, 2058 .dcache_bsize = 32, 2059 .machine_check = machine_check_e500, 2060 .platform = "powerpc", 2061 } 2062 #endif /* CONFIG_PPC32 */ 2063 #endif /* CONFIG_E500 */ 2064 }; 2065 2066 void __init set_cur_cpu_spec(struct cpu_spec *s) 2067 { 2068 struct cpu_spec *t = &the_cpu_spec; 2069 2070 t = PTRRELOC(t); 2071 /* 2072 * use memcpy() instead of *t = *s so that GCC replaces it 2073 * by __memcpy() when KASAN is active 2074 */ 2075 memcpy(t, s, sizeof(*t)); 2076 2077 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2078 } 2079 2080 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2081 struct cpu_spec *s) 2082 { 2083 struct cpu_spec *t = &the_cpu_spec; 2084 struct cpu_spec old; 2085 2086 t = PTRRELOC(t); 2087 old = *t; 2088 2089 /* 2090 * Copy everything, then do fixups. Use memcpy() instead of *t = *s 2091 * so that GCC replaces it by __memcpy() when KASAN is active 2092 */ 2093 memcpy(t, s, sizeof(*t)); 2094 2095 /* 2096 * If we are overriding a previous value derived from the real 2097 * PVR with a new value obtained using a logical PVR value, 2098 * don't modify the performance monitor fields. 2099 */ 2100 if (old.num_pmcs && !s->num_pmcs) { 2101 t->num_pmcs = old.num_pmcs; 2102 t->pmc_type = old.pmc_type; 2103 t->oprofile_type = old.oprofile_type; 2104 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2105 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2106 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2107 2108 /* 2109 * If we have passed through this logic once before and 2110 * have pulled the default case because the real PVR was 2111 * not found inside cpu_specs[], then we are possibly 2112 * running in compatibility mode. In that case, let the 2113 * oprofiler know which set of compatibility counters to 2114 * pull from by making sure the oprofile_cpu_type string 2115 * is set to that of compatibility mode. If the 2116 * oprofile_cpu_type already has a value, then we are 2117 * possibly overriding a real PVR with a logical one, 2118 * and, in that case, keep the current value for 2119 * oprofile_cpu_type. Futhermore, let's ensure that the 2120 * fix for the PMAO bug is enabled on compatibility mode. 2121 */ 2122 if (old.oprofile_cpu_type != NULL) { 2123 t->oprofile_cpu_type = old.oprofile_cpu_type; 2124 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG; 2125 } 2126 } 2127 2128 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2129 2130 /* 2131 * Set the base platform string once; assumes 2132 * we're called with real pvr first. 2133 */ 2134 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2135 *PTRRELOC(&powerpc_base_platform) = t->platform; 2136 2137 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2138 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2139 * that processor. I will consolidate that at a later time, for now, 2140 * just use #ifdef. We also don't need to PTRRELOC the function 2141 * pointer on ppc64 and booke as we are running at 0 in real mode 2142 * on ppc64 and reloc_offset is always 0 on booke. 2143 */ 2144 if (t->cpu_setup) { 2145 t->cpu_setup(offset, t); 2146 } 2147 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2148 2149 return t; 2150 } 2151 2152 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2153 { 2154 struct cpu_spec *s = cpu_specs; 2155 int i; 2156 2157 s = PTRRELOC(s); 2158 2159 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2160 if ((pvr & s->pvr_mask) == s->pvr_value) 2161 return setup_cpu_spec(offset, s); 2162 } 2163 2164 BUG(); 2165 2166 return NULL; 2167 } 2168 2169 /* 2170 * Used by cpufeatures to get the name for CPUs with a PVR table. 2171 * If they don't hae a PVR table, cpufeatures gets the name from 2172 * cpu device-tree node. 2173 */ 2174 void __init identify_cpu_name(unsigned int pvr) 2175 { 2176 struct cpu_spec *s = cpu_specs; 2177 struct cpu_spec *t = &the_cpu_spec; 2178 int i; 2179 2180 s = PTRRELOC(s); 2181 t = PTRRELOC(t); 2182 2183 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2184 if ((pvr & s->pvr_mask) == s->pvr_value) { 2185 t->cpu_name = s->cpu_name; 2186 return; 2187 } 2188 } 2189 } 2190 2191 2192 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2193 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2194 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2195 }; 2196 EXPORT_SYMBOL_GPL(cpu_feature_keys); 2197 2198 void __init cpu_feature_keys_init(void) 2199 { 2200 int i; 2201 2202 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2203 unsigned long f = 1ul << i; 2204 2205 if (!(cur_cpu_spec->cpu_features & f)) 2206 static_branch_disable(&cpu_feature_keys[i]); 2207 } 2208 } 2209 2210 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2211 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2212 }; 2213 EXPORT_SYMBOL_GPL(mmu_feature_keys); 2214 2215 void __init mmu_feature_keys_init(void) 2216 { 2217 int i; 2218 2219 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2220 unsigned long f = 1ul << i; 2221 2222 if (!(cur_cpu_spec->mmu_features & f)) 2223 static_branch_disable(&mmu_feature_keys[i]); 2224 } 2225 } 2226 #endif 2227