1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 4 * 5 * Modifications for ppc64: 6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 7 */ 8 9 #include <linux/string.h> 10 #include <linux/sched.h> 11 #include <linux/threads.h> 12 #include <linux/init.h> 13 #include <linux/export.h> 14 #include <linux/jump_label.h> 15 16 #include <asm/oprofile_impl.h> 17 #include <asm/cputable.h> 18 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 19 #include <asm/mce.h> 20 #include <asm/mmu.h> 21 #include <asm/setup.h> 22 23 static struct cpu_spec the_cpu_spec __read_mostly; 24 25 struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 26 EXPORT_SYMBOL(cur_cpu_spec); 27 28 /* The platform string corresponding to the real PVR */ 29 const char *powerpc_base_platform; 30 31 /* NOTE: 32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 33 * the responsibility of the appropriate CPU save/restore functions to 34 * eventually copy these settings over. Those save/restore aren't yet 35 * part of the cputable though. That has to be fixed for both ppc32 36 * and ppc64 37 */ 38 #ifdef CONFIG_PPC32 39 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 51 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 52 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 53 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 60 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 61 #endif /* CONFIG_PPC32 */ 62 #ifdef CONFIG_PPC64 63 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 64 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 65 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 66 extern void __restore_cpu_pa6t(void); 67 extern void __restore_cpu_ppc970(void); 68 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 69 extern void __restore_cpu_power7(void); 70 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 71 extern void __restore_cpu_power8(void); 72 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); 73 extern void __restore_cpu_power9(void); 74 extern void __setup_cpu_power10(unsigned long offset, struct cpu_spec* spec); 75 extern void __restore_cpu_power10(void); 76 #endif /* CONFIG_PPC64 */ 77 #if defined(CONFIG_E500) 78 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 79 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 80 extern void __restore_cpu_e5500(void); 81 extern void __restore_cpu_e6500(void); 82 #endif /* CONFIG_E500 */ 83 84 /* This table only contains "desktop" CPUs, it need to be filled with embedded 85 * ones as well... 86 */ 87 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 88 PPC_FEATURE_HAS_MMU) 89 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 90 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 91 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 92 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 93 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 95 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 97 PPC_FEATURE_TRUE_LE | \ 98 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 99 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 100 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 101 PPC_FEATURE_TRUE_LE | \ 102 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 103 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 104 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 105 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 106 PPC_FEATURE_TRUE_LE | \ 107 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 108 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 109 PPC_FEATURE2_HTM_COMP | \ 110 PPC_FEATURE2_HTM_NOSC_COMP | \ 111 PPC_FEATURE2_DSCR | \ 112 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 113 PPC_FEATURE2_VEC_CRYPTO) 114 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 115 PPC_FEATURE_TRUE_LE | \ 116 PPC_FEATURE_HAS_ALTIVEC_COMP) 117 #define COMMON_USER_POWER9 COMMON_USER_POWER8 118 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 119 PPC_FEATURE2_ARCH_3_00 | \ 120 PPC_FEATURE2_HAS_IEEE128 | \ 121 PPC_FEATURE2_DARN | \ 122 PPC_FEATURE2_SCV) 123 #define COMMON_USER_POWER10 COMMON_USER_POWER9 124 #define COMMON_USER2_POWER10 (PPC_FEATURE2_ARCH_3_1 | \ 125 PPC_FEATURE2_MMA | \ 126 PPC_FEATURE2_ARCH_3_00 | \ 127 PPC_FEATURE2_HAS_IEEE128 | \ 128 PPC_FEATURE2_DARN | \ 129 PPC_FEATURE2_SCV | \ 130 PPC_FEATURE2_ARCH_2_07 | \ 131 PPC_FEATURE2_DSCR | \ 132 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 133 PPC_FEATURE2_VEC_CRYPTO) 134 135 #ifdef CONFIG_PPC_BOOK3E_64 136 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 137 #else 138 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 139 PPC_FEATURE_BOOKE) 140 #endif 141 142 static struct cpu_spec __initdata cpu_specs[] = { 143 #ifdef CONFIG_PPC_BOOK3S_64 144 { /* PPC970 */ 145 .pvr_mask = 0xffff0000, 146 .pvr_value = 0x00390000, 147 .cpu_name = "PPC970", 148 .cpu_features = CPU_FTRS_PPC970, 149 .cpu_user_features = COMMON_USER_POWER4 | 150 PPC_FEATURE_HAS_ALTIVEC_COMP, 151 .mmu_features = MMU_FTRS_PPC970, 152 .icache_bsize = 128, 153 .dcache_bsize = 128, 154 .num_pmcs = 8, 155 .pmc_type = PPC_PMC_IBM, 156 .cpu_setup = __setup_cpu_ppc970, 157 .cpu_restore = __restore_cpu_ppc970, 158 .oprofile_cpu_type = "ppc64/970", 159 .oprofile_type = PPC_OPROFILE_POWER4, 160 .platform = "ppc970", 161 }, 162 { /* PPC970FX */ 163 .pvr_mask = 0xffff0000, 164 .pvr_value = 0x003c0000, 165 .cpu_name = "PPC970FX", 166 .cpu_features = CPU_FTRS_PPC970, 167 .cpu_user_features = COMMON_USER_POWER4 | 168 PPC_FEATURE_HAS_ALTIVEC_COMP, 169 .mmu_features = MMU_FTRS_PPC970, 170 .icache_bsize = 128, 171 .dcache_bsize = 128, 172 .num_pmcs = 8, 173 .pmc_type = PPC_PMC_IBM, 174 .cpu_setup = __setup_cpu_ppc970, 175 .cpu_restore = __restore_cpu_ppc970, 176 .oprofile_cpu_type = "ppc64/970", 177 .oprofile_type = PPC_OPROFILE_POWER4, 178 .platform = "ppc970", 179 }, 180 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 181 .pvr_mask = 0xffffffff, 182 .pvr_value = 0x00440100, 183 .cpu_name = "PPC970MP", 184 .cpu_features = CPU_FTRS_PPC970, 185 .cpu_user_features = COMMON_USER_POWER4 | 186 PPC_FEATURE_HAS_ALTIVEC_COMP, 187 .mmu_features = MMU_FTRS_PPC970, 188 .icache_bsize = 128, 189 .dcache_bsize = 128, 190 .num_pmcs = 8, 191 .pmc_type = PPC_PMC_IBM, 192 .cpu_setup = __setup_cpu_ppc970, 193 .cpu_restore = __restore_cpu_ppc970, 194 .oprofile_cpu_type = "ppc64/970MP", 195 .oprofile_type = PPC_OPROFILE_POWER4, 196 .platform = "ppc970", 197 }, 198 { /* PPC970MP */ 199 .pvr_mask = 0xffff0000, 200 .pvr_value = 0x00440000, 201 .cpu_name = "PPC970MP", 202 .cpu_features = CPU_FTRS_PPC970, 203 .cpu_user_features = COMMON_USER_POWER4 | 204 PPC_FEATURE_HAS_ALTIVEC_COMP, 205 .mmu_features = MMU_FTRS_PPC970, 206 .icache_bsize = 128, 207 .dcache_bsize = 128, 208 .num_pmcs = 8, 209 .pmc_type = PPC_PMC_IBM, 210 .cpu_setup = __setup_cpu_ppc970MP, 211 .cpu_restore = __restore_cpu_ppc970, 212 .oprofile_cpu_type = "ppc64/970MP", 213 .oprofile_type = PPC_OPROFILE_POWER4, 214 .platform = "ppc970", 215 }, 216 { /* PPC970GX */ 217 .pvr_mask = 0xffff0000, 218 .pvr_value = 0x00450000, 219 .cpu_name = "PPC970GX", 220 .cpu_features = CPU_FTRS_PPC970, 221 .cpu_user_features = COMMON_USER_POWER4 | 222 PPC_FEATURE_HAS_ALTIVEC_COMP, 223 .mmu_features = MMU_FTRS_PPC970, 224 .icache_bsize = 128, 225 .dcache_bsize = 128, 226 .num_pmcs = 8, 227 .pmc_type = PPC_PMC_IBM, 228 .cpu_setup = __setup_cpu_ppc970, 229 .oprofile_cpu_type = "ppc64/970", 230 .oprofile_type = PPC_OPROFILE_POWER4, 231 .platform = "ppc970", 232 }, 233 { /* Power5 GR */ 234 .pvr_mask = 0xffff0000, 235 .pvr_value = 0x003a0000, 236 .cpu_name = "POWER5 (gr)", 237 .cpu_features = CPU_FTRS_POWER5, 238 .cpu_user_features = COMMON_USER_POWER5, 239 .mmu_features = MMU_FTRS_POWER5, 240 .icache_bsize = 128, 241 .dcache_bsize = 128, 242 .num_pmcs = 6, 243 .pmc_type = PPC_PMC_IBM, 244 .oprofile_cpu_type = "ppc64/power5", 245 .oprofile_type = PPC_OPROFILE_POWER4, 246 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 247 * and above but only works on POWER5 and above 248 */ 249 .oprofile_mmcra_sihv = MMCRA_SIHV, 250 .oprofile_mmcra_sipr = MMCRA_SIPR, 251 .platform = "power5", 252 }, 253 { /* Power5++ */ 254 .pvr_mask = 0xffffff00, 255 .pvr_value = 0x003b0300, 256 .cpu_name = "POWER5+ (gs)", 257 .cpu_features = CPU_FTRS_POWER5, 258 .cpu_user_features = COMMON_USER_POWER5_PLUS, 259 .mmu_features = MMU_FTRS_POWER5, 260 .icache_bsize = 128, 261 .dcache_bsize = 128, 262 .num_pmcs = 6, 263 .oprofile_cpu_type = "ppc64/power5++", 264 .oprofile_type = PPC_OPROFILE_POWER4, 265 .oprofile_mmcra_sihv = MMCRA_SIHV, 266 .oprofile_mmcra_sipr = MMCRA_SIPR, 267 .platform = "power5+", 268 }, 269 { /* Power5 GS */ 270 .pvr_mask = 0xffff0000, 271 .pvr_value = 0x003b0000, 272 .cpu_name = "POWER5+ (gs)", 273 .cpu_features = CPU_FTRS_POWER5, 274 .cpu_user_features = COMMON_USER_POWER5_PLUS, 275 .mmu_features = MMU_FTRS_POWER5, 276 .icache_bsize = 128, 277 .dcache_bsize = 128, 278 .num_pmcs = 6, 279 .pmc_type = PPC_PMC_IBM, 280 .oprofile_cpu_type = "ppc64/power5+", 281 .oprofile_type = PPC_OPROFILE_POWER4, 282 .oprofile_mmcra_sihv = MMCRA_SIHV, 283 .oprofile_mmcra_sipr = MMCRA_SIPR, 284 .platform = "power5+", 285 }, 286 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 287 .pvr_mask = 0xffffffff, 288 .pvr_value = 0x0f000001, 289 .cpu_name = "POWER5+", 290 .cpu_features = CPU_FTRS_POWER5, 291 .cpu_user_features = COMMON_USER_POWER5_PLUS, 292 .mmu_features = MMU_FTRS_POWER5, 293 .icache_bsize = 128, 294 .dcache_bsize = 128, 295 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 296 .oprofile_type = PPC_OPROFILE_POWER4, 297 .platform = "power5+", 298 }, 299 { /* Power6 */ 300 .pvr_mask = 0xffff0000, 301 .pvr_value = 0x003e0000, 302 .cpu_name = "POWER6 (raw)", 303 .cpu_features = CPU_FTRS_POWER6, 304 .cpu_user_features = COMMON_USER_POWER6 | 305 PPC_FEATURE_POWER6_EXT, 306 .mmu_features = MMU_FTRS_POWER6, 307 .icache_bsize = 128, 308 .dcache_bsize = 128, 309 .num_pmcs = 6, 310 .pmc_type = PPC_PMC_IBM, 311 .oprofile_cpu_type = "ppc64/power6", 312 .oprofile_type = PPC_OPROFILE_POWER4, 313 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 314 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 315 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 316 POWER6_MMCRA_OTHER, 317 .platform = "power6x", 318 }, 319 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 320 .pvr_mask = 0xffffffff, 321 .pvr_value = 0x0f000002, 322 .cpu_name = "POWER6 (architected)", 323 .cpu_features = CPU_FTRS_POWER6, 324 .cpu_user_features = COMMON_USER_POWER6, 325 .mmu_features = MMU_FTRS_POWER6, 326 .icache_bsize = 128, 327 .dcache_bsize = 128, 328 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 329 .oprofile_type = PPC_OPROFILE_POWER4, 330 .platform = "power6", 331 }, 332 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 333 .pvr_mask = 0xffffffff, 334 .pvr_value = 0x0f000003, 335 .cpu_name = "POWER7 (architected)", 336 .cpu_features = CPU_FTRS_POWER7, 337 .cpu_user_features = COMMON_USER_POWER7, 338 .cpu_user_features2 = COMMON_USER2_POWER7, 339 .mmu_features = MMU_FTRS_POWER7, 340 .icache_bsize = 128, 341 .dcache_bsize = 128, 342 .oprofile_type = PPC_OPROFILE_POWER4, 343 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 344 .cpu_setup = __setup_cpu_power7, 345 .cpu_restore = __restore_cpu_power7, 346 .machine_check_early = __machine_check_early_realmode_p7, 347 .platform = "power7", 348 }, 349 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 350 .pvr_mask = 0xffffffff, 351 .pvr_value = 0x0f000004, 352 .cpu_name = "POWER8 (architected)", 353 .cpu_features = CPU_FTRS_POWER8, 354 .cpu_user_features = COMMON_USER_POWER8, 355 .cpu_user_features2 = COMMON_USER2_POWER8, 356 .mmu_features = MMU_FTRS_POWER8, 357 .icache_bsize = 128, 358 .dcache_bsize = 128, 359 .oprofile_type = PPC_OPROFILE_INVALID, 360 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 361 .cpu_setup = __setup_cpu_power8, 362 .cpu_restore = __restore_cpu_power8, 363 .machine_check_early = __machine_check_early_realmode_p8, 364 .platform = "power8", 365 }, 366 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 367 .pvr_mask = 0xffffffff, 368 .pvr_value = 0x0f000005, 369 .cpu_name = "POWER9 (architected)", 370 .cpu_features = CPU_FTRS_POWER9, 371 .cpu_user_features = COMMON_USER_POWER9, 372 .cpu_user_features2 = COMMON_USER2_POWER9, 373 .mmu_features = MMU_FTRS_POWER9, 374 .icache_bsize = 128, 375 .dcache_bsize = 128, 376 .oprofile_type = PPC_OPROFILE_INVALID, 377 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 378 .cpu_setup = __setup_cpu_power9, 379 .cpu_restore = __restore_cpu_power9, 380 .platform = "power9", 381 }, 382 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */ 383 .pvr_mask = 0xffffffff, 384 .pvr_value = 0x0f000006, 385 .cpu_name = "POWER10 (architected)", 386 .cpu_features = CPU_FTRS_POWER10, 387 .cpu_user_features = COMMON_USER_POWER10, 388 .cpu_user_features2 = COMMON_USER2_POWER10, 389 .mmu_features = MMU_FTRS_POWER10, 390 .icache_bsize = 128, 391 .dcache_bsize = 128, 392 .oprofile_type = PPC_OPROFILE_INVALID, 393 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 394 .cpu_setup = __setup_cpu_power10, 395 .cpu_restore = __restore_cpu_power10, 396 .platform = "power10", 397 }, 398 { /* Power7 */ 399 .pvr_mask = 0xffff0000, 400 .pvr_value = 0x003f0000, 401 .cpu_name = "POWER7 (raw)", 402 .cpu_features = CPU_FTRS_POWER7, 403 .cpu_user_features = COMMON_USER_POWER7, 404 .cpu_user_features2 = COMMON_USER2_POWER7, 405 .mmu_features = MMU_FTRS_POWER7, 406 .icache_bsize = 128, 407 .dcache_bsize = 128, 408 .num_pmcs = 6, 409 .pmc_type = PPC_PMC_IBM, 410 .oprofile_cpu_type = "ppc64/power7", 411 .oprofile_type = PPC_OPROFILE_POWER4, 412 .cpu_setup = __setup_cpu_power7, 413 .cpu_restore = __restore_cpu_power7, 414 .machine_check_early = __machine_check_early_realmode_p7, 415 .platform = "power7", 416 }, 417 { /* Power7+ */ 418 .pvr_mask = 0xffff0000, 419 .pvr_value = 0x004A0000, 420 .cpu_name = "POWER7+ (raw)", 421 .cpu_features = CPU_FTRS_POWER7, 422 .cpu_user_features = COMMON_USER_POWER7, 423 .cpu_user_features2 = COMMON_USER2_POWER7, 424 .mmu_features = MMU_FTRS_POWER7, 425 .icache_bsize = 128, 426 .dcache_bsize = 128, 427 .num_pmcs = 6, 428 .pmc_type = PPC_PMC_IBM, 429 .oprofile_cpu_type = "ppc64/power7", 430 .oprofile_type = PPC_OPROFILE_POWER4, 431 .cpu_setup = __setup_cpu_power7, 432 .cpu_restore = __restore_cpu_power7, 433 .machine_check_early = __machine_check_early_realmode_p7, 434 .platform = "power7+", 435 }, 436 { /* Power8E */ 437 .pvr_mask = 0xffff0000, 438 .pvr_value = 0x004b0000, 439 .cpu_name = "POWER8E (raw)", 440 .cpu_features = CPU_FTRS_POWER8E, 441 .cpu_user_features = COMMON_USER_POWER8, 442 .cpu_user_features2 = COMMON_USER2_POWER8, 443 .mmu_features = MMU_FTRS_POWER8, 444 .icache_bsize = 128, 445 .dcache_bsize = 128, 446 .num_pmcs = 6, 447 .pmc_type = PPC_PMC_IBM, 448 .oprofile_cpu_type = "ppc64/power8", 449 .oprofile_type = PPC_OPROFILE_INVALID, 450 .cpu_setup = __setup_cpu_power8, 451 .cpu_restore = __restore_cpu_power8, 452 .machine_check_early = __machine_check_early_realmode_p8, 453 .platform = "power8", 454 }, 455 { /* Power8NVL */ 456 .pvr_mask = 0xffff0000, 457 .pvr_value = 0x004c0000, 458 .cpu_name = "POWER8NVL (raw)", 459 .cpu_features = CPU_FTRS_POWER8, 460 .cpu_user_features = COMMON_USER_POWER8, 461 .cpu_user_features2 = COMMON_USER2_POWER8, 462 .mmu_features = MMU_FTRS_POWER8, 463 .icache_bsize = 128, 464 .dcache_bsize = 128, 465 .num_pmcs = 6, 466 .pmc_type = PPC_PMC_IBM, 467 .oprofile_cpu_type = "ppc64/power8", 468 .oprofile_type = PPC_OPROFILE_INVALID, 469 .cpu_setup = __setup_cpu_power8, 470 .cpu_restore = __restore_cpu_power8, 471 .machine_check_early = __machine_check_early_realmode_p8, 472 .platform = "power8", 473 }, 474 { /* Power8 */ 475 .pvr_mask = 0xffff0000, 476 .pvr_value = 0x004d0000, 477 .cpu_name = "POWER8 (raw)", 478 .cpu_features = CPU_FTRS_POWER8, 479 .cpu_user_features = COMMON_USER_POWER8, 480 .cpu_user_features2 = COMMON_USER2_POWER8, 481 .mmu_features = MMU_FTRS_POWER8, 482 .icache_bsize = 128, 483 .dcache_bsize = 128, 484 .num_pmcs = 6, 485 .pmc_type = PPC_PMC_IBM, 486 .oprofile_cpu_type = "ppc64/power8", 487 .oprofile_type = PPC_OPROFILE_INVALID, 488 .cpu_setup = __setup_cpu_power8, 489 .cpu_restore = __restore_cpu_power8, 490 .machine_check_early = __machine_check_early_realmode_p8, 491 .platform = "power8", 492 }, 493 { /* Power9 DD2.0 */ 494 .pvr_mask = 0xffffefff, 495 .pvr_value = 0x004e0200, 496 .cpu_name = "POWER9 (raw)", 497 .cpu_features = CPU_FTRS_POWER9_DD2_0, 498 .cpu_user_features = COMMON_USER_POWER9, 499 .cpu_user_features2 = COMMON_USER2_POWER9, 500 .mmu_features = MMU_FTRS_POWER9, 501 .icache_bsize = 128, 502 .dcache_bsize = 128, 503 .num_pmcs = 6, 504 .pmc_type = PPC_PMC_IBM, 505 .oprofile_cpu_type = "ppc64/power9", 506 .oprofile_type = PPC_OPROFILE_INVALID, 507 .cpu_setup = __setup_cpu_power9, 508 .cpu_restore = __restore_cpu_power9, 509 .machine_check_early = __machine_check_early_realmode_p9, 510 .platform = "power9", 511 }, 512 { /* Power9 DD 2.1 */ 513 .pvr_mask = 0xffffefff, 514 .pvr_value = 0x004e0201, 515 .cpu_name = "POWER9 (raw)", 516 .cpu_features = CPU_FTRS_POWER9_DD2_1, 517 .cpu_user_features = COMMON_USER_POWER9, 518 .cpu_user_features2 = COMMON_USER2_POWER9, 519 .mmu_features = MMU_FTRS_POWER9, 520 .icache_bsize = 128, 521 .dcache_bsize = 128, 522 .num_pmcs = 6, 523 .pmc_type = PPC_PMC_IBM, 524 .oprofile_cpu_type = "ppc64/power9", 525 .oprofile_type = PPC_OPROFILE_INVALID, 526 .cpu_setup = __setup_cpu_power9, 527 .cpu_restore = __restore_cpu_power9, 528 .machine_check_early = __machine_check_early_realmode_p9, 529 .platform = "power9", 530 }, 531 { /* Power9 DD2.2 or later */ 532 .pvr_mask = 0xffff0000, 533 .pvr_value = 0x004e0000, 534 .cpu_name = "POWER9 (raw)", 535 .cpu_features = CPU_FTRS_POWER9_DD2_2, 536 .cpu_user_features = COMMON_USER_POWER9, 537 .cpu_user_features2 = COMMON_USER2_POWER9, 538 .mmu_features = MMU_FTRS_POWER9, 539 .icache_bsize = 128, 540 .dcache_bsize = 128, 541 .num_pmcs = 6, 542 .pmc_type = PPC_PMC_IBM, 543 .oprofile_cpu_type = "ppc64/power9", 544 .oprofile_type = PPC_OPROFILE_INVALID, 545 .cpu_setup = __setup_cpu_power9, 546 .cpu_restore = __restore_cpu_power9, 547 .machine_check_early = __machine_check_early_realmode_p9, 548 .platform = "power9", 549 }, 550 { /* Power10 */ 551 .pvr_mask = 0xffff0000, 552 .pvr_value = 0x00800000, 553 .cpu_name = "POWER10 (raw)", 554 .cpu_features = CPU_FTRS_POWER10, 555 .cpu_user_features = COMMON_USER_POWER10, 556 .cpu_user_features2 = COMMON_USER2_POWER10, 557 .mmu_features = MMU_FTRS_POWER10, 558 .icache_bsize = 128, 559 .dcache_bsize = 128, 560 .num_pmcs = 6, 561 .pmc_type = PPC_PMC_IBM, 562 .oprofile_cpu_type = "ppc64/power10", 563 .oprofile_type = PPC_OPROFILE_INVALID, 564 .cpu_setup = __setup_cpu_power10, 565 .cpu_restore = __restore_cpu_power10, 566 .machine_check_early = __machine_check_early_realmode_p10, 567 .platform = "power10", 568 }, 569 { /* Cell Broadband Engine */ 570 .pvr_mask = 0xffff0000, 571 .pvr_value = 0x00700000, 572 .cpu_name = "Cell Broadband Engine", 573 .cpu_features = CPU_FTRS_CELL, 574 .cpu_user_features = COMMON_USER_PPC64 | 575 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 576 PPC_FEATURE_SMT, 577 .mmu_features = MMU_FTRS_CELL, 578 .icache_bsize = 128, 579 .dcache_bsize = 128, 580 .num_pmcs = 4, 581 .pmc_type = PPC_PMC_IBM, 582 .oprofile_cpu_type = "ppc64/cell-be", 583 .oprofile_type = PPC_OPROFILE_CELL, 584 .platform = "ppc-cell-be", 585 }, 586 { /* PA Semi PA6T */ 587 .pvr_mask = 0x7fff0000, 588 .pvr_value = 0x00900000, 589 .cpu_name = "PA6T", 590 .cpu_features = CPU_FTRS_PA6T, 591 .cpu_user_features = COMMON_USER_PA6T, 592 .mmu_features = MMU_FTRS_PA6T, 593 .icache_bsize = 64, 594 .dcache_bsize = 64, 595 .num_pmcs = 6, 596 .pmc_type = PPC_PMC_PA6T, 597 .cpu_setup = __setup_cpu_pa6t, 598 .cpu_restore = __restore_cpu_pa6t, 599 .oprofile_cpu_type = "ppc64/pa6t", 600 .oprofile_type = PPC_OPROFILE_PA6T, 601 .platform = "pa6t", 602 }, 603 { /* default match */ 604 .pvr_mask = 0x00000000, 605 .pvr_value = 0x00000000, 606 .cpu_name = "POWER5 (compatible)", 607 .cpu_features = CPU_FTRS_COMPATIBLE, 608 .cpu_user_features = COMMON_USER_PPC64, 609 .mmu_features = MMU_FTRS_POWER, 610 .icache_bsize = 128, 611 .dcache_bsize = 128, 612 .num_pmcs = 6, 613 .pmc_type = PPC_PMC_IBM, 614 .platform = "power5", 615 } 616 #endif /* CONFIG_PPC_BOOK3S_64 */ 617 618 #ifdef CONFIG_PPC32 619 #ifdef CONFIG_PPC_BOOK3S_6xx 620 { /* 603 */ 621 .pvr_mask = 0xffff0000, 622 .pvr_value = 0x00030000, 623 .cpu_name = "603", 624 .cpu_features = CPU_FTRS_603, 625 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 626 .mmu_features = 0, 627 .icache_bsize = 32, 628 .dcache_bsize = 32, 629 .cpu_setup = __setup_cpu_603, 630 .machine_check = machine_check_generic, 631 .platform = "ppc603", 632 }, 633 { /* 603e */ 634 .pvr_mask = 0xffff0000, 635 .pvr_value = 0x00060000, 636 .cpu_name = "603e", 637 .cpu_features = CPU_FTRS_603, 638 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 639 .mmu_features = 0, 640 .icache_bsize = 32, 641 .dcache_bsize = 32, 642 .cpu_setup = __setup_cpu_603, 643 .machine_check = machine_check_generic, 644 .platform = "ppc603", 645 }, 646 { /* 603ev */ 647 .pvr_mask = 0xffff0000, 648 .pvr_value = 0x00070000, 649 .cpu_name = "603ev", 650 .cpu_features = CPU_FTRS_603, 651 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 652 .mmu_features = 0, 653 .icache_bsize = 32, 654 .dcache_bsize = 32, 655 .cpu_setup = __setup_cpu_603, 656 .machine_check = machine_check_generic, 657 .platform = "ppc603", 658 }, 659 { /* 604 */ 660 .pvr_mask = 0xffff0000, 661 .pvr_value = 0x00040000, 662 .cpu_name = "604", 663 .cpu_features = CPU_FTRS_604, 664 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 665 .mmu_features = MMU_FTR_HPTE_TABLE, 666 .icache_bsize = 32, 667 .dcache_bsize = 32, 668 .num_pmcs = 2, 669 .cpu_setup = __setup_cpu_604, 670 .machine_check = machine_check_generic, 671 .platform = "ppc604", 672 }, 673 { /* 604e */ 674 .pvr_mask = 0xfffff000, 675 .pvr_value = 0x00090000, 676 .cpu_name = "604e", 677 .cpu_features = CPU_FTRS_604, 678 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 679 .mmu_features = MMU_FTR_HPTE_TABLE, 680 .icache_bsize = 32, 681 .dcache_bsize = 32, 682 .num_pmcs = 4, 683 .cpu_setup = __setup_cpu_604, 684 .machine_check = machine_check_generic, 685 .platform = "ppc604", 686 }, 687 { /* 604r */ 688 .pvr_mask = 0xffff0000, 689 .pvr_value = 0x00090000, 690 .cpu_name = "604r", 691 .cpu_features = CPU_FTRS_604, 692 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 693 .mmu_features = MMU_FTR_HPTE_TABLE, 694 .icache_bsize = 32, 695 .dcache_bsize = 32, 696 .num_pmcs = 4, 697 .cpu_setup = __setup_cpu_604, 698 .machine_check = machine_check_generic, 699 .platform = "ppc604", 700 }, 701 { /* 604ev */ 702 .pvr_mask = 0xffff0000, 703 .pvr_value = 0x000a0000, 704 .cpu_name = "604ev", 705 .cpu_features = CPU_FTRS_604, 706 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 707 .mmu_features = MMU_FTR_HPTE_TABLE, 708 .icache_bsize = 32, 709 .dcache_bsize = 32, 710 .num_pmcs = 4, 711 .cpu_setup = __setup_cpu_604, 712 .machine_check = machine_check_generic, 713 .platform = "ppc604", 714 }, 715 { /* 740/750 (0x4202, don't support TAU ?) */ 716 .pvr_mask = 0xffffffff, 717 .pvr_value = 0x00084202, 718 .cpu_name = "740/750", 719 .cpu_features = CPU_FTRS_740_NOTAU, 720 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 721 .mmu_features = MMU_FTR_HPTE_TABLE, 722 .icache_bsize = 32, 723 .dcache_bsize = 32, 724 .num_pmcs = 4, 725 .cpu_setup = __setup_cpu_750, 726 .machine_check = machine_check_generic, 727 .platform = "ppc750", 728 }, 729 { /* 750CX (80100 and 8010x?) */ 730 .pvr_mask = 0xfffffff0, 731 .pvr_value = 0x00080100, 732 .cpu_name = "750CX", 733 .cpu_features = CPU_FTRS_750, 734 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 735 .mmu_features = MMU_FTR_HPTE_TABLE, 736 .icache_bsize = 32, 737 .dcache_bsize = 32, 738 .num_pmcs = 4, 739 .cpu_setup = __setup_cpu_750cx, 740 .machine_check = machine_check_generic, 741 .platform = "ppc750", 742 }, 743 { /* 750CX (82201 and 82202) */ 744 .pvr_mask = 0xfffffff0, 745 .pvr_value = 0x00082200, 746 .cpu_name = "750CX", 747 .cpu_features = CPU_FTRS_750, 748 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 749 .mmu_features = MMU_FTR_HPTE_TABLE, 750 .icache_bsize = 32, 751 .dcache_bsize = 32, 752 .num_pmcs = 4, 753 .pmc_type = PPC_PMC_IBM, 754 .cpu_setup = __setup_cpu_750cx, 755 .machine_check = machine_check_generic, 756 .platform = "ppc750", 757 }, 758 { /* 750CXe (82214) */ 759 .pvr_mask = 0xfffffff0, 760 .pvr_value = 0x00082210, 761 .cpu_name = "750CXe", 762 .cpu_features = CPU_FTRS_750, 763 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 764 .mmu_features = MMU_FTR_HPTE_TABLE, 765 .icache_bsize = 32, 766 .dcache_bsize = 32, 767 .num_pmcs = 4, 768 .pmc_type = PPC_PMC_IBM, 769 .cpu_setup = __setup_cpu_750cx, 770 .machine_check = machine_check_generic, 771 .platform = "ppc750", 772 }, 773 { /* 750CXe "Gekko" (83214) */ 774 .pvr_mask = 0xffffffff, 775 .pvr_value = 0x00083214, 776 .cpu_name = "750CXe", 777 .cpu_features = CPU_FTRS_750, 778 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 779 .mmu_features = MMU_FTR_HPTE_TABLE, 780 .icache_bsize = 32, 781 .dcache_bsize = 32, 782 .num_pmcs = 4, 783 .pmc_type = PPC_PMC_IBM, 784 .cpu_setup = __setup_cpu_750cx, 785 .machine_check = machine_check_generic, 786 .platform = "ppc750", 787 }, 788 { /* 750CL (and "Broadway") */ 789 .pvr_mask = 0xfffff0e0, 790 .pvr_value = 0x00087000, 791 .cpu_name = "750CL", 792 .cpu_features = CPU_FTRS_750CL, 793 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 794 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 795 .icache_bsize = 32, 796 .dcache_bsize = 32, 797 .num_pmcs = 4, 798 .pmc_type = PPC_PMC_IBM, 799 .cpu_setup = __setup_cpu_750, 800 .machine_check = machine_check_generic, 801 .platform = "ppc750", 802 .oprofile_cpu_type = "ppc/750", 803 .oprofile_type = PPC_OPROFILE_G4, 804 }, 805 { /* 745/755 */ 806 .pvr_mask = 0xfffff000, 807 .pvr_value = 0x00083000, 808 .cpu_name = "745/755", 809 .cpu_features = CPU_FTRS_750, 810 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 811 .mmu_features = MMU_FTR_HPTE_TABLE, 812 .icache_bsize = 32, 813 .dcache_bsize = 32, 814 .num_pmcs = 4, 815 .pmc_type = PPC_PMC_IBM, 816 .cpu_setup = __setup_cpu_750, 817 .machine_check = machine_check_generic, 818 .platform = "ppc750", 819 }, 820 { /* 750FX rev 1.x */ 821 .pvr_mask = 0xffffff00, 822 .pvr_value = 0x70000100, 823 .cpu_name = "750FX", 824 .cpu_features = CPU_FTRS_750FX1, 825 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 826 .mmu_features = MMU_FTR_HPTE_TABLE, 827 .icache_bsize = 32, 828 .dcache_bsize = 32, 829 .num_pmcs = 4, 830 .pmc_type = PPC_PMC_IBM, 831 .cpu_setup = __setup_cpu_750, 832 .machine_check = machine_check_generic, 833 .platform = "ppc750", 834 .oprofile_cpu_type = "ppc/750", 835 .oprofile_type = PPC_OPROFILE_G4, 836 }, 837 { /* 750FX rev 2.0 must disable HID0[DPM] */ 838 .pvr_mask = 0xffffffff, 839 .pvr_value = 0x70000200, 840 .cpu_name = "750FX", 841 .cpu_features = CPU_FTRS_750FX2, 842 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 843 .mmu_features = MMU_FTR_HPTE_TABLE, 844 .icache_bsize = 32, 845 .dcache_bsize = 32, 846 .num_pmcs = 4, 847 .pmc_type = PPC_PMC_IBM, 848 .cpu_setup = __setup_cpu_750, 849 .machine_check = machine_check_generic, 850 .platform = "ppc750", 851 .oprofile_cpu_type = "ppc/750", 852 .oprofile_type = PPC_OPROFILE_G4, 853 }, 854 { /* 750FX (All revs except 2.0) */ 855 .pvr_mask = 0xffff0000, 856 .pvr_value = 0x70000000, 857 .cpu_name = "750FX", 858 .cpu_features = CPU_FTRS_750FX, 859 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 860 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 861 .icache_bsize = 32, 862 .dcache_bsize = 32, 863 .num_pmcs = 4, 864 .pmc_type = PPC_PMC_IBM, 865 .cpu_setup = __setup_cpu_750fx, 866 .machine_check = machine_check_generic, 867 .platform = "ppc750", 868 .oprofile_cpu_type = "ppc/750", 869 .oprofile_type = PPC_OPROFILE_G4, 870 }, 871 { /* 750GX */ 872 .pvr_mask = 0xffff0000, 873 .pvr_value = 0x70020000, 874 .cpu_name = "750GX", 875 .cpu_features = CPU_FTRS_750GX, 876 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 877 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 878 .icache_bsize = 32, 879 .dcache_bsize = 32, 880 .num_pmcs = 4, 881 .pmc_type = PPC_PMC_IBM, 882 .cpu_setup = __setup_cpu_750fx, 883 .machine_check = machine_check_generic, 884 .platform = "ppc750", 885 .oprofile_cpu_type = "ppc/750", 886 .oprofile_type = PPC_OPROFILE_G4, 887 }, 888 { /* 740/750 (L2CR bit need fixup for 740) */ 889 .pvr_mask = 0xffff0000, 890 .pvr_value = 0x00080000, 891 .cpu_name = "740/750", 892 .cpu_features = CPU_FTRS_740, 893 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 894 .mmu_features = MMU_FTR_HPTE_TABLE, 895 .icache_bsize = 32, 896 .dcache_bsize = 32, 897 .num_pmcs = 4, 898 .pmc_type = PPC_PMC_IBM, 899 .cpu_setup = __setup_cpu_750, 900 .machine_check = machine_check_generic, 901 .platform = "ppc750", 902 }, 903 { /* 7400 rev 1.1 ? (no TAU) */ 904 .pvr_mask = 0xffffffff, 905 .pvr_value = 0x000c1101, 906 .cpu_name = "7400 (1.1)", 907 .cpu_features = CPU_FTRS_7400_NOTAU, 908 .cpu_user_features = COMMON_USER | 909 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 910 .mmu_features = MMU_FTR_HPTE_TABLE, 911 .icache_bsize = 32, 912 .dcache_bsize = 32, 913 .num_pmcs = 4, 914 .pmc_type = PPC_PMC_G4, 915 .cpu_setup = __setup_cpu_7400, 916 .machine_check = machine_check_generic, 917 .platform = "ppc7400", 918 }, 919 { /* 7400 */ 920 .pvr_mask = 0xffff0000, 921 .pvr_value = 0x000c0000, 922 .cpu_name = "7400", 923 .cpu_features = CPU_FTRS_7400, 924 .cpu_user_features = COMMON_USER | 925 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 926 .mmu_features = MMU_FTR_HPTE_TABLE, 927 .icache_bsize = 32, 928 .dcache_bsize = 32, 929 .num_pmcs = 4, 930 .pmc_type = PPC_PMC_G4, 931 .cpu_setup = __setup_cpu_7400, 932 .machine_check = machine_check_generic, 933 .platform = "ppc7400", 934 }, 935 { /* 7410 */ 936 .pvr_mask = 0xffff0000, 937 .pvr_value = 0x800c0000, 938 .cpu_name = "7410", 939 .cpu_features = CPU_FTRS_7400, 940 .cpu_user_features = COMMON_USER | 941 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 942 .mmu_features = MMU_FTR_HPTE_TABLE, 943 .icache_bsize = 32, 944 .dcache_bsize = 32, 945 .num_pmcs = 4, 946 .pmc_type = PPC_PMC_G4, 947 .cpu_setup = __setup_cpu_7410, 948 .machine_check = machine_check_generic, 949 .platform = "ppc7400", 950 }, 951 { /* 7450 2.0 - no doze/nap */ 952 .pvr_mask = 0xffffffff, 953 .pvr_value = 0x80000200, 954 .cpu_name = "7450", 955 .cpu_features = CPU_FTRS_7450_20, 956 .cpu_user_features = COMMON_USER | 957 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 958 .mmu_features = MMU_FTR_HPTE_TABLE, 959 .icache_bsize = 32, 960 .dcache_bsize = 32, 961 .num_pmcs = 6, 962 .pmc_type = PPC_PMC_G4, 963 .cpu_setup = __setup_cpu_745x, 964 .oprofile_cpu_type = "ppc/7450", 965 .oprofile_type = PPC_OPROFILE_G4, 966 .machine_check = machine_check_generic, 967 .platform = "ppc7450", 968 }, 969 { /* 7450 2.1 */ 970 .pvr_mask = 0xffffffff, 971 .pvr_value = 0x80000201, 972 .cpu_name = "7450", 973 .cpu_features = CPU_FTRS_7450_21, 974 .cpu_user_features = COMMON_USER | 975 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 976 .mmu_features = MMU_FTR_HPTE_TABLE, 977 .icache_bsize = 32, 978 .dcache_bsize = 32, 979 .num_pmcs = 6, 980 .pmc_type = PPC_PMC_G4, 981 .cpu_setup = __setup_cpu_745x, 982 .oprofile_cpu_type = "ppc/7450", 983 .oprofile_type = PPC_OPROFILE_G4, 984 .machine_check = machine_check_generic, 985 .platform = "ppc7450", 986 }, 987 { /* 7450 2.3 and newer */ 988 .pvr_mask = 0xffff0000, 989 .pvr_value = 0x80000000, 990 .cpu_name = "7450", 991 .cpu_features = CPU_FTRS_7450_23, 992 .cpu_user_features = COMMON_USER | 993 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 994 .mmu_features = MMU_FTR_HPTE_TABLE, 995 .icache_bsize = 32, 996 .dcache_bsize = 32, 997 .num_pmcs = 6, 998 .pmc_type = PPC_PMC_G4, 999 .cpu_setup = __setup_cpu_745x, 1000 .oprofile_cpu_type = "ppc/7450", 1001 .oprofile_type = PPC_OPROFILE_G4, 1002 .machine_check = machine_check_generic, 1003 .platform = "ppc7450", 1004 }, 1005 { /* 7455 rev 1.x */ 1006 .pvr_mask = 0xffffff00, 1007 .pvr_value = 0x80010100, 1008 .cpu_name = "7455", 1009 .cpu_features = CPU_FTRS_7455_1, 1010 .cpu_user_features = COMMON_USER | 1011 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1012 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1013 .icache_bsize = 32, 1014 .dcache_bsize = 32, 1015 .num_pmcs = 6, 1016 .pmc_type = PPC_PMC_G4, 1017 .cpu_setup = __setup_cpu_745x, 1018 .oprofile_cpu_type = "ppc/7450", 1019 .oprofile_type = PPC_OPROFILE_G4, 1020 .machine_check = machine_check_generic, 1021 .platform = "ppc7450", 1022 }, 1023 { /* 7455 rev 2.0 */ 1024 .pvr_mask = 0xffffffff, 1025 .pvr_value = 0x80010200, 1026 .cpu_name = "7455", 1027 .cpu_features = CPU_FTRS_7455_20, 1028 .cpu_user_features = COMMON_USER | 1029 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1030 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1031 .icache_bsize = 32, 1032 .dcache_bsize = 32, 1033 .num_pmcs = 6, 1034 .pmc_type = PPC_PMC_G4, 1035 .cpu_setup = __setup_cpu_745x, 1036 .oprofile_cpu_type = "ppc/7450", 1037 .oprofile_type = PPC_OPROFILE_G4, 1038 .machine_check = machine_check_generic, 1039 .platform = "ppc7450", 1040 }, 1041 { /* 7455 others */ 1042 .pvr_mask = 0xffff0000, 1043 .pvr_value = 0x80010000, 1044 .cpu_name = "7455", 1045 .cpu_features = CPU_FTRS_7455, 1046 .cpu_user_features = COMMON_USER | 1047 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1048 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1049 .icache_bsize = 32, 1050 .dcache_bsize = 32, 1051 .num_pmcs = 6, 1052 .pmc_type = PPC_PMC_G4, 1053 .cpu_setup = __setup_cpu_745x, 1054 .oprofile_cpu_type = "ppc/7450", 1055 .oprofile_type = PPC_OPROFILE_G4, 1056 .machine_check = machine_check_generic, 1057 .platform = "ppc7450", 1058 }, 1059 { /* 7447/7457 Rev 1.0 */ 1060 .pvr_mask = 0xffffffff, 1061 .pvr_value = 0x80020100, 1062 .cpu_name = "7447/7457", 1063 .cpu_features = CPU_FTRS_7447_10, 1064 .cpu_user_features = COMMON_USER | 1065 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1066 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1067 .icache_bsize = 32, 1068 .dcache_bsize = 32, 1069 .num_pmcs = 6, 1070 .pmc_type = PPC_PMC_G4, 1071 .cpu_setup = __setup_cpu_745x, 1072 .oprofile_cpu_type = "ppc/7450", 1073 .oprofile_type = PPC_OPROFILE_G4, 1074 .machine_check = machine_check_generic, 1075 .platform = "ppc7450", 1076 }, 1077 { /* 7447/7457 Rev 1.1 */ 1078 .pvr_mask = 0xffffffff, 1079 .pvr_value = 0x80020101, 1080 .cpu_name = "7447/7457", 1081 .cpu_features = CPU_FTRS_7447_10, 1082 .cpu_user_features = COMMON_USER | 1083 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1084 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1085 .icache_bsize = 32, 1086 .dcache_bsize = 32, 1087 .num_pmcs = 6, 1088 .pmc_type = PPC_PMC_G4, 1089 .cpu_setup = __setup_cpu_745x, 1090 .oprofile_cpu_type = "ppc/7450", 1091 .oprofile_type = PPC_OPROFILE_G4, 1092 .machine_check = machine_check_generic, 1093 .platform = "ppc7450", 1094 }, 1095 { /* 7447/7457 Rev 1.2 and later */ 1096 .pvr_mask = 0xffff0000, 1097 .pvr_value = 0x80020000, 1098 .cpu_name = "7447/7457", 1099 .cpu_features = CPU_FTRS_7447, 1100 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1101 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1102 .icache_bsize = 32, 1103 .dcache_bsize = 32, 1104 .num_pmcs = 6, 1105 .pmc_type = PPC_PMC_G4, 1106 .cpu_setup = __setup_cpu_745x, 1107 .oprofile_cpu_type = "ppc/7450", 1108 .oprofile_type = PPC_OPROFILE_G4, 1109 .machine_check = machine_check_generic, 1110 .platform = "ppc7450", 1111 }, 1112 { /* 7447A */ 1113 .pvr_mask = 0xffff0000, 1114 .pvr_value = 0x80030000, 1115 .cpu_name = "7447A", 1116 .cpu_features = CPU_FTRS_7447A, 1117 .cpu_user_features = COMMON_USER | 1118 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1119 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1120 .icache_bsize = 32, 1121 .dcache_bsize = 32, 1122 .num_pmcs = 6, 1123 .pmc_type = PPC_PMC_G4, 1124 .cpu_setup = __setup_cpu_745x, 1125 .oprofile_cpu_type = "ppc/7450", 1126 .oprofile_type = PPC_OPROFILE_G4, 1127 .machine_check = machine_check_generic, 1128 .platform = "ppc7450", 1129 }, 1130 { /* 7448 */ 1131 .pvr_mask = 0xffff0000, 1132 .pvr_value = 0x80040000, 1133 .cpu_name = "7448", 1134 .cpu_features = CPU_FTRS_7448, 1135 .cpu_user_features = COMMON_USER | 1136 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1137 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1138 .icache_bsize = 32, 1139 .dcache_bsize = 32, 1140 .num_pmcs = 6, 1141 .pmc_type = PPC_PMC_G4, 1142 .cpu_setup = __setup_cpu_745x, 1143 .oprofile_cpu_type = "ppc/7450", 1144 .oprofile_type = PPC_OPROFILE_G4, 1145 .machine_check = machine_check_generic, 1146 .platform = "ppc7450", 1147 }, 1148 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1149 .pvr_mask = 0x7fff0000, 1150 .pvr_value = 0x00810000, 1151 .cpu_name = "82xx", 1152 .cpu_features = CPU_FTRS_82XX, 1153 .cpu_user_features = COMMON_USER, 1154 .mmu_features = 0, 1155 .icache_bsize = 32, 1156 .dcache_bsize = 32, 1157 .cpu_setup = __setup_cpu_603, 1158 .machine_check = machine_check_generic, 1159 .platform = "ppc603", 1160 }, 1161 { /* All G2_LE (603e core, plus some) have the same pvr */ 1162 .pvr_mask = 0x7fff0000, 1163 .pvr_value = 0x00820000, 1164 .cpu_name = "G2_LE", 1165 .cpu_features = CPU_FTRS_G2_LE, 1166 .cpu_user_features = COMMON_USER, 1167 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1168 .icache_bsize = 32, 1169 .dcache_bsize = 32, 1170 .cpu_setup = __setup_cpu_603, 1171 .machine_check = machine_check_generic, 1172 .platform = "ppc603", 1173 }, 1174 #ifdef CONFIG_PPC_83xx 1175 { /* e300c1 (a 603e core, plus some) on 83xx */ 1176 .pvr_mask = 0x7fff0000, 1177 .pvr_value = 0x00830000, 1178 .cpu_name = "e300c1", 1179 .cpu_features = CPU_FTRS_E300, 1180 .cpu_user_features = COMMON_USER, 1181 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1182 .icache_bsize = 32, 1183 .dcache_bsize = 32, 1184 .cpu_setup = __setup_cpu_603, 1185 .machine_check = machine_check_83xx, 1186 .platform = "ppc603", 1187 }, 1188 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1189 .pvr_mask = 0x7fff0000, 1190 .pvr_value = 0x00840000, 1191 .cpu_name = "e300c2", 1192 .cpu_features = CPU_FTRS_E300C2, 1193 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1194 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1195 MMU_FTR_NEED_DTLB_SW_LRU, 1196 .icache_bsize = 32, 1197 .dcache_bsize = 32, 1198 .cpu_setup = __setup_cpu_603, 1199 .machine_check = machine_check_83xx, 1200 .platform = "ppc603", 1201 }, 1202 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1203 .pvr_mask = 0x7fff0000, 1204 .pvr_value = 0x00850000, 1205 .cpu_name = "e300c3", 1206 .cpu_features = CPU_FTRS_E300, 1207 .cpu_user_features = COMMON_USER, 1208 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1209 MMU_FTR_NEED_DTLB_SW_LRU, 1210 .icache_bsize = 32, 1211 .dcache_bsize = 32, 1212 .cpu_setup = __setup_cpu_603, 1213 .machine_check = machine_check_83xx, 1214 .num_pmcs = 4, 1215 .oprofile_cpu_type = "ppc/e300", 1216 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1217 .platform = "ppc603", 1218 }, 1219 { /* e300c4 (e300c1, plus one IU) */ 1220 .pvr_mask = 0x7fff0000, 1221 .pvr_value = 0x00860000, 1222 .cpu_name = "e300c4", 1223 .cpu_features = CPU_FTRS_E300, 1224 .cpu_user_features = COMMON_USER, 1225 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1226 MMU_FTR_NEED_DTLB_SW_LRU, 1227 .icache_bsize = 32, 1228 .dcache_bsize = 32, 1229 .cpu_setup = __setup_cpu_603, 1230 .machine_check = machine_check_83xx, 1231 .num_pmcs = 4, 1232 .oprofile_cpu_type = "ppc/e300", 1233 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1234 .platform = "ppc603", 1235 }, 1236 #endif 1237 { /* default match, we assume split I/D cache & TB (non-601)... */ 1238 .pvr_mask = 0x00000000, 1239 .pvr_value = 0x00000000, 1240 .cpu_name = "(generic PPC)", 1241 .cpu_features = CPU_FTRS_CLASSIC32, 1242 .cpu_user_features = COMMON_USER, 1243 .mmu_features = MMU_FTR_HPTE_TABLE, 1244 .icache_bsize = 32, 1245 .dcache_bsize = 32, 1246 .machine_check = machine_check_generic, 1247 .platform = "ppc603", 1248 }, 1249 #endif /* CONFIG_PPC_BOOK3S_6xx */ 1250 #ifdef CONFIG_PPC_8xx 1251 { /* 8xx */ 1252 .pvr_mask = 0xffff0000, 1253 .pvr_value = PVR_8xx, 1254 .cpu_name = "8xx", 1255 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1256 * if the 8xx code is there.... */ 1257 .cpu_features = CPU_FTRS_8XX, 1258 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1259 .mmu_features = MMU_FTR_TYPE_8xx, 1260 .icache_bsize = 16, 1261 .dcache_bsize = 16, 1262 .machine_check = machine_check_8xx, 1263 .platform = "ppc823", 1264 }, 1265 #endif /* CONFIG_PPC_8xx */ 1266 #ifdef CONFIG_40x 1267 { /* STB 04xxx */ 1268 .pvr_mask = 0xffff0000, 1269 .pvr_value = 0x41810000, 1270 .cpu_name = "STB04xxx", 1271 .cpu_features = CPU_FTRS_40X, 1272 .cpu_user_features = PPC_FEATURE_32 | 1273 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1274 .mmu_features = MMU_FTR_TYPE_40x, 1275 .icache_bsize = 32, 1276 .dcache_bsize = 32, 1277 .machine_check = machine_check_4xx, 1278 .platform = "ppc405", 1279 }, 1280 { /* NP405L */ 1281 .pvr_mask = 0xffff0000, 1282 .pvr_value = 0x41610000, 1283 .cpu_name = "NP405L", 1284 .cpu_features = CPU_FTRS_40X, 1285 .cpu_user_features = PPC_FEATURE_32 | 1286 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1287 .mmu_features = MMU_FTR_TYPE_40x, 1288 .icache_bsize = 32, 1289 .dcache_bsize = 32, 1290 .machine_check = machine_check_4xx, 1291 .platform = "ppc405", 1292 }, 1293 { /* NP4GS3 */ 1294 .pvr_mask = 0xffff0000, 1295 .pvr_value = 0x40B10000, 1296 .cpu_name = "NP4GS3", 1297 .cpu_features = CPU_FTRS_40X, 1298 .cpu_user_features = PPC_FEATURE_32 | 1299 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1300 .mmu_features = MMU_FTR_TYPE_40x, 1301 .icache_bsize = 32, 1302 .dcache_bsize = 32, 1303 .machine_check = machine_check_4xx, 1304 .platform = "ppc405", 1305 }, 1306 { /* NP405H */ 1307 .pvr_mask = 0xffff0000, 1308 .pvr_value = 0x41410000, 1309 .cpu_name = "NP405H", 1310 .cpu_features = CPU_FTRS_40X, 1311 .cpu_user_features = PPC_FEATURE_32 | 1312 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1313 .mmu_features = MMU_FTR_TYPE_40x, 1314 .icache_bsize = 32, 1315 .dcache_bsize = 32, 1316 .machine_check = machine_check_4xx, 1317 .platform = "ppc405", 1318 }, 1319 { /* 405GPr */ 1320 .pvr_mask = 0xffff0000, 1321 .pvr_value = 0x50910000, 1322 .cpu_name = "405GPr", 1323 .cpu_features = CPU_FTRS_40X, 1324 .cpu_user_features = PPC_FEATURE_32 | 1325 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1326 .mmu_features = MMU_FTR_TYPE_40x, 1327 .icache_bsize = 32, 1328 .dcache_bsize = 32, 1329 .machine_check = machine_check_4xx, 1330 .platform = "ppc405", 1331 }, 1332 { /* STBx25xx */ 1333 .pvr_mask = 0xffff0000, 1334 .pvr_value = 0x51510000, 1335 .cpu_name = "STBx25xx", 1336 .cpu_features = CPU_FTRS_40X, 1337 .cpu_user_features = PPC_FEATURE_32 | 1338 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1339 .mmu_features = MMU_FTR_TYPE_40x, 1340 .icache_bsize = 32, 1341 .dcache_bsize = 32, 1342 .machine_check = machine_check_4xx, 1343 .platform = "ppc405", 1344 }, 1345 { /* 405LP */ 1346 .pvr_mask = 0xffff0000, 1347 .pvr_value = 0x41F10000, 1348 .cpu_name = "405LP", 1349 .cpu_features = CPU_FTRS_40X, 1350 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1351 .mmu_features = MMU_FTR_TYPE_40x, 1352 .icache_bsize = 32, 1353 .dcache_bsize = 32, 1354 .machine_check = machine_check_4xx, 1355 .platform = "ppc405", 1356 }, 1357 { /* 405EP */ 1358 .pvr_mask = 0xffff0000, 1359 .pvr_value = 0x51210000, 1360 .cpu_name = "405EP", 1361 .cpu_features = CPU_FTRS_40X, 1362 .cpu_user_features = PPC_FEATURE_32 | 1363 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1364 .mmu_features = MMU_FTR_TYPE_40x, 1365 .icache_bsize = 32, 1366 .dcache_bsize = 32, 1367 .machine_check = machine_check_4xx, 1368 .platform = "ppc405", 1369 }, 1370 { /* 405EX Rev. A/B with Security */ 1371 .pvr_mask = 0xffff000f, 1372 .pvr_value = 0x12910007, 1373 .cpu_name = "405EX Rev. A/B", 1374 .cpu_features = CPU_FTRS_40X, 1375 .cpu_user_features = PPC_FEATURE_32 | 1376 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1377 .mmu_features = MMU_FTR_TYPE_40x, 1378 .icache_bsize = 32, 1379 .dcache_bsize = 32, 1380 .machine_check = machine_check_4xx, 1381 .platform = "ppc405", 1382 }, 1383 { /* 405EX Rev. C without Security */ 1384 .pvr_mask = 0xffff000f, 1385 .pvr_value = 0x1291000d, 1386 .cpu_name = "405EX Rev. C", 1387 .cpu_features = CPU_FTRS_40X, 1388 .cpu_user_features = PPC_FEATURE_32 | 1389 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1390 .mmu_features = MMU_FTR_TYPE_40x, 1391 .icache_bsize = 32, 1392 .dcache_bsize = 32, 1393 .machine_check = machine_check_4xx, 1394 .platform = "ppc405", 1395 }, 1396 { /* 405EX Rev. C with Security */ 1397 .pvr_mask = 0xffff000f, 1398 .pvr_value = 0x1291000f, 1399 .cpu_name = "405EX Rev. C", 1400 .cpu_features = CPU_FTRS_40X, 1401 .cpu_user_features = PPC_FEATURE_32 | 1402 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1403 .mmu_features = MMU_FTR_TYPE_40x, 1404 .icache_bsize = 32, 1405 .dcache_bsize = 32, 1406 .machine_check = machine_check_4xx, 1407 .platform = "ppc405", 1408 }, 1409 { /* 405EX Rev. D without Security */ 1410 .pvr_mask = 0xffff000f, 1411 .pvr_value = 0x12910003, 1412 .cpu_name = "405EX Rev. D", 1413 .cpu_features = CPU_FTRS_40X, 1414 .cpu_user_features = PPC_FEATURE_32 | 1415 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1416 .mmu_features = MMU_FTR_TYPE_40x, 1417 .icache_bsize = 32, 1418 .dcache_bsize = 32, 1419 .machine_check = machine_check_4xx, 1420 .platform = "ppc405", 1421 }, 1422 { /* 405EX Rev. D with Security */ 1423 .pvr_mask = 0xffff000f, 1424 .pvr_value = 0x12910005, 1425 .cpu_name = "405EX Rev. D", 1426 .cpu_features = CPU_FTRS_40X, 1427 .cpu_user_features = PPC_FEATURE_32 | 1428 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1429 .mmu_features = MMU_FTR_TYPE_40x, 1430 .icache_bsize = 32, 1431 .dcache_bsize = 32, 1432 .machine_check = machine_check_4xx, 1433 .platform = "ppc405", 1434 }, 1435 { /* 405EXr Rev. A/B without Security */ 1436 .pvr_mask = 0xffff000f, 1437 .pvr_value = 0x12910001, 1438 .cpu_name = "405EXr Rev. A/B", 1439 .cpu_features = CPU_FTRS_40X, 1440 .cpu_user_features = PPC_FEATURE_32 | 1441 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1442 .mmu_features = MMU_FTR_TYPE_40x, 1443 .icache_bsize = 32, 1444 .dcache_bsize = 32, 1445 .machine_check = machine_check_4xx, 1446 .platform = "ppc405", 1447 }, 1448 { /* 405EXr Rev. C without Security */ 1449 .pvr_mask = 0xffff000f, 1450 .pvr_value = 0x12910009, 1451 .cpu_name = "405EXr Rev. C", 1452 .cpu_features = CPU_FTRS_40X, 1453 .cpu_user_features = PPC_FEATURE_32 | 1454 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1455 .mmu_features = MMU_FTR_TYPE_40x, 1456 .icache_bsize = 32, 1457 .dcache_bsize = 32, 1458 .machine_check = machine_check_4xx, 1459 .platform = "ppc405", 1460 }, 1461 { /* 405EXr Rev. C with Security */ 1462 .pvr_mask = 0xffff000f, 1463 .pvr_value = 0x1291000b, 1464 .cpu_name = "405EXr Rev. C", 1465 .cpu_features = CPU_FTRS_40X, 1466 .cpu_user_features = PPC_FEATURE_32 | 1467 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1468 .mmu_features = MMU_FTR_TYPE_40x, 1469 .icache_bsize = 32, 1470 .dcache_bsize = 32, 1471 .machine_check = machine_check_4xx, 1472 .platform = "ppc405", 1473 }, 1474 { /* 405EXr Rev. D without Security */ 1475 .pvr_mask = 0xffff000f, 1476 .pvr_value = 0x12910000, 1477 .cpu_name = "405EXr Rev. D", 1478 .cpu_features = CPU_FTRS_40X, 1479 .cpu_user_features = PPC_FEATURE_32 | 1480 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1481 .mmu_features = MMU_FTR_TYPE_40x, 1482 .icache_bsize = 32, 1483 .dcache_bsize = 32, 1484 .machine_check = machine_check_4xx, 1485 .platform = "ppc405", 1486 }, 1487 { /* 405EXr Rev. D with Security */ 1488 .pvr_mask = 0xffff000f, 1489 .pvr_value = 0x12910002, 1490 .cpu_name = "405EXr Rev. D", 1491 .cpu_features = CPU_FTRS_40X, 1492 .cpu_user_features = PPC_FEATURE_32 | 1493 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1494 .mmu_features = MMU_FTR_TYPE_40x, 1495 .icache_bsize = 32, 1496 .dcache_bsize = 32, 1497 .machine_check = machine_check_4xx, 1498 .platform = "ppc405", 1499 }, 1500 { 1501 /* 405EZ */ 1502 .pvr_mask = 0xffff0000, 1503 .pvr_value = 0x41510000, 1504 .cpu_name = "405EZ", 1505 .cpu_features = CPU_FTRS_40X, 1506 .cpu_user_features = PPC_FEATURE_32 | 1507 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1508 .mmu_features = MMU_FTR_TYPE_40x, 1509 .icache_bsize = 32, 1510 .dcache_bsize = 32, 1511 .machine_check = machine_check_4xx, 1512 .platform = "ppc405", 1513 }, 1514 { /* APM8018X */ 1515 .pvr_mask = 0xffff0000, 1516 .pvr_value = 0x7ff11432, 1517 .cpu_name = "APM8018X", 1518 .cpu_features = CPU_FTRS_40X, 1519 .cpu_user_features = PPC_FEATURE_32 | 1520 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1521 .mmu_features = MMU_FTR_TYPE_40x, 1522 .icache_bsize = 32, 1523 .dcache_bsize = 32, 1524 .machine_check = machine_check_4xx, 1525 .platform = "ppc405", 1526 }, 1527 { /* default match */ 1528 .pvr_mask = 0x00000000, 1529 .pvr_value = 0x00000000, 1530 .cpu_name = "(generic 40x PPC)", 1531 .cpu_features = CPU_FTRS_40X, 1532 .cpu_user_features = PPC_FEATURE_32 | 1533 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1534 .mmu_features = MMU_FTR_TYPE_40x, 1535 .icache_bsize = 32, 1536 .dcache_bsize = 32, 1537 .machine_check = machine_check_4xx, 1538 .platform = "ppc405", 1539 } 1540 1541 #endif /* CONFIG_40x */ 1542 #ifdef CONFIG_44x 1543 { 1544 .pvr_mask = 0xf0000fff, 1545 .pvr_value = 0x40000850, 1546 .cpu_name = "440GR Rev. A", 1547 .cpu_features = CPU_FTRS_44X, 1548 .cpu_user_features = COMMON_USER_BOOKE, 1549 .mmu_features = MMU_FTR_TYPE_44x, 1550 .icache_bsize = 32, 1551 .dcache_bsize = 32, 1552 .machine_check = machine_check_4xx, 1553 .platform = "ppc440", 1554 }, 1555 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1556 .pvr_mask = 0xf0000fff, 1557 .pvr_value = 0x40000858, 1558 .cpu_name = "440EP Rev. A", 1559 .cpu_features = CPU_FTRS_44X, 1560 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1561 .mmu_features = MMU_FTR_TYPE_44x, 1562 .icache_bsize = 32, 1563 .dcache_bsize = 32, 1564 .cpu_setup = __setup_cpu_440ep, 1565 .machine_check = machine_check_4xx, 1566 .platform = "ppc440", 1567 }, 1568 { 1569 .pvr_mask = 0xf0000fff, 1570 .pvr_value = 0x400008d3, 1571 .cpu_name = "440GR Rev. B", 1572 .cpu_features = CPU_FTRS_44X, 1573 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1574 .mmu_features = MMU_FTR_TYPE_44x, 1575 .icache_bsize = 32, 1576 .dcache_bsize = 32, 1577 .machine_check = machine_check_4xx, 1578 .platform = "ppc440", 1579 }, 1580 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1581 .pvr_mask = 0xf0000ff7, 1582 .pvr_value = 0x400008d4, 1583 .cpu_name = "440EP Rev. C", 1584 .cpu_features = CPU_FTRS_44X, 1585 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1586 .mmu_features = MMU_FTR_TYPE_44x, 1587 .icache_bsize = 32, 1588 .dcache_bsize = 32, 1589 .cpu_setup = __setup_cpu_440ep, 1590 .machine_check = machine_check_4xx, 1591 .platform = "ppc440", 1592 }, 1593 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1594 .pvr_mask = 0xf0000fff, 1595 .pvr_value = 0x400008db, 1596 .cpu_name = "440EP Rev. B", 1597 .cpu_features = CPU_FTRS_44X, 1598 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1599 .mmu_features = MMU_FTR_TYPE_44x, 1600 .icache_bsize = 32, 1601 .dcache_bsize = 32, 1602 .cpu_setup = __setup_cpu_440ep, 1603 .machine_check = machine_check_4xx, 1604 .platform = "ppc440", 1605 }, 1606 { /* 440GRX */ 1607 .pvr_mask = 0xf0000ffb, 1608 .pvr_value = 0x200008D0, 1609 .cpu_name = "440GRX", 1610 .cpu_features = CPU_FTRS_44X, 1611 .cpu_user_features = COMMON_USER_BOOKE, 1612 .mmu_features = MMU_FTR_TYPE_44x, 1613 .icache_bsize = 32, 1614 .dcache_bsize = 32, 1615 .cpu_setup = __setup_cpu_440grx, 1616 .machine_check = machine_check_440A, 1617 .platform = "ppc440", 1618 }, 1619 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1620 .pvr_mask = 0xf0000ffb, 1621 .pvr_value = 0x200008D8, 1622 .cpu_name = "440EPX", 1623 .cpu_features = CPU_FTRS_44X, 1624 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1625 .mmu_features = MMU_FTR_TYPE_44x, 1626 .icache_bsize = 32, 1627 .dcache_bsize = 32, 1628 .cpu_setup = __setup_cpu_440epx, 1629 .machine_check = machine_check_440A, 1630 .platform = "ppc440", 1631 }, 1632 { /* 440GP Rev. B */ 1633 .pvr_mask = 0xf0000fff, 1634 .pvr_value = 0x40000440, 1635 .cpu_name = "440GP Rev. B", 1636 .cpu_features = CPU_FTRS_44X, 1637 .cpu_user_features = COMMON_USER_BOOKE, 1638 .mmu_features = MMU_FTR_TYPE_44x, 1639 .icache_bsize = 32, 1640 .dcache_bsize = 32, 1641 .machine_check = machine_check_4xx, 1642 .platform = "ppc440gp", 1643 }, 1644 { /* 440GP Rev. C */ 1645 .pvr_mask = 0xf0000fff, 1646 .pvr_value = 0x40000481, 1647 .cpu_name = "440GP Rev. C", 1648 .cpu_features = CPU_FTRS_44X, 1649 .cpu_user_features = COMMON_USER_BOOKE, 1650 .mmu_features = MMU_FTR_TYPE_44x, 1651 .icache_bsize = 32, 1652 .dcache_bsize = 32, 1653 .machine_check = machine_check_4xx, 1654 .platform = "ppc440gp", 1655 }, 1656 { /* 440GX Rev. A */ 1657 .pvr_mask = 0xf0000fff, 1658 .pvr_value = 0x50000850, 1659 .cpu_name = "440GX Rev. A", 1660 .cpu_features = CPU_FTRS_44X, 1661 .cpu_user_features = COMMON_USER_BOOKE, 1662 .mmu_features = MMU_FTR_TYPE_44x, 1663 .icache_bsize = 32, 1664 .dcache_bsize = 32, 1665 .cpu_setup = __setup_cpu_440gx, 1666 .machine_check = machine_check_440A, 1667 .platform = "ppc440", 1668 }, 1669 { /* 440GX Rev. B */ 1670 .pvr_mask = 0xf0000fff, 1671 .pvr_value = 0x50000851, 1672 .cpu_name = "440GX Rev. B", 1673 .cpu_features = CPU_FTRS_44X, 1674 .cpu_user_features = COMMON_USER_BOOKE, 1675 .mmu_features = MMU_FTR_TYPE_44x, 1676 .icache_bsize = 32, 1677 .dcache_bsize = 32, 1678 .cpu_setup = __setup_cpu_440gx, 1679 .machine_check = machine_check_440A, 1680 .platform = "ppc440", 1681 }, 1682 { /* 440GX Rev. C */ 1683 .pvr_mask = 0xf0000fff, 1684 .pvr_value = 0x50000892, 1685 .cpu_name = "440GX Rev. C", 1686 .cpu_features = CPU_FTRS_44X, 1687 .cpu_user_features = COMMON_USER_BOOKE, 1688 .mmu_features = MMU_FTR_TYPE_44x, 1689 .icache_bsize = 32, 1690 .dcache_bsize = 32, 1691 .cpu_setup = __setup_cpu_440gx, 1692 .machine_check = machine_check_440A, 1693 .platform = "ppc440", 1694 }, 1695 { /* 440GX Rev. F */ 1696 .pvr_mask = 0xf0000fff, 1697 .pvr_value = 0x50000894, 1698 .cpu_name = "440GX Rev. F", 1699 .cpu_features = CPU_FTRS_44X, 1700 .cpu_user_features = COMMON_USER_BOOKE, 1701 .mmu_features = MMU_FTR_TYPE_44x, 1702 .icache_bsize = 32, 1703 .dcache_bsize = 32, 1704 .cpu_setup = __setup_cpu_440gx, 1705 .machine_check = machine_check_440A, 1706 .platform = "ppc440", 1707 }, 1708 { /* 440SP Rev. A */ 1709 .pvr_mask = 0xfff00fff, 1710 .pvr_value = 0x53200891, 1711 .cpu_name = "440SP Rev. A", 1712 .cpu_features = CPU_FTRS_44X, 1713 .cpu_user_features = COMMON_USER_BOOKE, 1714 .mmu_features = MMU_FTR_TYPE_44x, 1715 .icache_bsize = 32, 1716 .dcache_bsize = 32, 1717 .machine_check = machine_check_4xx, 1718 .platform = "ppc440", 1719 }, 1720 { /* 440SPe Rev. A */ 1721 .pvr_mask = 0xfff00fff, 1722 .pvr_value = 0x53400890, 1723 .cpu_name = "440SPe Rev. A", 1724 .cpu_features = CPU_FTRS_44X, 1725 .cpu_user_features = COMMON_USER_BOOKE, 1726 .mmu_features = MMU_FTR_TYPE_44x, 1727 .icache_bsize = 32, 1728 .dcache_bsize = 32, 1729 .cpu_setup = __setup_cpu_440spe, 1730 .machine_check = machine_check_440A, 1731 .platform = "ppc440", 1732 }, 1733 { /* 440SPe Rev. B */ 1734 .pvr_mask = 0xfff00fff, 1735 .pvr_value = 0x53400891, 1736 .cpu_name = "440SPe Rev. B", 1737 .cpu_features = CPU_FTRS_44X, 1738 .cpu_user_features = COMMON_USER_BOOKE, 1739 .mmu_features = MMU_FTR_TYPE_44x, 1740 .icache_bsize = 32, 1741 .dcache_bsize = 32, 1742 .cpu_setup = __setup_cpu_440spe, 1743 .machine_check = machine_check_440A, 1744 .platform = "ppc440", 1745 }, 1746 { /* 460EX */ 1747 .pvr_mask = 0xffff0006, 1748 .pvr_value = 0x13020002, 1749 .cpu_name = "460EX", 1750 .cpu_features = CPU_FTRS_440x6, 1751 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1752 .mmu_features = MMU_FTR_TYPE_44x, 1753 .icache_bsize = 32, 1754 .dcache_bsize = 32, 1755 .cpu_setup = __setup_cpu_460ex, 1756 .machine_check = machine_check_440A, 1757 .platform = "ppc440", 1758 }, 1759 { /* 460EX Rev B */ 1760 .pvr_mask = 0xffff0007, 1761 .pvr_value = 0x13020004, 1762 .cpu_name = "460EX Rev. B", 1763 .cpu_features = CPU_FTRS_440x6, 1764 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1765 .mmu_features = MMU_FTR_TYPE_44x, 1766 .icache_bsize = 32, 1767 .dcache_bsize = 32, 1768 .cpu_setup = __setup_cpu_460ex, 1769 .machine_check = machine_check_440A, 1770 .platform = "ppc440", 1771 }, 1772 { /* 460GT */ 1773 .pvr_mask = 0xffff0006, 1774 .pvr_value = 0x13020000, 1775 .cpu_name = "460GT", 1776 .cpu_features = CPU_FTRS_440x6, 1777 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1778 .mmu_features = MMU_FTR_TYPE_44x, 1779 .icache_bsize = 32, 1780 .dcache_bsize = 32, 1781 .cpu_setup = __setup_cpu_460gt, 1782 .machine_check = machine_check_440A, 1783 .platform = "ppc440", 1784 }, 1785 { /* 460GT Rev B */ 1786 .pvr_mask = 0xffff0007, 1787 .pvr_value = 0x13020005, 1788 .cpu_name = "460GT Rev. B", 1789 .cpu_features = CPU_FTRS_440x6, 1790 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1791 .mmu_features = MMU_FTR_TYPE_44x, 1792 .icache_bsize = 32, 1793 .dcache_bsize = 32, 1794 .cpu_setup = __setup_cpu_460gt, 1795 .machine_check = machine_check_440A, 1796 .platform = "ppc440", 1797 }, 1798 { /* 460SX */ 1799 .pvr_mask = 0xffffff00, 1800 .pvr_value = 0x13541800, 1801 .cpu_name = "460SX", 1802 .cpu_features = CPU_FTRS_44X, 1803 .cpu_user_features = COMMON_USER_BOOKE, 1804 .mmu_features = MMU_FTR_TYPE_44x, 1805 .icache_bsize = 32, 1806 .dcache_bsize = 32, 1807 .cpu_setup = __setup_cpu_460sx, 1808 .machine_check = machine_check_440A, 1809 .platform = "ppc440", 1810 }, 1811 { /* 464 in APM821xx */ 1812 .pvr_mask = 0xfffffff0, 1813 .pvr_value = 0x12C41C80, 1814 .cpu_name = "APM821XX", 1815 .cpu_features = CPU_FTRS_44X, 1816 .cpu_user_features = COMMON_USER_BOOKE | 1817 PPC_FEATURE_HAS_FPU, 1818 .mmu_features = MMU_FTR_TYPE_44x, 1819 .icache_bsize = 32, 1820 .dcache_bsize = 32, 1821 .cpu_setup = __setup_cpu_apm821xx, 1822 .machine_check = machine_check_440A, 1823 .platform = "ppc440", 1824 }, 1825 #ifdef CONFIG_PPC_47x 1826 { /* 476 DD2 core */ 1827 .pvr_mask = 0xffffffff, 1828 .pvr_value = 0x11a52080, 1829 .cpu_name = "476", 1830 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1831 .cpu_user_features = COMMON_USER_BOOKE | 1832 PPC_FEATURE_HAS_FPU, 1833 .mmu_features = MMU_FTR_TYPE_47x | 1834 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1835 .icache_bsize = 32, 1836 .dcache_bsize = 128, 1837 .machine_check = machine_check_47x, 1838 .platform = "ppc470", 1839 }, 1840 { /* 476fpe */ 1841 .pvr_mask = 0xffff0000, 1842 .pvr_value = 0x7ff50000, 1843 .cpu_name = "476fpe", 1844 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1845 .cpu_user_features = COMMON_USER_BOOKE | 1846 PPC_FEATURE_HAS_FPU, 1847 .mmu_features = MMU_FTR_TYPE_47x | 1848 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1849 .icache_bsize = 32, 1850 .dcache_bsize = 128, 1851 .machine_check = machine_check_47x, 1852 .platform = "ppc470", 1853 }, 1854 { /* 476 iss */ 1855 .pvr_mask = 0xffff0000, 1856 .pvr_value = 0x00050000, 1857 .cpu_name = "476", 1858 .cpu_features = CPU_FTRS_47X, 1859 .cpu_user_features = COMMON_USER_BOOKE | 1860 PPC_FEATURE_HAS_FPU, 1861 .mmu_features = MMU_FTR_TYPE_47x | 1862 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1863 .icache_bsize = 32, 1864 .dcache_bsize = 128, 1865 .machine_check = machine_check_47x, 1866 .platform = "ppc470", 1867 }, 1868 { /* 476 others */ 1869 .pvr_mask = 0xffff0000, 1870 .pvr_value = 0x11a50000, 1871 .cpu_name = "476", 1872 .cpu_features = CPU_FTRS_47X, 1873 .cpu_user_features = COMMON_USER_BOOKE | 1874 PPC_FEATURE_HAS_FPU, 1875 .mmu_features = MMU_FTR_TYPE_47x | 1876 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1877 .icache_bsize = 32, 1878 .dcache_bsize = 128, 1879 .machine_check = machine_check_47x, 1880 .platform = "ppc470", 1881 }, 1882 #endif /* CONFIG_PPC_47x */ 1883 { /* default match */ 1884 .pvr_mask = 0x00000000, 1885 .pvr_value = 0x00000000, 1886 .cpu_name = "(generic 44x PPC)", 1887 .cpu_features = CPU_FTRS_44X, 1888 .cpu_user_features = COMMON_USER_BOOKE, 1889 .mmu_features = MMU_FTR_TYPE_44x, 1890 .icache_bsize = 32, 1891 .dcache_bsize = 32, 1892 .machine_check = machine_check_4xx, 1893 .platform = "ppc440", 1894 } 1895 #endif /* CONFIG_44x */ 1896 #ifdef CONFIG_E200 1897 { /* e200z5 */ 1898 .pvr_mask = 0xfff00000, 1899 .pvr_value = 0x81000000, 1900 .cpu_name = "e200z5", 1901 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1902 .cpu_features = CPU_FTRS_E200, 1903 .cpu_user_features = COMMON_USER_BOOKE | 1904 PPC_FEATURE_HAS_EFP_SINGLE | 1905 PPC_FEATURE_UNIFIED_CACHE, 1906 .mmu_features = MMU_FTR_TYPE_FSL_E, 1907 .dcache_bsize = 32, 1908 .machine_check = machine_check_e200, 1909 .platform = "ppc5554", 1910 }, 1911 { /* e200z6 */ 1912 .pvr_mask = 0xfff00000, 1913 .pvr_value = 0x81100000, 1914 .cpu_name = "e200z6", 1915 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1916 .cpu_features = CPU_FTRS_E200, 1917 .cpu_user_features = COMMON_USER_BOOKE | 1918 PPC_FEATURE_HAS_SPE_COMP | 1919 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1920 PPC_FEATURE_UNIFIED_CACHE, 1921 .mmu_features = MMU_FTR_TYPE_FSL_E, 1922 .dcache_bsize = 32, 1923 .machine_check = machine_check_e200, 1924 .platform = "ppc5554", 1925 }, 1926 { /* default match */ 1927 .pvr_mask = 0x00000000, 1928 .pvr_value = 0x00000000, 1929 .cpu_name = "(generic E200 PPC)", 1930 .cpu_features = CPU_FTRS_E200, 1931 .cpu_user_features = COMMON_USER_BOOKE | 1932 PPC_FEATURE_HAS_EFP_SINGLE | 1933 PPC_FEATURE_UNIFIED_CACHE, 1934 .mmu_features = MMU_FTR_TYPE_FSL_E, 1935 .dcache_bsize = 32, 1936 .cpu_setup = __setup_cpu_e200, 1937 .machine_check = machine_check_e200, 1938 .platform = "ppc5554", 1939 } 1940 #endif /* CONFIG_E200 */ 1941 #endif /* CONFIG_PPC32 */ 1942 #ifdef CONFIG_E500 1943 #ifdef CONFIG_PPC32 1944 #ifndef CONFIG_PPC_E500MC 1945 { /* e500 */ 1946 .pvr_mask = 0xffff0000, 1947 .pvr_value = 0x80200000, 1948 .cpu_name = "e500", 1949 .cpu_features = CPU_FTRS_E500, 1950 .cpu_user_features = COMMON_USER_BOOKE | 1951 PPC_FEATURE_HAS_SPE_COMP | 1952 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1953 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1954 .mmu_features = MMU_FTR_TYPE_FSL_E, 1955 .icache_bsize = 32, 1956 .dcache_bsize = 32, 1957 .num_pmcs = 4, 1958 .oprofile_cpu_type = "ppc/e500", 1959 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1960 .cpu_setup = __setup_cpu_e500v1, 1961 .machine_check = machine_check_e500, 1962 .platform = "ppc8540", 1963 }, 1964 { /* e500v2 */ 1965 .pvr_mask = 0xffff0000, 1966 .pvr_value = 0x80210000, 1967 .cpu_name = "e500v2", 1968 .cpu_features = CPU_FTRS_E500_2, 1969 .cpu_user_features = COMMON_USER_BOOKE | 1970 PPC_FEATURE_HAS_SPE_COMP | 1971 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1972 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1973 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1974 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1975 .icache_bsize = 32, 1976 .dcache_bsize = 32, 1977 .num_pmcs = 4, 1978 .oprofile_cpu_type = "ppc/e500", 1979 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1980 .cpu_setup = __setup_cpu_e500v2, 1981 .machine_check = machine_check_e500, 1982 .platform = "ppc8548", 1983 .cpu_down_flush = cpu_down_flush_e500v2, 1984 }, 1985 #else 1986 { /* e500mc */ 1987 .pvr_mask = 0xffff0000, 1988 .pvr_value = 0x80230000, 1989 .cpu_name = "e500mc", 1990 .cpu_features = CPU_FTRS_E500MC, 1991 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1992 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1993 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1994 MMU_FTR_USE_TLBILX, 1995 .icache_bsize = 64, 1996 .dcache_bsize = 64, 1997 .num_pmcs = 4, 1998 .oprofile_cpu_type = "ppc/e500mc", 1999 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2000 .cpu_setup = __setup_cpu_e500mc, 2001 .machine_check = machine_check_e500mc, 2002 .platform = "ppce500mc", 2003 .cpu_down_flush = cpu_down_flush_e500mc, 2004 }, 2005 #endif /* CONFIG_PPC_E500MC */ 2006 #endif /* CONFIG_PPC32 */ 2007 #ifdef CONFIG_PPC_E500MC 2008 { /* e5500 */ 2009 .pvr_mask = 0xffff0000, 2010 .pvr_value = 0x80240000, 2011 .cpu_name = "e5500", 2012 .cpu_features = CPU_FTRS_E5500, 2013 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2014 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2015 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2016 MMU_FTR_USE_TLBILX, 2017 .icache_bsize = 64, 2018 .dcache_bsize = 64, 2019 .num_pmcs = 4, 2020 .oprofile_cpu_type = "ppc/e500mc", 2021 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2022 .cpu_setup = __setup_cpu_e5500, 2023 #ifndef CONFIG_PPC32 2024 .cpu_restore = __restore_cpu_e5500, 2025 #endif 2026 .machine_check = machine_check_e500mc, 2027 .platform = "ppce5500", 2028 .cpu_down_flush = cpu_down_flush_e5500, 2029 }, 2030 { /* e6500 */ 2031 .pvr_mask = 0xffff0000, 2032 .pvr_value = 0x80400000, 2033 .cpu_name = "e6500", 2034 .cpu_features = CPU_FTRS_E6500, 2035 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2036 PPC_FEATURE_HAS_ALTIVEC_COMP, 2037 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2038 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2039 MMU_FTR_USE_TLBILX, 2040 .icache_bsize = 64, 2041 .dcache_bsize = 64, 2042 .num_pmcs = 6, 2043 .oprofile_cpu_type = "ppc/e6500", 2044 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2045 .cpu_setup = __setup_cpu_e6500, 2046 #ifndef CONFIG_PPC32 2047 .cpu_restore = __restore_cpu_e6500, 2048 #endif 2049 .machine_check = machine_check_e500mc, 2050 .platform = "ppce6500", 2051 .cpu_down_flush = cpu_down_flush_e6500, 2052 }, 2053 #endif /* CONFIG_PPC_E500MC */ 2054 #ifdef CONFIG_PPC32 2055 { /* default match */ 2056 .pvr_mask = 0x00000000, 2057 .pvr_value = 0x00000000, 2058 .cpu_name = "(generic E500 PPC)", 2059 .cpu_features = CPU_FTRS_E500, 2060 .cpu_user_features = COMMON_USER_BOOKE | 2061 PPC_FEATURE_HAS_SPE_COMP | 2062 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2063 .mmu_features = MMU_FTR_TYPE_FSL_E, 2064 .icache_bsize = 32, 2065 .dcache_bsize = 32, 2066 .machine_check = machine_check_e500, 2067 .platform = "powerpc", 2068 } 2069 #endif /* CONFIG_PPC32 */ 2070 #endif /* CONFIG_E500 */ 2071 }; 2072 2073 void __init set_cur_cpu_spec(struct cpu_spec *s) 2074 { 2075 struct cpu_spec *t = &the_cpu_spec; 2076 2077 t = PTRRELOC(t); 2078 /* 2079 * use memcpy() instead of *t = *s so that GCC replaces it 2080 * by __memcpy() when KASAN is active 2081 */ 2082 memcpy(t, s, sizeof(*t)); 2083 2084 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2085 } 2086 2087 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2088 struct cpu_spec *s) 2089 { 2090 struct cpu_spec *t = &the_cpu_spec; 2091 struct cpu_spec old; 2092 2093 t = PTRRELOC(t); 2094 old = *t; 2095 2096 /* 2097 * Copy everything, then do fixups. Use memcpy() instead of *t = *s 2098 * so that GCC replaces it by __memcpy() when KASAN is active 2099 */ 2100 memcpy(t, s, sizeof(*t)); 2101 2102 /* 2103 * If we are overriding a previous value derived from the real 2104 * PVR with a new value obtained using a logical PVR value, 2105 * don't modify the performance monitor fields. 2106 */ 2107 if (old.num_pmcs && !s->num_pmcs) { 2108 t->num_pmcs = old.num_pmcs; 2109 t->pmc_type = old.pmc_type; 2110 t->oprofile_type = old.oprofile_type; 2111 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2112 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2113 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2114 2115 /* 2116 * If we have passed through this logic once before and 2117 * have pulled the default case because the real PVR was 2118 * not found inside cpu_specs[], then we are possibly 2119 * running in compatibility mode. In that case, let the 2120 * oprofiler know which set of compatibility counters to 2121 * pull from by making sure the oprofile_cpu_type string 2122 * is set to that of compatibility mode. If the 2123 * oprofile_cpu_type already has a value, then we are 2124 * possibly overriding a real PVR with a logical one, 2125 * and, in that case, keep the current value for 2126 * oprofile_cpu_type. Futhermore, let's ensure that the 2127 * fix for the PMAO bug is enabled on compatibility mode. 2128 */ 2129 if (old.oprofile_cpu_type != NULL) { 2130 t->oprofile_cpu_type = old.oprofile_cpu_type; 2131 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG; 2132 } 2133 } 2134 2135 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2136 2137 /* 2138 * Set the base platform string once; assumes 2139 * we're called with real pvr first. 2140 */ 2141 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2142 *PTRRELOC(&powerpc_base_platform) = t->platform; 2143 2144 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2145 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2146 * that processor. I will consolidate that at a later time, for now, 2147 * just use #ifdef. We also don't need to PTRRELOC the function 2148 * pointer on ppc64 and booke as we are running at 0 in real mode 2149 * on ppc64 and reloc_offset is always 0 on booke. 2150 */ 2151 if (t->cpu_setup) { 2152 t->cpu_setup(offset, t); 2153 } 2154 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2155 2156 return t; 2157 } 2158 2159 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2160 { 2161 struct cpu_spec *s = cpu_specs; 2162 int i; 2163 2164 s = PTRRELOC(s); 2165 2166 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2167 if ((pvr & s->pvr_mask) == s->pvr_value) 2168 return setup_cpu_spec(offset, s); 2169 } 2170 2171 BUG(); 2172 2173 return NULL; 2174 } 2175 2176 /* 2177 * Used by cpufeatures to get the name for CPUs with a PVR table. 2178 * If they don't hae a PVR table, cpufeatures gets the name from 2179 * cpu device-tree node. 2180 */ 2181 void __init identify_cpu_name(unsigned int pvr) 2182 { 2183 struct cpu_spec *s = cpu_specs; 2184 struct cpu_spec *t = &the_cpu_spec; 2185 int i; 2186 2187 s = PTRRELOC(s); 2188 t = PTRRELOC(t); 2189 2190 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2191 if ((pvr & s->pvr_mask) == s->pvr_value) { 2192 t->cpu_name = s->cpu_name; 2193 return; 2194 } 2195 } 2196 } 2197 2198 2199 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2200 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2201 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2202 }; 2203 EXPORT_SYMBOL_GPL(cpu_feature_keys); 2204 2205 void __init cpu_feature_keys_init(void) 2206 { 2207 int i; 2208 2209 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2210 unsigned long f = 1ul << i; 2211 2212 if (!(cur_cpu_spec->cpu_features & f)) 2213 static_branch_disable(&cpu_feature_keys[i]); 2214 } 2215 } 2216 2217 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2218 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2219 }; 2220 EXPORT_SYMBOL_GPL(mmu_feature_keys); 2221 2222 void __init mmu_feature_keys_init(void) 2223 { 2224 int i; 2225 2226 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2227 unsigned long f = 1ul << i; 2228 2229 if (!(cur_cpu_spec->mmu_features & f)) 2230 static_branch_disable(&mmu_feature_keys[i]); 2231 } 2232 } 2233 #endif 2234