1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/export.h> 18 #include <linux/jump_label.h> 19 20 #include <asm/oprofile_impl.h> 21 #include <asm/cputable.h> 22 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 23 #include <asm/mmu.h> 24 #include <asm/setup.h> 25 26 static struct cpu_spec the_cpu_spec __read_mostly; 27 28 struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 29 EXPORT_SYMBOL(cur_cpu_spec); 30 31 /* The platform string corresponding to the real PVR */ 32 const char *powerpc_base_platform; 33 34 /* NOTE: 35 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 36 * the responsibility of the appropriate CPU save/restore functions to 37 * eventually copy these settings over. Those save/restore aren't yet 38 * part of the cputable though. That has to be fixed for both ppc32 39 * and ppc64 40 */ 41 #ifdef CONFIG_PPC32 42 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 51 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 52 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 55 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 56 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 60 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 61 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 62 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 64 #endif /* CONFIG_PPC32 */ 65 #ifdef CONFIG_PPC64 66 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 67 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 68 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 69 extern void __restore_cpu_pa6t(void); 70 extern void __restore_cpu_ppc970(void); 71 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 72 extern void __restore_cpu_power7(void); 73 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 74 extern void __restore_cpu_power8(void); 75 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); 76 extern void __restore_cpu_power9(void); 77 extern void __flush_tlb_power7(unsigned int action); 78 extern void __flush_tlb_power8(unsigned int action); 79 extern void __flush_tlb_power9(unsigned int action); 80 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 81 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 82 extern long __machine_check_early_realmode_p9(struct pt_regs *regs); 83 #endif /* CONFIG_PPC64 */ 84 #if defined(CONFIG_E500) 85 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 86 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 87 extern void __restore_cpu_e5500(void); 88 extern void __restore_cpu_e6500(void); 89 #endif /* CONFIG_E500 */ 90 91 /* This table only contains "desktop" CPUs, it need to be filled with embedded 92 * ones as well... 93 */ 94 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 95 PPC_FEATURE_HAS_MMU) 96 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 97 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 98 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 99 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 100 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 101 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 102 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 103 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 104 PPC_FEATURE_TRUE_LE | \ 105 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 106 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 107 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 108 PPC_FEATURE_TRUE_LE | \ 109 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 110 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 111 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 112 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 113 PPC_FEATURE_TRUE_LE | \ 114 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 115 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 116 PPC_FEATURE2_HTM_COMP | \ 117 PPC_FEATURE2_HTM_NOSC_COMP | \ 118 PPC_FEATURE2_DSCR | \ 119 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 120 PPC_FEATURE2_VEC_CRYPTO) 121 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 122 PPC_FEATURE_TRUE_LE | \ 123 PPC_FEATURE_HAS_ALTIVEC_COMP) 124 #define COMMON_USER_POWER9 COMMON_USER_POWER8 125 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 126 PPC_FEATURE2_ARCH_3_00 | \ 127 PPC_FEATURE2_HAS_IEEE128) 128 129 #ifdef CONFIG_PPC_BOOK3E_64 130 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 131 #else 132 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 133 PPC_FEATURE_BOOKE) 134 #endif 135 136 static struct cpu_spec __initdata cpu_specs[] = { 137 #ifdef CONFIG_PPC_BOOK3S_64 138 { /* Power4 */ 139 .pvr_mask = 0xffff0000, 140 .pvr_value = 0x00350000, 141 .cpu_name = "POWER4 (gp)", 142 .cpu_features = CPU_FTRS_POWER4, 143 .cpu_user_features = COMMON_USER_POWER4, 144 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA, 145 .icache_bsize = 128, 146 .dcache_bsize = 128, 147 .num_pmcs = 8, 148 .pmc_type = PPC_PMC_IBM, 149 .oprofile_cpu_type = "ppc64/power4", 150 .oprofile_type = PPC_OPROFILE_POWER4, 151 .platform = "power4", 152 }, 153 { /* Power4+ */ 154 .pvr_mask = 0xffff0000, 155 .pvr_value = 0x00380000, 156 .cpu_name = "POWER4+ (gq)", 157 .cpu_features = CPU_FTRS_POWER4, 158 .cpu_user_features = COMMON_USER_POWER4, 159 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA, 160 .icache_bsize = 128, 161 .dcache_bsize = 128, 162 .num_pmcs = 8, 163 .pmc_type = PPC_PMC_IBM, 164 .oprofile_cpu_type = "ppc64/power4", 165 .oprofile_type = PPC_OPROFILE_POWER4, 166 .platform = "power4", 167 }, 168 { /* PPC970 */ 169 .pvr_mask = 0xffff0000, 170 .pvr_value = 0x00390000, 171 .cpu_name = "PPC970", 172 .cpu_features = CPU_FTRS_PPC970, 173 .cpu_user_features = COMMON_USER_POWER4 | 174 PPC_FEATURE_HAS_ALTIVEC_COMP, 175 .mmu_features = MMU_FTRS_PPC970, 176 .icache_bsize = 128, 177 .dcache_bsize = 128, 178 .num_pmcs = 8, 179 .pmc_type = PPC_PMC_IBM, 180 .cpu_setup = __setup_cpu_ppc970, 181 .cpu_restore = __restore_cpu_ppc970, 182 .oprofile_cpu_type = "ppc64/970", 183 .oprofile_type = PPC_OPROFILE_POWER4, 184 .platform = "ppc970", 185 }, 186 { /* PPC970FX */ 187 .pvr_mask = 0xffff0000, 188 .pvr_value = 0x003c0000, 189 .cpu_name = "PPC970FX", 190 .cpu_features = CPU_FTRS_PPC970, 191 .cpu_user_features = COMMON_USER_POWER4 | 192 PPC_FEATURE_HAS_ALTIVEC_COMP, 193 .mmu_features = MMU_FTRS_PPC970, 194 .icache_bsize = 128, 195 .dcache_bsize = 128, 196 .num_pmcs = 8, 197 .pmc_type = PPC_PMC_IBM, 198 .cpu_setup = __setup_cpu_ppc970, 199 .cpu_restore = __restore_cpu_ppc970, 200 .oprofile_cpu_type = "ppc64/970", 201 .oprofile_type = PPC_OPROFILE_POWER4, 202 .platform = "ppc970", 203 }, 204 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 205 .pvr_mask = 0xffffffff, 206 .pvr_value = 0x00440100, 207 .cpu_name = "PPC970MP", 208 .cpu_features = CPU_FTRS_PPC970, 209 .cpu_user_features = COMMON_USER_POWER4 | 210 PPC_FEATURE_HAS_ALTIVEC_COMP, 211 .mmu_features = MMU_FTRS_PPC970, 212 .icache_bsize = 128, 213 .dcache_bsize = 128, 214 .num_pmcs = 8, 215 .pmc_type = PPC_PMC_IBM, 216 .cpu_setup = __setup_cpu_ppc970, 217 .cpu_restore = __restore_cpu_ppc970, 218 .oprofile_cpu_type = "ppc64/970MP", 219 .oprofile_type = PPC_OPROFILE_POWER4, 220 .platform = "ppc970", 221 }, 222 { /* PPC970MP */ 223 .pvr_mask = 0xffff0000, 224 .pvr_value = 0x00440000, 225 .cpu_name = "PPC970MP", 226 .cpu_features = CPU_FTRS_PPC970, 227 .cpu_user_features = COMMON_USER_POWER4 | 228 PPC_FEATURE_HAS_ALTIVEC_COMP, 229 .mmu_features = MMU_FTRS_PPC970, 230 .icache_bsize = 128, 231 .dcache_bsize = 128, 232 .num_pmcs = 8, 233 .pmc_type = PPC_PMC_IBM, 234 .cpu_setup = __setup_cpu_ppc970MP, 235 .cpu_restore = __restore_cpu_ppc970, 236 .oprofile_cpu_type = "ppc64/970MP", 237 .oprofile_type = PPC_OPROFILE_POWER4, 238 .platform = "ppc970", 239 }, 240 { /* PPC970GX */ 241 .pvr_mask = 0xffff0000, 242 .pvr_value = 0x00450000, 243 .cpu_name = "PPC970GX", 244 .cpu_features = CPU_FTRS_PPC970, 245 .cpu_user_features = COMMON_USER_POWER4 | 246 PPC_FEATURE_HAS_ALTIVEC_COMP, 247 .mmu_features = MMU_FTRS_PPC970, 248 .icache_bsize = 128, 249 .dcache_bsize = 128, 250 .num_pmcs = 8, 251 .pmc_type = PPC_PMC_IBM, 252 .cpu_setup = __setup_cpu_ppc970, 253 .oprofile_cpu_type = "ppc64/970", 254 .oprofile_type = PPC_OPROFILE_POWER4, 255 .platform = "ppc970", 256 }, 257 { /* Power5 GR */ 258 .pvr_mask = 0xffff0000, 259 .pvr_value = 0x003a0000, 260 .cpu_name = "POWER5 (gr)", 261 .cpu_features = CPU_FTRS_POWER5, 262 .cpu_user_features = COMMON_USER_POWER5, 263 .mmu_features = MMU_FTRS_POWER5, 264 .icache_bsize = 128, 265 .dcache_bsize = 128, 266 .num_pmcs = 6, 267 .pmc_type = PPC_PMC_IBM, 268 .oprofile_cpu_type = "ppc64/power5", 269 .oprofile_type = PPC_OPROFILE_POWER4, 270 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 271 * and above but only works on POWER5 and above 272 */ 273 .oprofile_mmcra_sihv = MMCRA_SIHV, 274 .oprofile_mmcra_sipr = MMCRA_SIPR, 275 .platform = "power5", 276 }, 277 { /* Power5++ */ 278 .pvr_mask = 0xffffff00, 279 .pvr_value = 0x003b0300, 280 .cpu_name = "POWER5+ (gs)", 281 .cpu_features = CPU_FTRS_POWER5, 282 .cpu_user_features = COMMON_USER_POWER5_PLUS, 283 .mmu_features = MMU_FTRS_POWER5, 284 .icache_bsize = 128, 285 .dcache_bsize = 128, 286 .num_pmcs = 6, 287 .oprofile_cpu_type = "ppc64/power5++", 288 .oprofile_type = PPC_OPROFILE_POWER4, 289 .oprofile_mmcra_sihv = MMCRA_SIHV, 290 .oprofile_mmcra_sipr = MMCRA_SIPR, 291 .platform = "power5+", 292 }, 293 { /* Power5 GS */ 294 .pvr_mask = 0xffff0000, 295 .pvr_value = 0x003b0000, 296 .cpu_name = "POWER5+ (gs)", 297 .cpu_features = CPU_FTRS_POWER5, 298 .cpu_user_features = COMMON_USER_POWER5_PLUS, 299 .mmu_features = MMU_FTRS_POWER5, 300 .icache_bsize = 128, 301 .dcache_bsize = 128, 302 .num_pmcs = 6, 303 .pmc_type = PPC_PMC_IBM, 304 .oprofile_cpu_type = "ppc64/power5+", 305 .oprofile_type = PPC_OPROFILE_POWER4, 306 .oprofile_mmcra_sihv = MMCRA_SIHV, 307 .oprofile_mmcra_sipr = MMCRA_SIPR, 308 .platform = "power5+", 309 }, 310 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 311 .pvr_mask = 0xffffffff, 312 .pvr_value = 0x0f000001, 313 .cpu_name = "POWER5+", 314 .cpu_features = CPU_FTRS_POWER5, 315 .cpu_user_features = COMMON_USER_POWER5_PLUS, 316 .mmu_features = MMU_FTRS_POWER5, 317 .icache_bsize = 128, 318 .dcache_bsize = 128, 319 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 320 .oprofile_type = PPC_OPROFILE_POWER4, 321 .platform = "power5+", 322 }, 323 { /* Power6 */ 324 .pvr_mask = 0xffff0000, 325 .pvr_value = 0x003e0000, 326 .cpu_name = "POWER6 (raw)", 327 .cpu_features = CPU_FTRS_POWER6, 328 .cpu_user_features = COMMON_USER_POWER6 | 329 PPC_FEATURE_POWER6_EXT, 330 .mmu_features = MMU_FTRS_POWER6, 331 .icache_bsize = 128, 332 .dcache_bsize = 128, 333 .num_pmcs = 6, 334 .pmc_type = PPC_PMC_IBM, 335 .oprofile_cpu_type = "ppc64/power6", 336 .oprofile_type = PPC_OPROFILE_POWER4, 337 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 338 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 339 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 340 POWER6_MMCRA_OTHER, 341 .platform = "power6x", 342 }, 343 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 344 .pvr_mask = 0xffffffff, 345 .pvr_value = 0x0f000002, 346 .cpu_name = "POWER6 (architected)", 347 .cpu_features = CPU_FTRS_POWER6, 348 .cpu_user_features = COMMON_USER_POWER6, 349 .mmu_features = MMU_FTRS_POWER6, 350 .icache_bsize = 128, 351 .dcache_bsize = 128, 352 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 353 .oprofile_type = PPC_OPROFILE_POWER4, 354 .platform = "power6", 355 }, 356 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 357 .pvr_mask = 0xffffffff, 358 .pvr_value = 0x0f000003, 359 .cpu_name = "POWER7 (architected)", 360 .cpu_features = CPU_FTRS_POWER7, 361 .cpu_user_features = COMMON_USER_POWER7, 362 .cpu_user_features2 = COMMON_USER2_POWER7, 363 .mmu_features = MMU_FTRS_POWER7, 364 .icache_bsize = 128, 365 .dcache_bsize = 128, 366 .oprofile_type = PPC_OPROFILE_POWER4, 367 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 368 .cpu_setup = __setup_cpu_power7, 369 .cpu_restore = __restore_cpu_power7, 370 .flush_tlb = __flush_tlb_power7, 371 .machine_check_early = __machine_check_early_realmode_p7, 372 .platform = "power7", 373 }, 374 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 375 .pvr_mask = 0xffffffff, 376 .pvr_value = 0x0f000004, 377 .cpu_name = "POWER8 (architected)", 378 .cpu_features = CPU_FTRS_POWER8, 379 .cpu_user_features = COMMON_USER_POWER8, 380 .cpu_user_features2 = COMMON_USER2_POWER8, 381 .mmu_features = MMU_FTRS_POWER8, 382 .icache_bsize = 128, 383 .dcache_bsize = 128, 384 .oprofile_type = PPC_OPROFILE_INVALID, 385 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 386 .cpu_setup = __setup_cpu_power8, 387 .cpu_restore = __restore_cpu_power8, 388 .flush_tlb = __flush_tlb_power8, 389 .machine_check_early = __machine_check_early_realmode_p8, 390 .platform = "power8", 391 }, 392 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 393 .pvr_mask = 0xffffffff, 394 .pvr_value = 0x0f000005, 395 .cpu_name = "POWER9 (architected)", 396 .cpu_features = CPU_FTRS_POWER9, 397 .cpu_user_features = COMMON_USER_POWER9, 398 .cpu_user_features2 = COMMON_USER2_POWER9, 399 .mmu_features = MMU_FTRS_POWER9, 400 .icache_bsize = 128, 401 .dcache_bsize = 128, 402 .oprofile_type = PPC_OPROFILE_INVALID, 403 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 404 .cpu_setup = __setup_cpu_power9, 405 .cpu_restore = __restore_cpu_power9, 406 .flush_tlb = __flush_tlb_power9, 407 .platform = "power9", 408 }, 409 { /* Power7 */ 410 .pvr_mask = 0xffff0000, 411 .pvr_value = 0x003f0000, 412 .cpu_name = "POWER7 (raw)", 413 .cpu_features = CPU_FTRS_POWER7, 414 .cpu_user_features = COMMON_USER_POWER7, 415 .cpu_user_features2 = COMMON_USER2_POWER7, 416 .mmu_features = MMU_FTRS_POWER7, 417 .icache_bsize = 128, 418 .dcache_bsize = 128, 419 .num_pmcs = 6, 420 .pmc_type = PPC_PMC_IBM, 421 .oprofile_cpu_type = "ppc64/power7", 422 .oprofile_type = PPC_OPROFILE_POWER4, 423 .cpu_setup = __setup_cpu_power7, 424 .cpu_restore = __restore_cpu_power7, 425 .flush_tlb = __flush_tlb_power7, 426 .machine_check_early = __machine_check_early_realmode_p7, 427 .platform = "power7", 428 }, 429 { /* Power7+ */ 430 .pvr_mask = 0xffff0000, 431 .pvr_value = 0x004A0000, 432 .cpu_name = "POWER7+ (raw)", 433 .cpu_features = CPU_FTRS_POWER7, 434 .cpu_user_features = COMMON_USER_POWER7, 435 .cpu_user_features2 = COMMON_USER2_POWER7, 436 .mmu_features = MMU_FTRS_POWER7, 437 .icache_bsize = 128, 438 .dcache_bsize = 128, 439 .num_pmcs = 6, 440 .pmc_type = PPC_PMC_IBM, 441 .oprofile_cpu_type = "ppc64/power7", 442 .oprofile_type = PPC_OPROFILE_POWER4, 443 .cpu_setup = __setup_cpu_power7, 444 .cpu_restore = __restore_cpu_power7, 445 .flush_tlb = __flush_tlb_power7, 446 .machine_check_early = __machine_check_early_realmode_p7, 447 .platform = "power7+", 448 }, 449 { /* Power8E */ 450 .pvr_mask = 0xffff0000, 451 .pvr_value = 0x004b0000, 452 .cpu_name = "POWER8E (raw)", 453 .cpu_features = CPU_FTRS_POWER8E, 454 .cpu_user_features = COMMON_USER_POWER8, 455 .cpu_user_features2 = COMMON_USER2_POWER8, 456 .mmu_features = MMU_FTRS_POWER8, 457 .icache_bsize = 128, 458 .dcache_bsize = 128, 459 .num_pmcs = 6, 460 .pmc_type = PPC_PMC_IBM, 461 .oprofile_cpu_type = "ppc64/power8", 462 .oprofile_type = PPC_OPROFILE_INVALID, 463 .cpu_setup = __setup_cpu_power8, 464 .cpu_restore = __restore_cpu_power8, 465 .flush_tlb = __flush_tlb_power8, 466 .machine_check_early = __machine_check_early_realmode_p8, 467 .platform = "power8", 468 }, 469 { /* Power8NVL */ 470 .pvr_mask = 0xffff0000, 471 .pvr_value = 0x004c0000, 472 .cpu_name = "POWER8NVL (raw)", 473 .cpu_features = CPU_FTRS_POWER8, 474 .cpu_user_features = COMMON_USER_POWER8, 475 .cpu_user_features2 = COMMON_USER2_POWER8, 476 .mmu_features = MMU_FTRS_POWER8, 477 .icache_bsize = 128, 478 .dcache_bsize = 128, 479 .num_pmcs = 6, 480 .pmc_type = PPC_PMC_IBM, 481 .oprofile_cpu_type = "ppc64/power8", 482 .oprofile_type = PPC_OPROFILE_INVALID, 483 .cpu_setup = __setup_cpu_power8, 484 .cpu_restore = __restore_cpu_power8, 485 .flush_tlb = __flush_tlb_power8, 486 .machine_check_early = __machine_check_early_realmode_p8, 487 .platform = "power8", 488 }, 489 { /* Power8 DD1: Does not support doorbell IPIs */ 490 .pvr_mask = 0xffffff00, 491 .pvr_value = 0x004d0100, 492 .cpu_name = "POWER8 (raw)", 493 .cpu_features = CPU_FTRS_POWER8_DD1, 494 .cpu_user_features = COMMON_USER_POWER8, 495 .cpu_user_features2 = COMMON_USER2_POWER8, 496 .mmu_features = MMU_FTRS_POWER8, 497 .icache_bsize = 128, 498 .dcache_bsize = 128, 499 .num_pmcs = 6, 500 .pmc_type = PPC_PMC_IBM, 501 .oprofile_cpu_type = "ppc64/power8", 502 .oprofile_type = PPC_OPROFILE_INVALID, 503 .cpu_setup = __setup_cpu_power8, 504 .cpu_restore = __restore_cpu_power8, 505 .flush_tlb = __flush_tlb_power8, 506 .machine_check_early = __machine_check_early_realmode_p8, 507 .platform = "power8", 508 }, 509 { /* Power8 */ 510 .pvr_mask = 0xffff0000, 511 .pvr_value = 0x004d0000, 512 .cpu_name = "POWER8 (raw)", 513 .cpu_features = CPU_FTRS_POWER8, 514 .cpu_user_features = COMMON_USER_POWER8, 515 .cpu_user_features2 = COMMON_USER2_POWER8, 516 .mmu_features = MMU_FTRS_POWER8, 517 .icache_bsize = 128, 518 .dcache_bsize = 128, 519 .num_pmcs = 6, 520 .pmc_type = PPC_PMC_IBM, 521 .oprofile_cpu_type = "ppc64/power8", 522 .oprofile_type = PPC_OPROFILE_INVALID, 523 .cpu_setup = __setup_cpu_power8, 524 .cpu_restore = __restore_cpu_power8, 525 .flush_tlb = __flush_tlb_power8, 526 .machine_check_early = __machine_check_early_realmode_p8, 527 .platform = "power8", 528 }, 529 { /* Power9 DD1*/ 530 .pvr_mask = 0xffffff00, 531 .pvr_value = 0x004e0100, 532 .cpu_name = "POWER9 (raw)", 533 .cpu_features = CPU_FTRS_POWER9_DD1, 534 .cpu_user_features = COMMON_USER_POWER9, 535 .cpu_user_features2 = COMMON_USER2_POWER9, 536 .mmu_features = MMU_FTRS_POWER9, 537 .icache_bsize = 128, 538 .dcache_bsize = 128, 539 .num_pmcs = 6, 540 .pmc_type = PPC_PMC_IBM, 541 .oprofile_cpu_type = "ppc64/power9", 542 .oprofile_type = PPC_OPROFILE_INVALID, 543 .cpu_setup = __setup_cpu_power9, 544 .cpu_restore = __restore_cpu_power9, 545 .flush_tlb = __flush_tlb_power9, 546 .machine_check_early = __machine_check_early_realmode_p9, 547 .platform = "power9", 548 }, 549 { /* Power9 */ 550 .pvr_mask = 0xffff0000, 551 .pvr_value = 0x004e0000, 552 .cpu_name = "POWER9 (raw)", 553 .cpu_features = CPU_FTRS_POWER9, 554 .cpu_user_features = COMMON_USER_POWER9, 555 .cpu_user_features2 = COMMON_USER2_POWER9, 556 .mmu_features = MMU_FTRS_POWER9, 557 .icache_bsize = 128, 558 .dcache_bsize = 128, 559 .num_pmcs = 6, 560 .pmc_type = PPC_PMC_IBM, 561 .oprofile_cpu_type = "ppc64/power9", 562 .oprofile_type = PPC_OPROFILE_INVALID, 563 .cpu_setup = __setup_cpu_power9, 564 .cpu_restore = __restore_cpu_power9, 565 .flush_tlb = __flush_tlb_power9, 566 .machine_check_early = __machine_check_early_realmode_p9, 567 .platform = "power9", 568 }, 569 { /* Cell Broadband Engine */ 570 .pvr_mask = 0xffff0000, 571 .pvr_value = 0x00700000, 572 .cpu_name = "Cell Broadband Engine", 573 .cpu_features = CPU_FTRS_CELL, 574 .cpu_user_features = COMMON_USER_PPC64 | 575 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 576 PPC_FEATURE_SMT, 577 .mmu_features = MMU_FTRS_CELL, 578 .icache_bsize = 128, 579 .dcache_bsize = 128, 580 .num_pmcs = 4, 581 .pmc_type = PPC_PMC_IBM, 582 .oprofile_cpu_type = "ppc64/cell-be", 583 .oprofile_type = PPC_OPROFILE_CELL, 584 .platform = "ppc-cell-be", 585 }, 586 { /* PA Semi PA6T */ 587 .pvr_mask = 0x7fff0000, 588 .pvr_value = 0x00900000, 589 .cpu_name = "PA6T", 590 .cpu_features = CPU_FTRS_PA6T, 591 .cpu_user_features = COMMON_USER_PA6T, 592 .mmu_features = MMU_FTRS_PA6T, 593 .icache_bsize = 64, 594 .dcache_bsize = 64, 595 .num_pmcs = 6, 596 .pmc_type = PPC_PMC_PA6T, 597 .cpu_setup = __setup_cpu_pa6t, 598 .cpu_restore = __restore_cpu_pa6t, 599 .oprofile_cpu_type = "ppc64/pa6t", 600 .oprofile_type = PPC_OPROFILE_PA6T, 601 .platform = "pa6t", 602 }, 603 { /* default match */ 604 .pvr_mask = 0x00000000, 605 .pvr_value = 0x00000000, 606 .cpu_name = "POWER4 (compatible)", 607 .cpu_features = CPU_FTRS_COMPATIBLE, 608 .cpu_user_features = COMMON_USER_PPC64, 609 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2, 610 .icache_bsize = 128, 611 .dcache_bsize = 128, 612 .num_pmcs = 6, 613 .pmc_type = PPC_PMC_IBM, 614 .platform = "power4", 615 } 616 #endif /* CONFIG_PPC_BOOK3S_64 */ 617 618 #ifdef CONFIG_PPC32 619 #ifdef CONFIG_PPC_BOOK3S_32 620 { /* 601 */ 621 .pvr_mask = 0xffff0000, 622 .pvr_value = 0x00010000, 623 .cpu_name = "601", 624 .cpu_features = CPU_FTRS_PPC601, 625 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 626 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 627 .mmu_features = MMU_FTR_HPTE_TABLE, 628 .icache_bsize = 32, 629 .dcache_bsize = 32, 630 .machine_check = machine_check_generic, 631 .platform = "ppc601", 632 }, 633 { /* 603 */ 634 .pvr_mask = 0xffff0000, 635 .pvr_value = 0x00030000, 636 .cpu_name = "603", 637 .cpu_features = CPU_FTRS_603, 638 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 639 .mmu_features = 0, 640 .icache_bsize = 32, 641 .dcache_bsize = 32, 642 .cpu_setup = __setup_cpu_603, 643 .machine_check = machine_check_generic, 644 .platform = "ppc603", 645 }, 646 { /* 603e */ 647 .pvr_mask = 0xffff0000, 648 .pvr_value = 0x00060000, 649 .cpu_name = "603e", 650 .cpu_features = CPU_FTRS_603, 651 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 652 .mmu_features = 0, 653 .icache_bsize = 32, 654 .dcache_bsize = 32, 655 .cpu_setup = __setup_cpu_603, 656 .machine_check = machine_check_generic, 657 .platform = "ppc603", 658 }, 659 { /* 603ev */ 660 .pvr_mask = 0xffff0000, 661 .pvr_value = 0x00070000, 662 .cpu_name = "603ev", 663 .cpu_features = CPU_FTRS_603, 664 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 665 .mmu_features = 0, 666 .icache_bsize = 32, 667 .dcache_bsize = 32, 668 .cpu_setup = __setup_cpu_603, 669 .machine_check = machine_check_generic, 670 .platform = "ppc603", 671 }, 672 { /* 604 */ 673 .pvr_mask = 0xffff0000, 674 .pvr_value = 0x00040000, 675 .cpu_name = "604", 676 .cpu_features = CPU_FTRS_604, 677 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 678 .mmu_features = MMU_FTR_HPTE_TABLE, 679 .icache_bsize = 32, 680 .dcache_bsize = 32, 681 .num_pmcs = 2, 682 .cpu_setup = __setup_cpu_604, 683 .machine_check = machine_check_generic, 684 .platform = "ppc604", 685 }, 686 { /* 604e */ 687 .pvr_mask = 0xfffff000, 688 .pvr_value = 0x00090000, 689 .cpu_name = "604e", 690 .cpu_features = CPU_FTRS_604, 691 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 692 .mmu_features = MMU_FTR_HPTE_TABLE, 693 .icache_bsize = 32, 694 .dcache_bsize = 32, 695 .num_pmcs = 4, 696 .cpu_setup = __setup_cpu_604, 697 .machine_check = machine_check_generic, 698 .platform = "ppc604", 699 }, 700 { /* 604r */ 701 .pvr_mask = 0xffff0000, 702 .pvr_value = 0x00090000, 703 .cpu_name = "604r", 704 .cpu_features = CPU_FTRS_604, 705 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 706 .mmu_features = MMU_FTR_HPTE_TABLE, 707 .icache_bsize = 32, 708 .dcache_bsize = 32, 709 .num_pmcs = 4, 710 .cpu_setup = __setup_cpu_604, 711 .machine_check = machine_check_generic, 712 .platform = "ppc604", 713 }, 714 { /* 604ev */ 715 .pvr_mask = 0xffff0000, 716 .pvr_value = 0x000a0000, 717 .cpu_name = "604ev", 718 .cpu_features = CPU_FTRS_604, 719 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 720 .mmu_features = MMU_FTR_HPTE_TABLE, 721 .icache_bsize = 32, 722 .dcache_bsize = 32, 723 .num_pmcs = 4, 724 .cpu_setup = __setup_cpu_604, 725 .machine_check = machine_check_generic, 726 .platform = "ppc604", 727 }, 728 { /* 740/750 (0x4202, don't support TAU ?) */ 729 .pvr_mask = 0xffffffff, 730 .pvr_value = 0x00084202, 731 .cpu_name = "740/750", 732 .cpu_features = CPU_FTRS_740_NOTAU, 733 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 734 .mmu_features = MMU_FTR_HPTE_TABLE, 735 .icache_bsize = 32, 736 .dcache_bsize = 32, 737 .num_pmcs = 4, 738 .cpu_setup = __setup_cpu_750, 739 .machine_check = machine_check_generic, 740 .platform = "ppc750", 741 }, 742 { /* 750CX (80100 and 8010x?) */ 743 .pvr_mask = 0xfffffff0, 744 .pvr_value = 0x00080100, 745 .cpu_name = "750CX", 746 .cpu_features = CPU_FTRS_750, 747 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 748 .mmu_features = MMU_FTR_HPTE_TABLE, 749 .icache_bsize = 32, 750 .dcache_bsize = 32, 751 .num_pmcs = 4, 752 .cpu_setup = __setup_cpu_750cx, 753 .machine_check = machine_check_generic, 754 .platform = "ppc750", 755 }, 756 { /* 750CX (82201 and 82202) */ 757 .pvr_mask = 0xfffffff0, 758 .pvr_value = 0x00082200, 759 .cpu_name = "750CX", 760 .cpu_features = CPU_FTRS_750, 761 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 762 .mmu_features = MMU_FTR_HPTE_TABLE, 763 .icache_bsize = 32, 764 .dcache_bsize = 32, 765 .num_pmcs = 4, 766 .pmc_type = PPC_PMC_IBM, 767 .cpu_setup = __setup_cpu_750cx, 768 .machine_check = machine_check_generic, 769 .platform = "ppc750", 770 }, 771 { /* 750CXe (82214) */ 772 .pvr_mask = 0xfffffff0, 773 .pvr_value = 0x00082210, 774 .cpu_name = "750CXe", 775 .cpu_features = CPU_FTRS_750, 776 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 777 .mmu_features = MMU_FTR_HPTE_TABLE, 778 .icache_bsize = 32, 779 .dcache_bsize = 32, 780 .num_pmcs = 4, 781 .pmc_type = PPC_PMC_IBM, 782 .cpu_setup = __setup_cpu_750cx, 783 .machine_check = machine_check_generic, 784 .platform = "ppc750", 785 }, 786 { /* 750CXe "Gekko" (83214) */ 787 .pvr_mask = 0xffffffff, 788 .pvr_value = 0x00083214, 789 .cpu_name = "750CXe", 790 .cpu_features = CPU_FTRS_750, 791 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 792 .mmu_features = MMU_FTR_HPTE_TABLE, 793 .icache_bsize = 32, 794 .dcache_bsize = 32, 795 .num_pmcs = 4, 796 .pmc_type = PPC_PMC_IBM, 797 .cpu_setup = __setup_cpu_750cx, 798 .machine_check = machine_check_generic, 799 .platform = "ppc750", 800 }, 801 { /* 750CL (and "Broadway") */ 802 .pvr_mask = 0xfffff0e0, 803 .pvr_value = 0x00087000, 804 .cpu_name = "750CL", 805 .cpu_features = CPU_FTRS_750CL, 806 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 807 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 808 .icache_bsize = 32, 809 .dcache_bsize = 32, 810 .num_pmcs = 4, 811 .pmc_type = PPC_PMC_IBM, 812 .cpu_setup = __setup_cpu_750, 813 .machine_check = machine_check_generic, 814 .platform = "ppc750", 815 .oprofile_cpu_type = "ppc/750", 816 .oprofile_type = PPC_OPROFILE_G4, 817 }, 818 { /* 745/755 */ 819 .pvr_mask = 0xfffff000, 820 .pvr_value = 0x00083000, 821 .cpu_name = "745/755", 822 .cpu_features = CPU_FTRS_750, 823 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 824 .mmu_features = MMU_FTR_HPTE_TABLE, 825 .icache_bsize = 32, 826 .dcache_bsize = 32, 827 .num_pmcs = 4, 828 .pmc_type = PPC_PMC_IBM, 829 .cpu_setup = __setup_cpu_750, 830 .machine_check = machine_check_generic, 831 .platform = "ppc750", 832 }, 833 { /* 750FX rev 1.x */ 834 .pvr_mask = 0xffffff00, 835 .pvr_value = 0x70000100, 836 .cpu_name = "750FX", 837 .cpu_features = CPU_FTRS_750FX1, 838 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 839 .mmu_features = MMU_FTR_HPTE_TABLE, 840 .icache_bsize = 32, 841 .dcache_bsize = 32, 842 .num_pmcs = 4, 843 .pmc_type = PPC_PMC_IBM, 844 .cpu_setup = __setup_cpu_750, 845 .machine_check = machine_check_generic, 846 .platform = "ppc750", 847 .oprofile_cpu_type = "ppc/750", 848 .oprofile_type = PPC_OPROFILE_G4, 849 }, 850 { /* 750FX rev 2.0 must disable HID0[DPM] */ 851 .pvr_mask = 0xffffffff, 852 .pvr_value = 0x70000200, 853 .cpu_name = "750FX", 854 .cpu_features = CPU_FTRS_750FX2, 855 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 856 .mmu_features = MMU_FTR_HPTE_TABLE, 857 .icache_bsize = 32, 858 .dcache_bsize = 32, 859 .num_pmcs = 4, 860 .pmc_type = PPC_PMC_IBM, 861 .cpu_setup = __setup_cpu_750, 862 .machine_check = machine_check_generic, 863 .platform = "ppc750", 864 .oprofile_cpu_type = "ppc/750", 865 .oprofile_type = PPC_OPROFILE_G4, 866 }, 867 { /* 750FX (All revs except 2.0) */ 868 .pvr_mask = 0xffff0000, 869 .pvr_value = 0x70000000, 870 .cpu_name = "750FX", 871 .cpu_features = CPU_FTRS_750FX, 872 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 873 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 874 .icache_bsize = 32, 875 .dcache_bsize = 32, 876 .num_pmcs = 4, 877 .pmc_type = PPC_PMC_IBM, 878 .cpu_setup = __setup_cpu_750fx, 879 .machine_check = machine_check_generic, 880 .platform = "ppc750", 881 .oprofile_cpu_type = "ppc/750", 882 .oprofile_type = PPC_OPROFILE_G4, 883 }, 884 { /* 750GX */ 885 .pvr_mask = 0xffff0000, 886 .pvr_value = 0x70020000, 887 .cpu_name = "750GX", 888 .cpu_features = CPU_FTRS_750GX, 889 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 890 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 891 .icache_bsize = 32, 892 .dcache_bsize = 32, 893 .num_pmcs = 4, 894 .pmc_type = PPC_PMC_IBM, 895 .cpu_setup = __setup_cpu_750fx, 896 .machine_check = machine_check_generic, 897 .platform = "ppc750", 898 .oprofile_cpu_type = "ppc/750", 899 .oprofile_type = PPC_OPROFILE_G4, 900 }, 901 { /* 740/750 (L2CR bit need fixup for 740) */ 902 .pvr_mask = 0xffff0000, 903 .pvr_value = 0x00080000, 904 .cpu_name = "740/750", 905 .cpu_features = CPU_FTRS_740, 906 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 907 .mmu_features = MMU_FTR_HPTE_TABLE, 908 .icache_bsize = 32, 909 .dcache_bsize = 32, 910 .num_pmcs = 4, 911 .pmc_type = PPC_PMC_IBM, 912 .cpu_setup = __setup_cpu_750, 913 .machine_check = machine_check_generic, 914 .platform = "ppc750", 915 }, 916 { /* 7400 rev 1.1 ? (no TAU) */ 917 .pvr_mask = 0xffffffff, 918 .pvr_value = 0x000c1101, 919 .cpu_name = "7400 (1.1)", 920 .cpu_features = CPU_FTRS_7400_NOTAU, 921 .cpu_user_features = COMMON_USER | 922 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 923 .mmu_features = MMU_FTR_HPTE_TABLE, 924 .icache_bsize = 32, 925 .dcache_bsize = 32, 926 .num_pmcs = 4, 927 .pmc_type = PPC_PMC_G4, 928 .cpu_setup = __setup_cpu_7400, 929 .machine_check = machine_check_generic, 930 .platform = "ppc7400", 931 }, 932 { /* 7400 */ 933 .pvr_mask = 0xffff0000, 934 .pvr_value = 0x000c0000, 935 .cpu_name = "7400", 936 .cpu_features = CPU_FTRS_7400, 937 .cpu_user_features = COMMON_USER | 938 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 939 .mmu_features = MMU_FTR_HPTE_TABLE, 940 .icache_bsize = 32, 941 .dcache_bsize = 32, 942 .num_pmcs = 4, 943 .pmc_type = PPC_PMC_G4, 944 .cpu_setup = __setup_cpu_7400, 945 .machine_check = machine_check_generic, 946 .platform = "ppc7400", 947 }, 948 { /* 7410 */ 949 .pvr_mask = 0xffff0000, 950 .pvr_value = 0x800c0000, 951 .cpu_name = "7410", 952 .cpu_features = CPU_FTRS_7400, 953 .cpu_user_features = COMMON_USER | 954 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 955 .mmu_features = MMU_FTR_HPTE_TABLE, 956 .icache_bsize = 32, 957 .dcache_bsize = 32, 958 .num_pmcs = 4, 959 .pmc_type = PPC_PMC_G4, 960 .cpu_setup = __setup_cpu_7410, 961 .machine_check = machine_check_generic, 962 .platform = "ppc7400", 963 }, 964 { /* 7450 2.0 - no doze/nap */ 965 .pvr_mask = 0xffffffff, 966 .pvr_value = 0x80000200, 967 .cpu_name = "7450", 968 .cpu_features = CPU_FTRS_7450_20, 969 .cpu_user_features = COMMON_USER | 970 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 971 .mmu_features = MMU_FTR_HPTE_TABLE, 972 .icache_bsize = 32, 973 .dcache_bsize = 32, 974 .num_pmcs = 6, 975 .pmc_type = PPC_PMC_G4, 976 .cpu_setup = __setup_cpu_745x, 977 .oprofile_cpu_type = "ppc/7450", 978 .oprofile_type = PPC_OPROFILE_G4, 979 .machine_check = machine_check_generic, 980 .platform = "ppc7450", 981 }, 982 { /* 7450 2.1 */ 983 .pvr_mask = 0xffffffff, 984 .pvr_value = 0x80000201, 985 .cpu_name = "7450", 986 .cpu_features = CPU_FTRS_7450_21, 987 .cpu_user_features = COMMON_USER | 988 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 989 .mmu_features = MMU_FTR_HPTE_TABLE, 990 .icache_bsize = 32, 991 .dcache_bsize = 32, 992 .num_pmcs = 6, 993 .pmc_type = PPC_PMC_G4, 994 .cpu_setup = __setup_cpu_745x, 995 .oprofile_cpu_type = "ppc/7450", 996 .oprofile_type = PPC_OPROFILE_G4, 997 .machine_check = machine_check_generic, 998 .platform = "ppc7450", 999 }, 1000 { /* 7450 2.3 and newer */ 1001 .pvr_mask = 0xffff0000, 1002 .pvr_value = 0x80000000, 1003 .cpu_name = "7450", 1004 .cpu_features = CPU_FTRS_7450_23, 1005 .cpu_user_features = COMMON_USER | 1006 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1007 .mmu_features = MMU_FTR_HPTE_TABLE, 1008 .icache_bsize = 32, 1009 .dcache_bsize = 32, 1010 .num_pmcs = 6, 1011 .pmc_type = PPC_PMC_G4, 1012 .cpu_setup = __setup_cpu_745x, 1013 .oprofile_cpu_type = "ppc/7450", 1014 .oprofile_type = PPC_OPROFILE_G4, 1015 .machine_check = machine_check_generic, 1016 .platform = "ppc7450", 1017 }, 1018 { /* 7455 rev 1.x */ 1019 .pvr_mask = 0xffffff00, 1020 .pvr_value = 0x80010100, 1021 .cpu_name = "7455", 1022 .cpu_features = CPU_FTRS_7455_1, 1023 .cpu_user_features = COMMON_USER | 1024 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1025 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1026 .icache_bsize = 32, 1027 .dcache_bsize = 32, 1028 .num_pmcs = 6, 1029 .pmc_type = PPC_PMC_G4, 1030 .cpu_setup = __setup_cpu_745x, 1031 .oprofile_cpu_type = "ppc/7450", 1032 .oprofile_type = PPC_OPROFILE_G4, 1033 .machine_check = machine_check_generic, 1034 .platform = "ppc7450", 1035 }, 1036 { /* 7455 rev 2.0 */ 1037 .pvr_mask = 0xffffffff, 1038 .pvr_value = 0x80010200, 1039 .cpu_name = "7455", 1040 .cpu_features = CPU_FTRS_7455_20, 1041 .cpu_user_features = COMMON_USER | 1042 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1043 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1044 .icache_bsize = 32, 1045 .dcache_bsize = 32, 1046 .num_pmcs = 6, 1047 .pmc_type = PPC_PMC_G4, 1048 .cpu_setup = __setup_cpu_745x, 1049 .oprofile_cpu_type = "ppc/7450", 1050 .oprofile_type = PPC_OPROFILE_G4, 1051 .machine_check = machine_check_generic, 1052 .platform = "ppc7450", 1053 }, 1054 { /* 7455 others */ 1055 .pvr_mask = 0xffff0000, 1056 .pvr_value = 0x80010000, 1057 .cpu_name = "7455", 1058 .cpu_features = CPU_FTRS_7455, 1059 .cpu_user_features = COMMON_USER | 1060 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1061 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1062 .icache_bsize = 32, 1063 .dcache_bsize = 32, 1064 .num_pmcs = 6, 1065 .pmc_type = PPC_PMC_G4, 1066 .cpu_setup = __setup_cpu_745x, 1067 .oprofile_cpu_type = "ppc/7450", 1068 .oprofile_type = PPC_OPROFILE_G4, 1069 .machine_check = machine_check_generic, 1070 .platform = "ppc7450", 1071 }, 1072 { /* 7447/7457 Rev 1.0 */ 1073 .pvr_mask = 0xffffffff, 1074 .pvr_value = 0x80020100, 1075 .cpu_name = "7447/7457", 1076 .cpu_features = CPU_FTRS_7447_10, 1077 .cpu_user_features = COMMON_USER | 1078 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1079 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1080 .icache_bsize = 32, 1081 .dcache_bsize = 32, 1082 .num_pmcs = 6, 1083 .pmc_type = PPC_PMC_G4, 1084 .cpu_setup = __setup_cpu_745x, 1085 .oprofile_cpu_type = "ppc/7450", 1086 .oprofile_type = PPC_OPROFILE_G4, 1087 .machine_check = machine_check_generic, 1088 .platform = "ppc7450", 1089 }, 1090 { /* 7447/7457 Rev 1.1 */ 1091 .pvr_mask = 0xffffffff, 1092 .pvr_value = 0x80020101, 1093 .cpu_name = "7447/7457", 1094 .cpu_features = CPU_FTRS_7447_10, 1095 .cpu_user_features = COMMON_USER | 1096 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1097 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1098 .icache_bsize = 32, 1099 .dcache_bsize = 32, 1100 .num_pmcs = 6, 1101 .pmc_type = PPC_PMC_G4, 1102 .cpu_setup = __setup_cpu_745x, 1103 .oprofile_cpu_type = "ppc/7450", 1104 .oprofile_type = PPC_OPROFILE_G4, 1105 .machine_check = machine_check_generic, 1106 .platform = "ppc7450", 1107 }, 1108 { /* 7447/7457 Rev 1.2 and later */ 1109 .pvr_mask = 0xffff0000, 1110 .pvr_value = 0x80020000, 1111 .cpu_name = "7447/7457", 1112 .cpu_features = CPU_FTRS_7447, 1113 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1114 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1115 .icache_bsize = 32, 1116 .dcache_bsize = 32, 1117 .num_pmcs = 6, 1118 .pmc_type = PPC_PMC_G4, 1119 .cpu_setup = __setup_cpu_745x, 1120 .oprofile_cpu_type = "ppc/7450", 1121 .oprofile_type = PPC_OPROFILE_G4, 1122 .machine_check = machine_check_generic, 1123 .platform = "ppc7450", 1124 }, 1125 { /* 7447A */ 1126 .pvr_mask = 0xffff0000, 1127 .pvr_value = 0x80030000, 1128 .cpu_name = "7447A", 1129 .cpu_features = CPU_FTRS_7447A, 1130 .cpu_user_features = COMMON_USER | 1131 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1132 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1133 .icache_bsize = 32, 1134 .dcache_bsize = 32, 1135 .num_pmcs = 6, 1136 .pmc_type = PPC_PMC_G4, 1137 .cpu_setup = __setup_cpu_745x, 1138 .oprofile_cpu_type = "ppc/7450", 1139 .oprofile_type = PPC_OPROFILE_G4, 1140 .machine_check = machine_check_generic, 1141 .platform = "ppc7450", 1142 }, 1143 { /* 7448 */ 1144 .pvr_mask = 0xffff0000, 1145 .pvr_value = 0x80040000, 1146 .cpu_name = "7448", 1147 .cpu_features = CPU_FTRS_7448, 1148 .cpu_user_features = COMMON_USER | 1149 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1150 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1151 .icache_bsize = 32, 1152 .dcache_bsize = 32, 1153 .num_pmcs = 6, 1154 .pmc_type = PPC_PMC_G4, 1155 .cpu_setup = __setup_cpu_745x, 1156 .oprofile_cpu_type = "ppc/7450", 1157 .oprofile_type = PPC_OPROFILE_G4, 1158 .machine_check = machine_check_generic, 1159 .platform = "ppc7450", 1160 }, 1161 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1162 .pvr_mask = 0x7fff0000, 1163 .pvr_value = 0x00810000, 1164 .cpu_name = "82xx", 1165 .cpu_features = CPU_FTRS_82XX, 1166 .cpu_user_features = COMMON_USER, 1167 .mmu_features = 0, 1168 .icache_bsize = 32, 1169 .dcache_bsize = 32, 1170 .cpu_setup = __setup_cpu_603, 1171 .machine_check = machine_check_generic, 1172 .platform = "ppc603", 1173 }, 1174 { /* All G2_LE (603e core, plus some) have the same pvr */ 1175 .pvr_mask = 0x7fff0000, 1176 .pvr_value = 0x00820000, 1177 .cpu_name = "G2_LE", 1178 .cpu_features = CPU_FTRS_G2_LE, 1179 .cpu_user_features = COMMON_USER, 1180 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1181 .icache_bsize = 32, 1182 .dcache_bsize = 32, 1183 .cpu_setup = __setup_cpu_603, 1184 .machine_check = machine_check_generic, 1185 .platform = "ppc603", 1186 }, 1187 { /* e300c1 (a 603e core, plus some) on 83xx */ 1188 .pvr_mask = 0x7fff0000, 1189 .pvr_value = 0x00830000, 1190 .cpu_name = "e300c1", 1191 .cpu_features = CPU_FTRS_E300, 1192 .cpu_user_features = COMMON_USER, 1193 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1194 .icache_bsize = 32, 1195 .dcache_bsize = 32, 1196 .cpu_setup = __setup_cpu_603, 1197 .machine_check = machine_check_generic, 1198 .platform = "ppc603", 1199 }, 1200 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1201 .pvr_mask = 0x7fff0000, 1202 .pvr_value = 0x00840000, 1203 .cpu_name = "e300c2", 1204 .cpu_features = CPU_FTRS_E300C2, 1205 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1206 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1207 MMU_FTR_NEED_DTLB_SW_LRU, 1208 .icache_bsize = 32, 1209 .dcache_bsize = 32, 1210 .cpu_setup = __setup_cpu_603, 1211 .machine_check = machine_check_generic, 1212 .platform = "ppc603", 1213 }, 1214 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1215 .pvr_mask = 0x7fff0000, 1216 .pvr_value = 0x00850000, 1217 .cpu_name = "e300c3", 1218 .cpu_features = CPU_FTRS_E300, 1219 .cpu_user_features = COMMON_USER, 1220 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1221 MMU_FTR_NEED_DTLB_SW_LRU, 1222 .icache_bsize = 32, 1223 .dcache_bsize = 32, 1224 .cpu_setup = __setup_cpu_603, 1225 .machine_check = machine_check_generic, 1226 .num_pmcs = 4, 1227 .oprofile_cpu_type = "ppc/e300", 1228 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1229 .platform = "ppc603", 1230 }, 1231 { /* e300c4 (e300c1, plus one IU) */ 1232 .pvr_mask = 0x7fff0000, 1233 .pvr_value = 0x00860000, 1234 .cpu_name = "e300c4", 1235 .cpu_features = CPU_FTRS_E300, 1236 .cpu_user_features = COMMON_USER, 1237 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1238 MMU_FTR_NEED_DTLB_SW_LRU, 1239 .icache_bsize = 32, 1240 .dcache_bsize = 32, 1241 .cpu_setup = __setup_cpu_603, 1242 .machine_check = machine_check_generic, 1243 .num_pmcs = 4, 1244 .oprofile_cpu_type = "ppc/e300", 1245 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1246 .platform = "ppc603", 1247 }, 1248 { /* default match, we assume split I/D cache & TB (non-601)... */ 1249 .pvr_mask = 0x00000000, 1250 .pvr_value = 0x00000000, 1251 .cpu_name = "(generic PPC)", 1252 .cpu_features = CPU_FTRS_CLASSIC32, 1253 .cpu_user_features = COMMON_USER, 1254 .mmu_features = MMU_FTR_HPTE_TABLE, 1255 .icache_bsize = 32, 1256 .dcache_bsize = 32, 1257 .machine_check = machine_check_generic, 1258 .platform = "ppc603", 1259 }, 1260 #endif /* CONFIG_PPC_BOOK3S_32 */ 1261 #ifdef CONFIG_8xx 1262 { /* 8xx */ 1263 .pvr_mask = 0xffff0000, 1264 .pvr_value = 0x00500000, 1265 .cpu_name = "8xx", 1266 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1267 * if the 8xx code is there.... */ 1268 .cpu_features = CPU_FTRS_8XX, 1269 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1270 .mmu_features = MMU_FTR_TYPE_8xx, 1271 .icache_bsize = 16, 1272 .dcache_bsize = 16, 1273 .machine_check = machine_check_8xx, 1274 .platform = "ppc823", 1275 }, 1276 #endif /* CONFIG_8xx */ 1277 #ifdef CONFIG_40x 1278 { /* 403GC */ 1279 .pvr_mask = 0xffffff00, 1280 .pvr_value = 0x00200200, 1281 .cpu_name = "403GC", 1282 .cpu_features = CPU_FTRS_40X, 1283 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1284 .mmu_features = MMU_FTR_TYPE_40x, 1285 .icache_bsize = 16, 1286 .dcache_bsize = 16, 1287 .machine_check = machine_check_4xx, 1288 .platform = "ppc403", 1289 }, 1290 { /* 403GCX */ 1291 .pvr_mask = 0xffffff00, 1292 .pvr_value = 0x00201400, 1293 .cpu_name = "403GCX", 1294 .cpu_features = CPU_FTRS_40X, 1295 .cpu_user_features = PPC_FEATURE_32 | 1296 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1297 .mmu_features = MMU_FTR_TYPE_40x, 1298 .icache_bsize = 16, 1299 .dcache_bsize = 16, 1300 .machine_check = machine_check_4xx, 1301 .platform = "ppc403", 1302 }, 1303 { /* 403G ?? */ 1304 .pvr_mask = 0xffff0000, 1305 .pvr_value = 0x00200000, 1306 .cpu_name = "403G ??", 1307 .cpu_features = CPU_FTRS_40X, 1308 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1309 .mmu_features = MMU_FTR_TYPE_40x, 1310 .icache_bsize = 16, 1311 .dcache_bsize = 16, 1312 .machine_check = machine_check_4xx, 1313 .platform = "ppc403", 1314 }, 1315 { /* 405GP */ 1316 .pvr_mask = 0xffff0000, 1317 .pvr_value = 0x40110000, 1318 .cpu_name = "405GP", 1319 .cpu_features = CPU_FTRS_40X, 1320 .cpu_user_features = PPC_FEATURE_32 | 1321 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1322 .mmu_features = MMU_FTR_TYPE_40x, 1323 .icache_bsize = 32, 1324 .dcache_bsize = 32, 1325 .machine_check = machine_check_4xx, 1326 .platform = "ppc405", 1327 }, 1328 { /* STB 03xxx */ 1329 .pvr_mask = 0xffff0000, 1330 .pvr_value = 0x40130000, 1331 .cpu_name = "STB03xxx", 1332 .cpu_features = CPU_FTRS_40X, 1333 .cpu_user_features = PPC_FEATURE_32 | 1334 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1335 .mmu_features = MMU_FTR_TYPE_40x, 1336 .icache_bsize = 32, 1337 .dcache_bsize = 32, 1338 .machine_check = machine_check_4xx, 1339 .platform = "ppc405", 1340 }, 1341 { /* STB 04xxx */ 1342 .pvr_mask = 0xffff0000, 1343 .pvr_value = 0x41810000, 1344 .cpu_name = "STB04xxx", 1345 .cpu_features = CPU_FTRS_40X, 1346 .cpu_user_features = PPC_FEATURE_32 | 1347 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1348 .mmu_features = MMU_FTR_TYPE_40x, 1349 .icache_bsize = 32, 1350 .dcache_bsize = 32, 1351 .machine_check = machine_check_4xx, 1352 .platform = "ppc405", 1353 }, 1354 { /* NP405L */ 1355 .pvr_mask = 0xffff0000, 1356 .pvr_value = 0x41610000, 1357 .cpu_name = "NP405L", 1358 .cpu_features = CPU_FTRS_40X, 1359 .cpu_user_features = PPC_FEATURE_32 | 1360 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1361 .mmu_features = MMU_FTR_TYPE_40x, 1362 .icache_bsize = 32, 1363 .dcache_bsize = 32, 1364 .machine_check = machine_check_4xx, 1365 .platform = "ppc405", 1366 }, 1367 { /* NP4GS3 */ 1368 .pvr_mask = 0xffff0000, 1369 .pvr_value = 0x40B10000, 1370 .cpu_name = "NP4GS3", 1371 .cpu_features = CPU_FTRS_40X, 1372 .cpu_user_features = PPC_FEATURE_32 | 1373 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1374 .mmu_features = MMU_FTR_TYPE_40x, 1375 .icache_bsize = 32, 1376 .dcache_bsize = 32, 1377 .machine_check = machine_check_4xx, 1378 .platform = "ppc405", 1379 }, 1380 { /* NP405H */ 1381 .pvr_mask = 0xffff0000, 1382 .pvr_value = 0x41410000, 1383 .cpu_name = "NP405H", 1384 .cpu_features = CPU_FTRS_40X, 1385 .cpu_user_features = PPC_FEATURE_32 | 1386 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1387 .mmu_features = MMU_FTR_TYPE_40x, 1388 .icache_bsize = 32, 1389 .dcache_bsize = 32, 1390 .machine_check = machine_check_4xx, 1391 .platform = "ppc405", 1392 }, 1393 { /* 405GPr */ 1394 .pvr_mask = 0xffff0000, 1395 .pvr_value = 0x50910000, 1396 .cpu_name = "405GPr", 1397 .cpu_features = CPU_FTRS_40X, 1398 .cpu_user_features = PPC_FEATURE_32 | 1399 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1400 .mmu_features = MMU_FTR_TYPE_40x, 1401 .icache_bsize = 32, 1402 .dcache_bsize = 32, 1403 .machine_check = machine_check_4xx, 1404 .platform = "ppc405", 1405 }, 1406 { /* STBx25xx */ 1407 .pvr_mask = 0xffff0000, 1408 .pvr_value = 0x51510000, 1409 .cpu_name = "STBx25xx", 1410 .cpu_features = CPU_FTRS_40X, 1411 .cpu_user_features = PPC_FEATURE_32 | 1412 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1413 .mmu_features = MMU_FTR_TYPE_40x, 1414 .icache_bsize = 32, 1415 .dcache_bsize = 32, 1416 .machine_check = machine_check_4xx, 1417 .platform = "ppc405", 1418 }, 1419 { /* 405LP */ 1420 .pvr_mask = 0xffff0000, 1421 .pvr_value = 0x41F10000, 1422 .cpu_name = "405LP", 1423 .cpu_features = CPU_FTRS_40X, 1424 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1425 .mmu_features = MMU_FTR_TYPE_40x, 1426 .icache_bsize = 32, 1427 .dcache_bsize = 32, 1428 .machine_check = machine_check_4xx, 1429 .platform = "ppc405", 1430 }, 1431 { /* Xilinx Virtex-II Pro */ 1432 .pvr_mask = 0xfffff000, 1433 .pvr_value = 0x20010000, 1434 .cpu_name = "Virtex-II Pro", 1435 .cpu_features = CPU_FTRS_40X, 1436 .cpu_user_features = PPC_FEATURE_32 | 1437 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1438 .mmu_features = MMU_FTR_TYPE_40x, 1439 .icache_bsize = 32, 1440 .dcache_bsize = 32, 1441 .machine_check = machine_check_4xx, 1442 .platform = "ppc405", 1443 }, 1444 { /* Xilinx Virtex-4 FX */ 1445 .pvr_mask = 0xfffff000, 1446 .pvr_value = 0x20011000, 1447 .cpu_name = "Virtex-4 FX", 1448 .cpu_features = CPU_FTRS_40X, 1449 .cpu_user_features = PPC_FEATURE_32 | 1450 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1451 .mmu_features = MMU_FTR_TYPE_40x, 1452 .icache_bsize = 32, 1453 .dcache_bsize = 32, 1454 .machine_check = machine_check_4xx, 1455 .platform = "ppc405", 1456 }, 1457 { /* 405EP */ 1458 .pvr_mask = 0xffff0000, 1459 .pvr_value = 0x51210000, 1460 .cpu_name = "405EP", 1461 .cpu_features = CPU_FTRS_40X, 1462 .cpu_user_features = PPC_FEATURE_32 | 1463 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1464 .mmu_features = MMU_FTR_TYPE_40x, 1465 .icache_bsize = 32, 1466 .dcache_bsize = 32, 1467 .machine_check = machine_check_4xx, 1468 .platform = "ppc405", 1469 }, 1470 { /* 405EX Rev. A/B with Security */ 1471 .pvr_mask = 0xffff000f, 1472 .pvr_value = 0x12910007, 1473 .cpu_name = "405EX Rev. A/B", 1474 .cpu_features = CPU_FTRS_40X, 1475 .cpu_user_features = PPC_FEATURE_32 | 1476 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1477 .mmu_features = MMU_FTR_TYPE_40x, 1478 .icache_bsize = 32, 1479 .dcache_bsize = 32, 1480 .machine_check = machine_check_4xx, 1481 .platform = "ppc405", 1482 }, 1483 { /* 405EX Rev. C without Security */ 1484 .pvr_mask = 0xffff000f, 1485 .pvr_value = 0x1291000d, 1486 .cpu_name = "405EX Rev. C", 1487 .cpu_features = CPU_FTRS_40X, 1488 .cpu_user_features = PPC_FEATURE_32 | 1489 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1490 .mmu_features = MMU_FTR_TYPE_40x, 1491 .icache_bsize = 32, 1492 .dcache_bsize = 32, 1493 .machine_check = machine_check_4xx, 1494 .platform = "ppc405", 1495 }, 1496 { /* 405EX Rev. C with Security */ 1497 .pvr_mask = 0xffff000f, 1498 .pvr_value = 0x1291000f, 1499 .cpu_name = "405EX Rev. C", 1500 .cpu_features = CPU_FTRS_40X, 1501 .cpu_user_features = PPC_FEATURE_32 | 1502 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1503 .mmu_features = MMU_FTR_TYPE_40x, 1504 .icache_bsize = 32, 1505 .dcache_bsize = 32, 1506 .machine_check = machine_check_4xx, 1507 .platform = "ppc405", 1508 }, 1509 { /* 405EX Rev. D without Security */ 1510 .pvr_mask = 0xffff000f, 1511 .pvr_value = 0x12910003, 1512 .cpu_name = "405EX Rev. D", 1513 .cpu_features = CPU_FTRS_40X, 1514 .cpu_user_features = PPC_FEATURE_32 | 1515 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1516 .mmu_features = MMU_FTR_TYPE_40x, 1517 .icache_bsize = 32, 1518 .dcache_bsize = 32, 1519 .machine_check = machine_check_4xx, 1520 .platform = "ppc405", 1521 }, 1522 { /* 405EX Rev. D with Security */ 1523 .pvr_mask = 0xffff000f, 1524 .pvr_value = 0x12910005, 1525 .cpu_name = "405EX Rev. D", 1526 .cpu_features = CPU_FTRS_40X, 1527 .cpu_user_features = PPC_FEATURE_32 | 1528 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1529 .mmu_features = MMU_FTR_TYPE_40x, 1530 .icache_bsize = 32, 1531 .dcache_bsize = 32, 1532 .machine_check = machine_check_4xx, 1533 .platform = "ppc405", 1534 }, 1535 { /* 405EXr Rev. A/B without Security */ 1536 .pvr_mask = 0xffff000f, 1537 .pvr_value = 0x12910001, 1538 .cpu_name = "405EXr Rev. A/B", 1539 .cpu_features = CPU_FTRS_40X, 1540 .cpu_user_features = PPC_FEATURE_32 | 1541 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1542 .mmu_features = MMU_FTR_TYPE_40x, 1543 .icache_bsize = 32, 1544 .dcache_bsize = 32, 1545 .machine_check = machine_check_4xx, 1546 .platform = "ppc405", 1547 }, 1548 { /* 405EXr Rev. C without Security */ 1549 .pvr_mask = 0xffff000f, 1550 .pvr_value = 0x12910009, 1551 .cpu_name = "405EXr Rev. C", 1552 .cpu_features = CPU_FTRS_40X, 1553 .cpu_user_features = PPC_FEATURE_32 | 1554 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1555 .mmu_features = MMU_FTR_TYPE_40x, 1556 .icache_bsize = 32, 1557 .dcache_bsize = 32, 1558 .machine_check = machine_check_4xx, 1559 .platform = "ppc405", 1560 }, 1561 { /* 405EXr Rev. C with Security */ 1562 .pvr_mask = 0xffff000f, 1563 .pvr_value = 0x1291000b, 1564 .cpu_name = "405EXr Rev. C", 1565 .cpu_features = CPU_FTRS_40X, 1566 .cpu_user_features = PPC_FEATURE_32 | 1567 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1568 .mmu_features = MMU_FTR_TYPE_40x, 1569 .icache_bsize = 32, 1570 .dcache_bsize = 32, 1571 .machine_check = machine_check_4xx, 1572 .platform = "ppc405", 1573 }, 1574 { /* 405EXr Rev. D without Security */ 1575 .pvr_mask = 0xffff000f, 1576 .pvr_value = 0x12910000, 1577 .cpu_name = "405EXr Rev. D", 1578 .cpu_features = CPU_FTRS_40X, 1579 .cpu_user_features = PPC_FEATURE_32 | 1580 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1581 .mmu_features = MMU_FTR_TYPE_40x, 1582 .icache_bsize = 32, 1583 .dcache_bsize = 32, 1584 .machine_check = machine_check_4xx, 1585 .platform = "ppc405", 1586 }, 1587 { /* 405EXr Rev. D with Security */ 1588 .pvr_mask = 0xffff000f, 1589 .pvr_value = 0x12910002, 1590 .cpu_name = "405EXr Rev. D", 1591 .cpu_features = CPU_FTRS_40X, 1592 .cpu_user_features = PPC_FEATURE_32 | 1593 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1594 .mmu_features = MMU_FTR_TYPE_40x, 1595 .icache_bsize = 32, 1596 .dcache_bsize = 32, 1597 .machine_check = machine_check_4xx, 1598 .platform = "ppc405", 1599 }, 1600 { 1601 /* 405EZ */ 1602 .pvr_mask = 0xffff0000, 1603 .pvr_value = 0x41510000, 1604 .cpu_name = "405EZ", 1605 .cpu_features = CPU_FTRS_40X, 1606 .cpu_user_features = PPC_FEATURE_32 | 1607 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1608 .mmu_features = MMU_FTR_TYPE_40x, 1609 .icache_bsize = 32, 1610 .dcache_bsize = 32, 1611 .machine_check = machine_check_4xx, 1612 .platform = "ppc405", 1613 }, 1614 { /* APM8018X */ 1615 .pvr_mask = 0xffff0000, 1616 .pvr_value = 0x7ff11432, 1617 .cpu_name = "APM8018X", 1618 .cpu_features = CPU_FTRS_40X, 1619 .cpu_user_features = PPC_FEATURE_32 | 1620 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1621 .mmu_features = MMU_FTR_TYPE_40x, 1622 .icache_bsize = 32, 1623 .dcache_bsize = 32, 1624 .machine_check = machine_check_4xx, 1625 .platform = "ppc405", 1626 }, 1627 { /* default match */ 1628 .pvr_mask = 0x00000000, 1629 .pvr_value = 0x00000000, 1630 .cpu_name = "(generic 40x PPC)", 1631 .cpu_features = CPU_FTRS_40X, 1632 .cpu_user_features = PPC_FEATURE_32 | 1633 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1634 .mmu_features = MMU_FTR_TYPE_40x, 1635 .icache_bsize = 32, 1636 .dcache_bsize = 32, 1637 .machine_check = machine_check_4xx, 1638 .platform = "ppc405", 1639 } 1640 1641 #endif /* CONFIG_40x */ 1642 #ifdef CONFIG_44x 1643 { 1644 .pvr_mask = 0xf0000fff, 1645 .pvr_value = 0x40000850, 1646 .cpu_name = "440GR Rev. A", 1647 .cpu_features = CPU_FTRS_44X, 1648 .cpu_user_features = COMMON_USER_BOOKE, 1649 .mmu_features = MMU_FTR_TYPE_44x, 1650 .icache_bsize = 32, 1651 .dcache_bsize = 32, 1652 .machine_check = machine_check_4xx, 1653 .platform = "ppc440", 1654 }, 1655 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1656 .pvr_mask = 0xf0000fff, 1657 .pvr_value = 0x40000858, 1658 .cpu_name = "440EP Rev. A", 1659 .cpu_features = CPU_FTRS_44X, 1660 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1661 .mmu_features = MMU_FTR_TYPE_44x, 1662 .icache_bsize = 32, 1663 .dcache_bsize = 32, 1664 .cpu_setup = __setup_cpu_440ep, 1665 .machine_check = machine_check_4xx, 1666 .platform = "ppc440", 1667 }, 1668 { 1669 .pvr_mask = 0xf0000fff, 1670 .pvr_value = 0x400008d3, 1671 .cpu_name = "440GR Rev. B", 1672 .cpu_features = CPU_FTRS_44X, 1673 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1674 .mmu_features = MMU_FTR_TYPE_44x, 1675 .icache_bsize = 32, 1676 .dcache_bsize = 32, 1677 .machine_check = machine_check_4xx, 1678 .platform = "ppc440", 1679 }, 1680 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1681 .pvr_mask = 0xf0000ff7, 1682 .pvr_value = 0x400008d4, 1683 .cpu_name = "440EP Rev. C", 1684 .cpu_features = CPU_FTRS_44X, 1685 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1686 .mmu_features = MMU_FTR_TYPE_44x, 1687 .icache_bsize = 32, 1688 .dcache_bsize = 32, 1689 .cpu_setup = __setup_cpu_440ep, 1690 .machine_check = machine_check_4xx, 1691 .platform = "ppc440", 1692 }, 1693 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1694 .pvr_mask = 0xf0000fff, 1695 .pvr_value = 0x400008db, 1696 .cpu_name = "440EP Rev. B", 1697 .cpu_features = CPU_FTRS_44X, 1698 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1699 .mmu_features = MMU_FTR_TYPE_44x, 1700 .icache_bsize = 32, 1701 .dcache_bsize = 32, 1702 .cpu_setup = __setup_cpu_440ep, 1703 .machine_check = machine_check_4xx, 1704 .platform = "ppc440", 1705 }, 1706 { /* 440GRX */ 1707 .pvr_mask = 0xf0000ffb, 1708 .pvr_value = 0x200008D0, 1709 .cpu_name = "440GRX", 1710 .cpu_features = CPU_FTRS_44X, 1711 .cpu_user_features = COMMON_USER_BOOKE, 1712 .mmu_features = MMU_FTR_TYPE_44x, 1713 .icache_bsize = 32, 1714 .dcache_bsize = 32, 1715 .cpu_setup = __setup_cpu_440grx, 1716 .machine_check = machine_check_440A, 1717 .platform = "ppc440", 1718 }, 1719 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1720 .pvr_mask = 0xf0000ffb, 1721 .pvr_value = 0x200008D8, 1722 .cpu_name = "440EPX", 1723 .cpu_features = CPU_FTRS_44X, 1724 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1725 .mmu_features = MMU_FTR_TYPE_44x, 1726 .icache_bsize = 32, 1727 .dcache_bsize = 32, 1728 .cpu_setup = __setup_cpu_440epx, 1729 .machine_check = machine_check_440A, 1730 .platform = "ppc440", 1731 }, 1732 { /* 440GP Rev. B */ 1733 .pvr_mask = 0xf0000fff, 1734 .pvr_value = 0x40000440, 1735 .cpu_name = "440GP Rev. B", 1736 .cpu_features = CPU_FTRS_44X, 1737 .cpu_user_features = COMMON_USER_BOOKE, 1738 .mmu_features = MMU_FTR_TYPE_44x, 1739 .icache_bsize = 32, 1740 .dcache_bsize = 32, 1741 .machine_check = machine_check_4xx, 1742 .platform = "ppc440gp", 1743 }, 1744 { /* 440GP Rev. C */ 1745 .pvr_mask = 0xf0000fff, 1746 .pvr_value = 0x40000481, 1747 .cpu_name = "440GP Rev. C", 1748 .cpu_features = CPU_FTRS_44X, 1749 .cpu_user_features = COMMON_USER_BOOKE, 1750 .mmu_features = MMU_FTR_TYPE_44x, 1751 .icache_bsize = 32, 1752 .dcache_bsize = 32, 1753 .machine_check = machine_check_4xx, 1754 .platform = "ppc440gp", 1755 }, 1756 { /* 440GX Rev. A */ 1757 .pvr_mask = 0xf0000fff, 1758 .pvr_value = 0x50000850, 1759 .cpu_name = "440GX Rev. A", 1760 .cpu_features = CPU_FTRS_44X, 1761 .cpu_user_features = COMMON_USER_BOOKE, 1762 .mmu_features = MMU_FTR_TYPE_44x, 1763 .icache_bsize = 32, 1764 .dcache_bsize = 32, 1765 .cpu_setup = __setup_cpu_440gx, 1766 .machine_check = machine_check_440A, 1767 .platform = "ppc440", 1768 }, 1769 { /* 440GX Rev. B */ 1770 .pvr_mask = 0xf0000fff, 1771 .pvr_value = 0x50000851, 1772 .cpu_name = "440GX Rev. B", 1773 .cpu_features = CPU_FTRS_44X, 1774 .cpu_user_features = COMMON_USER_BOOKE, 1775 .mmu_features = MMU_FTR_TYPE_44x, 1776 .icache_bsize = 32, 1777 .dcache_bsize = 32, 1778 .cpu_setup = __setup_cpu_440gx, 1779 .machine_check = machine_check_440A, 1780 .platform = "ppc440", 1781 }, 1782 { /* 440GX Rev. C */ 1783 .pvr_mask = 0xf0000fff, 1784 .pvr_value = 0x50000892, 1785 .cpu_name = "440GX Rev. C", 1786 .cpu_features = CPU_FTRS_44X, 1787 .cpu_user_features = COMMON_USER_BOOKE, 1788 .mmu_features = MMU_FTR_TYPE_44x, 1789 .icache_bsize = 32, 1790 .dcache_bsize = 32, 1791 .cpu_setup = __setup_cpu_440gx, 1792 .machine_check = machine_check_440A, 1793 .platform = "ppc440", 1794 }, 1795 { /* 440GX Rev. F */ 1796 .pvr_mask = 0xf0000fff, 1797 .pvr_value = 0x50000894, 1798 .cpu_name = "440GX Rev. F", 1799 .cpu_features = CPU_FTRS_44X, 1800 .cpu_user_features = COMMON_USER_BOOKE, 1801 .mmu_features = MMU_FTR_TYPE_44x, 1802 .icache_bsize = 32, 1803 .dcache_bsize = 32, 1804 .cpu_setup = __setup_cpu_440gx, 1805 .machine_check = machine_check_440A, 1806 .platform = "ppc440", 1807 }, 1808 { /* 440SP Rev. A */ 1809 .pvr_mask = 0xfff00fff, 1810 .pvr_value = 0x53200891, 1811 .cpu_name = "440SP Rev. A", 1812 .cpu_features = CPU_FTRS_44X, 1813 .cpu_user_features = COMMON_USER_BOOKE, 1814 .mmu_features = MMU_FTR_TYPE_44x, 1815 .icache_bsize = 32, 1816 .dcache_bsize = 32, 1817 .machine_check = machine_check_4xx, 1818 .platform = "ppc440", 1819 }, 1820 { /* 440SPe Rev. A */ 1821 .pvr_mask = 0xfff00fff, 1822 .pvr_value = 0x53400890, 1823 .cpu_name = "440SPe Rev. A", 1824 .cpu_features = CPU_FTRS_44X, 1825 .cpu_user_features = COMMON_USER_BOOKE, 1826 .mmu_features = MMU_FTR_TYPE_44x, 1827 .icache_bsize = 32, 1828 .dcache_bsize = 32, 1829 .cpu_setup = __setup_cpu_440spe, 1830 .machine_check = machine_check_440A, 1831 .platform = "ppc440", 1832 }, 1833 { /* 440SPe Rev. B */ 1834 .pvr_mask = 0xfff00fff, 1835 .pvr_value = 0x53400891, 1836 .cpu_name = "440SPe Rev. B", 1837 .cpu_features = CPU_FTRS_44X, 1838 .cpu_user_features = COMMON_USER_BOOKE, 1839 .mmu_features = MMU_FTR_TYPE_44x, 1840 .icache_bsize = 32, 1841 .dcache_bsize = 32, 1842 .cpu_setup = __setup_cpu_440spe, 1843 .machine_check = machine_check_440A, 1844 .platform = "ppc440", 1845 }, 1846 { /* 440 in Xilinx Virtex-5 FXT */ 1847 .pvr_mask = 0xfffffff0, 1848 .pvr_value = 0x7ff21910, 1849 .cpu_name = "440 in Virtex-5 FXT", 1850 .cpu_features = CPU_FTRS_44X, 1851 .cpu_user_features = COMMON_USER_BOOKE, 1852 .mmu_features = MMU_FTR_TYPE_44x, 1853 .icache_bsize = 32, 1854 .dcache_bsize = 32, 1855 .cpu_setup = __setup_cpu_440x5, 1856 .machine_check = machine_check_440A, 1857 .platform = "ppc440", 1858 }, 1859 { /* 460EX */ 1860 .pvr_mask = 0xffff0006, 1861 .pvr_value = 0x13020002, 1862 .cpu_name = "460EX", 1863 .cpu_features = CPU_FTRS_440x6, 1864 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1865 .mmu_features = MMU_FTR_TYPE_44x, 1866 .icache_bsize = 32, 1867 .dcache_bsize = 32, 1868 .cpu_setup = __setup_cpu_460ex, 1869 .machine_check = machine_check_440A, 1870 .platform = "ppc440", 1871 }, 1872 { /* 460EX Rev B */ 1873 .pvr_mask = 0xffff0007, 1874 .pvr_value = 0x13020004, 1875 .cpu_name = "460EX Rev. B", 1876 .cpu_features = CPU_FTRS_440x6, 1877 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1878 .mmu_features = MMU_FTR_TYPE_44x, 1879 .icache_bsize = 32, 1880 .dcache_bsize = 32, 1881 .cpu_setup = __setup_cpu_460ex, 1882 .machine_check = machine_check_440A, 1883 .platform = "ppc440", 1884 }, 1885 { /* 460GT */ 1886 .pvr_mask = 0xffff0006, 1887 .pvr_value = 0x13020000, 1888 .cpu_name = "460GT", 1889 .cpu_features = CPU_FTRS_440x6, 1890 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1891 .mmu_features = MMU_FTR_TYPE_44x, 1892 .icache_bsize = 32, 1893 .dcache_bsize = 32, 1894 .cpu_setup = __setup_cpu_460gt, 1895 .machine_check = machine_check_440A, 1896 .platform = "ppc440", 1897 }, 1898 { /* 460GT Rev B */ 1899 .pvr_mask = 0xffff0007, 1900 .pvr_value = 0x13020005, 1901 .cpu_name = "460GT Rev. B", 1902 .cpu_features = CPU_FTRS_440x6, 1903 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1904 .mmu_features = MMU_FTR_TYPE_44x, 1905 .icache_bsize = 32, 1906 .dcache_bsize = 32, 1907 .cpu_setup = __setup_cpu_460gt, 1908 .machine_check = machine_check_440A, 1909 .platform = "ppc440", 1910 }, 1911 { /* 460SX */ 1912 .pvr_mask = 0xffffff00, 1913 .pvr_value = 0x13541800, 1914 .cpu_name = "460SX", 1915 .cpu_features = CPU_FTRS_44X, 1916 .cpu_user_features = COMMON_USER_BOOKE, 1917 .mmu_features = MMU_FTR_TYPE_44x, 1918 .icache_bsize = 32, 1919 .dcache_bsize = 32, 1920 .cpu_setup = __setup_cpu_460sx, 1921 .machine_check = machine_check_440A, 1922 .platform = "ppc440", 1923 }, 1924 { /* 464 in APM821xx */ 1925 .pvr_mask = 0xfffffff0, 1926 .pvr_value = 0x12C41C80, 1927 .cpu_name = "APM821XX", 1928 .cpu_features = CPU_FTRS_44X, 1929 .cpu_user_features = COMMON_USER_BOOKE | 1930 PPC_FEATURE_HAS_FPU, 1931 .mmu_features = MMU_FTR_TYPE_44x, 1932 .icache_bsize = 32, 1933 .dcache_bsize = 32, 1934 .cpu_setup = __setup_cpu_apm821xx, 1935 .machine_check = machine_check_440A, 1936 .platform = "ppc440", 1937 }, 1938 { /* 476 DD2 core */ 1939 .pvr_mask = 0xffffffff, 1940 .pvr_value = 0x11a52080, 1941 .cpu_name = "476", 1942 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1943 .cpu_user_features = COMMON_USER_BOOKE | 1944 PPC_FEATURE_HAS_FPU, 1945 .mmu_features = MMU_FTR_TYPE_47x | 1946 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1947 .icache_bsize = 32, 1948 .dcache_bsize = 128, 1949 .machine_check = machine_check_47x, 1950 .platform = "ppc470", 1951 }, 1952 { /* 476fpe */ 1953 .pvr_mask = 0xffff0000, 1954 .pvr_value = 0x7ff50000, 1955 .cpu_name = "476fpe", 1956 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1957 .cpu_user_features = COMMON_USER_BOOKE | 1958 PPC_FEATURE_HAS_FPU, 1959 .mmu_features = MMU_FTR_TYPE_47x | 1960 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1961 .icache_bsize = 32, 1962 .dcache_bsize = 128, 1963 .machine_check = machine_check_47x, 1964 .platform = "ppc470", 1965 }, 1966 { /* 476 iss */ 1967 .pvr_mask = 0xffff0000, 1968 .pvr_value = 0x00050000, 1969 .cpu_name = "476", 1970 .cpu_features = CPU_FTRS_47X, 1971 .cpu_user_features = COMMON_USER_BOOKE | 1972 PPC_FEATURE_HAS_FPU, 1973 .mmu_features = MMU_FTR_TYPE_47x | 1974 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1975 .icache_bsize = 32, 1976 .dcache_bsize = 128, 1977 .machine_check = machine_check_47x, 1978 .platform = "ppc470", 1979 }, 1980 { /* 476 others */ 1981 .pvr_mask = 0xffff0000, 1982 .pvr_value = 0x11a50000, 1983 .cpu_name = "476", 1984 .cpu_features = CPU_FTRS_47X, 1985 .cpu_user_features = COMMON_USER_BOOKE | 1986 PPC_FEATURE_HAS_FPU, 1987 .mmu_features = MMU_FTR_TYPE_47x | 1988 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1989 .icache_bsize = 32, 1990 .dcache_bsize = 128, 1991 .machine_check = machine_check_47x, 1992 .platform = "ppc470", 1993 }, 1994 { /* default match */ 1995 .pvr_mask = 0x00000000, 1996 .pvr_value = 0x00000000, 1997 .cpu_name = "(generic 44x PPC)", 1998 .cpu_features = CPU_FTRS_44X, 1999 .cpu_user_features = COMMON_USER_BOOKE, 2000 .mmu_features = MMU_FTR_TYPE_44x, 2001 .icache_bsize = 32, 2002 .dcache_bsize = 32, 2003 .machine_check = machine_check_4xx, 2004 .platform = "ppc440", 2005 } 2006 #endif /* CONFIG_44x */ 2007 #ifdef CONFIG_E200 2008 { /* e200z5 */ 2009 .pvr_mask = 0xfff00000, 2010 .pvr_value = 0x81000000, 2011 .cpu_name = "e200z5", 2012 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 2013 .cpu_features = CPU_FTRS_E200, 2014 .cpu_user_features = COMMON_USER_BOOKE | 2015 PPC_FEATURE_HAS_EFP_SINGLE | 2016 PPC_FEATURE_UNIFIED_CACHE, 2017 .mmu_features = MMU_FTR_TYPE_FSL_E, 2018 .dcache_bsize = 32, 2019 .machine_check = machine_check_e200, 2020 .platform = "ppc5554", 2021 }, 2022 { /* e200z6 */ 2023 .pvr_mask = 0xfff00000, 2024 .pvr_value = 0x81100000, 2025 .cpu_name = "e200z6", 2026 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 2027 .cpu_features = CPU_FTRS_E200, 2028 .cpu_user_features = COMMON_USER_BOOKE | 2029 PPC_FEATURE_HAS_SPE_COMP | 2030 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2031 PPC_FEATURE_UNIFIED_CACHE, 2032 .mmu_features = MMU_FTR_TYPE_FSL_E, 2033 .dcache_bsize = 32, 2034 .machine_check = machine_check_e200, 2035 .platform = "ppc5554", 2036 }, 2037 { /* default match */ 2038 .pvr_mask = 0x00000000, 2039 .pvr_value = 0x00000000, 2040 .cpu_name = "(generic E200 PPC)", 2041 .cpu_features = CPU_FTRS_E200, 2042 .cpu_user_features = COMMON_USER_BOOKE | 2043 PPC_FEATURE_HAS_EFP_SINGLE | 2044 PPC_FEATURE_UNIFIED_CACHE, 2045 .mmu_features = MMU_FTR_TYPE_FSL_E, 2046 .dcache_bsize = 32, 2047 .cpu_setup = __setup_cpu_e200, 2048 .machine_check = machine_check_e200, 2049 .platform = "ppc5554", 2050 } 2051 #endif /* CONFIG_E200 */ 2052 #endif /* CONFIG_PPC32 */ 2053 #ifdef CONFIG_E500 2054 #ifdef CONFIG_PPC32 2055 #ifndef CONFIG_PPC_E500MC 2056 { /* e500 */ 2057 .pvr_mask = 0xffff0000, 2058 .pvr_value = 0x80200000, 2059 .cpu_name = "e500", 2060 .cpu_features = CPU_FTRS_E500, 2061 .cpu_user_features = COMMON_USER_BOOKE | 2062 PPC_FEATURE_HAS_SPE_COMP | 2063 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2064 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2065 .mmu_features = MMU_FTR_TYPE_FSL_E, 2066 .icache_bsize = 32, 2067 .dcache_bsize = 32, 2068 .num_pmcs = 4, 2069 .oprofile_cpu_type = "ppc/e500", 2070 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2071 .cpu_setup = __setup_cpu_e500v1, 2072 .machine_check = machine_check_e500, 2073 .platform = "ppc8540", 2074 }, 2075 { /* e500v2 */ 2076 .pvr_mask = 0xffff0000, 2077 .pvr_value = 0x80210000, 2078 .cpu_name = "e500v2", 2079 .cpu_features = CPU_FTRS_E500_2, 2080 .cpu_user_features = COMMON_USER_BOOKE | 2081 PPC_FEATURE_HAS_SPE_COMP | 2082 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2083 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 2084 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2085 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 2086 .icache_bsize = 32, 2087 .dcache_bsize = 32, 2088 .num_pmcs = 4, 2089 .oprofile_cpu_type = "ppc/e500", 2090 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2091 .cpu_setup = __setup_cpu_e500v2, 2092 .machine_check = machine_check_e500, 2093 .platform = "ppc8548", 2094 .cpu_down_flush = cpu_down_flush_e500v2, 2095 }, 2096 #else 2097 { /* e500mc */ 2098 .pvr_mask = 0xffff0000, 2099 .pvr_value = 0x80230000, 2100 .cpu_name = "e500mc", 2101 .cpu_features = CPU_FTRS_E500MC, 2102 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2103 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2104 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2105 MMU_FTR_USE_TLBILX, 2106 .icache_bsize = 64, 2107 .dcache_bsize = 64, 2108 .num_pmcs = 4, 2109 .oprofile_cpu_type = "ppc/e500mc", 2110 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2111 .cpu_setup = __setup_cpu_e500mc, 2112 .machine_check = machine_check_e500mc, 2113 .platform = "ppce500mc", 2114 .cpu_down_flush = cpu_down_flush_e500mc, 2115 }, 2116 #endif /* CONFIG_PPC_E500MC */ 2117 #endif /* CONFIG_PPC32 */ 2118 #ifdef CONFIG_PPC_E500MC 2119 { /* e5500 */ 2120 .pvr_mask = 0xffff0000, 2121 .pvr_value = 0x80240000, 2122 .cpu_name = "e5500", 2123 .cpu_features = CPU_FTRS_E5500, 2124 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2125 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2126 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2127 MMU_FTR_USE_TLBILX, 2128 .icache_bsize = 64, 2129 .dcache_bsize = 64, 2130 .num_pmcs = 4, 2131 .oprofile_cpu_type = "ppc/e500mc", 2132 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2133 .cpu_setup = __setup_cpu_e5500, 2134 #ifndef CONFIG_PPC32 2135 .cpu_restore = __restore_cpu_e5500, 2136 #endif 2137 .machine_check = machine_check_e500mc, 2138 .platform = "ppce5500", 2139 .cpu_down_flush = cpu_down_flush_e5500, 2140 }, 2141 { /* e6500 */ 2142 .pvr_mask = 0xffff0000, 2143 .pvr_value = 0x80400000, 2144 .cpu_name = "e6500", 2145 .cpu_features = CPU_FTRS_E6500, 2146 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2147 PPC_FEATURE_HAS_ALTIVEC_COMP, 2148 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2149 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2150 MMU_FTR_USE_TLBILX, 2151 .icache_bsize = 64, 2152 .dcache_bsize = 64, 2153 .num_pmcs = 6, 2154 .oprofile_cpu_type = "ppc/e6500", 2155 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2156 .cpu_setup = __setup_cpu_e6500, 2157 #ifndef CONFIG_PPC32 2158 .cpu_restore = __restore_cpu_e6500, 2159 #endif 2160 .machine_check = machine_check_e500mc, 2161 .platform = "ppce6500", 2162 .cpu_down_flush = cpu_down_flush_e6500, 2163 }, 2164 #endif /* CONFIG_PPC_E500MC */ 2165 #ifdef CONFIG_PPC32 2166 { /* default match */ 2167 .pvr_mask = 0x00000000, 2168 .pvr_value = 0x00000000, 2169 .cpu_name = "(generic E500 PPC)", 2170 .cpu_features = CPU_FTRS_E500, 2171 .cpu_user_features = COMMON_USER_BOOKE | 2172 PPC_FEATURE_HAS_SPE_COMP | 2173 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2174 .mmu_features = MMU_FTR_TYPE_FSL_E, 2175 .icache_bsize = 32, 2176 .dcache_bsize = 32, 2177 .machine_check = machine_check_e500, 2178 .platform = "powerpc", 2179 } 2180 #endif /* CONFIG_PPC32 */ 2181 #endif /* CONFIG_E500 */ 2182 }; 2183 2184 void __init set_cur_cpu_spec(struct cpu_spec *s) 2185 { 2186 struct cpu_spec *t = &the_cpu_spec; 2187 2188 t = PTRRELOC(t); 2189 *t = *s; 2190 2191 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2192 } 2193 2194 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2195 struct cpu_spec *s) 2196 { 2197 struct cpu_spec *t = &the_cpu_spec; 2198 struct cpu_spec old; 2199 2200 t = PTRRELOC(t); 2201 old = *t; 2202 2203 /* Copy everything, then do fixups */ 2204 *t = *s; 2205 2206 /* 2207 * If we are overriding a previous value derived from the real 2208 * PVR with a new value obtained using a logical PVR value, 2209 * don't modify the performance monitor fields. 2210 */ 2211 if (old.num_pmcs && !s->num_pmcs) { 2212 t->num_pmcs = old.num_pmcs; 2213 t->pmc_type = old.pmc_type; 2214 t->oprofile_type = old.oprofile_type; 2215 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2216 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2217 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2218 2219 /* 2220 * If we have passed through this logic once before and 2221 * have pulled the default case because the real PVR was 2222 * not found inside cpu_specs[], then we are possibly 2223 * running in compatibility mode. In that case, let the 2224 * oprofiler know which set of compatibility counters to 2225 * pull from by making sure the oprofile_cpu_type string 2226 * is set to that of compatibility mode. If the 2227 * oprofile_cpu_type already has a value, then we are 2228 * possibly overriding a real PVR with a logical one, 2229 * and, in that case, keep the current value for 2230 * oprofile_cpu_type. 2231 */ 2232 if (old.oprofile_cpu_type != NULL) { 2233 t->oprofile_cpu_type = old.oprofile_cpu_type; 2234 t->oprofile_type = old.oprofile_type; 2235 } 2236 } 2237 2238 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2239 2240 /* 2241 * Set the base platform string once; assumes 2242 * we're called with real pvr first. 2243 */ 2244 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2245 *PTRRELOC(&powerpc_base_platform) = t->platform; 2246 2247 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2248 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2249 * that processor. I will consolidate that at a later time, for now, 2250 * just use #ifdef. We also don't need to PTRRELOC the function 2251 * pointer on ppc64 and booke as we are running at 0 in real mode 2252 * on ppc64 and reloc_offset is always 0 on booke. 2253 */ 2254 if (t->cpu_setup) { 2255 t->cpu_setup(offset, t); 2256 } 2257 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2258 2259 return t; 2260 } 2261 2262 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2263 { 2264 struct cpu_spec *s = cpu_specs; 2265 int i; 2266 2267 s = PTRRELOC(s); 2268 2269 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2270 if ((pvr & s->pvr_mask) == s->pvr_value) 2271 return setup_cpu_spec(offset, s); 2272 } 2273 2274 BUG(); 2275 2276 return NULL; 2277 } 2278 2279 /* 2280 * Used by cpufeatures to get the name for CPUs with a PVR table. 2281 * If they don't hae a PVR table, cpufeatures gets the name from 2282 * cpu device-tree node. 2283 */ 2284 void __init identify_cpu_name(unsigned int pvr) 2285 { 2286 struct cpu_spec *s = cpu_specs; 2287 struct cpu_spec *t = &the_cpu_spec; 2288 int i; 2289 2290 s = PTRRELOC(s); 2291 t = PTRRELOC(t); 2292 2293 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2294 if ((pvr & s->pvr_mask) == s->pvr_value) { 2295 t->cpu_name = s->cpu_name; 2296 return; 2297 } 2298 } 2299 } 2300 2301 2302 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2303 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2304 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2305 }; 2306 EXPORT_SYMBOL_GPL(cpu_feature_keys); 2307 2308 void __init cpu_feature_keys_init(void) 2309 { 2310 int i; 2311 2312 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2313 unsigned long f = 1ul << i; 2314 2315 if (!(cur_cpu_spec->cpu_features & f)) 2316 static_branch_disable(&cpu_feature_keys[i]); 2317 } 2318 } 2319 2320 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2321 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2322 }; 2323 EXPORT_SYMBOL_GPL(mmu_feature_keys); 2324 2325 void __init mmu_feature_keys_init(void) 2326 { 2327 int i; 2328 2329 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2330 unsigned long f = 1ul << i; 2331 2332 if (!(cur_cpu_spec->mmu_features & f)) 2333 static_branch_disable(&mmu_feature_keys[i]); 2334 } 2335 } 2336 #endif 2337