1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/module.h> 18 19 #include <asm/oprofile_impl.h> 20 #include <asm/cputable.h> 21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22 #include <asm/mmu.h> 23 24 struct cpu_spec* cur_cpu_spec = NULL; 25 EXPORT_SYMBOL(cur_cpu_spec); 26 27 /* The platform string corresponding to the real PVR */ 28 const char *powerpc_base_platform; 29 30 /* NOTE: 31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 32 * the responsibility of the appropriate CPU save/restore functions to 33 * eventually copy these settings over. Those save/restore aren't yet 34 * part of the cputable though. That has to be fixed for both ppc32 35 * and ppc64 36 */ 37 #ifdef CONFIG_PPC32 38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 51 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 52 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 60 #endif /* CONFIG_PPC32 */ 61 #ifdef CONFIG_PPC64 62 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 64 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 65 extern void __restore_cpu_pa6t(void); 66 extern void __restore_cpu_ppc970(void); 67 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 68 extern void __restore_cpu_power7(void); 69 #endif /* CONFIG_PPC64 */ 70 #if defined(CONFIG_E500) 71 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 72 extern void __restore_cpu_e5500(void); 73 #endif /* CONFIG_E500 */ 74 75 /* This table only contains "desktop" CPUs, it need to be filled with embedded 76 * ones as well... 77 */ 78 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 79 PPC_FEATURE_HAS_MMU) 80 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 81 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 82 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 83 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 84 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 85 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 86 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 87 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 88 PPC_FEATURE_TRUE_LE | \ 89 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 90 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 91 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 92 PPC_FEATURE_TRUE_LE | \ 93 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 94 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 95 PPC_FEATURE_TRUE_LE | \ 96 PPC_FEATURE_HAS_ALTIVEC_COMP) 97 #ifdef CONFIG_PPC_BOOK3E_64 98 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 99 #else 100 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 101 PPC_FEATURE_BOOKE) 102 #endif 103 104 static struct cpu_spec __initdata cpu_specs[] = { 105 #ifdef CONFIG_PPC_BOOK3S_64 106 { /* Power3 */ 107 .pvr_mask = 0xffff0000, 108 .pvr_value = 0x00400000, 109 .cpu_name = "POWER3 (630)", 110 .cpu_features = CPU_FTRS_POWER3, 111 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 112 .mmu_features = MMU_FTR_HPTE_TABLE, 113 .icache_bsize = 128, 114 .dcache_bsize = 128, 115 .num_pmcs = 8, 116 .pmc_type = PPC_PMC_IBM, 117 .oprofile_cpu_type = "ppc64/power3", 118 .oprofile_type = PPC_OPROFILE_RS64, 119 .machine_check = machine_check_generic, 120 .platform = "power3", 121 }, 122 { /* Power3+ */ 123 .pvr_mask = 0xffff0000, 124 .pvr_value = 0x00410000, 125 .cpu_name = "POWER3 (630+)", 126 .cpu_features = CPU_FTRS_POWER3, 127 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 128 .mmu_features = MMU_FTR_HPTE_TABLE, 129 .icache_bsize = 128, 130 .dcache_bsize = 128, 131 .num_pmcs = 8, 132 .pmc_type = PPC_PMC_IBM, 133 .oprofile_cpu_type = "ppc64/power3", 134 .oprofile_type = PPC_OPROFILE_RS64, 135 .machine_check = machine_check_generic, 136 .platform = "power3", 137 }, 138 { /* Northstar */ 139 .pvr_mask = 0xffff0000, 140 .pvr_value = 0x00330000, 141 .cpu_name = "RS64-II (northstar)", 142 .cpu_features = CPU_FTRS_RS64, 143 .cpu_user_features = COMMON_USER_PPC64, 144 .mmu_features = MMU_FTR_HPTE_TABLE, 145 .icache_bsize = 128, 146 .dcache_bsize = 128, 147 .num_pmcs = 8, 148 .pmc_type = PPC_PMC_IBM, 149 .oprofile_cpu_type = "ppc64/rs64", 150 .oprofile_type = PPC_OPROFILE_RS64, 151 .machine_check = machine_check_generic, 152 .platform = "rs64", 153 }, 154 { /* Pulsar */ 155 .pvr_mask = 0xffff0000, 156 .pvr_value = 0x00340000, 157 .cpu_name = "RS64-III (pulsar)", 158 .cpu_features = CPU_FTRS_RS64, 159 .cpu_user_features = COMMON_USER_PPC64, 160 .mmu_features = MMU_FTR_HPTE_TABLE, 161 .icache_bsize = 128, 162 .dcache_bsize = 128, 163 .num_pmcs = 8, 164 .pmc_type = PPC_PMC_IBM, 165 .oprofile_cpu_type = "ppc64/rs64", 166 .oprofile_type = PPC_OPROFILE_RS64, 167 .machine_check = machine_check_generic, 168 .platform = "rs64", 169 }, 170 { /* I-star */ 171 .pvr_mask = 0xffff0000, 172 .pvr_value = 0x00360000, 173 .cpu_name = "RS64-III (icestar)", 174 .cpu_features = CPU_FTRS_RS64, 175 .cpu_user_features = COMMON_USER_PPC64, 176 .mmu_features = MMU_FTR_HPTE_TABLE, 177 .icache_bsize = 128, 178 .dcache_bsize = 128, 179 .num_pmcs = 8, 180 .pmc_type = PPC_PMC_IBM, 181 .oprofile_cpu_type = "ppc64/rs64", 182 .oprofile_type = PPC_OPROFILE_RS64, 183 .machine_check = machine_check_generic, 184 .platform = "rs64", 185 }, 186 { /* S-star */ 187 .pvr_mask = 0xffff0000, 188 .pvr_value = 0x00370000, 189 .cpu_name = "RS64-IV (sstar)", 190 .cpu_features = CPU_FTRS_RS64, 191 .cpu_user_features = COMMON_USER_PPC64, 192 .mmu_features = MMU_FTR_HPTE_TABLE, 193 .icache_bsize = 128, 194 .dcache_bsize = 128, 195 .num_pmcs = 8, 196 .pmc_type = PPC_PMC_IBM, 197 .oprofile_cpu_type = "ppc64/rs64", 198 .oprofile_type = PPC_OPROFILE_RS64, 199 .machine_check = machine_check_generic, 200 .platform = "rs64", 201 }, 202 { /* Power4 */ 203 .pvr_mask = 0xffff0000, 204 .pvr_value = 0x00350000, 205 .cpu_name = "POWER4 (gp)", 206 .cpu_features = CPU_FTRS_POWER4, 207 .cpu_user_features = COMMON_USER_POWER4, 208 .mmu_features = MMU_FTR_HPTE_TABLE, 209 .icache_bsize = 128, 210 .dcache_bsize = 128, 211 .num_pmcs = 8, 212 .pmc_type = PPC_PMC_IBM, 213 .oprofile_cpu_type = "ppc64/power4", 214 .oprofile_type = PPC_OPROFILE_POWER4, 215 .machine_check = machine_check_generic, 216 .platform = "power4", 217 }, 218 { /* Power4+ */ 219 .pvr_mask = 0xffff0000, 220 .pvr_value = 0x00380000, 221 .cpu_name = "POWER4+ (gq)", 222 .cpu_features = CPU_FTRS_POWER4, 223 .cpu_user_features = COMMON_USER_POWER4, 224 .mmu_features = MMU_FTR_HPTE_TABLE, 225 .icache_bsize = 128, 226 .dcache_bsize = 128, 227 .num_pmcs = 8, 228 .pmc_type = PPC_PMC_IBM, 229 .oprofile_cpu_type = "ppc64/power4", 230 .oprofile_type = PPC_OPROFILE_POWER4, 231 .machine_check = machine_check_generic, 232 .platform = "power4", 233 }, 234 { /* PPC970 */ 235 .pvr_mask = 0xffff0000, 236 .pvr_value = 0x00390000, 237 .cpu_name = "PPC970", 238 .cpu_features = CPU_FTRS_PPC970, 239 .cpu_user_features = COMMON_USER_POWER4 | 240 PPC_FEATURE_HAS_ALTIVEC_COMP, 241 .mmu_features = MMU_FTR_HPTE_TABLE, 242 .icache_bsize = 128, 243 .dcache_bsize = 128, 244 .num_pmcs = 8, 245 .pmc_type = PPC_PMC_IBM, 246 .cpu_setup = __setup_cpu_ppc970, 247 .cpu_restore = __restore_cpu_ppc970, 248 .oprofile_cpu_type = "ppc64/970", 249 .oprofile_type = PPC_OPROFILE_POWER4, 250 .machine_check = machine_check_generic, 251 .platform = "ppc970", 252 }, 253 { /* PPC970FX */ 254 .pvr_mask = 0xffff0000, 255 .pvr_value = 0x003c0000, 256 .cpu_name = "PPC970FX", 257 .cpu_features = CPU_FTRS_PPC970, 258 .cpu_user_features = COMMON_USER_POWER4 | 259 PPC_FEATURE_HAS_ALTIVEC_COMP, 260 .mmu_features = MMU_FTR_HPTE_TABLE, 261 .icache_bsize = 128, 262 .dcache_bsize = 128, 263 .num_pmcs = 8, 264 .pmc_type = PPC_PMC_IBM, 265 .cpu_setup = __setup_cpu_ppc970, 266 .cpu_restore = __restore_cpu_ppc970, 267 .oprofile_cpu_type = "ppc64/970", 268 .oprofile_type = PPC_OPROFILE_POWER4, 269 .machine_check = machine_check_generic, 270 .platform = "ppc970", 271 }, 272 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 273 .pvr_mask = 0xffffffff, 274 .pvr_value = 0x00440100, 275 .cpu_name = "PPC970MP", 276 .cpu_features = CPU_FTRS_PPC970, 277 .cpu_user_features = COMMON_USER_POWER4 | 278 PPC_FEATURE_HAS_ALTIVEC_COMP, 279 .mmu_features = MMU_FTR_HPTE_TABLE, 280 .icache_bsize = 128, 281 .dcache_bsize = 128, 282 .num_pmcs = 8, 283 .pmc_type = PPC_PMC_IBM, 284 .cpu_setup = __setup_cpu_ppc970, 285 .cpu_restore = __restore_cpu_ppc970, 286 .oprofile_cpu_type = "ppc64/970MP", 287 .oprofile_type = PPC_OPROFILE_POWER4, 288 .machine_check = machine_check_generic, 289 .platform = "ppc970", 290 }, 291 { /* PPC970MP */ 292 .pvr_mask = 0xffff0000, 293 .pvr_value = 0x00440000, 294 .cpu_name = "PPC970MP", 295 .cpu_features = CPU_FTRS_PPC970, 296 .cpu_user_features = COMMON_USER_POWER4 | 297 PPC_FEATURE_HAS_ALTIVEC_COMP, 298 .mmu_features = MMU_FTR_HPTE_TABLE, 299 .icache_bsize = 128, 300 .dcache_bsize = 128, 301 .num_pmcs = 8, 302 .pmc_type = PPC_PMC_IBM, 303 .cpu_setup = __setup_cpu_ppc970MP, 304 .cpu_restore = __restore_cpu_ppc970, 305 .oprofile_cpu_type = "ppc64/970MP", 306 .oprofile_type = PPC_OPROFILE_POWER4, 307 .machine_check = machine_check_generic, 308 .platform = "ppc970", 309 }, 310 { /* PPC970GX */ 311 .pvr_mask = 0xffff0000, 312 .pvr_value = 0x00450000, 313 .cpu_name = "PPC970GX", 314 .cpu_features = CPU_FTRS_PPC970, 315 .cpu_user_features = COMMON_USER_POWER4 | 316 PPC_FEATURE_HAS_ALTIVEC_COMP, 317 .mmu_features = MMU_FTR_HPTE_TABLE, 318 .icache_bsize = 128, 319 .dcache_bsize = 128, 320 .num_pmcs = 8, 321 .pmc_type = PPC_PMC_IBM, 322 .cpu_setup = __setup_cpu_ppc970, 323 .oprofile_cpu_type = "ppc64/970", 324 .oprofile_type = PPC_OPROFILE_POWER4, 325 .machine_check = machine_check_generic, 326 .platform = "ppc970", 327 }, 328 { /* Power5 GR */ 329 .pvr_mask = 0xffff0000, 330 .pvr_value = 0x003a0000, 331 .cpu_name = "POWER5 (gr)", 332 .cpu_features = CPU_FTRS_POWER5, 333 .cpu_user_features = COMMON_USER_POWER5, 334 .mmu_features = MMU_FTR_HPTE_TABLE, 335 .icache_bsize = 128, 336 .dcache_bsize = 128, 337 .num_pmcs = 6, 338 .pmc_type = PPC_PMC_IBM, 339 .oprofile_cpu_type = "ppc64/power5", 340 .oprofile_type = PPC_OPROFILE_POWER4, 341 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 342 * and above but only works on POWER5 and above 343 */ 344 .oprofile_mmcra_sihv = MMCRA_SIHV, 345 .oprofile_mmcra_sipr = MMCRA_SIPR, 346 .machine_check = machine_check_generic, 347 .platform = "power5", 348 }, 349 { /* Power5++ */ 350 .pvr_mask = 0xffffff00, 351 .pvr_value = 0x003b0300, 352 .cpu_name = "POWER5+ (gs)", 353 .cpu_features = CPU_FTRS_POWER5, 354 .cpu_user_features = COMMON_USER_POWER5_PLUS, 355 .mmu_features = MMU_FTR_HPTE_TABLE, 356 .icache_bsize = 128, 357 .dcache_bsize = 128, 358 .num_pmcs = 6, 359 .oprofile_cpu_type = "ppc64/power5++", 360 .oprofile_type = PPC_OPROFILE_POWER4, 361 .oprofile_mmcra_sihv = MMCRA_SIHV, 362 .oprofile_mmcra_sipr = MMCRA_SIPR, 363 .machine_check = machine_check_generic, 364 .platform = "power5+", 365 }, 366 { /* Power5 GS */ 367 .pvr_mask = 0xffff0000, 368 .pvr_value = 0x003b0000, 369 .cpu_name = "POWER5+ (gs)", 370 .cpu_features = CPU_FTRS_POWER5, 371 .cpu_user_features = COMMON_USER_POWER5_PLUS, 372 .mmu_features = MMU_FTR_HPTE_TABLE, 373 .icache_bsize = 128, 374 .dcache_bsize = 128, 375 .num_pmcs = 6, 376 .pmc_type = PPC_PMC_IBM, 377 .oprofile_cpu_type = "ppc64/power5+", 378 .oprofile_type = PPC_OPROFILE_POWER4, 379 .oprofile_mmcra_sihv = MMCRA_SIHV, 380 .oprofile_mmcra_sipr = MMCRA_SIPR, 381 .machine_check = machine_check_generic, 382 .platform = "power5+", 383 }, 384 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 385 .pvr_mask = 0xffffffff, 386 .pvr_value = 0x0f000001, 387 .cpu_name = "POWER5+", 388 .cpu_features = CPU_FTRS_POWER5, 389 .cpu_user_features = COMMON_USER_POWER5_PLUS, 390 .mmu_features = MMU_FTR_HPTE_TABLE, 391 .icache_bsize = 128, 392 .dcache_bsize = 128, 393 .machine_check = machine_check_generic, 394 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 395 .oprofile_type = PPC_OPROFILE_POWER4, 396 .platform = "power5+", 397 }, 398 { /* Power6 */ 399 .pvr_mask = 0xffff0000, 400 .pvr_value = 0x003e0000, 401 .cpu_name = "POWER6 (raw)", 402 .cpu_features = CPU_FTRS_POWER6, 403 .cpu_user_features = COMMON_USER_POWER6 | 404 PPC_FEATURE_POWER6_EXT, 405 .mmu_features = MMU_FTR_HPTE_TABLE, 406 .icache_bsize = 128, 407 .dcache_bsize = 128, 408 .num_pmcs = 6, 409 .pmc_type = PPC_PMC_IBM, 410 .oprofile_cpu_type = "ppc64/power6", 411 .oprofile_type = PPC_OPROFILE_POWER4, 412 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 413 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 414 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 415 POWER6_MMCRA_OTHER, 416 .machine_check = machine_check_generic, 417 .platform = "power6x", 418 }, 419 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 420 .pvr_mask = 0xffffffff, 421 .pvr_value = 0x0f000002, 422 .cpu_name = "POWER6 (architected)", 423 .cpu_features = CPU_FTRS_POWER6, 424 .cpu_user_features = COMMON_USER_POWER6, 425 .mmu_features = MMU_FTR_HPTE_TABLE, 426 .icache_bsize = 128, 427 .dcache_bsize = 128, 428 .machine_check = machine_check_generic, 429 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 430 .oprofile_type = PPC_OPROFILE_POWER4, 431 .platform = "power6", 432 }, 433 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 434 .pvr_mask = 0xffffffff, 435 .pvr_value = 0x0f000003, 436 .cpu_name = "POWER7 (architected)", 437 .cpu_features = CPU_FTRS_POWER7, 438 .cpu_user_features = COMMON_USER_POWER7, 439 .mmu_features = MMU_FTR_HPTE_TABLE | 440 MMU_FTR_TLBIE_206, 441 .icache_bsize = 128, 442 .dcache_bsize = 128, 443 .machine_check = machine_check_generic, 444 .oprofile_type = PPC_OPROFILE_POWER4, 445 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 446 .platform = "power7", 447 }, 448 { /* Power7 */ 449 .pvr_mask = 0xffff0000, 450 .pvr_value = 0x003f0000, 451 .cpu_name = "POWER7 (raw)", 452 .cpu_features = CPU_FTRS_POWER7, 453 .cpu_user_features = COMMON_USER_POWER7, 454 .mmu_features = MMU_FTR_HPTE_TABLE | 455 MMU_FTR_TLBIE_206, 456 .icache_bsize = 128, 457 .dcache_bsize = 128, 458 .num_pmcs = 6, 459 .pmc_type = PPC_PMC_IBM, 460 .cpu_setup = __setup_cpu_power7, 461 .cpu_restore = __restore_cpu_power7, 462 .oprofile_cpu_type = "ppc64/power7", 463 .oprofile_type = PPC_OPROFILE_POWER4, 464 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 465 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 466 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 467 POWER6_MMCRA_OTHER, 468 .platform = "power7", 469 }, 470 { /* Cell Broadband Engine */ 471 .pvr_mask = 0xffff0000, 472 .pvr_value = 0x00700000, 473 .cpu_name = "Cell Broadband Engine", 474 .cpu_features = CPU_FTRS_CELL, 475 .cpu_user_features = COMMON_USER_PPC64 | 476 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 477 PPC_FEATURE_SMT, 478 .mmu_features = MMU_FTR_HPTE_TABLE, 479 .icache_bsize = 128, 480 .dcache_bsize = 128, 481 .num_pmcs = 4, 482 .pmc_type = PPC_PMC_IBM, 483 .oprofile_cpu_type = "ppc64/cell-be", 484 .oprofile_type = PPC_OPROFILE_CELL, 485 .machine_check = machine_check_generic, 486 .platform = "ppc-cell-be", 487 }, 488 { /* PA Semi PA6T */ 489 .pvr_mask = 0x7fff0000, 490 .pvr_value = 0x00900000, 491 .cpu_name = "PA6T", 492 .cpu_features = CPU_FTRS_PA6T, 493 .cpu_user_features = COMMON_USER_PA6T, 494 .mmu_features = MMU_FTR_HPTE_TABLE, 495 .icache_bsize = 64, 496 .dcache_bsize = 64, 497 .num_pmcs = 6, 498 .pmc_type = PPC_PMC_PA6T, 499 .cpu_setup = __setup_cpu_pa6t, 500 .cpu_restore = __restore_cpu_pa6t, 501 .oprofile_cpu_type = "ppc64/pa6t", 502 .oprofile_type = PPC_OPROFILE_PA6T, 503 .machine_check = machine_check_generic, 504 .platform = "pa6t", 505 }, 506 { /* default match */ 507 .pvr_mask = 0x00000000, 508 .pvr_value = 0x00000000, 509 .cpu_name = "POWER4 (compatible)", 510 .cpu_features = CPU_FTRS_COMPATIBLE, 511 .cpu_user_features = COMMON_USER_PPC64, 512 .mmu_features = MMU_FTR_HPTE_TABLE, 513 .icache_bsize = 128, 514 .dcache_bsize = 128, 515 .num_pmcs = 6, 516 .pmc_type = PPC_PMC_IBM, 517 .machine_check = machine_check_generic, 518 .platform = "power4", 519 } 520 #endif /* CONFIG_PPC_BOOK3S_64 */ 521 522 #ifdef CONFIG_PPC32 523 #if CLASSIC_PPC 524 { /* 601 */ 525 .pvr_mask = 0xffff0000, 526 .pvr_value = 0x00010000, 527 .cpu_name = "601", 528 .cpu_features = CPU_FTRS_PPC601, 529 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 530 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 531 .mmu_features = MMU_FTR_HPTE_TABLE, 532 .icache_bsize = 32, 533 .dcache_bsize = 32, 534 .machine_check = machine_check_generic, 535 .platform = "ppc601", 536 }, 537 { /* 603 */ 538 .pvr_mask = 0xffff0000, 539 .pvr_value = 0x00030000, 540 .cpu_name = "603", 541 .cpu_features = CPU_FTRS_603, 542 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 543 .mmu_features = 0, 544 .icache_bsize = 32, 545 .dcache_bsize = 32, 546 .cpu_setup = __setup_cpu_603, 547 .machine_check = machine_check_generic, 548 .platform = "ppc603", 549 }, 550 { /* 603e */ 551 .pvr_mask = 0xffff0000, 552 .pvr_value = 0x00060000, 553 .cpu_name = "603e", 554 .cpu_features = CPU_FTRS_603, 555 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 556 .mmu_features = 0, 557 .icache_bsize = 32, 558 .dcache_bsize = 32, 559 .cpu_setup = __setup_cpu_603, 560 .machine_check = machine_check_generic, 561 .platform = "ppc603", 562 }, 563 { /* 603ev */ 564 .pvr_mask = 0xffff0000, 565 .pvr_value = 0x00070000, 566 .cpu_name = "603ev", 567 .cpu_features = CPU_FTRS_603, 568 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 569 .mmu_features = 0, 570 .icache_bsize = 32, 571 .dcache_bsize = 32, 572 .cpu_setup = __setup_cpu_603, 573 .machine_check = machine_check_generic, 574 .platform = "ppc603", 575 }, 576 { /* 604 */ 577 .pvr_mask = 0xffff0000, 578 .pvr_value = 0x00040000, 579 .cpu_name = "604", 580 .cpu_features = CPU_FTRS_604, 581 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 582 .mmu_features = MMU_FTR_HPTE_TABLE, 583 .icache_bsize = 32, 584 .dcache_bsize = 32, 585 .num_pmcs = 2, 586 .cpu_setup = __setup_cpu_604, 587 .machine_check = machine_check_generic, 588 .platform = "ppc604", 589 }, 590 { /* 604e */ 591 .pvr_mask = 0xfffff000, 592 .pvr_value = 0x00090000, 593 .cpu_name = "604e", 594 .cpu_features = CPU_FTRS_604, 595 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 596 .mmu_features = MMU_FTR_HPTE_TABLE, 597 .icache_bsize = 32, 598 .dcache_bsize = 32, 599 .num_pmcs = 4, 600 .cpu_setup = __setup_cpu_604, 601 .machine_check = machine_check_generic, 602 .platform = "ppc604", 603 }, 604 { /* 604r */ 605 .pvr_mask = 0xffff0000, 606 .pvr_value = 0x00090000, 607 .cpu_name = "604r", 608 .cpu_features = CPU_FTRS_604, 609 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 610 .mmu_features = MMU_FTR_HPTE_TABLE, 611 .icache_bsize = 32, 612 .dcache_bsize = 32, 613 .num_pmcs = 4, 614 .cpu_setup = __setup_cpu_604, 615 .machine_check = machine_check_generic, 616 .platform = "ppc604", 617 }, 618 { /* 604ev */ 619 .pvr_mask = 0xffff0000, 620 .pvr_value = 0x000a0000, 621 .cpu_name = "604ev", 622 .cpu_features = CPU_FTRS_604, 623 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 624 .mmu_features = MMU_FTR_HPTE_TABLE, 625 .icache_bsize = 32, 626 .dcache_bsize = 32, 627 .num_pmcs = 4, 628 .cpu_setup = __setup_cpu_604, 629 .machine_check = machine_check_generic, 630 .platform = "ppc604", 631 }, 632 { /* 740/750 (0x4202, don't support TAU ?) */ 633 .pvr_mask = 0xffffffff, 634 .pvr_value = 0x00084202, 635 .cpu_name = "740/750", 636 .cpu_features = CPU_FTRS_740_NOTAU, 637 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 638 .mmu_features = MMU_FTR_HPTE_TABLE, 639 .icache_bsize = 32, 640 .dcache_bsize = 32, 641 .num_pmcs = 4, 642 .cpu_setup = __setup_cpu_750, 643 .machine_check = machine_check_generic, 644 .platform = "ppc750", 645 }, 646 { /* 750CX (80100 and 8010x?) */ 647 .pvr_mask = 0xfffffff0, 648 .pvr_value = 0x00080100, 649 .cpu_name = "750CX", 650 .cpu_features = CPU_FTRS_750, 651 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 652 .mmu_features = MMU_FTR_HPTE_TABLE, 653 .icache_bsize = 32, 654 .dcache_bsize = 32, 655 .num_pmcs = 4, 656 .cpu_setup = __setup_cpu_750cx, 657 .machine_check = machine_check_generic, 658 .platform = "ppc750", 659 }, 660 { /* 750CX (82201 and 82202) */ 661 .pvr_mask = 0xfffffff0, 662 .pvr_value = 0x00082200, 663 .cpu_name = "750CX", 664 .cpu_features = CPU_FTRS_750, 665 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 666 .mmu_features = MMU_FTR_HPTE_TABLE, 667 .icache_bsize = 32, 668 .dcache_bsize = 32, 669 .num_pmcs = 4, 670 .pmc_type = PPC_PMC_IBM, 671 .cpu_setup = __setup_cpu_750cx, 672 .machine_check = machine_check_generic, 673 .platform = "ppc750", 674 }, 675 { /* 750CXe (82214) */ 676 .pvr_mask = 0xfffffff0, 677 .pvr_value = 0x00082210, 678 .cpu_name = "750CXe", 679 .cpu_features = CPU_FTRS_750, 680 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 681 .mmu_features = MMU_FTR_HPTE_TABLE, 682 .icache_bsize = 32, 683 .dcache_bsize = 32, 684 .num_pmcs = 4, 685 .pmc_type = PPC_PMC_IBM, 686 .cpu_setup = __setup_cpu_750cx, 687 .machine_check = machine_check_generic, 688 .platform = "ppc750", 689 }, 690 { /* 750CXe "Gekko" (83214) */ 691 .pvr_mask = 0xffffffff, 692 .pvr_value = 0x00083214, 693 .cpu_name = "750CXe", 694 .cpu_features = CPU_FTRS_750, 695 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 696 .mmu_features = MMU_FTR_HPTE_TABLE, 697 .icache_bsize = 32, 698 .dcache_bsize = 32, 699 .num_pmcs = 4, 700 .pmc_type = PPC_PMC_IBM, 701 .cpu_setup = __setup_cpu_750cx, 702 .machine_check = machine_check_generic, 703 .platform = "ppc750", 704 }, 705 { /* 750CL (and "Broadway") */ 706 .pvr_mask = 0xfffff0e0, 707 .pvr_value = 0x00087000, 708 .cpu_name = "750CL", 709 .cpu_features = CPU_FTRS_750CL, 710 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 711 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 712 .icache_bsize = 32, 713 .dcache_bsize = 32, 714 .num_pmcs = 4, 715 .pmc_type = PPC_PMC_IBM, 716 .cpu_setup = __setup_cpu_750, 717 .machine_check = machine_check_generic, 718 .platform = "ppc750", 719 .oprofile_cpu_type = "ppc/750", 720 .oprofile_type = PPC_OPROFILE_G4, 721 }, 722 { /* 745/755 */ 723 .pvr_mask = 0xfffff000, 724 .pvr_value = 0x00083000, 725 .cpu_name = "745/755", 726 .cpu_features = CPU_FTRS_750, 727 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 728 .mmu_features = MMU_FTR_HPTE_TABLE, 729 .icache_bsize = 32, 730 .dcache_bsize = 32, 731 .num_pmcs = 4, 732 .pmc_type = PPC_PMC_IBM, 733 .cpu_setup = __setup_cpu_750, 734 .machine_check = machine_check_generic, 735 .platform = "ppc750", 736 }, 737 { /* 750FX rev 1.x */ 738 .pvr_mask = 0xffffff00, 739 .pvr_value = 0x70000100, 740 .cpu_name = "750FX", 741 .cpu_features = CPU_FTRS_750FX1, 742 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 743 .mmu_features = MMU_FTR_HPTE_TABLE, 744 .icache_bsize = 32, 745 .dcache_bsize = 32, 746 .num_pmcs = 4, 747 .pmc_type = PPC_PMC_IBM, 748 .cpu_setup = __setup_cpu_750, 749 .machine_check = machine_check_generic, 750 .platform = "ppc750", 751 .oprofile_cpu_type = "ppc/750", 752 .oprofile_type = PPC_OPROFILE_G4, 753 }, 754 { /* 750FX rev 2.0 must disable HID0[DPM] */ 755 .pvr_mask = 0xffffffff, 756 .pvr_value = 0x70000200, 757 .cpu_name = "750FX", 758 .cpu_features = CPU_FTRS_750FX2, 759 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 760 .mmu_features = MMU_FTR_HPTE_TABLE, 761 .icache_bsize = 32, 762 .dcache_bsize = 32, 763 .num_pmcs = 4, 764 .pmc_type = PPC_PMC_IBM, 765 .cpu_setup = __setup_cpu_750, 766 .machine_check = machine_check_generic, 767 .platform = "ppc750", 768 .oprofile_cpu_type = "ppc/750", 769 .oprofile_type = PPC_OPROFILE_G4, 770 }, 771 { /* 750FX (All revs except 2.0) */ 772 .pvr_mask = 0xffff0000, 773 .pvr_value = 0x70000000, 774 .cpu_name = "750FX", 775 .cpu_features = CPU_FTRS_750FX, 776 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 777 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 778 .icache_bsize = 32, 779 .dcache_bsize = 32, 780 .num_pmcs = 4, 781 .pmc_type = PPC_PMC_IBM, 782 .cpu_setup = __setup_cpu_750fx, 783 .machine_check = machine_check_generic, 784 .platform = "ppc750", 785 .oprofile_cpu_type = "ppc/750", 786 .oprofile_type = PPC_OPROFILE_G4, 787 }, 788 { /* 750GX */ 789 .pvr_mask = 0xffff0000, 790 .pvr_value = 0x70020000, 791 .cpu_name = "750GX", 792 .cpu_features = CPU_FTRS_750GX, 793 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 794 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 795 .icache_bsize = 32, 796 .dcache_bsize = 32, 797 .num_pmcs = 4, 798 .pmc_type = PPC_PMC_IBM, 799 .cpu_setup = __setup_cpu_750fx, 800 .machine_check = machine_check_generic, 801 .platform = "ppc750", 802 .oprofile_cpu_type = "ppc/750", 803 .oprofile_type = PPC_OPROFILE_G4, 804 }, 805 { /* 740/750 (L2CR bit need fixup for 740) */ 806 .pvr_mask = 0xffff0000, 807 .pvr_value = 0x00080000, 808 .cpu_name = "740/750", 809 .cpu_features = CPU_FTRS_740, 810 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 811 .mmu_features = MMU_FTR_HPTE_TABLE, 812 .icache_bsize = 32, 813 .dcache_bsize = 32, 814 .num_pmcs = 4, 815 .pmc_type = PPC_PMC_IBM, 816 .cpu_setup = __setup_cpu_750, 817 .machine_check = machine_check_generic, 818 .platform = "ppc750", 819 }, 820 { /* 7400 rev 1.1 ? (no TAU) */ 821 .pvr_mask = 0xffffffff, 822 .pvr_value = 0x000c1101, 823 .cpu_name = "7400 (1.1)", 824 .cpu_features = CPU_FTRS_7400_NOTAU, 825 .cpu_user_features = COMMON_USER | 826 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 827 .mmu_features = MMU_FTR_HPTE_TABLE, 828 .icache_bsize = 32, 829 .dcache_bsize = 32, 830 .num_pmcs = 4, 831 .pmc_type = PPC_PMC_G4, 832 .cpu_setup = __setup_cpu_7400, 833 .machine_check = machine_check_generic, 834 .platform = "ppc7400", 835 }, 836 { /* 7400 */ 837 .pvr_mask = 0xffff0000, 838 .pvr_value = 0x000c0000, 839 .cpu_name = "7400", 840 .cpu_features = CPU_FTRS_7400, 841 .cpu_user_features = COMMON_USER | 842 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 843 .mmu_features = MMU_FTR_HPTE_TABLE, 844 .icache_bsize = 32, 845 .dcache_bsize = 32, 846 .num_pmcs = 4, 847 .pmc_type = PPC_PMC_G4, 848 .cpu_setup = __setup_cpu_7400, 849 .machine_check = machine_check_generic, 850 .platform = "ppc7400", 851 }, 852 { /* 7410 */ 853 .pvr_mask = 0xffff0000, 854 .pvr_value = 0x800c0000, 855 .cpu_name = "7410", 856 .cpu_features = CPU_FTRS_7400, 857 .cpu_user_features = COMMON_USER | 858 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 859 .mmu_features = MMU_FTR_HPTE_TABLE, 860 .icache_bsize = 32, 861 .dcache_bsize = 32, 862 .num_pmcs = 4, 863 .pmc_type = PPC_PMC_G4, 864 .cpu_setup = __setup_cpu_7410, 865 .machine_check = machine_check_generic, 866 .platform = "ppc7400", 867 }, 868 { /* 7450 2.0 - no doze/nap */ 869 .pvr_mask = 0xffffffff, 870 .pvr_value = 0x80000200, 871 .cpu_name = "7450", 872 .cpu_features = CPU_FTRS_7450_20, 873 .cpu_user_features = COMMON_USER | 874 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 875 .mmu_features = MMU_FTR_HPTE_TABLE, 876 .icache_bsize = 32, 877 .dcache_bsize = 32, 878 .num_pmcs = 6, 879 .pmc_type = PPC_PMC_G4, 880 .cpu_setup = __setup_cpu_745x, 881 .oprofile_cpu_type = "ppc/7450", 882 .oprofile_type = PPC_OPROFILE_G4, 883 .machine_check = machine_check_generic, 884 .platform = "ppc7450", 885 }, 886 { /* 7450 2.1 */ 887 .pvr_mask = 0xffffffff, 888 .pvr_value = 0x80000201, 889 .cpu_name = "7450", 890 .cpu_features = CPU_FTRS_7450_21, 891 .cpu_user_features = COMMON_USER | 892 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 893 .mmu_features = MMU_FTR_HPTE_TABLE, 894 .icache_bsize = 32, 895 .dcache_bsize = 32, 896 .num_pmcs = 6, 897 .pmc_type = PPC_PMC_G4, 898 .cpu_setup = __setup_cpu_745x, 899 .oprofile_cpu_type = "ppc/7450", 900 .oprofile_type = PPC_OPROFILE_G4, 901 .machine_check = machine_check_generic, 902 .platform = "ppc7450", 903 }, 904 { /* 7450 2.3 and newer */ 905 .pvr_mask = 0xffff0000, 906 .pvr_value = 0x80000000, 907 .cpu_name = "7450", 908 .cpu_features = CPU_FTRS_7450_23, 909 .cpu_user_features = COMMON_USER | 910 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 911 .mmu_features = MMU_FTR_HPTE_TABLE, 912 .icache_bsize = 32, 913 .dcache_bsize = 32, 914 .num_pmcs = 6, 915 .pmc_type = PPC_PMC_G4, 916 .cpu_setup = __setup_cpu_745x, 917 .oprofile_cpu_type = "ppc/7450", 918 .oprofile_type = PPC_OPROFILE_G4, 919 .machine_check = machine_check_generic, 920 .platform = "ppc7450", 921 }, 922 { /* 7455 rev 1.x */ 923 .pvr_mask = 0xffffff00, 924 .pvr_value = 0x80010100, 925 .cpu_name = "7455", 926 .cpu_features = CPU_FTRS_7455_1, 927 .cpu_user_features = COMMON_USER | 928 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 929 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 930 .icache_bsize = 32, 931 .dcache_bsize = 32, 932 .num_pmcs = 6, 933 .pmc_type = PPC_PMC_G4, 934 .cpu_setup = __setup_cpu_745x, 935 .oprofile_cpu_type = "ppc/7450", 936 .oprofile_type = PPC_OPROFILE_G4, 937 .machine_check = machine_check_generic, 938 .platform = "ppc7450", 939 }, 940 { /* 7455 rev 2.0 */ 941 .pvr_mask = 0xffffffff, 942 .pvr_value = 0x80010200, 943 .cpu_name = "7455", 944 .cpu_features = CPU_FTRS_7455_20, 945 .cpu_user_features = COMMON_USER | 946 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 947 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 948 .icache_bsize = 32, 949 .dcache_bsize = 32, 950 .num_pmcs = 6, 951 .pmc_type = PPC_PMC_G4, 952 .cpu_setup = __setup_cpu_745x, 953 .oprofile_cpu_type = "ppc/7450", 954 .oprofile_type = PPC_OPROFILE_G4, 955 .machine_check = machine_check_generic, 956 .platform = "ppc7450", 957 }, 958 { /* 7455 others */ 959 .pvr_mask = 0xffff0000, 960 .pvr_value = 0x80010000, 961 .cpu_name = "7455", 962 .cpu_features = CPU_FTRS_7455, 963 .cpu_user_features = COMMON_USER | 964 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 965 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 966 .icache_bsize = 32, 967 .dcache_bsize = 32, 968 .num_pmcs = 6, 969 .pmc_type = PPC_PMC_G4, 970 .cpu_setup = __setup_cpu_745x, 971 .oprofile_cpu_type = "ppc/7450", 972 .oprofile_type = PPC_OPROFILE_G4, 973 .machine_check = machine_check_generic, 974 .platform = "ppc7450", 975 }, 976 { /* 7447/7457 Rev 1.0 */ 977 .pvr_mask = 0xffffffff, 978 .pvr_value = 0x80020100, 979 .cpu_name = "7447/7457", 980 .cpu_features = CPU_FTRS_7447_10, 981 .cpu_user_features = COMMON_USER | 982 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 983 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 984 .icache_bsize = 32, 985 .dcache_bsize = 32, 986 .num_pmcs = 6, 987 .pmc_type = PPC_PMC_G4, 988 .cpu_setup = __setup_cpu_745x, 989 .oprofile_cpu_type = "ppc/7450", 990 .oprofile_type = PPC_OPROFILE_G4, 991 .machine_check = machine_check_generic, 992 .platform = "ppc7450", 993 }, 994 { /* 7447/7457 Rev 1.1 */ 995 .pvr_mask = 0xffffffff, 996 .pvr_value = 0x80020101, 997 .cpu_name = "7447/7457", 998 .cpu_features = CPU_FTRS_7447_10, 999 .cpu_user_features = COMMON_USER | 1000 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1001 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1002 .icache_bsize = 32, 1003 .dcache_bsize = 32, 1004 .num_pmcs = 6, 1005 .pmc_type = PPC_PMC_G4, 1006 .cpu_setup = __setup_cpu_745x, 1007 .oprofile_cpu_type = "ppc/7450", 1008 .oprofile_type = PPC_OPROFILE_G4, 1009 .machine_check = machine_check_generic, 1010 .platform = "ppc7450", 1011 }, 1012 { /* 7447/7457 Rev 1.2 and later */ 1013 .pvr_mask = 0xffff0000, 1014 .pvr_value = 0x80020000, 1015 .cpu_name = "7447/7457", 1016 .cpu_features = CPU_FTRS_7447, 1017 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1018 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1019 .icache_bsize = 32, 1020 .dcache_bsize = 32, 1021 .num_pmcs = 6, 1022 .pmc_type = PPC_PMC_G4, 1023 .cpu_setup = __setup_cpu_745x, 1024 .oprofile_cpu_type = "ppc/7450", 1025 .oprofile_type = PPC_OPROFILE_G4, 1026 .machine_check = machine_check_generic, 1027 .platform = "ppc7450", 1028 }, 1029 { /* 7447A */ 1030 .pvr_mask = 0xffff0000, 1031 .pvr_value = 0x80030000, 1032 .cpu_name = "7447A", 1033 .cpu_features = CPU_FTRS_7447A, 1034 .cpu_user_features = COMMON_USER | 1035 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1036 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1037 .icache_bsize = 32, 1038 .dcache_bsize = 32, 1039 .num_pmcs = 6, 1040 .pmc_type = PPC_PMC_G4, 1041 .cpu_setup = __setup_cpu_745x, 1042 .oprofile_cpu_type = "ppc/7450", 1043 .oprofile_type = PPC_OPROFILE_G4, 1044 .machine_check = machine_check_generic, 1045 .platform = "ppc7450", 1046 }, 1047 { /* 7448 */ 1048 .pvr_mask = 0xffff0000, 1049 .pvr_value = 0x80040000, 1050 .cpu_name = "7448", 1051 .cpu_features = CPU_FTRS_7448, 1052 .cpu_user_features = COMMON_USER | 1053 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1054 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1055 .icache_bsize = 32, 1056 .dcache_bsize = 32, 1057 .num_pmcs = 6, 1058 .pmc_type = PPC_PMC_G4, 1059 .cpu_setup = __setup_cpu_745x, 1060 .oprofile_cpu_type = "ppc/7450", 1061 .oprofile_type = PPC_OPROFILE_G4, 1062 .machine_check = machine_check_generic, 1063 .platform = "ppc7450", 1064 }, 1065 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1066 .pvr_mask = 0x7fff0000, 1067 .pvr_value = 0x00810000, 1068 .cpu_name = "82xx", 1069 .cpu_features = CPU_FTRS_82XX, 1070 .cpu_user_features = COMMON_USER, 1071 .mmu_features = 0, 1072 .icache_bsize = 32, 1073 .dcache_bsize = 32, 1074 .cpu_setup = __setup_cpu_603, 1075 .machine_check = machine_check_generic, 1076 .platform = "ppc603", 1077 }, 1078 { /* All G2_LE (603e core, plus some) have the same pvr */ 1079 .pvr_mask = 0x7fff0000, 1080 .pvr_value = 0x00820000, 1081 .cpu_name = "G2_LE", 1082 .cpu_features = CPU_FTRS_G2_LE, 1083 .cpu_user_features = COMMON_USER, 1084 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1085 .icache_bsize = 32, 1086 .dcache_bsize = 32, 1087 .cpu_setup = __setup_cpu_603, 1088 .machine_check = machine_check_generic, 1089 .platform = "ppc603", 1090 }, 1091 { /* e300c1 (a 603e core, plus some) on 83xx */ 1092 .pvr_mask = 0x7fff0000, 1093 .pvr_value = 0x00830000, 1094 .cpu_name = "e300c1", 1095 .cpu_features = CPU_FTRS_E300, 1096 .cpu_user_features = COMMON_USER, 1097 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1098 .icache_bsize = 32, 1099 .dcache_bsize = 32, 1100 .cpu_setup = __setup_cpu_603, 1101 .machine_check = machine_check_generic, 1102 .platform = "ppc603", 1103 }, 1104 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1105 .pvr_mask = 0x7fff0000, 1106 .pvr_value = 0x00840000, 1107 .cpu_name = "e300c2", 1108 .cpu_features = CPU_FTRS_E300C2, 1109 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1110 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1111 MMU_FTR_NEED_DTLB_SW_LRU, 1112 .icache_bsize = 32, 1113 .dcache_bsize = 32, 1114 .cpu_setup = __setup_cpu_603, 1115 .machine_check = machine_check_generic, 1116 .platform = "ppc603", 1117 }, 1118 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1119 .pvr_mask = 0x7fff0000, 1120 .pvr_value = 0x00850000, 1121 .cpu_name = "e300c3", 1122 .cpu_features = CPU_FTRS_E300, 1123 .cpu_user_features = COMMON_USER, 1124 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1125 MMU_FTR_NEED_DTLB_SW_LRU, 1126 .icache_bsize = 32, 1127 .dcache_bsize = 32, 1128 .cpu_setup = __setup_cpu_603, 1129 .num_pmcs = 4, 1130 .oprofile_cpu_type = "ppc/e300", 1131 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1132 .platform = "ppc603", 1133 }, 1134 { /* e300c4 (e300c1, plus one IU) */ 1135 .pvr_mask = 0x7fff0000, 1136 .pvr_value = 0x00860000, 1137 .cpu_name = "e300c4", 1138 .cpu_features = CPU_FTRS_E300, 1139 .cpu_user_features = COMMON_USER, 1140 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1141 MMU_FTR_NEED_DTLB_SW_LRU, 1142 .icache_bsize = 32, 1143 .dcache_bsize = 32, 1144 .cpu_setup = __setup_cpu_603, 1145 .machine_check = machine_check_generic, 1146 .num_pmcs = 4, 1147 .oprofile_cpu_type = "ppc/e300", 1148 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1149 .platform = "ppc603", 1150 }, 1151 { /* default match, we assume split I/D cache & TB (non-601)... */ 1152 .pvr_mask = 0x00000000, 1153 .pvr_value = 0x00000000, 1154 .cpu_name = "(generic PPC)", 1155 .cpu_features = CPU_FTRS_CLASSIC32, 1156 .cpu_user_features = COMMON_USER, 1157 .mmu_features = MMU_FTR_HPTE_TABLE, 1158 .icache_bsize = 32, 1159 .dcache_bsize = 32, 1160 .machine_check = machine_check_generic, 1161 .platform = "ppc603", 1162 }, 1163 #endif /* CLASSIC_PPC */ 1164 #ifdef CONFIG_8xx 1165 { /* 8xx */ 1166 .pvr_mask = 0xffff0000, 1167 .pvr_value = 0x00500000, 1168 .cpu_name = "8xx", 1169 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1170 * if the 8xx code is there.... */ 1171 .cpu_features = CPU_FTRS_8XX, 1172 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1173 .mmu_features = MMU_FTR_TYPE_8xx, 1174 .icache_bsize = 16, 1175 .dcache_bsize = 16, 1176 .platform = "ppc823", 1177 }, 1178 #endif /* CONFIG_8xx */ 1179 #ifdef CONFIG_40x 1180 { /* 403GC */ 1181 .pvr_mask = 0xffffff00, 1182 .pvr_value = 0x00200200, 1183 .cpu_name = "403GC", 1184 .cpu_features = CPU_FTRS_40X, 1185 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1186 .mmu_features = MMU_FTR_TYPE_40x, 1187 .icache_bsize = 16, 1188 .dcache_bsize = 16, 1189 .machine_check = machine_check_4xx, 1190 .platform = "ppc403", 1191 }, 1192 { /* 403GCX */ 1193 .pvr_mask = 0xffffff00, 1194 .pvr_value = 0x00201400, 1195 .cpu_name = "403GCX", 1196 .cpu_features = CPU_FTRS_40X, 1197 .cpu_user_features = PPC_FEATURE_32 | 1198 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1199 .mmu_features = MMU_FTR_TYPE_40x, 1200 .icache_bsize = 16, 1201 .dcache_bsize = 16, 1202 .machine_check = machine_check_4xx, 1203 .platform = "ppc403", 1204 }, 1205 { /* 403G ?? */ 1206 .pvr_mask = 0xffff0000, 1207 .pvr_value = 0x00200000, 1208 .cpu_name = "403G ??", 1209 .cpu_features = CPU_FTRS_40X, 1210 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1211 .mmu_features = MMU_FTR_TYPE_40x, 1212 .icache_bsize = 16, 1213 .dcache_bsize = 16, 1214 .machine_check = machine_check_4xx, 1215 .platform = "ppc403", 1216 }, 1217 { /* 405GP */ 1218 .pvr_mask = 0xffff0000, 1219 .pvr_value = 0x40110000, 1220 .cpu_name = "405GP", 1221 .cpu_features = CPU_FTRS_40X, 1222 .cpu_user_features = PPC_FEATURE_32 | 1223 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1224 .mmu_features = MMU_FTR_TYPE_40x, 1225 .icache_bsize = 32, 1226 .dcache_bsize = 32, 1227 .machine_check = machine_check_4xx, 1228 .platform = "ppc405", 1229 }, 1230 { /* STB 03xxx */ 1231 .pvr_mask = 0xffff0000, 1232 .pvr_value = 0x40130000, 1233 .cpu_name = "STB03xxx", 1234 .cpu_features = CPU_FTRS_40X, 1235 .cpu_user_features = PPC_FEATURE_32 | 1236 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1237 .mmu_features = MMU_FTR_TYPE_40x, 1238 .icache_bsize = 32, 1239 .dcache_bsize = 32, 1240 .machine_check = machine_check_4xx, 1241 .platform = "ppc405", 1242 }, 1243 { /* STB 04xxx */ 1244 .pvr_mask = 0xffff0000, 1245 .pvr_value = 0x41810000, 1246 .cpu_name = "STB04xxx", 1247 .cpu_features = CPU_FTRS_40X, 1248 .cpu_user_features = PPC_FEATURE_32 | 1249 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1250 .mmu_features = MMU_FTR_TYPE_40x, 1251 .icache_bsize = 32, 1252 .dcache_bsize = 32, 1253 .machine_check = machine_check_4xx, 1254 .platform = "ppc405", 1255 }, 1256 { /* NP405L */ 1257 .pvr_mask = 0xffff0000, 1258 .pvr_value = 0x41610000, 1259 .cpu_name = "NP405L", 1260 .cpu_features = CPU_FTRS_40X, 1261 .cpu_user_features = PPC_FEATURE_32 | 1262 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1263 .mmu_features = MMU_FTR_TYPE_40x, 1264 .icache_bsize = 32, 1265 .dcache_bsize = 32, 1266 .machine_check = machine_check_4xx, 1267 .platform = "ppc405", 1268 }, 1269 { /* NP4GS3 */ 1270 .pvr_mask = 0xffff0000, 1271 .pvr_value = 0x40B10000, 1272 .cpu_name = "NP4GS3", 1273 .cpu_features = CPU_FTRS_40X, 1274 .cpu_user_features = PPC_FEATURE_32 | 1275 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1276 .mmu_features = MMU_FTR_TYPE_40x, 1277 .icache_bsize = 32, 1278 .dcache_bsize = 32, 1279 .machine_check = machine_check_4xx, 1280 .platform = "ppc405", 1281 }, 1282 { /* NP405H */ 1283 .pvr_mask = 0xffff0000, 1284 .pvr_value = 0x41410000, 1285 .cpu_name = "NP405H", 1286 .cpu_features = CPU_FTRS_40X, 1287 .cpu_user_features = PPC_FEATURE_32 | 1288 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1289 .mmu_features = MMU_FTR_TYPE_40x, 1290 .icache_bsize = 32, 1291 .dcache_bsize = 32, 1292 .machine_check = machine_check_4xx, 1293 .platform = "ppc405", 1294 }, 1295 { /* 405GPr */ 1296 .pvr_mask = 0xffff0000, 1297 .pvr_value = 0x50910000, 1298 .cpu_name = "405GPr", 1299 .cpu_features = CPU_FTRS_40X, 1300 .cpu_user_features = PPC_FEATURE_32 | 1301 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1302 .mmu_features = MMU_FTR_TYPE_40x, 1303 .icache_bsize = 32, 1304 .dcache_bsize = 32, 1305 .machine_check = machine_check_4xx, 1306 .platform = "ppc405", 1307 }, 1308 { /* STBx25xx */ 1309 .pvr_mask = 0xffff0000, 1310 .pvr_value = 0x51510000, 1311 .cpu_name = "STBx25xx", 1312 .cpu_features = CPU_FTRS_40X, 1313 .cpu_user_features = PPC_FEATURE_32 | 1314 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1315 .mmu_features = MMU_FTR_TYPE_40x, 1316 .icache_bsize = 32, 1317 .dcache_bsize = 32, 1318 .machine_check = machine_check_4xx, 1319 .platform = "ppc405", 1320 }, 1321 { /* 405LP */ 1322 .pvr_mask = 0xffff0000, 1323 .pvr_value = 0x41F10000, 1324 .cpu_name = "405LP", 1325 .cpu_features = CPU_FTRS_40X, 1326 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1327 .mmu_features = MMU_FTR_TYPE_40x, 1328 .icache_bsize = 32, 1329 .dcache_bsize = 32, 1330 .machine_check = machine_check_4xx, 1331 .platform = "ppc405", 1332 }, 1333 { /* Xilinx Virtex-II Pro */ 1334 .pvr_mask = 0xfffff000, 1335 .pvr_value = 0x20010000, 1336 .cpu_name = "Virtex-II Pro", 1337 .cpu_features = CPU_FTRS_40X, 1338 .cpu_user_features = PPC_FEATURE_32 | 1339 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1340 .mmu_features = MMU_FTR_TYPE_40x, 1341 .icache_bsize = 32, 1342 .dcache_bsize = 32, 1343 .machine_check = machine_check_4xx, 1344 .platform = "ppc405", 1345 }, 1346 { /* Xilinx Virtex-4 FX */ 1347 .pvr_mask = 0xfffff000, 1348 .pvr_value = 0x20011000, 1349 .cpu_name = "Virtex-4 FX", 1350 .cpu_features = CPU_FTRS_40X, 1351 .cpu_user_features = PPC_FEATURE_32 | 1352 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1353 .mmu_features = MMU_FTR_TYPE_40x, 1354 .icache_bsize = 32, 1355 .dcache_bsize = 32, 1356 .machine_check = machine_check_4xx, 1357 .platform = "ppc405", 1358 }, 1359 { /* 405EP */ 1360 .pvr_mask = 0xffff0000, 1361 .pvr_value = 0x51210000, 1362 .cpu_name = "405EP", 1363 .cpu_features = CPU_FTRS_40X, 1364 .cpu_user_features = PPC_FEATURE_32 | 1365 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1366 .mmu_features = MMU_FTR_TYPE_40x, 1367 .icache_bsize = 32, 1368 .dcache_bsize = 32, 1369 .machine_check = machine_check_4xx, 1370 .platform = "ppc405", 1371 }, 1372 { /* 405EX Rev. A/B with Security */ 1373 .pvr_mask = 0xffff000f, 1374 .pvr_value = 0x12910007, 1375 .cpu_name = "405EX Rev. A/B", 1376 .cpu_features = CPU_FTRS_40X, 1377 .cpu_user_features = PPC_FEATURE_32 | 1378 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1379 .mmu_features = MMU_FTR_TYPE_40x, 1380 .icache_bsize = 32, 1381 .dcache_bsize = 32, 1382 .machine_check = machine_check_4xx, 1383 .platform = "ppc405", 1384 }, 1385 { /* 405EX Rev. C without Security */ 1386 .pvr_mask = 0xffff000f, 1387 .pvr_value = 0x1291000d, 1388 .cpu_name = "405EX Rev. C", 1389 .cpu_features = CPU_FTRS_40X, 1390 .cpu_user_features = PPC_FEATURE_32 | 1391 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1392 .mmu_features = MMU_FTR_TYPE_40x, 1393 .icache_bsize = 32, 1394 .dcache_bsize = 32, 1395 .machine_check = machine_check_4xx, 1396 .platform = "ppc405", 1397 }, 1398 { /* 405EX Rev. C with Security */ 1399 .pvr_mask = 0xffff000f, 1400 .pvr_value = 0x1291000f, 1401 .cpu_name = "405EX Rev. C", 1402 .cpu_features = CPU_FTRS_40X, 1403 .cpu_user_features = PPC_FEATURE_32 | 1404 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1405 .mmu_features = MMU_FTR_TYPE_40x, 1406 .icache_bsize = 32, 1407 .dcache_bsize = 32, 1408 .machine_check = machine_check_4xx, 1409 .platform = "ppc405", 1410 }, 1411 { /* 405EX Rev. D without Security */ 1412 .pvr_mask = 0xffff000f, 1413 .pvr_value = 0x12910003, 1414 .cpu_name = "405EX Rev. D", 1415 .cpu_features = CPU_FTRS_40X, 1416 .cpu_user_features = PPC_FEATURE_32 | 1417 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1418 .mmu_features = MMU_FTR_TYPE_40x, 1419 .icache_bsize = 32, 1420 .dcache_bsize = 32, 1421 .machine_check = machine_check_4xx, 1422 .platform = "ppc405", 1423 }, 1424 { /* 405EX Rev. D with Security */ 1425 .pvr_mask = 0xffff000f, 1426 .pvr_value = 0x12910005, 1427 .cpu_name = "405EX Rev. D", 1428 .cpu_features = CPU_FTRS_40X, 1429 .cpu_user_features = PPC_FEATURE_32 | 1430 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1431 .mmu_features = MMU_FTR_TYPE_40x, 1432 .icache_bsize = 32, 1433 .dcache_bsize = 32, 1434 .machine_check = machine_check_4xx, 1435 .platform = "ppc405", 1436 }, 1437 { /* 405EXr Rev. A/B without Security */ 1438 .pvr_mask = 0xffff000f, 1439 .pvr_value = 0x12910001, 1440 .cpu_name = "405EXr Rev. A/B", 1441 .cpu_features = CPU_FTRS_40X, 1442 .cpu_user_features = PPC_FEATURE_32 | 1443 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1444 .mmu_features = MMU_FTR_TYPE_40x, 1445 .icache_bsize = 32, 1446 .dcache_bsize = 32, 1447 .machine_check = machine_check_4xx, 1448 .platform = "ppc405", 1449 }, 1450 { /* 405EXr Rev. C without Security */ 1451 .pvr_mask = 0xffff000f, 1452 .pvr_value = 0x12910009, 1453 .cpu_name = "405EXr Rev. C", 1454 .cpu_features = CPU_FTRS_40X, 1455 .cpu_user_features = PPC_FEATURE_32 | 1456 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1457 .mmu_features = MMU_FTR_TYPE_40x, 1458 .icache_bsize = 32, 1459 .dcache_bsize = 32, 1460 .machine_check = machine_check_4xx, 1461 .platform = "ppc405", 1462 }, 1463 { /* 405EXr Rev. C with Security */ 1464 .pvr_mask = 0xffff000f, 1465 .pvr_value = 0x1291000b, 1466 .cpu_name = "405EXr Rev. C", 1467 .cpu_features = CPU_FTRS_40X, 1468 .cpu_user_features = PPC_FEATURE_32 | 1469 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1470 .mmu_features = MMU_FTR_TYPE_40x, 1471 .icache_bsize = 32, 1472 .dcache_bsize = 32, 1473 .machine_check = machine_check_4xx, 1474 .platform = "ppc405", 1475 }, 1476 { /* 405EXr Rev. D without Security */ 1477 .pvr_mask = 0xffff000f, 1478 .pvr_value = 0x12910000, 1479 .cpu_name = "405EXr Rev. D", 1480 .cpu_features = CPU_FTRS_40X, 1481 .cpu_user_features = PPC_FEATURE_32 | 1482 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1483 .mmu_features = MMU_FTR_TYPE_40x, 1484 .icache_bsize = 32, 1485 .dcache_bsize = 32, 1486 .machine_check = machine_check_4xx, 1487 .platform = "ppc405", 1488 }, 1489 { /* 405EXr Rev. D with Security */ 1490 .pvr_mask = 0xffff000f, 1491 .pvr_value = 0x12910002, 1492 .cpu_name = "405EXr Rev. D", 1493 .cpu_features = CPU_FTRS_40X, 1494 .cpu_user_features = PPC_FEATURE_32 | 1495 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1496 .mmu_features = MMU_FTR_TYPE_40x, 1497 .icache_bsize = 32, 1498 .dcache_bsize = 32, 1499 .machine_check = machine_check_4xx, 1500 .platform = "ppc405", 1501 }, 1502 { 1503 /* 405EZ */ 1504 .pvr_mask = 0xffff0000, 1505 .pvr_value = 0x41510000, 1506 .cpu_name = "405EZ", 1507 .cpu_features = CPU_FTRS_40X, 1508 .cpu_user_features = PPC_FEATURE_32 | 1509 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1510 .mmu_features = MMU_FTR_TYPE_40x, 1511 .icache_bsize = 32, 1512 .dcache_bsize = 32, 1513 .machine_check = machine_check_4xx, 1514 .platform = "ppc405", 1515 }, 1516 { /* default match */ 1517 .pvr_mask = 0x00000000, 1518 .pvr_value = 0x00000000, 1519 .cpu_name = "(generic 40x PPC)", 1520 .cpu_features = CPU_FTRS_40X, 1521 .cpu_user_features = PPC_FEATURE_32 | 1522 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1523 .mmu_features = MMU_FTR_TYPE_40x, 1524 .icache_bsize = 32, 1525 .dcache_bsize = 32, 1526 .machine_check = machine_check_4xx, 1527 .platform = "ppc405", 1528 } 1529 1530 #endif /* CONFIG_40x */ 1531 #ifdef CONFIG_44x 1532 { 1533 .pvr_mask = 0xf0000fff, 1534 .pvr_value = 0x40000850, 1535 .cpu_name = "440GR Rev. A", 1536 .cpu_features = CPU_FTRS_44X, 1537 .cpu_user_features = COMMON_USER_BOOKE, 1538 .mmu_features = MMU_FTR_TYPE_44x, 1539 .icache_bsize = 32, 1540 .dcache_bsize = 32, 1541 .machine_check = machine_check_4xx, 1542 .platform = "ppc440", 1543 }, 1544 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1545 .pvr_mask = 0xf0000fff, 1546 .pvr_value = 0x40000858, 1547 .cpu_name = "440EP Rev. A", 1548 .cpu_features = CPU_FTRS_44X, 1549 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1550 .mmu_features = MMU_FTR_TYPE_44x, 1551 .icache_bsize = 32, 1552 .dcache_bsize = 32, 1553 .cpu_setup = __setup_cpu_440ep, 1554 .machine_check = machine_check_4xx, 1555 .platform = "ppc440", 1556 }, 1557 { 1558 .pvr_mask = 0xf0000fff, 1559 .pvr_value = 0x400008d3, 1560 .cpu_name = "440GR Rev. B", 1561 .cpu_features = CPU_FTRS_44X, 1562 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1563 .mmu_features = MMU_FTR_TYPE_44x, 1564 .icache_bsize = 32, 1565 .dcache_bsize = 32, 1566 .machine_check = machine_check_4xx, 1567 .platform = "ppc440", 1568 }, 1569 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1570 .pvr_mask = 0xf0000ff7, 1571 .pvr_value = 0x400008d4, 1572 .cpu_name = "440EP Rev. C", 1573 .cpu_features = CPU_FTRS_44X, 1574 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1575 .mmu_features = MMU_FTR_TYPE_44x, 1576 .icache_bsize = 32, 1577 .dcache_bsize = 32, 1578 .cpu_setup = __setup_cpu_440ep, 1579 .machine_check = machine_check_4xx, 1580 .platform = "ppc440", 1581 }, 1582 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1583 .pvr_mask = 0xf0000fff, 1584 .pvr_value = 0x400008db, 1585 .cpu_name = "440EP Rev. B", 1586 .cpu_features = CPU_FTRS_44X, 1587 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1588 .mmu_features = MMU_FTR_TYPE_44x, 1589 .icache_bsize = 32, 1590 .dcache_bsize = 32, 1591 .cpu_setup = __setup_cpu_440ep, 1592 .machine_check = machine_check_4xx, 1593 .platform = "ppc440", 1594 }, 1595 { /* 440GRX */ 1596 .pvr_mask = 0xf0000ffb, 1597 .pvr_value = 0x200008D0, 1598 .cpu_name = "440GRX", 1599 .cpu_features = CPU_FTRS_44X, 1600 .cpu_user_features = COMMON_USER_BOOKE, 1601 .mmu_features = MMU_FTR_TYPE_44x, 1602 .icache_bsize = 32, 1603 .dcache_bsize = 32, 1604 .cpu_setup = __setup_cpu_440grx, 1605 .machine_check = machine_check_440A, 1606 .platform = "ppc440", 1607 }, 1608 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1609 .pvr_mask = 0xf0000ffb, 1610 .pvr_value = 0x200008D8, 1611 .cpu_name = "440EPX", 1612 .cpu_features = CPU_FTRS_44X, 1613 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1614 .mmu_features = MMU_FTR_TYPE_44x, 1615 .icache_bsize = 32, 1616 .dcache_bsize = 32, 1617 .cpu_setup = __setup_cpu_440epx, 1618 .machine_check = machine_check_440A, 1619 .platform = "ppc440", 1620 }, 1621 { /* 440GP Rev. B */ 1622 .pvr_mask = 0xf0000fff, 1623 .pvr_value = 0x40000440, 1624 .cpu_name = "440GP Rev. B", 1625 .cpu_features = CPU_FTRS_44X, 1626 .cpu_user_features = COMMON_USER_BOOKE, 1627 .mmu_features = MMU_FTR_TYPE_44x, 1628 .icache_bsize = 32, 1629 .dcache_bsize = 32, 1630 .machine_check = machine_check_4xx, 1631 .platform = "ppc440gp", 1632 }, 1633 { /* 440GP Rev. C */ 1634 .pvr_mask = 0xf0000fff, 1635 .pvr_value = 0x40000481, 1636 .cpu_name = "440GP Rev. C", 1637 .cpu_features = CPU_FTRS_44X, 1638 .cpu_user_features = COMMON_USER_BOOKE, 1639 .mmu_features = MMU_FTR_TYPE_44x, 1640 .icache_bsize = 32, 1641 .dcache_bsize = 32, 1642 .machine_check = machine_check_4xx, 1643 .platform = "ppc440gp", 1644 }, 1645 { /* 440GX Rev. A */ 1646 .pvr_mask = 0xf0000fff, 1647 .pvr_value = 0x50000850, 1648 .cpu_name = "440GX Rev. A", 1649 .cpu_features = CPU_FTRS_44X, 1650 .cpu_user_features = COMMON_USER_BOOKE, 1651 .mmu_features = MMU_FTR_TYPE_44x, 1652 .icache_bsize = 32, 1653 .dcache_bsize = 32, 1654 .cpu_setup = __setup_cpu_440gx, 1655 .machine_check = machine_check_440A, 1656 .platform = "ppc440", 1657 }, 1658 { /* 440GX Rev. B */ 1659 .pvr_mask = 0xf0000fff, 1660 .pvr_value = 0x50000851, 1661 .cpu_name = "440GX Rev. B", 1662 .cpu_features = CPU_FTRS_44X, 1663 .cpu_user_features = COMMON_USER_BOOKE, 1664 .mmu_features = MMU_FTR_TYPE_44x, 1665 .icache_bsize = 32, 1666 .dcache_bsize = 32, 1667 .cpu_setup = __setup_cpu_440gx, 1668 .machine_check = machine_check_440A, 1669 .platform = "ppc440", 1670 }, 1671 { /* 440GX Rev. C */ 1672 .pvr_mask = 0xf0000fff, 1673 .pvr_value = 0x50000892, 1674 .cpu_name = "440GX Rev. C", 1675 .cpu_features = CPU_FTRS_44X, 1676 .cpu_user_features = COMMON_USER_BOOKE, 1677 .mmu_features = MMU_FTR_TYPE_44x, 1678 .icache_bsize = 32, 1679 .dcache_bsize = 32, 1680 .cpu_setup = __setup_cpu_440gx, 1681 .machine_check = machine_check_440A, 1682 .platform = "ppc440", 1683 }, 1684 { /* 440GX Rev. F */ 1685 .pvr_mask = 0xf0000fff, 1686 .pvr_value = 0x50000894, 1687 .cpu_name = "440GX Rev. F", 1688 .cpu_features = CPU_FTRS_44X, 1689 .cpu_user_features = COMMON_USER_BOOKE, 1690 .mmu_features = MMU_FTR_TYPE_44x, 1691 .icache_bsize = 32, 1692 .dcache_bsize = 32, 1693 .cpu_setup = __setup_cpu_440gx, 1694 .machine_check = machine_check_440A, 1695 .platform = "ppc440", 1696 }, 1697 { /* 440SP Rev. A */ 1698 .pvr_mask = 0xfff00fff, 1699 .pvr_value = 0x53200891, 1700 .cpu_name = "440SP Rev. A", 1701 .cpu_features = CPU_FTRS_44X, 1702 .cpu_user_features = COMMON_USER_BOOKE, 1703 .mmu_features = MMU_FTR_TYPE_44x, 1704 .icache_bsize = 32, 1705 .dcache_bsize = 32, 1706 .machine_check = machine_check_4xx, 1707 .platform = "ppc440", 1708 }, 1709 { /* 440SPe Rev. A */ 1710 .pvr_mask = 0xfff00fff, 1711 .pvr_value = 0x53400890, 1712 .cpu_name = "440SPe Rev. A", 1713 .cpu_features = CPU_FTRS_44X, 1714 .cpu_user_features = COMMON_USER_BOOKE, 1715 .mmu_features = MMU_FTR_TYPE_44x, 1716 .icache_bsize = 32, 1717 .dcache_bsize = 32, 1718 .cpu_setup = __setup_cpu_440spe, 1719 .machine_check = machine_check_440A, 1720 .platform = "ppc440", 1721 }, 1722 { /* 440SPe Rev. B */ 1723 .pvr_mask = 0xfff00fff, 1724 .pvr_value = 0x53400891, 1725 .cpu_name = "440SPe Rev. B", 1726 .cpu_features = CPU_FTRS_44X, 1727 .cpu_user_features = COMMON_USER_BOOKE, 1728 .mmu_features = MMU_FTR_TYPE_44x, 1729 .icache_bsize = 32, 1730 .dcache_bsize = 32, 1731 .cpu_setup = __setup_cpu_440spe, 1732 .machine_check = machine_check_440A, 1733 .platform = "ppc440", 1734 }, 1735 { /* 440 in Xilinx Virtex-5 FXT */ 1736 .pvr_mask = 0xfffffff0, 1737 .pvr_value = 0x7ff21910, 1738 .cpu_name = "440 in Virtex-5 FXT", 1739 .cpu_features = CPU_FTRS_44X, 1740 .cpu_user_features = COMMON_USER_BOOKE, 1741 .mmu_features = MMU_FTR_TYPE_44x, 1742 .icache_bsize = 32, 1743 .dcache_bsize = 32, 1744 .cpu_setup = __setup_cpu_440x5, 1745 .machine_check = machine_check_440A, 1746 .platform = "ppc440", 1747 }, 1748 { /* 460EX */ 1749 .pvr_mask = 0xffff0006, 1750 .pvr_value = 0x13020002, 1751 .cpu_name = "460EX", 1752 .cpu_features = CPU_FTRS_440x6, 1753 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1754 .mmu_features = MMU_FTR_TYPE_44x, 1755 .icache_bsize = 32, 1756 .dcache_bsize = 32, 1757 .cpu_setup = __setup_cpu_460ex, 1758 .machine_check = machine_check_440A, 1759 .platform = "ppc440", 1760 }, 1761 { /* 460EX Rev B */ 1762 .pvr_mask = 0xffff0007, 1763 .pvr_value = 0x13020004, 1764 .cpu_name = "460EX Rev. B", 1765 .cpu_features = CPU_FTRS_440x6, 1766 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1767 .mmu_features = MMU_FTR_TYPE_44x, 1768 .icache_bsize = 32, 1769 .dcache_bsize = 32, 1770 .cpu_setup = __setup_cpu_460ex, 1771 .machine_check = machine_check_440A, 1772 .platform = "ppc440", 1773 }, 1774 { /* 460GT */ 1775 .pvr_mask = 0xffff0006, 1776 .pvr_value = 0x13020000, 1777 .cpu_name = "460GT", 1778 .cpu_features = CPU_FTRS_440x6, 1779 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1780 .mmu_features = MMU_FTR_TYPE_44x, 1781 .icache_bsize = 32, 1782 .dcache_bsize = 32, 1783 .cpu_setup = __setup_cpu_460gt, 1784 .machine_check = machine_check_440A, 1785 .platform = "ppc440", 1786 }, 1787 { /* 460GT Rev B */ 1788 .pvr_mask = 0xffff0007, 1789 .pvr_value = 0x13020005, 1790 .cpu_name = "460GT Rev. B", 1791 .cpu_features = CPU_FTRS_440x6, 1792 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1793 .mmu_features = MMU_FTR_TYPE_44x, 1794 .icache_bsize = 32, 1795 .dcache_bsize = 32, 1796 .cpu_setup = __setup_cpu_460gt, 1797 .machine_check = machine_check_440A, 1798 .platform = "ppc440", 1799 }, 1800 { /* 460SX */ 1801 .pvr_mask = 0xffffff00, 1802 .pvr_value = 0x13541800, 1803 .cpu_name = "460SX", 1804 .cpu_features = CPU_FTRS_44X, 1805 .cpu_user_features = COMMON_USER_BOOKE, 1806 .mmu_features = MMU_FTR_TYPE_44x, 1807 .icache_bsize = 32, 1808 .dcache_bsize = 32, 1809 .cpu_setup = __setup_cpu_460sx, 1810 .machine_check = machine_check_440A, 1811 .platform = "ppc440", 1812 }, 1813 { /* 464 in APM821xx */ 1814 .pvr_mask = 0xffffff00, 1815 .pvr_value = 0x12C41C80, 1816 .cpu_name = "APM821XX", 1817 .cpu_features = CPU_FTRS_44X, 1818 .cpu_user_features = COMMON_USER_BOOKE | 1819 PPC_FEATURE_HAS_FPU, 1820 .mmu_features = MMU_FTR_TYPE_44x, 1821 .icache_bsize = 32, 1822 .dcache_bsize = 32, 1823 .cpu_setup = __setup_cpu_apm821xx, 1824 .machine_check = machine_check_440A, 1825 .platform = "ppc440", 1826 }, 1827 { /* 476 core */ 1828 .pvr_mask = 0xffff0000, 1829 .pvr_value = 0x11a50000, 1830 .cpu_name = "476", 1831 .cpu_features = CPU_FTRS_47X, 1832 .cpu_user_features = COMMON_USER_BOOKE | 1833 PPC_FEATURE_HAS_FPU, 1834 .mmu_features = MMU_FTR_TYPE_47x | 1835 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1836 .icache_bsize = 32, 1837 .dcache_bsize = 128, 1838 .machine_check = machine_check_47x, 1839 .platform = "ppc470", 1840 }, 1841 { /* 476 iss */ 1842 .pvr_mask = 0xffff0000, 1843 .pvr_value = 0x00050000, 1844 .cpu_name = "476", 1845 .cpu_features = CPU_FTRS_47X, 1846 .cpu_user_features = COMMON_USER_BOOKE | 1847 PPC_FEATURE_HAS_FPU, 1848 .mmu_features = MMU_FTR_TYPE_47x | 1849 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1850 .icache_bsize = 32, 1851 .dcache_bsize = 128, 1852 .machine_check = machine_check_47x, 1853 .platform = "ppc470", 1854 }, 1855 { /* default match */ 1856 .pvr_mask = 0x00000000, 1857 .pvr_value = 0x00000000, 1858 .cpu_name = "(generic 44x PPC)", 1859 .cpu_features = CPU_FTRS_44X, 1860 .cpu_user_features = COMMON_USER_BOOKE, 1861 .mmu_features = MMU_FTR_TYPE_44x, 1862 .icache_bsize = 32, 1863 .dcache_bsize = 32, 1864 .machine_check = machine_check_4xx, 1865 .platform = "ppc440", 1866 } 1867 #endif /* CONFIG_44x */ 1868 #ifdef CONFIG_E200 1869 { /* e200z5 */ 1870 .pvr_mask = 0xfff00000, 1871 .pvr_value = 0x81000000, 1872 .cpu_name = "e200z5", 1873 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1874 .cpu_features = CPU_FTRS_E200, 1875 .cpu_user_features = COMMON_USER_BOOKE | 1876 PPC_FEATURE_HAS_EFP_SINGLE | 1877 PPC_FEATURE_UNIFIED_CACHE, 1878 .mmu_features = MMU_FTR_TYPE_FSL_E, 1879 .dcache_bsize = 32, 1880 .machine_check = machine_check_e200, 1881 .platform = "ppc5554", 1882 }, 1883 { /* e200z6 */ 1884 .pvr_mask = 0xfff00000, 1885 .pvr_value = 0x81100000, 1886 .cpu_name = "e200z6", 1887 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1888 .cpu_features = CPU_FTRS_E200, 1889 .cpu_user_features = COMMON_USER_BOOKE | 1890 PPC_FEATURE_HAS_SPE_COMP | 1891 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1892 PPC_FEATURE_UNIFIED_CACHE, 1893 .mmu_features = MMU_FTR_TYPE_FSL_E, 1894 .dcache_bsize = 32, 1895 .machine_check = machine_check_e200, 1896 .platform = "ppc5554", 1897 }, 1898 { /* default match */ 1899 .pvr_mask = 0x00000000, 1900 .pvr_value = 0x00000000, 1901 .cpu_name = "(generic E200 PPC)", 1902 .cpu_features = CPU_FTRS_E200, 1903 .cpu_user_features = COMMON_USER_BOOKE | 1904 PPC_FEATURE_HAS_EFP_SINGLE | 1905 PPC_FEATURE_UNIFIED_CACHE, 1906 .mmu_features = MMU_FTR_TYPE_FSL_E, 1907 .dcache_bsize = 32, 1908 .cpu_setup = __setup_cpu_e200, 1909 .machine_check = machine_check_e200, 1910 .platform = "ppc5554", 1911 } 1912 #endif /* CONFIG_E200 */ 1913 #endif /* CONFIG_PPC32 */ 1914 #ifdef CONFIG_E500 1915 #ifdef CONFIG_PPC32 1916 { /* e500 */ 1917 .pvr_mask = 0xffff0000, 1918 .pvr_value = 0x80200000, 1919 .cpu_name = "e500", 1920 .cpu_features = CPU_FTRS_E500, 1921 .cpu_user_features = COMMON_USER_BOOKE | 1922 PPC_FEATURE_HAS_SPE_COMP | 1923 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1924 .mmu_features = MMU_FTR_TYPE_FSL_E, 1925 .icache_bsize = 32, 1926 .dcache_bsize = 32, 1927 .num_pmcs = 4, 1928 .oprofile_cpu_type = "ppc/e500", 1929 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1930 .cpu_setup = __setup_cpu_e500v1, 1931 .machine_check = machine_check_e500, 1932 .platform = "ppc8540", 1933 }, 1934 { /* e500v2 */ 1935 .pvr_mask = 0xffff0000, 1936 .pvr_value = 0x80210000, 1937 .cpu_name = "e500v2", 1938 .cpu_features = CPU_FTRS_E500_2, 1939 .cpu_user_features = COMMON_USER_BOOKE | 1940 PPC_FEATURE_HAS_SPE_COMP | 1941 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1942 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1943 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1944 .icache_bsize = 32, 1945 .dcache_bsize = 32, 1946 .num_pmcs = 4, 1947 .oprofile_cpu_type = "ppc/e500", 1948 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1949 .cpu_setup = __setup_cpu_e500v2, 1950 .machine_check = machine_check_e500, 1951 .platform = "ppc8548", 1952 }, 1953 { /* e500mc */ 1954 .pvr_mask = 0xffff0000, 1955 .pvr_value = 0x80230000, 1956 .cpu_name = "e500mc", 1957 .cpu_features = CPU_FTRS_E500MC, 1958 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1959 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1960 MMU_FTR_USE_TLBILX, 1961 .icache_bsize = 64, 1962 .dcache_bsize = 64, 1963 .num_pmcs = 4, 1964 .oprofile_cpu_type = "ppc/e500mc", 1965 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1966 .cpu_setup = __setup_cpu_e500mc, 1967 .machine_check = machine_check_e500mc, 1968 .platform = "ppce500mc", 1969 }, 1970 #endif /* CONFIG_PPC32 */ 1971 { /* e5500 */ 1972 .pvr_mask = 0xffff0000, 1973 .pvr_value = 0x80240000, 1974 .cpu_name = "e5500", 1975 .cpu_features = CPU_FTRS_E500MC, 1976 .cpu_user_features = COMMON_USER_BOOKE, 1977 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1978 MMU_FTR_USE_TLBILX, 1979 .icache_bsize = 64, 1980 .dcache_bsize = 64, 1981 .num_pmcs = 4, 1982 .oprofile_cpu_type = "ppc/e500mc", 1983 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1984 .cpu_setup = __setup_cpu_e5500, 1985 .cpu_restore = __restore_cpu_e5500, 1986 .machine_check = machine_check_e500mc, 1987 .platform = "ppce5500", 1988 }, 1989 #ifdef CONFIG_PPC32 1990 { /* default match */ 1991 .pvr_mask = 0x00000000, 1992 .pvr_value = 0x00000000, 1993 .cpu_name = "(generic E500 PPC)", 1994 .cpu_features = CPU_FTRS_E500, 1995 .cpu_user_features = COMMON_USER_BOOKE | 1996 PPC_FEATURE_HAS_SPE_COMP | 1997 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1998 .mmu_features = MMU_FTR_TYPE_FSL_E, 1999 .icache_bsize = 32, 2000 .dcache_bsize = 32, 2001 .machine_check = machine_check_e500, 2002 .platform = "powerpc", 2003 } 2004 #endif /* CONFIG_PPC32 */ 2005 #endif /* CONFIG_E500 */ 2006 2007 #ifdef CONFIG_PPC_BOOK3E_64 2008 { /* This is a default entry to get going, to be replaced by 2009 * a real one at some stage 2010 */ 2011 #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \ 2012 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \ 2013 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) 2014 .pvr_mask = 0x00000000, 2015 .pvr_value = 0x00000000, 2016 .cpu_name = "Book3E", 2017 .cpu_features = CPU_FTRS_BASE_BOOK3E, 2018 .cpu_user_features = COMMON_USER_PPC64, 2019 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX | 2020 MMU_FTR_USE_TLBIVAX_BCAST | 2021 MMU_FTR_LOCK_BCAST_INVAL, 2022 .icache_bsize = 64, 2023 .dcache_bsize = 64, 2024 .num_pmcs = 0, 2025 .machine_check = machine_check_generic, 2026 .platform = "power6", 2027 }, 2028 #endif 2029 }; 2030 2031 static struct cpu_spec the_cpu_spec; 2032 2033 static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s) 2034 { 2035 struct cpu_spec *t = &the_cpu_spec; 2036 struct cpu_spec old; 2037 2038 t = PTRRELOC(t); 2039 old = *t; 2040 2041 /* Copy everything, then do fixups */ 2042 *t = *s; 2043 2044 /* 2045 * If we are overriding a previous value derived from the real 2046 * PVR with a new value obtained using a logical PVR value, 2047 * don't modify the performance monitor fields. 2048 */ 2049 if (old.num_pmcs && !s->num_pmcs) { 2050 t->num_pmcs = old.num_pmcs; 2051 t->pmc_type = old.pmc_type; 2052 t->oprofile_type = old.oprofile_type; 2053 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2054 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2055 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2056 2057 /* 2058 * If we have passed through this logic once before and 2059 * have pulled the default case because the real PVR was 2060 * not found inside cpu_specs[], then we are possibly 2061 * running in compatibility mode. In that case, let the 2062 * oprofiler know which set of compatibility counters to 2063 * pull from by making sure the oprofile_cpu_type string 2064 * is set to that of compatibility mode. If the 2065 * oprofile_cpu_type already has a value, then we are 2066 * possibly overriding a real PVR with a logical one, 2067 * and, in that case, keep the current value for 2068 * oprofile_cpu_type. 2069 */ 2070 if (old.oprofile_cpu_type != NULL) { 2071 t->oprofile_cpu_type = old.oprofile_cpu_type; 2072 t->oprofile_type = old.oprofile_type; 2073 } 2074 } 2075 2076 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2077 2078 /* 2079 * Set the base platform string once; assumes 2080 * we're called with real pvr first. 2081 */ 2082 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2083 *PTRRELOC(&powerpc_base_platform) = t->platform; 2084 2085 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2086 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2087 * that processor. I will consolidate that at a later time, for now, 2088 * just use #ifdef. We also don't need to PTRRELOC the function 2089 * pointer on ppc64 and booke as we are running at 0 in real mode 2090 * on ppc64 and reloc_offset is always 0 on booke. 2091 */ 2092 if (s->cpu_setup) { 2093 s->cpu_setup(offset, s); 2094 } 2095 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2096 } 2097 2098 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2099 { 2100 struct cpu_spec *s = cpu_specs; 2101 int i; 2102 2103 s = PTRRELOC(s); 2104 2105 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2106 if ((pvr & s->pvr_mask) == s->pvr_value) { 2107 setup_cpu_spec(offset, s); 2108 return s; 2109 } 2110 } 2111 2112 BUG(); 2113 2114 return NULL; 2115 } 2116