1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/export.h> 18 #include <linux/jump_label.h> 19 20 #include <asm/oprofile_impl.h> 21 #include <asm/cputable.h> 22 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 23 #include <asm/mmu.h> 24 #include <asm/setup.h> 25 26 static struct cpu_spec the_cpu_spec __read_mostly; 27 28 struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 29 EXPORT_SYMBOL(cur_cpu_spec); 30 31 /* The platform string corresponding to the real PVR */ 32 const char *powerpc_base_platform; 33 34 /* NOTE: 35 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 36 * the responsibility of the appropriate CPU save/restore functions to 37 * eventually copy these settings over. Those save/restore aren't yet 38 * part of the cputable though. That has to be fixed for both ppc32 39 * and ppc64 40 */ 41 #ifdef CONFIG_PPC32 42 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 51 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 52 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 55 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 56 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 60 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 61 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 62 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 64 #endif /* CONFIG_PPC32 */ 65 #ifdef CONFIG_PPC64 66 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 67 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 68 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 69 extern void __restore_cpu_pa6t(void); 70 extern void __restore_cpu_ppc970(void); 71 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 72 extern void __restore_cpu_power7(void); 73 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 74 extern void __restore_cpu_power8(void); 75 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); 76 extern void __restore_cpu_power9(void); 77 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 78 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 79 extern long __machine_check_early_realmode_p9(struct pt_regs *regs); 80 #endif /* CONFIG_PPC64 */ 81 #if defined(CONFIG_E500) 82 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 83 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 84 extern void __restore_cpu_e5500(void); 85 extern void __restore_cpu_e6500(void); 86 #endif /* CONFIG_E500 */ 87 88 /* This table only contains "desktop" CPUs, it need to be filled with embedded 89 * ones as well... 90 */ 91 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 92 PPC_FEATURE_HAS_MMU) 93 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 94 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 95 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 97 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 99 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 100 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 101 PPC_FEATURE_TRUE_LE | \ 102 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 103 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 104 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 105 PPC_FEATURE_TRUE_LE | \ 106 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 107 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 108 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 109 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 110 PPC_FEATURE_TRUE_LE | \ 111 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 112 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 113 PPC_FEATURE2_HTM_COMP | \ 114 PPC_FEATURE2_HTM_NOSC_COMP | \ 115 PPC_FEATURE2_DSCR | \ 116 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 117 PPC_FEATURE2_VEC_CRYPTO) 118 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 119 PPC_FEATURE_TRUE_LE | \ 120 PPC_FEATURE_HAS_ALTIVEC_COMP) 121 #define COMMON_USER_POWER9 COMMON_USER_POWER8 122 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 123 PPC_FEATURE2_ARCH_3_00 | \ 124 PPC_FEATURE2_HAS_IEEE128 | \ 125 PPC_FEATURE2_DARN ) 126 127 #ifdef CONFIG_PPC_BOOK3E_64 128 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 129 #else 130 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 131 PPC_FEATURE_BOOKE) 132 #endif 133 134 static struct cpu_spec __initdata cpu_specs[] = { 135 #ifdef CONFIG_PPC_BOOK3S_64 136 { /* PPC970 */ 137 .pvr_mask = 0xffff0000, 138 .pvr_value = 0x00390000, 139 .cpu_name = "PPC970", 140 .cpu_features = CPU_FTRS_PPC970, 141 .cpu_user_features = COMMON_USER_POWER4 | 142 PPC_FEATURE_HAS_ALTIVEC_COMP, 143 .mmu_features = MMU_FTRS_PPC970, 144 .icache_bsize = 128, 145 .dcache_bsize = 128, 146 .num_pmcs = 8, 147 .pmc_type = PPC_PMC_IBM, 148 .cpu_setup = __setup_cpu_ppc970, 149 .cpu_restore = __restore_cpu_ppc970, 150 .oprofile_cpu_type = "ppc64/970", 151 .oprofile_type = PPC_OPROFILE_POWER4, 152 .platform = "ppc970", 153 }, 154 { /* PPC970FX */ 155 .pvr_mask = 0xffff0000, 156 .pvr_value = 0x003c0000, 157 .cpu_name = "PPC970FX", 158 .cpu_features = CPU_FTRS_PPC970, 159 .cpu_user_features = COMMON_USER_POWER4 | 160 PPC_FEATURE_HAS_ALTIVEC_COMP, 161 .mmu_features = MMU_FTRS_PPC970, 162 .icache_bsize = 128, 163 .dcache_bsize = 128, 164 .num_pmcs = 8, 165 .pmc_type = PPC_PMC_IBM, 166 .cpu_setup = __setup_cpu_ppc970, 167 .cpu_restore = __restore_cpu_ppc970, 168 .oprofile_cpu_type = "ppc64/970", 169 .oprofile_type = PPC_OPROFILE_POWER4, 170 .platform = "ppc970", 171 }, 172 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 173 .pvr_mask = 0xffffffff, 174 .pvr_value = 0x00440100, 175 .cpu_name = "PPC970MP", 176 .cpu_features = CPU_FTRS_PPC970, 177 .cpu_user_features = COMMON_USER_POWER4 | 178 PPC_FEATURE_HAS_ALTIVEC_COMP, 179 .mmu_features = MMU_FTRS_PPC970, 180 .icache_bsize = 128, 181 .dcache_bsize = 128, 182 .num_pmcs = 8, 183 .pmc_type = PPC_PMC_IBM, 184 .cpu_setup = __setup_cpu_ppc970, 185 .cpu_restore = __restore_cpu_ppc970, 186 .oprofile_cpu_type = "ppc64/970MP", 187 .oprofile_type = PPC_OPROFILE_POWER4, 188 .platform = "ppc970", 189 }, 190 { /* PPC970MP */ 191 .pvr_mask = 0xffff0000, 192 .pvr_value = 0x00440000, 193 .cpu_name = "PPC970MP", 194 .cpu_features = CPU_FTRS_PPC970, 195 .cpu_user_features = COMMON_USER_POWER4 | 196 PPC_FEATURE_HAS_ALTIVEC_COMP, 197 .mmu_features = MMU_FTRS_PPC970, 198 .icache_bsize = 128, 199 .dcache_bsize = 128, 200 .num_pmcs = 8, 201 .pmc_type = PPC_PMC_IBM, 202 .cpu_setup = __setup_cpu_ppc970MP, 203 .cpu_restore = __restore_cpu_ppc970, 204 .oprofile_cpu_type = "ppc64/970MP", 205 .oprofile_type = PPC_OPROFILE_POWER4, 206 .platform = "ppc970", 207 }, 208 { /* PPC970GX */ 209 .pvr_mask = 0xffff0000, 210 .pvr_value = 0x00450000, 211 .cpu_name = "PPC970GX", 212 .cpu_features = CPU_FTRS_PPC970, 213 .cpu_user_features = COMMON_USER_POWER4 | 214 PPC_FEATURE_HAS_ALTIVEC_COMP, 215 .mmu_features = MMU_FTRS_PPC970, 216 .icache_bsize = 128, 217 .dcache_bsize = 128, 218 .num_pmcs = 8, 219 .pmc_type = PPC_PMC_IBM, 220 .cpu_setup = __setup_cpu_ppc970, 221 .oprofile_cpu_type = "ppc64/970", 222 .oprofile_type = PPC_OPROFILE_POWER4, 223 .platform = "ppc970", 224 }, 225 { /* Power5 GR */ 226 .pvr_mask = 0xffff0000, 227 .pvr_value = 0x003a0000, 228 .cpu_name = "POWER5 (gr)", 229 .cpu_features = CPU_FTRS_POWER5, 230 .cpu_user_features = COMMON_USER_POWER5, 231 .mmu_features = MMU_FTRS_POWER5, 232 .icache_bsize = 128, 233 .dcache_bsize = 128, 234 .num_pmcs = 6, 235 .pmc_type = PPC_PMC_IBM, 236 .oprofile_cpu_type = "ppc64/power5", 237 .oprofile_type = PPC_OPROFILE_POWER4, 238 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 239 * and above but only works on POWER5 and above 240 */ 241 .oprofile_mmcra_sihv = MMCRA_SIHV, 242 .oprofile_mmcra_sipr = MMCRA_SIPR, 243 .platform = "power5", 244 }, 245 { /* Power5++ */ 246 .pvr_mask = 0xffffff00, 247 .pvr_value = 0x003b0300, 248 .cpu_name = "POWER5+ (gs)", 249 .cpu_features = CPU_FTRS_POWER5, 250 .cpu_user_features = COMMON_USER_POWER5_PLUS, 251 .mmu_features = MMU_FTRS_POWER5, 252 .icache_bsize = 128, 253 .dcache_bsize = 128, 254 .num_pmcs = 6, 255 .oprofile_cpu_type = "ppc64/power5++", 256 .oprofile_type = PPC_OPROFILE_POWER4, 257 .oprofile_mmcra_sihv = MMCRA_SIHV, 258 .oprofile_mmcra_sipr = MMCRA_SIPR, 259 .platform = "power5+", 260 }, 261 { /* Power5 GS */ 262 .pvr_mask = 0xffff0000, 263 .pvr_value = 0x003b0000, 264 .cpu_name = "POWER5+ (gs)", 265 .cpu_features = CPU_FTRS_POWER5, 266 .cpu_user_features = COMMON_USER_POWER5_PLUS, 267 .mmu_features = MMU_FTRS_POWER5, 268 .icache_bsize = 128, 269 .dcache_bsize = 128, 270 .num_pmcs = 6, 271 .pmc_type = PPC_PMC_IBM, 272 .oprofile_cpu_type = "ppc64/power5+", 273 .oprofile_type = PPC_OPROFILE_POWER4, 274 .oprofile_mmcra_sihv = MMCRA_SIHV, 275 .oprofile_mmcra_sipr = MMCRA_SIPR, 276 .platform = "power5+", 277 }, 278 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 279 .pvr_mask = 0xffffffff, 280 .pvr_value = 0x0f000001, 281 .cpu_name = "POWER5+", 282 .cpu_features = CPU_FTRS_POWER5, 283 .cpu_user_features = COMMON_USER_POWER5_PLUS, 284 .mmu_features = MMU_FTRS_POWER5, 285 .icache_bsize = 128, 286 .dcache_bsize = 128, 287 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 288 .oprofile_type = PPC_OPROFILE_POWER4, 289 .platform = "power5+", 290 }, 291 { /* Power6 */ 292 .pvr_mask = 0xffff0000, 293 .pvr_value = 0x003e0000, 294 .cpu_name = "POWER6 (raw)", 295 .cpu_features = CPU_FTRS_POWER6, 296 .cpu_user_features = COMMON_USER_POWER6 | 297 PPC_FEATURE_POWER6_EXT, 298 .mmu_features = MMU_FTRS_POWER6, 299 .icache_bsize = 128, 300 .dcache_bsize = 128, 301 .num_pmcs = 6, 302 .pmc_type = PPC_PMC_IBM, 303 .oprofile_cpu_type = "ppc64/power6", 304 .oprofile_type = PPC_OPROFILE_POWER4, 305 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 306 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 307 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 308 POWER6_MMCRA_OTHER, 309 .platform = "power6x", 310 }, 311 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 312 .pvr_mask = 0xffffffff, 313 .pvr_value = 0x0f000002, 314 .cpu_name = "POWER6 (architected)", 315 .cpu_features = CPU_FTRS_POWER6, 316 .cpu_user_features = COMMON_USER_POWER6, 317 .mmu_features = MMU_FTRS_POWER6, 318 .icache_bsize = 128, 319 .dcache_bsize = 128, 320 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 321 .oprofile_type = PPC_OPROFILE_POWER4, 322 .platform = "power6", 323 }, 324 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 325 .pvr_mask = 0xffffffff, 326 .pvr_value = 0x0f000003, 327 .cpu_name = "POWER7 (architected)", 328 .cpu_features = CPU_FTRS_POWER7, 329 .cpu_user_features = COMMON_USER_POWER7, 330 .cpu_user_features2 = COMMON_USER2_POWER7, 331 .mmu_features = MMU_FTRS_POWER7, 332 .icache_bsize = 128, 333 .dcache_bsize = 128, 334 .oprofile_type = PPC_OPROFILE_POWER4, 335 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 336 .cpu_setup = __setup_cpu_power7, 337 .cpu_restore = __restore_cpu_power7, 338 .machine_check_early = __machine_check_early_realmode_p7, 339 .platform = "power7", 340 }, 341 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 342 .pvr_mask = 0xffffffff, 343 .pvr_value = 0x0f000004, 344 .cpu_name = "POWER8 (architected)", 345 .cpu_features = CPU_FTRS_POWER8, 346 .cpu_user_features = COMMON_USER_POWER8, 347 .cpu_user_features2 = COMMON_USER2_POWER8, 348 .mmu_features = MMU_FTRS_POWER8, 349 .icache_bsize = 128, 350 .dcache_bsize = 128, 351 .oprofile_type = PPC_OPROFILE_INVALID, 352 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 353 .cpu_setup = __setup_cpu_power8, 354 .cpu_restore = __restore_cpu_power8, 355 .machine_check_early = __machine_check_early_realmode_p8, 356 .platform = "power8", 357 }, 358 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 359 .pvr_mask = 0xffffffff, 360 .pvr_value = 0x0f000005, 361 .cpu_name = "POWER9 (architected)", 362 .cpu_features = CPU_FTRS_POWER9, 363 .cpu_user_features = COMMON_USER_POWER9, 364 .cpu_user_features2 = COMMON_USER2_POWER9, 365 .mmu_features = MMU_FTRS_POWER9, 366 .icache_bsize = 128, 367 .dcache_bsize = 128, 368 .oprofile_type = PPC_OPROFILE_INVALID, 369 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 370 .cpu_setup = __setup_cpu_power9, 371 .cpu_restore = __restore_cpu_power9, 372 .platform = "power9", 373 }, 374 { /* Power7 */ 375 .pvr_mask = 0xffff0000, 376 .pvr_value = 0x003f0000, 377 .cpu_name = "POWER7 (raw)", 378 .cpu_features = CPU_FTRS_POWER7, 379 .cpu_user_features = COMMON_USER_POWER7, 380 .cpu_user_features2 = COMMON_USER2_POWER7, 381 .mmu_features = MMU_FTRS_POWER7, 382 .icache_bsize = 128, 383 .dcache_bsize = 128, 384 .num_pmcs = 6, 385 .pmc_type = PPC_PMC_IBM, 386 .oprofile_cpu_type = "ppc64/power7", 387 .oprofile_type = PPC_OPROFILE_POWER4, 388 .cpu_setup = __setup_cpu_power7, 389 .cpu_restore = __restore_cpu_power7, 390 .machine_check_early = __machine_check_early_realmode_p7, 391 .platform = "power7", 392 }, 393 { /* Power7+ */ 394 .pvr_mask = 0xffff0000, 395 .pvr_value = 0x004A0000, 396 .cpu_name = "POWER7+ (raw)", 397 .cpu_features = CPU_FTRS_POWER7, 398 .cpu_user_features = COMMON_USER_POWER7, 399 .cpu_user_features2 = COMMON_USER2_POWER7, 400 .mmu_features = MMU_FTRS_POWER7, 401 .icache_bsize = 128, 402 .dcache_bsize = 128, 403 .num_pmcs = 6, 404 .pmc_type = PPC_PMC_IBM, 405 .oprofile_cpu_type = "ppc64/power7", 406 .oprofile_type = PPC_OPROFILE_POWER4, 407 .cpu_setup = __setup_cpu_power7, 408 .cpu_restore = __restore_cpu_power7, 409 .machine_check_early = __machine_check_early_realmode_p7, 410 .platform = "power7+", 411 }, 412 { /* Power8E */ 413 .pvr_mask = 0xffff0000, 414 .pvr_value = 0x004b0000, 415 .cpu_name = "POWER8E (raw)", 416 .cpu_features = CPU_FTRS_POWER8E, 417 .cpu_user_features = COMMON_USER_POWER8, 418 .cpu_user_features2 = COMMON_USER2_POWER8, 419 .mmu_features = MMU_FTRS_POWER8, 420 .icache_bsize = 128, 421 .dcache_bsize = 128, 422 .num_pmcs = 6, 423 .pmc_type = PPC_PMC_IBM, 424 .oprofile_cpu_type = "ppc64/power8", 425 .oprofile_type = PPC_OPROFILE_INVALID, 426 .cpu_setup = __setup_cpu_power8, 427 .cpu_restore = __restore_cpu_power8, 428 .machine_check_early = __machine_check_early_realmode_p8, 429 .platform = "power8", 430 }, 431 { /* Power8NVL */ 432 .pvr_mask = 0xffff0000, 433 .pvr_value = 0x004c0000, 434 .cpu_name = "POWER8NVL (raw)", 435 .cpu_features = CPU_FTRS_POWER8, 436 .cpu_user_features = COMMON_USER_POWER8, 437 .cpu_user_features2 = COMMON_USER2_POWER8, 438 .mmu_features = MMU_FTRS_POWER8, 439 .icache_bsize = 128, 440 .dcache_bsize = 128, 441 .num_pmcs = 6, 442 .pmc_type = PPC_PMC_IBM, 443 .oprofile_cpu_type = "ppc64/power8", 444 .oprofile_type = PPC_OPROFILE_INVALID, 445 .cpu_setup = __setup_cpu_power8, 446 .cpu_restore = __restore_cpu_power8, 447 .machine_check_early = __machine_check_early_realmode_p8, 448 .platform = "power8", 449 }, 450 { /* Power8 DD1: Does not support doorbell IPIs */ 451 .pvr_mask = 0xffffff00, 452 .pvr_value = 0x004d0100, 453 .cpu_name = "POWER8 (raw)", 454 .cpu_features = CPU_FTRS_POWER8_DD1, 455 .cpu_user_features = COMMON_USER_POWER8, 456 .cpu_user_features2 = COMMON_USER2_POWER8, 457 .mmu_features = MMU_FTRS_POWER8, 458 .icache_bsize = 128, 459 .dcache_bsize = 128, 460 .num_pmcs = 6, 461 .pmc_type = PPC_PMC_IBM, 462 .oprofile_cpu_type = "ppc64/power8", 463 .oprofile_type = PPC_OPROFILE_INVALID, 464 .cpu_setup = __setup_cpu_power8, 465 .cpu_restore = __restore_cpu_power8, 466 .machine_check_early = __machine_check_early_realmode_p8, 467 .platform = "power8", 468 }, 469 { /* Power8 */ 470 .pvr_mask = 0xffff0000, 471 .pvr_value = 0x004d0000, 472 .cpu_name = "POWER8 (raw)", 473 .cpu_features = CPU_FTRS_POWER8, 474 .cpu_user_features = COMMON_USER_POWER8, 475 .cpu_user_features2 = COMMON_USER2_POWER8, 476 .mmu_features = MMU_FTRS_POWER8, 477 .icache_bsize = 128, 478 .dcache_bsize = 128, 479 .num_pmcs = 6, 480 .pmc_type = PPC_PMC_IBM, 481 .oprofile_cpu_type = "ppc64/power8", 482 .oprofile_type = PPC_OPROFILE_INVALID, 483 .cpu_setup = __setup_cpu_power8, 484 .cpu_restore = __restore_cpu_power8, 485 .machine_check_early = __machine_check_early_realmode_p8, 486 .platform = "power8", 487 }, 488 { /* Power9 DD1*/ 489 .pvr_mask = 0xffffff00, 490 .pvr_value = 0x004e0100, 491 .cpu_name = "POWER9 (raw)", 492 .cpu_features = CPU_FTRS_POWER9_DD1, 493 .cpu_user_features = COMMON_USER_POWER9, 494 .cpu_user_features2 = COMMON_USER2_POWER9, 495 .mmu_features = MMU_FTRS_POWER9, 496 .icache_bsize = 128, 497 .dcache_bsize = 128, 498 .num_pmcs = 6, 499 .pmc_type = PPC_PMC_IBM, 500 .oprofile_cpu_type = "ppc64/power9", 501 .oprofile_type = PPC_OPROFILE_INVALID, 502 .cpu_setup = __setup_cpu_power9, 503 .cpu_restore = __restore_cpu_power9, 504 .machine_check_early = __machine_check_early_realmode_p9, 505 .platform = "power9", 506 }, 507 { /* Power9 DD2.0 */ 508 .pvr_mask = 0xffffefff, 509 .pvr_value = 0x004e0200, 510 .cpu_name = "POWER9 (raw)", 511 .cpu_features = CPU_FTRS_POWER9_DD2_0, 512 .cpu_user_features = COMMON_USER_POWER9, 513 .cpu_user_features2 = COMMON_USER2_POWER9, 514 .mmu_features = MMU_FTRS_POWER9, 515 .icache_bsize = 128, 516 .dcache_bsize = 128, 517 .num_pmcs = 6, 518 .pmc_type = PPC_PMC_IBM, 519 .oprofile_cpu_type = "ppc64/power9", 520 .oprofile_type = PPC_OPROFILE_INVALID, 521 .cpu_setup = __setup_cpu_power9, 522 .cpu_restore = __restore_cpu_power9, 523 .machine_check_early = __machine_check_early_realmode_p9, 524 .platform = "power9", 525 }, 526 { /* Power9 DD 2.1 */ 527 .pvr_mask = 0xffffefff, 528 .pvr_value = 0x004e0201, 529 .cpu_name = "POWER9 (raw)", 530 .cpu_features = CPU_FTRS_POWER9_DD2_1, 531 .cpu_user_features = COMMON_USER_POWER9, 532 .cpu_user_features2 = COMMON_USER2_POWER9, 533 .mmu_features = MMU_FTRS_POWER9, 534 .icache_bsize = 128, 535 .dcache_bsize = 128, 536 .num_pmcs = 6, 537 .pmc_type = PPC_PMC_IBM, 538 .oprofile_cpu_type = "ppc64/power9", 539 .oprofile_type = PPC_OPROFILE_INVALID, 540 .cpu_setup = __setup_cpu_power9, 541 .cpu_restore = __restore_cpu_power9, 542 .machine_check_early = __machine_check_early_realmode_p9, 543 .platform = "power9", 544 }, 545 { /* Power9 DD2.2 or later */ 546 .pvr_mask = 0xffff0000, 547 .pvr_value = 0x004e0000, 548 .cpu_name = "POWER9 (raw)", 549 .cpu_features = CPU_FTRS_POWER9_DD2_2, 550 .cpu_user_features = COMMON_USER_POWER9, 551 .cpu_user_features2 = COMMON_USER2_POWER9, 552 .mmu_features = MMU_FTRS_POWER9, 553 .icache_bsize = 128, 554 .dcache_bsize = 128, 555 .num_pmcs = 6, 556 .pmc_type = PPC_PMC_IBM, 557 .oprofile_cpu_type = "ppc64/power9", 558 .oprofile_type = PPC_OPROFILE_INVALID, 559 .cpu_setup = __setup_cpu_power9, 560 .cpu_restore = __restore_cpu_power9, 561 .machine_check_early = __machine_check_early_realmode_p9, 562 .platform = "power9", 563 }, 564 { /* Cell Broadband Engine */ 565 .pvr_mask = 0xffff0000, 566 .pvr_value = 0x00700000, 567 .cpu_name = "Cell Broadband Engine", 568 .cpu_features = CPU_FTRS_CELL, 569 .cpu_user_features = COMMON_USER_PPC64 | 570 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 571 PPC_FEATURE_SMT, 572 .mmu_features = MMU_FTRS_CELL, 573 .icache_bsize = 128, 574 .dcache_bsize = 128, 575 .num_pmcs = 4, 576 .pmc_type = PPC_PMC_IBM, 577 .oprofile_cpu_type = "ppc64/cell-be", 578 .oprofile_type = PPC_OPROFILE_CELL, 579 .platform = "ppc-cell-be", 580 }, 581 { /* PA Semi PA6T */ 582 .pvr_mask = 0x7fff0000, 583 .pvr_value = 0x00900000, 584 .cpu_name = "PA6T", 585 .cpu_features = CPU_FTRS_PA6T, 586 .cpu_user_features = COMMON_USER_PA6T, 587 .mmu_features = MMU_FTRS_PA6T, 588 .icache_bsize = 64, 589 .dcache_bsize = 64, 590 .num_pmcs = 6, 591 .pmc_type = PPC_PMC_PA6T, 592 .cpu_setup = __setup_cpu_pa6t, 593 .cpu_restore = __restore_cpu_pa6t, 594 .oprofile_cpu_type = "ppc64/pa6t", 595 .oprofile_type = PPC_OPROFILE_PA6T, 596 .platform = "pa6t", 597 }, 598 { /* default match */ 599 .pvr_mask = 0x00000000, 600 .pvr_value = 0x00000000, 601 .cpu_name = "POWER5 (compatible)", 602 .cpu_features = CPU_FTRS_COMPATIBLE, 603 .cpu_user_features = COMMON_USER_PPC64, 604 .mmu_features = MMU_FTRS_POWER, 605 .icache_bsize = 128, 606 .dcache_bsize = 128, 607 .num_pmcs = 6, 608 .pmc_type = PPC_PMC_IBM, 609 .platform = "power5", 610 } 611 #endif /* CONFIG_PPC_BOOK3S_64 */ 612 613 #ifdef CONFIG_PPC32 614 #ifdef CONFIG_PPC_BOOK3S_32 615 { /* 601 */ 616 .pvr_mask = 0xffff0000, 617 .pvr_value = 0x00010000, 618 .cpu_name = "601", 619 .cpu_features = CPU_FTRS_PPC601, 620 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 621 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 622 .mmu_features = MMU_FTR_HPTE_TABLE, 623 .icache_bsize = 32, 624 .dcache_bsize = 32, 625 .machine_check = machine_check_generic, 626 .platform = "ppc601", 627 }, 628 { /* 603 */ 629 .pvr_mask = 0xffff0000, 630 .pvr_value = 0x00030000, 631 .cpu_name = "603", 632 .cpu_features = CPU_FTRS_603, 633 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 634 .mmu_features = 0, 635 .icache_bsize = 32, 636 .dcache_bsize = 32, 637 .cpu_setup = __setup_cpu_603, 638 .machine_check = machine_check_generic, 639 .platform = "ppc603", 640 }, 641 { /* 603e */ 642 .pvr_mask = 0xffff0000, 643 .pvr_value = 0x00060000, 644 .cpu_name = "603e", 645 .cpu_features = CPU_FTRS_603, 646 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 647 .mmu_features = 0, 648 .icache_bsize = 32, 649 .dcache_bsize = 32, 650 .cpu_setup = __setup_cpu_603, 651 .machine_check = machine_check_generic, 652 .platform = "ppc603", 653 }, 654 { /* 603ev */ 655 .pvr_mask = 0xffff0000, 656 .pvr_value = 0x00070000, 657 .cpu_name = "603ev", 658 .cpu_features = CPU_FTRS_603, 659 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 660 .mmu_features = 0, 661 .icache_bsize = 32, 662 .dcache_bsize = 32, 663 .cpu_setup = __setup_cpu_603, 664 .machine_check = machine_check_generic, 665 .platform = "ppc603", 666 }, 667 { /* 604 */ 668 .pvr_mask = 0xffff0000, 669 .pvr_value = 0x00040000, 670 .cpu_name = "604", 671 .cpu_features = CPU_FTRS_604, 672 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 673 .mmu_features = MMU_FTR_HPTE_TABLE, 674 .icache_bsize = 32, 675 .dcache_bsize = 32, 676 .num_pmcs = 2, 677 .cpu_setup = __setup_cpu_604, 678 .machine_check = machine_check_generic, 679 .platform = "ppc604", 680 }, 681 { /* 604e */ 682 .pvr_mask = 0xfffff000, 683 .pvr_value = 0x00090000, 684 .cpu_name = "604e", 685 .cpu_features = CPU_FTRS_604, 686 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 687 .mmu_features = MMU_FTR_HPTE_TABLE, 688 .icache_bsize = 32, 689 .dcache_bsize = 32, 690 .num_pmcs = 4, 691 .cpu_setup = __setup_cpu_604, 692 .machine_check = machine_check_generic, 693 .platform = "ppc604", 694 }, 695 { /* 604r */ 696 .pvr_mask = 0xffff0000, 697 .pvr_value = 0x00090000, 698 .cpu_name = "604r", 699 .cpu_features = CPU_FTRS_604, 700 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 701 .mmu_features = MMU_FTR_HPTE_TABLE, 702 .icache_bsize = 32, 703 .dcache_bsize = 32, 704 .num_pmcs = 4, 705 .cpu_setup = __setup_cpu_604, 706 .machine_check = machine_check_generic, 707 .platform = "ppc604", 708 }, 709 { /* 604ev */ 710 .pvr_mask = 0xffff0000, 711 .pvr_value = 0x000a0000, 712 .cpu_name = "604ev", 713 .cpu_features = CPU_FTRS_604, 714 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 715 .mmu_features = MMU_FTR_HPTE_TABLE, 716 .icache_bsize = 32, 717 .dcache_bsize = 32, 718 .num_pmcs = 4, 719 .cpu_setup = __setup_cpu_604, 720 .machine_check = machine_check_generic, 721 .platform = "ppc604", 722 }, 723 { /* 740/750 (0x4202, don't support TAU ?) */ 724 .pvr_mask = 0xffffffff, 725 .pvr_value = 0x00084202, 726 .cpu_name = "740/750", 727 .cpu_features = CPU_FTRS_740_NOTAU, 728 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 729 .mmu_features = MMU_FTR_HPTE_TABLE, 730 .icache_bsize = 32, 731 .dcache_bsize = 32, 732 .num_pmcs = 4, 733 .cpu_setup = __setup_cpu_750, 734 .machine_check = machine_check_generic, 735 .platform = "ppc750", 736 }, 737 { /* 750CX (80100 and 8010x?) */ 738 .pvr_mask = 0xfffffff0, 739 .pvr_value = 0x00080100, 740 .cpu_name = "750CX", 741 .cpu_features = CPU_FTRS_750, 742 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 743 .mmu_features = MMU_FTR_HPTE_TABLE, 744 .icache_bsize = 32, 745 .dcache_bsize = 32, 746 .num_pmcs = 4, 747 .cpu_setup = __setup_cpu_750cx, 748 .machine_check = machine_check_generic, 749 .platform = "ppc750", 750 }, 751 { /* 750CX (82201 and 82202) */ 752 .pvr_mask = 0xfffffff0, 753 .pvr_value = 0x00082200, 754 .cpu_name = "750CX", 755 .cpu_features = CPU_FTRS_750, 756 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 757 .mmu_features = MMU_FTR_HPTE_TABLE, 758 .icache_bsize = 32, 759 .dcache_bsize = 32, 760 .num_pmcs = 4, 761 .pmc_type = PPC_PMC_IBM, 762 .cpu_setup = __setup_cpu_750cx, 763 .machine_check = machine_check_generic, 764 .platform = "ppc750", 765 }, 766 { /* 750CXe (82214) */ 767 .pvr_mask = 0xfffffff0, 768 .pvr_value = 0x00082210, 769 .cpu_name = "750CXe", 770 .cpu_features = CPU_FTRS_750, 771 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 772 .mmu_features = MMU_FTR_HPTE_TABLE, 773 .icache_bsize = 32, 774 .dcache_bsize = 32, 775 .num_pmcs = 4, 776 .pmc_type = PPC_PMC_IBM, 777 .cpu_setup = __setup_cpu_750cx, 778 .machine_check = machine_check_generic, 779 .platform = "ppc750", 780 }, 781 { /* 750CXe "Gekko" (83214) */ 782 .pvr_mask = 0xffffffff, 783 .pvr_value = 0x00083214, 784 .cpu_name = "750CXe", 785 .cpu_features = CPU_FTRS_750, 786 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 787 .mmu_features = MMU_FTR_HPTE_TABLE, 788 .icache_bsize = 32, 789 .dcache_bsize = 32, 790 .num_pmcs = 4, 791 .pmc_type = PPC_PMC_IBM, 792 .cpu_setup = __setup_cpu_750cx, 793 .machine_check = machine_check_generic, 794 .platform = "ppc750", 795 }, 796 { /* 750CL (and "Broadway") */ 797 .pvr_mask = 0xfffff0e0, 798 .pvr_value = 0x00087000, 799 .cpu_name = "750CL", 800 .cpu_features = CPU_FTRS_750CL, 801 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 802 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 803 .icache_bsize = 32, 804 .dcache_bsize = 32, 805 .num_pmcs = 4, 806 .pmc_type = PPC_PMC_IBM, 807 .cpu_setup = __setup_cpu_750, 808 .machine_check = machine_check_generic, 809 .platform = "ppc750", 810 .oprofile_cpu_type = "ppc/750", 811 .oprofile_type = PPC_OPROFILE_G4, 812 }, 813 { /* 745/755 */ 814 .pvr_mask = 0xfffff000, 815 .pvr_value = 0x00083000, 816 .cpu_name = "745/755", 817 .cpu_features = CPU_FTRS_750, 818 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 819 .mmu_features = MMU_FTR_HPTE_TABLE, 820 .icache_bsize = 32, 821 .dcache_bsize = 32, 822 .num_pmcs = 4, 823 .pmc_type = PPC_PMC_IBM, 824 .cpu_setup = __setup_cpu_750, 825 .machine_check = machine_check_generic, 826 .platform = "ppc750", 827 }, 828 { /* 750FX rev 1.x */ 829 .pvr_mask = 0xffffff00, 830 .pvr_value = 0x70000100, 831 .cpu_name = "750FX", 832 .cpu_features = CPU_FTRS_750FX1, 833 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 834 .mmu_features = MMU_FTR_HPTE_TABLE, 835 .icache_bsize = 32, 836 .dcache_bsize = 32, 837 .num_pmcs = 4, 838 .pmc_type = PPC_PMC_IBM, 839 .cpu_setup = __setup_cpu_750, 840 .machine_check = machine_check_generic, 841 .platform = "ppc750", 842 .oprofile_cpu_type = "ppc/750", 843 .oprofile_type = PPC_OPROFILE_G4, 844 }, 845 { /* 750FX rev 2.0 must disable HID0[DPM] */ 846 .pvr_mask = 0xffffffff, 847 .pvr_value = 0x70000200, 848 .cpu_name = "750FX", 849 .cpu_features = CPU_FTRS_750FX2, 850 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 851 .mmu_features = MMU_FTR_HPTE_TABLE, 852 .icache_bsize = 32, 853 .dcache_bsize = 32, 854 .num_pmcs = 4, 855 .pmc_type = PPC_PMC_IBM, 856 .cpu_setup = __setup_cpu_750, 857 .machine_check = machine_check_generic, 858 .platform = "ppc750", 859 .oprofile_cpu_type = "ppc/750", 860 .oprofile_type = PPC_OPROFILE_G4, 861 }, 862 { /* 750FX (All revs except 2.0) */ 863 .pvr_mask = 0xffff0000, 864 .pvr_value = 0x70000000, 865 .cpu_name = "750FX", 866 .cpu_features = CPU_FTRS_750FX, 867 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 868 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 869 .icache_bsize = 32, 870 .dcache_bsize = 32, 871 .num_pmcs = 4, 872 .pmc_type = PPC_PMC_IBM, 873 .cpu_setup = __setup_cpu_750fx, 874 .machine_check = machine_check_generic, 875 .platform = "ppc750", 876 .oprofile_cpu_type = "ppc/750", 877 .oprofile_type = PPC_OPROFILE_G4, 878 }, 879 { /* 750GX */ 880 .pvr_mask = 0xffff0000, 881 .pvr_value = 0x70020000, 882 .cpu_name = "750GX", 883 .cpu_features = CPU_FTRS_750GX, 884 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 885 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 886 .icache_bsize = 32, 887 .dcache_bsize = 32, 888 .num_pmcs = 4, 889 .pmc_type = PPC_PMC_IBM, 890 .cpu_setup = __setup_cpu_750fx, 891 .machine_check = machine_check_generic, 892 .platform = "ppc750", 893 .oprofile_cpu_type = "ppc/750", 894 .oprofile_type = PPC_OPROFILE_G4, 895 }, 896 { /* 740/750 (L2CR bit need fixup for 740) */ 897 .pvr_mask = 0xffff0000, 898 .pvr_value = 0x00080000, 899 .cpu_name = "740/750", 900 .cpu_features = CPU_FTRS_740, 901 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 902 .mmu_features = MMU_FTR_HPTE_TABLE, 903 .icache_bsize = 32, 904 .dcache_bsize = 32, 905 .num_pmcs = 4, 906 .pmc_type = PPC_PMC_IBM, 907 .cpu_setup = __setup_cpu_750, 908 .machine_check = machine_check_generic, 909 .platform = "ppc750", 910 }, 911 { /* 7400 rev 1.1 ? (no TAU) */ 912 .pvr_mask = 0xffffffff, 913 .pvr_value = 0x000c1101, 914 .cpu_name = "7400 (1.1)", 915 .cpu_features = CPU_FTRS_7400_NOTAU, 916 .cpu_user_features = COMMON_USER | 917 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 918 .mmu_features = MMU_FTR_HPTE_TABLE, 919 .icache_bsize = 32, 920 .dcache_bsize = 32, 921 .num_pmcs = 4, 922 .pmc_type = PPC_PMC_G4, 923 .cpu_setup = __setup_cpu_7400, 924 .machine_check = machine_check_generic, 925 .platform = "ppc7400", 926 }, 927 { /* 7400 */ 928 .pvr_mask = 0xffff0000, 929 .pvr_value = 0x000c0000, 930 .cpu_name = "7400", 931 .cpu_features = CPU_FTRS_7400, 932 .cpu_user_features = COMMON_USER | 933 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 934 .mmu_features = MMU_FTR_HPTE_TABLE, 935 .icache_bsize = 32, 936 .dcache_bsize = 32, 937 .num_pmcs = 4, 938 .pmc_type = PPC_PMC_G4, 939 .cpu_setup = __setup_cpu_7400, 940 .machine_check = machine_check_generic, 941 .platform = "ppc7400", 942 }, 943 { /* 7410 */ 944 .pvr_mask = 0xffff0000, 945 .pvr_value = 0x800c0000, 946 .cpu_name = "7410", 947 .cpu_features = CPU_FTRS_7400, 948 .cpu_user_features = COMMON_USER | 949 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 950 .mmu_features = MMU_FTR_HPTE_TABLE, 951 .icache_bsize = 32, 952 .dcache_bsize = 32, 953 .num_pmcs = 4, 954 .pmc_type = PPC_PMC_G4, 955 .cpu_setup = __setup_cpu_7410, 956 .machine_check = machine_check_generic, 957 .platform = "ppc7400", 958 }, 959 { /* 7450 2.0 - no doze/nap */ 960 .pvr_mask = 0xffffffff, 961 .pvr_value = 0x80000200, 962 .cpu_name = "7450", 963 .cpu_features = CPU_FTRS_7450_20, 964 .cpu_user_features = COMMON_USER | 965 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 966 .mmu_features = MMU_FTR_HPTE_TABLE, 967 .icache_bsize = 32, 968 .dcache_bsize = 32, 969 .num_pmcs = 6, 970 .pmc_type = PPC_PMC_G4, 971 .cpu_setup = __setup_cpu_745x, 972 .oprofile_cpu_type = "ppc/7450", 973 .oprofile_type = PPC_OPROFILE_G4, 974 .machine_check = machine_check_generic, 975 .platform = "ppc7450", 976 }, 977 { /* 7450 2.1 */ 978 .pvr_mask = 0xffffffff, 979 .pvr_value = 0x80000201, 980 .cpu_name = "7450", 981 .cpu_features = CPU_FTRS_7450_21, 982 .cpu_user_features = COMMON_USER | 983 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 984 .mmu_features = MMU_FTR_HPTE_TABLE, 985 .icache_bsize = 32, 986 .dcache_bsize = 32, 987 .num_pmcs = 6, 988 .pmc_type = PPC_PMC_G4, 989 .cpu_setup = __setup_cpu_745x, 990 .oprofile_cpu_type = "ppc/7450", 991 .oprofile_type = PPC_OPROFILE_G4, 992 .machine_check = machine_check_generic, 993 .platform = "ppc7450", 994 }, 995 { /* 7450 2.3 and newer */ 996 .pvr_mask = 0xffff0000, 997 .pvr_value = 0x80000000, 998 .cpu_name = "7450", 999 .cpu_features = CPU_FTRS_7450_23, 1000 .cpu_user_features = COMMON_USER | 1001 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1002 .mmu_features = MMU_FTR_HPTE_TABLE, 1003 .icache_bsize = 32, 1004 .dcache_bsize = 32, 1005 .num_pmcs = 6, 1006 .pmc_type = PPC_PMC_G4, 1007 .cpu_setup = __setup_cpu_745x, 1008 .oprofile_cpu_type = "ppc/7450", 1009 .oprofile_type = PPC_OPROFILE_G4, 1010 .machine_check = machine_check_generic, 1011 .platform = "ppc7450", 1012 }, 1013 { /* 7455 rev 1.x */ 1014 .pvr_mask = 0xffffff00, 1015 .pvr_value = 0x80010100, 1016 .cpu_name = "7455", 1017 .cpu_features = CPU_FTRS_7455_1, 1018 .cpu_user_features = COMMON_USER | 1019 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1020 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1021 .icache_bsize = 32, 1022 .dcache_bsize = 32, 1023 .num_pmcs = 6, 1024 .pmc_type = PPC_PMC_G4, 1025 .cpu_setup = __setup_cpu_745x, 1026 .oprofile_cpu_type = "ppc/7450", 1027 .oprofile_type = PPC_OPROFILE_G4, 1028 .machine_check = machine_check_generic, 1029 .platform = "ppc7450", 1030 }, 1031 { /* 7455 rev 2.0 */ 1032 .pvr_mask = 0xffffffff, 1033 .pvr_value = 0x80010200, 1034 .cpu_name = "7455", 1035 .cpu_features = CPU_FTRS_7455_20, 1036 .cpu_user_features = COMMON_USER | 1037 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1038 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1039 .icache_bsize = 32, 1040 .dcache_bsize = 32, 1041 .num_pmcs = 6, 1042 .pmc_type = PPC_PMC_G4, 1043 .cpu_setup = __setup_cpu_745x, 1044 .oprofile_cpu_type = "ppc/7450", 1045 .oprofile_type = PPC_OPROFILE_G4, 1046 .machine_check = machine_check_generic, 1047 .platform = "ppc7450", 1048 }, 1049 { /* 7455 others */ 1050 .pvr_mask = 0xffff0000, 1051 .pvr_value = 0x80010000, 1052 .cpu_name = "7455", 1053 .cpu_features = CPU_FTRS_7455, 1054 .cpu_user_features = COMMON_USER | 1055 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1056 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1057 .icache_bsize = 32, 1058 .dcache_bsize = 32, 1059 .num_pmcs = 6, 1060 .pmc_type = PPC_PMC_G4, 1061 .cpu_setup = __setup_cpu_745x, 1062 .oprofile_cpu_type = "ppc/7450", 1063 .oprofile_type = PPC_OPROFILE_G4, 1064 .machine_check = machine_check_generic, 1065 .platform = "ppc7450", 1066 }, 1067 { /* 7447/7457 Rev 1.0 */ 1068 .pvr_mask = 0xffffffff, 1069 .pvr_value = 0x80020100, 1070 .cpu_name = "7447/7457", 1071 .cpu_features = CPU_FTRS_7447_10, 1072 .cpu_user_features = COMMON_USER | 1073 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1074 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1075 .icache_bsize = 32, 1076 .dcache_bsize = 32, 1077 .num_pmcs = 6, 1078 .pmc_type = PPC_PMC_G4, 1079 .cpu_setup = __setup_cpu_745x, 1080 .oprofile_cpu_type = "ppc/7450", 1081 .oprofile_type = PPC_OPROFILE_G4, 1082 .machine_check = machine_check_generic, 1083 .platform = "ppc7450", 1084 }, 1085 { /* 7447/7457 Rev 1.1 */ 1086 .pvr_mask = 0xffffffff, 1087 .pvr_value = 0x80020101, 1088 .cpu_name = "7447/7457", 1089 .cpu_features = CPU_FTRS_7447_10, 1090 .cpu_user_features = COMMON_USER | 1091 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1092 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1093 .icache_bsize = 32, 1094 .dcache_bsize = 32, 1095 .num_pmcs = 6, 1096 .pmc_type = PPC_PMC_G4, 1097 .cpu_setup = __setup_cpu_745x, 1098 .oprofile_cpu_type = "ppc/7450", 1099 .oprofile_type = PPC_OPROFILE_G4, 1100 .machine_check = machine_check_generic, 1101 .platform = "ppc7450", 1102 }, 1103 { /* 7447/7457 Rev 1.2 and later */ 1104 .pvr_mask = 0xffff0000, 1105 .pvr_value = 0x80020000, 1106 .cpu_name = "7447/7457", 1107 .cpu_features = CPU_FTRS_7447, 1108 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1109 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1110 .icache_bsize = 32, 1111 .dcache_bsize = 32, 1112 .num_pmcs = 6, 1113 .pmc_type = PPC_PMC_G4, 1114 .cpu_setup = __setup_cpu_745x, 1115 .oprofile_cpu_type = "ppc/7450", 1116 .oprofile_type = PPC_OPROFILE_G4, 1117 .machine_check = machine_check_generic, 1118 .platform = "ppc7450", 1119 }, 1120 { /* 7447A */ 1121 .pvr_mask = 0xffff0000, 1122 .pvr_value = 0x80030000, 1123 .cpu_name = "7447A", 1124 .cpu_features = CPU_FTRS_7447A, 1125 .cpu_user_features = COMMON_USER | 1126 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1127 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1128 .icache_bsize = 32, 1129 .dcache_bsize = 32, 1130 .num_pmcs = 6, 1131 .pmc_type = PPC_PMC_G4, 1132 .cpu_setup = __setup_cpu_745x, 1133 .oprofile_cpu_type = "ppc/7450", 1134 .oprofile_type = PPC_OPROFILE_G4, 1135 .machine_check = machine_check_generic, 1136 .platform = "ppc7450", 1137 }, 1138 { /* 7448 */ 1139 .pvr_mask = 0xffff0000, 1140 .pvr_value = 0x80040000, 1141 .cpu_name = "7448", 1142 .cpu_features = CPU_FTRS_7448, 1143 .cpu_user_features = COMMON_USER | 1144 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1145 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1146 .icache_bsize = 32, 1147 .dcache_bsize = 32, 1148 .num_pmcs = 6, 1149 .pmc_type = PPC_PMC_G4, 1150 .cpu_setup = __setup_cpu_745x, 1151 .oprofile_cpu_type = "ppc/7450", 1152 .oprofile_type = PPC_OPROFILE_G4, 1153 .machine_check = machine_check_generic, 1154 .platform = "ppc7450", 1155 }, 1156 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1157 .pvr_mask = 0x7fff0000, 1158 .pvr_value = 0x00810000, 1159 .cpu_name = "82xx", 1160 .cpu_features = CPU_FTRS_82XX, 1161 .cpu_user_features = COMMON_USER, 1162 .mmu_features = 0, 1163 .icache_bsize = 32, 1164 .dcache_bsize = 32, 1165 .cpu_setup = __setup_cpu_603, 1166 .machine_check = machine_check_generic, 1167 .platform = "ppc603", 1168 }, 1169 { /* All G2_LE (603e core, plus some) have the same pvr */ 1170 .pvr_mask = 0x7fff0000, 1171 .pvr_value = 0x00820000, 1172 .cpu_name = "G2_LE", 1173 .cpu_features = CPU_FTRS_G2_LE, 1174 .cpu_user_features = COMMON_USER, 1175 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1176 .icache_bsize = 32, 1177 .dcache_bsize = 32, 1178 .cpu_setup = __setup_cpu_603, 1179 .machine_check = machine_check_generic, 1180 .platform = "ppc603", 1181 }, 1182 { /* e300c1 (a 603e core, plus some) on 83xx */ 1183 .pvr_mask = 0x7fff0000, 1184 .pvr_value = 0x00830000, 1185 .cpu_name = "e300c1", 1186 .cpu_features = CPU_FTRS_E300, 1187 .cpu_user_features = COMMON_USER, 1188 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1189 .icache_bsize = 32, 1190 .dcache_bsize = 32, 1191 .cpu_setup = __setup_cpu_603, 1192 .machine_check = machine_check_generic, 1193 .platform = "ppc603", 1194 }, 1195 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1196 .pvr_mask = 0x7fff0000, 1197 .pvr_value = 0x00840000, 1198 .cpu_name = "e300c2", 1199 .cpu_features = CPU_FTRS_E300C2, 1200 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1201 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1202 MMU_FTR_NEED_DTLB_SW_LRU, 1203 .icache_bsize = 32, 1204 .dcache_bsize = 32, 1205 .cpu_setup = __setup_cpu_603, 1206 .machine_check = machine_check_generic, 1207 .platform = "ppc603", 1208 }, 1209 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1210 .pvr_mask = 0x7fff0000, 1211 .pvr_value = 0x00850000, 1212 .cpu_name = "e300c3", 1213 .cpu_features = CPU_FTRS_E300, 1214 .cpu_user_features = COMMON_USER, 1215 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1216 MMU_FTR_NEED_DTLB_SW_LRU, 1217 .icache_bsize = 32, 1218 .dcache_bsize = 32, 1219 .cpu_setup = __setup_cpu_603, 1220 .machine_check = machine_check_generic, 1221 .num_pmcs = 4, 1222 .oprofile_cpu_type = "ppc/e300", 1223 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1224 .platform = "ppc603", 1225 }, 1226 { /* e300c4 (e300c1, plus one IU) */ 1227 .pvr_mask = 0x7fff0000, 1228 .pvr_value = 0x00860000, 1229 .cpu_name = "e300c4", 1230 .cpu_features = CPU_FTRS_E300, 1231 .cpu_user_features = COMMON_USER, 1232 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1233 MMU_FTR_NEED_DTLB_SW_LRU, 1234 .icache_bsize = 32, 1235 .dcache_bsize = 32, 1236 .cpu_setup = __setup_cpu_603, 1237 .machine_check = machine_check_generic, 1238 .num_pmcs = 4, 1239 .oprofile_cpu_type = "ppc/e300", 1240 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1241 .platform = "ppc603", 1242 }, 1243 { /* default match, we assume split I/D cache & TB (non-601)... */ 1244 .pvr_mask = 0x00000000, 1245 .pvr_value = 0x00000000, 1246 .cpu_name = "(generic PPC)", 1247 .cpu_features = CPU_FTRS_CLASSIC32, 1248 .cpu_user_features = COMMON_USER, 1249 .mmu_features = MMU_FTR_HPTE_TABLE, 1250 .icache_bsize = 32, 1251 .dcache_bsize = 32, 1252 .machine_check = machine_check_generic, 1253 .platform = "ppc603", 1254 }, 1255 #endif /* CONFIG_PPC_BOOK3S_32 */ 1256 #ifdef CONFIG_PPC_8xx 1257 { /* 8xx */ 1258 .pvr_mask = 0xffff0000, 1259 .pvr_value = PVR_8xx, 1260 .cpu_name = "8xx", 1261 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1262 * if the 8xx code is there.... */ 1263 .cpu_features = CPU_FTRS_8XX, 1264 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1265 .mmu_features = MMU_FTR_TYPE_8xx, 1266 .icache_bsize = 16, 1267 .dcache_bsize = 16, 1268 .machine_check = machine_check_8xx, 1269 .platform = "ppc823", 1270 }, 1271 #endif /* CONFIG_PPC_8xx */ 1272 #ifdef CONFIG_40x 1273 { /* 403GC */ 1274 .pvr_mask = 0xffffff00, 1275 .pvr_value = 0x00200200, 1276 .cpu_name = "403GC", 1277 .cpu_features = CPU_FTRS_40X, 1278 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1279 .mmu_features = MMU_FTR_TYPE_40x, 1280 .icache_bsize = 16, 1281 .dcache_bsize = 16, 1282 .machine_check = machine_check_4xx, 1283 .platform = "ppc403", 1284 }, 1285 { /* 403GCX */ 1286 .pvr_mask = 0xffffff00, 1287 .pvr_value = 0x00201400, 1288 .cpu_name = "403GCX", 1289 .cpu_features = CPU_FTRS_40X, 1290 .cpu_user_features = PPC_FEATURE_32 | 1291 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1292 .mmu_features = MMU_FTR_TYPE_40x, 1293 .icache_bsize = 16, 1294 .dcache_bsize = 16, 1295 .machine_check = machine_check_4xx, 1296 .platform = "ppc403", 1297 }, 1298 { /* 403G ?? */ 1299 .pvr_mask = 0xffff0000, 1300 .pvr_value = 0x00200000, 1301 .cpu_name = "403G ??", 1302 .cpu_features = CPU_FTRS_40X, 1303 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1304 .mmu_features = MMU_FTR_TYPE_40x, 1305 .icache_bsize = 16, 1306 .dcache_bsize = 16, 1307 .machine_check = machine_check_4xx, 1308 .platform = "ppc403", 1309 }, 1310 { /* 405GP */ 1311 .pvr_mask = 0xffff0000, 1312 .pvr_value = 0x40110000, 1313 .cpu_name = "405GP", 1314 .cpu_features = CPU_FTRS_40X, 1315 .cpu_user_features = PPC_FEATURE_32 | 1316 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1317 .mmu_features = MMU_FTR_TYPE_40x, 1318 .icache_bsize = 32, 1319 .dcache_bsize = 32, 1320 .machine_check = machine_check_4xx, 1321 .platform = "ppc405", 1322 }, 1323 { /* STB 03xxx */ 1324 .pvr_mask = 0xffff0000, 1325 .pvr_value = 0x40130000, 1326 .cpu_name = "STB03xxx", 1327 .cpu_features = CPU_FTRS_40X, 1328 .cpu_user_features = PPC_FEATURE_32 | 1329 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1330 .mmu_features = MMU_FTR_TYPE_40x, 1331 .icache_bsize = 32, 1332 .dcache_bsize = 32, 1333 .machine_check = machine_check_4xx, 1334 .platform = "ppc405", 1335 }, 1336 { /* STB 04xxx */ 1337 .pvr_mask = 0xffff0000, 1338 .pvr_value = 0x41810000, 1339 .cpu_name = "STB04xxx", 1340 .cpu_features = CPU_FTRS_40X, 1341 .cpu_user_features = PPC_FEATURE_32 | 1342 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1343 .mmu_features = MMU_FTR_TYPE_40x, 1344 .icache_bsize = 32, 1345 .dcache_bsize = 32, 1346 .machine_check = machine_check_4xx, 1347 .platform = "ppc405", 1348 }, 1349 { /* NP405L */ 1350 .pvr_mask = 0xffff0000, 1351 .pvr_value = 0x41610000, 1352 .cpu_name = "NP405L", 1353 .cpu_features = CPU_FTRS_40X, 1354 .cpu_user_features = PPC_FEATURE_32 | 1355 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1356 .mmu_features = MMU_FTR_TYPE_40x, 1357 .icache_bsize = 32, 1358 .dcache_bsize = 32, 1359 .machine_check = machine_check_4xx, 1360 .platform = "ppc405", 1361 }, 1362 { /* NP4GS3 */ 1363 .pvr_mask = 0xffff0000, 1364 .pvr_value = 0x40B10000, 1365 .cpu_name = "NP4GS3", 1366 .cpu_features = CPU_FTRS_40X, 1367 .cpu_user_features = PPC_FEATURE_32 | 1368 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1369 .mmu_features = MMU_FTR_TYPE_40x, 1370 .icache_bsize = 32, 1371 .dcache_bsize = 32, 1372 .machine_check = machine_check_4xx, 1373 .platform = "ppc405", 1374 }, 1375 { /* NP405H */ 1376 .pvr_mask = 0xffff0000, 1377 .pvr_value = 0x41410000, 1378 .cpu_name = "NP405H", 1379 .cpu_features = CPU_FTRS_40X, 1380 .cpu_user_features = PPC_FEATURE_32 | 1381 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1382 .mmu_features = MMU_FTR_TYPE_40x, 1383 .icache_bsize = 32, 1384 .dcache_bsize = 32, 1385 .machine_check = machine_check_4xx, 1386 .platform = "ppc405", 1387 }, 1388 { /* 405GPr */ 1389 .pvr_mask = 0xffff0000, 1390 .pvr_value = 0x50910000, 1391 .cpu_name = "405GPr", 1392 .cpu_features = CPU_FTRS_40X, 1393 .cpu_user_features = PPC_FEATURE_32 | 1394 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1395 .mmu_features = MMU_FTR_TYPE_40x, 1396 .icache_bsize = 32, 1397 .dcache_bsize = 32, 1398 .machine_check = machine_check_4xx, 1399 .platform = "ppc405", 1400 }, 1401 { /* STBx25xx */ 1402 .pvr_mask = 0xffff0000, 1403 .pvr_value = 0x51510000, 1404 .cpu_name = "STBx25xx", 1405 .cpu_features = CPU_FTRS_40X, 1406 .cpu_user_features = PPC_FEATURE_32 | 1407 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1408 .mmu_features = MMU_FTR_TYPE_40x, 1409 .icache_bsize = 32, 1410 .dcache_bsize = 32, 1411 .machine_check = machine_check_4xx, 1412 .platform = "ppc405", 1413 }, 1414 { /* 405LP */ 1415 .pvr_mask = 0xffff0000, 1416 .pvr_value = 0x41F10000, 1417 .cpu_name = "405LP", 1418 .cpu_features = CPU_FTRS_40X, 1419 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1420 .mmu_features = MMU_FTR_TYPE_40x, 1421 .icache_bsize = 32, 1422 .dcache_bsize = 32, 1423 .machine_check = machine_check_4xx, 1424 .platform = "ppc405", 1425 }, 1426 { /* Xilinx Virtex-II Pro */ 1427 .pvr_mask = 0xfffff000, 1428 .pvr_value = 0x20010000, 1429 .cpu_name = "Virtex-II Pro", 1430 .cpu_features = CPU_FTRS_40X, 1431 .cpu_user_features = PPC_FEATURE_32 | 1432 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1433 .mmu_features = MMU_FTR_TYPE_40x, 1434 .icache_bsize = 32, 1435 .dcache_bsize = 32, 1436 .machine_check = machine_check_4xx, 1437 .platform = "ppc405", 1438 }, 1439 { /* Xilinx Virtex-4 FX */ 1440 .pvr_mask = 0xfffff000, 1441 .pvr_value = 0x20011000, 1442 .cpu_name = "Virtex-4 FX", 1443 .cpu_features = CPU_FTRS_40X, 1444 .cpu_user_features = PPC_FEATURE_32 | 1445 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1446 .mmu_features = MMU_FTR_TYPE_40x, 1447 .icache_bsize = 32, 1448 .dcache_bsize = 32, 1449 .machine_check = machine_check_4xx, 1450 .platform = "ppc405", 1451 }, 1452 { /* 405EP */ 1453 .pvr_mask = 0xffff0000, 1454 .pvr_value = 0x51210000, 1455 .cpu_name = "405EP", 1456 .cpu_features = CPU_FTRS_40X, 1457 .cpu_user_features = PPC_FEATURE_32 | 1458 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1459 .mmu_features = MMU_FTR_TYPE_40x, 1460 .icache_bsize = 32, 1461 .dcache_bsize = 32, 1462 .machine_check = machine_check_4xx, 1463 .platform = "ppc405", 1464 }, 1465 { /* 405EX Rev. A/B with Security */ 1466 .pvr_mask = 0xffff000f, 1467 .pvr_value = 0x12910007, 1468 .cpu_name = "405EX Rev. A/B", 1469 .cpu_features = CPU_FTRS_40X, 1470 .cpu_user_features = PPC_FEATURE_32 | 1471 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1472 .mmu_features = MMU_FTR_TYPE_40x, 1473 .icache_bsize = 32, 1474 .dcache_bsize = 32, 1475 .machine_check = machine_check_4xx, 1476 .platform = "ppc405", 1477 }, 1478 { /* 405EX Rev. C without Security */ 1479 .pvr_mask = 0xffff000f, 1480 .pvr_value = 0x1291000d, 1481 .cpu_name = "405EX Rev. C", 1482 .cpu_features = CPU_FTRS_40X, 1483 .cpu_user_features = PPC_FEATURE_32 | 1484 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1485 .mmu_features = MMU_FTR_TYPE_40x, 1486 .icache_bsize = 32, 1487 .dcache_bsize = 32, 1488 .machine_check = machine_check_4xx, 1489 .platform = "ppc405", 1490 }, 1491 { /* 405EX Rev. C with Security */ 1492 .pvr_mask = 0xffff000f, 1493 .pvr_value = 0x1291000f, 1494 .cpu_name = "405EX Rev. C", 1495 .cpu_features = CPU_FTRS_40X, 1496 .cpu_user_features = PPC_FEATURE_32 | 1497 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1498 .mmu_features = MMU_FTR_TYPE_40x, 1499 .icache_bsize = 32, 1500 .dcache_bsize = 32, 1501 .machine_check = machine_check_4xx, 1502 .platform = "ppc405", 1503 }, 1504 { /* 405EX Rev. D without Security */ 1505 .pvr_mask = 0xffff000f, 1506 .pvr_value = 0x12910003, 1507 .cpu_name = "405EX Rev. D", 1508 .cpu_features = CPU_FTRS_40X, 1509 .cpu_user_features = PPC_FEATURE_32 | 1510 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1511 .mmu_features = MMU_FTR_TYPE_40x, 1512 .icache_bsize = 32, 1513 .dcache_bsize = 32, 1514 .machine_check = machine_check_4xx, 1515 .platform = "ppc405", 1516 }, 1517 { /* 405EX Rev. D with Security */ 1518 .pvr_mask = 0xffff000f, 1519 .pvr_value = 0x12910005, 1520 .cpu_name = "405EX Rev. D", 1521 .cpu_features = CPU_FTRS_40X, 1522 .cpu_user_features = PPC_FEATURE_32 | 1523 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1524 .mmu_features = MMU_FTR_TYPE_40x, 1525 .icache_bsize = 32, 1526 .dcache_bsize = 32, 1527 .machine_check = machine_check_4xx, 1528 .platform = "ppc405", 1529 }, 1530 { /* 405EXr Rev. A/B without Security */ 1531 .pvr_mask = 0xffff000f, 1532 .pvr_value = 0x12910001, 1533 .cpu_name = "405EXr Rev. A/B", 1534 .cpu_features = CPU_FTRS_40X, 1535 .cpu_user_features = PPC_FEATURE_32 | 1536 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1537 .mmu_features = MMU_FTR_TYPE_40x, 1538 .icache_bsize = 32, 1539 .dcache_bsize = 32, 1540 .machine_check = machine_check_4xx, 1541 .platform = "ppc405", 1542 }, 1543 { /* 405EXr Rev. C without Security */ 1544 .pvr_mask = 0xffff000f, 1545 .pvr_value = 0x12910009, 1546 .cpu_name = "405EXr Rev. C", 1547 .cpu_features = CPU_FTRS_40X, 1548 .cpu_user_features = PPC_FEATURE_32 | 1549 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1550 .mmu_features = MMU_FTR_TYPE_40x, 1551 .icache_bsize = 32, 1552 .dcache_bsize = 32, 1553 .machine_check = machine_check_4xx, 1554 .platform = "ppc405", 1555 }, 1556 { /* 405EXr Rev. C with Security */ 1557 .pvr_mask = 0xffff000f, 1558 .pvr_value = 0x1291000b, 1559 .cpu_name = "405EXr Rev. C", 1560 .cpu_features = CPU_FTRS_40X, 1561 .cpu_user_features = PPC_FEATURE_32 | 1562 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1563 .mmu_features = MMU_FTR_TYPE_40x, 1564 .icache_bsize = 32, 1565 .dcache_bsize = 32, 1566 .machine_check = machine_check_4xx, 1567 .platform = "ppc405", 1568 }, 1569 { /* 405EXr Rev. D without Security */ 1570 .pvr_mask = 0xffff000f, 1571 .pvr_value = 0x12910000, 1572 .cpu_name = "405EXr Rev. D", 1573 .cpu_features = CPU_FTRS_40X, 1574 .cpu_user_features = PPC_FEATURE_32 | 1575 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1576 .mmu_features = MMU_FTR_TYPE_40x, 1577 .icache_bsize = 32, 1578 .dcache_bsize = 32, 1579 .machine_check = machine_check_4xx, 1580 .platform = "ppc405", 1581 }, 1582 { /* 405EXr Rev. D with Security */ 1583 .pvr_mask = 0xffff000f, 1584 .pvr_value = 0x12910002, 1585 .cpu_name = "405EXr Rev. D", 1586 .cpu_features = CPU_FTRS_40X, 1587 .cpu_user_features = PPC_FEATURE_32 | 1588 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1589 .mmu_features = MMU_FTR_TYPE_40x, 1590 .icache_bsize = 32, 1591 .dcache_bsize = 32, 1592 .machine_check = machine_check_4xx, 1593 .platform = "ppc405", 1594 }, 1595 { 1596 /* 405EZ */ 1597 .pvr_mask = 0xffff0000, 1598 .pvr_value = 0x41510000, 1599 .cpu_name = "405EZ", 1600 .cpu_features = CPU_FTRS_40X, 1601 .cpu_user_features = PPC_FEATURE_32 | 1602 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1603 .mmu_features = MMU_FTR_TYPE_40x, 1604 .icache_bsize = 32, 1605 .dcache_bsize = 32, 1606 .machine_check = machine_check_4xx, 1607 .platform = "ppc405", 1608 }, 1609 { /* APM8018X */ 1610 .pvr_mask = 0xffff0000, 1611 .pvr_value = 0x7ff11432, 1612 .cpu_name = "APM8018X", 1613 .cpu_features = CPU_FTRS_40X, 1614 .cpu_user_features = PPC_FEATURE_32 | 1615 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1616 .mmu_features = MMU_FTR_TYPE_40x, 1617 .icache_bsize = 32, 1618 .dcache_bsize = 32, 1619 .machine_check = machine_check_4xx, 1620 .platform = "ppc405", 1621 }, 1622 { /* default match */ 1623 .pvr_mask = 0x00000000, 1624 .pvr_value = 0x00000000, 1625 .cpu_name = "(generic 40x PPC)", 1626 .cpu_features = CPU_FTRS_40X, 1627 .cpu_user_features = PPC_FEATURE_32 | 1628 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1629 .mmu_features = MMU_FTR_TYPE_40x, 1630 .icache_bsize = 32, 1631 .dcache_bsize = 32, 1632 .machine_check = machine_check_4xx, 1633 .platform = "ppc405", 1634 } 1635 1636 #endif /* CONFIG_40x */ 1637 #ifdef CONFIG_44x 1638 { 1639 .pvr_mask = 0xf0000fff, 1640 .pvr_value = 0x40000850, 1641 .cpu_name = "440GR Rev. A", 1642 .cpu_features = CPU_FTRS_44X, 1643 .cpu_user_features = COMMON_USER_BOOKE, 1644 .mmu_features = MMU_FTR_TYPE_44x, 1645 .icache_bsize = 32, 1646 .dcache_bsize = 32, 1647 .machine_check = machine_check_4xx, 1648 .platform = "ppc440", 1649 }, 1650 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1651 .pvr_mask = 0xf0000fff, 1652 .pvr_value = 0x40000858, 1653 .cpu_name = "440EP Rev. A", 1654 .cpu_features = CPU_FTRS_44X, 1655 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1656 .mmu_features = MMU_FTR_TYPE_44x, 1657 .icache_bsize = 32, 1658 .dcache_bsize = 32, 1659 .cpu_setup = __setup_cpu_440ep, 1660 .machine_check = machine_check_4xx, 1661 .platform = "ppc440", 1662 }, 1663 { 1664 .pvr_mask = 0xf0000fff, 1665 .pvr_value = 0x400008d3, 1666 .cpu_name = "440GR Rev. B", 1667 .cpu_features = CPU_FTRS_44X, 1668 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1669 .mmu_features = MMU_FTR_TYPE_44x, 1670 .icache_bsize = 32, 1671 .dcache_bsize = 32, 1672 .machine_check = machine_check_4xx, 1673 .platform = "ppc440", 1674 }, 1675 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1676 .pvr_mask = 0xf0000ff7, 1677 .pvr_value = 0x400008d4, 1678 .cpu_name = "440EP Rev. C", 1679 .cpu_features = CPU_FTRS_44X, 1680 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1681 .mmu_features = MMU_FTR_TYPE_44x, 1682 .icache_bsize = 32, 1683 .dcache_bsize = 32, 1684 .cpu_setup = __setup_cpu_440ep, 1685 .machine_check = machine_check_4xx, 1686 .platform = "ppc440", 1687 }, 1688 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1689 .pvr_mask = 0xf0000fff, 1690 .pvr_value = 0x400008db, 1691 .cpu_name = "440EP Rev. B", 1692 .cpu_features = CPU_FTRS_44X, 1693 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1694 .mmu_features = MMU_FTR_TYPE_44x, 1695 .icache_bsize = 32, 1696 .dcache_bsize = 32, 1697 .cpu_setup = __setup_cpu_440ep, 1698 .machine_check = machine_check_4xx, 1699 .platform = "ppc440", 1700 }, 1701 { /* 440GRX */ 1702 .pvr_mask = 0xf0000ffb, 1703 .pvr_value = 0x200008D0, 1704 .cpu_name = "440GRX", 1705 .cpu_features = CPU_FTRS_44X, 1706 .cpu_user_features = COMMON_USER_BOOKE, 1707 .mmu_features = MMU_FTR_TYPE_44x, 1708 .icache_bsize = 32, 1709 .dcache_bsize = 32, 1710 .cpu_setup = __setup_cpu_440grx, 1711 .machine_check = machine_check_440A, 1712 .platform = "ppc440", 1713 }, 1714 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1715 .pvr_mask = 0xf0000ffb, 1716 .pvr_value = 0x200008D8, 1717 .cpu_name = "440EPX", 1718 .cpu_features = CPU_FTRS_44X, 1719 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1720 .mmu_features = MMU_FTR_TYPE_44x, 1721 .icache_bsize = 32, 1722 .dcache_bsize = 32, 1723 .cpu_setup = __setup_cpu_440epx, 1724 .machine_check = machine_check_440A, 1725 .platform = "ppc440", 1726 }, 1727 { /* 440GP Rev. B */ 1728 .pvr_mask = 0xf0000fff, 1729 .pvr_value = 0x40000440, 1730 .cpu_name = "440GP Rev. B", 1731 .cpu_features = CPU_FTRS_44X, 1732 .cpu_user_features = COMMON_USER_BOOKE, 1733 .mmu_features = MMU_FTR_TYPE_44x, 1734 .icache_bsize = 32, 1735 .dcache_bsize = 32, 1736 .machine_check = machine_check_4xx, 1737 .platform = "ppc440gp", 1738 }, 1739 { /* 440GP Rev. C */ 1740 .pvr_mask = 0xf0000fff, 1741 .pvr_value = 0x40000481, 1742 .cpu_name = "440GP Rev. C", 1743 .cpu_features = CPU_FTRS_44X, 1744 .cpu_user_features = COMMON_USER_BOOKE, 1745 .mmu_features = MMU_FTR_TYPE_44x, 1746 .icache_bsize = 32, 1747 .dcache_bsize = 32, 1748 .machine_check = machine_check_4xx, 1749 .platform = "ppc440gp", 1750 }, 1751 { /* 440GX Rev. A */ 1752 .pvr_mask = 0xf0000fff, 1753 .pvr_value = 0x50000850, 1754 .cpu_name = "440GX Rev. A", 1755 .cpu_features = CPU_FTRS_44X, 1756 .cpu_user_features = COMMON_USER_BOOKE, 1757 .mmu_features = MMU_FTR_TYPE_44x, 1758 .icache_bsize = 32, 1759 .dcache_bsize = 32, 1760 .cpu_setup = __setup_cpu_440gx, 1761 .machine_check = machine_check_440A, 1762 .platform = "ppc440", 1763 }, 1764 { /* 440GX Rev. B */ 1765 .pvr_mask = 0xf0000fff, 1766 .pvr_value = 0x50000851, 1767 .cpu_name = "440GX Rev. B", 1768 .cpu_features = CPU_FTRS_44X, 1769 .cpu_user_features = COMMON_USER_BOOKE, 1770 .mmu_features = MMU_FTR_TYPE_44x, 1771 .icache_bsize = 32, 1772 .dcache_bsize = 32, 1773 .cpu_setup = __setup_cpu_440gx, 1774 .machine_check = machine_check_440A, 1775 .platform = "ppc440", 1776 }, 1777 { /* 440GX Rev. C */ 1778 .pvr_mask = 0xf0000fff, 1779 .pvr_value = 0x50000892, 1780 .cpu_name = "440GX Rev. C", 1781 .cpu_features = CPU_FTRS_44X, 1782 .cpu_user_features = COMMON_USER_BOOKE, 1783 .mmu_features = MMU_FTR_TYPE_44x, 1784 .icache_bsize = 32, 1785 .dcache_bsize = 32, 1786 .cpu_setup = __setup_cpu_440gx, 1787 .machine_check = machine_check_440A, 1788 .platform = "ppc440", 1789 }, 1790 { /* 440GX Rev. F */ 1791 .pvr_mask = 0xf0000fff, 1792 .pvr_value = 0x50000894, 1793 .cpu_name = "440GX Rev. F", 1794 .cpu_features = CPU_FTRS_44X, 1795 .cpu_user_features = COMMON_USER_BOOKE, 1796 .mmu_features = MMU_FTR_TYPE_44x, 1797 .icache_bsize = 32, 1798 .dcache_bsize = 32, 1799 .cpu_setup = __setup_cpu_440gx, 1800 .machine_check = machine_check_440A, 1801 .platform = "ppc440", 1802 }, 1803 { /* 440SP Rev. A */ 1804 .pvr_mask = 0xfff00fff, 1805 .pvr_value = 0x53200891, 1806 .cpu_name = "440SP Rev. A", 1807 .cpu_features = CPU_FTRS_44X, 1808 .cpu_user_features = COMMON_USER_BOOKE, 1809 .mmu_features = MMU_FTR_TYPE_44x, 1810 .icache_bsize = 32, 1811 .dcache_bsize = 32, 1812 .machine_check = machine_check_4xx, 1813 .platform = "ppc440", 1814 }, 1815 { /* 440SPe Rev. A */ 1816 .pvr_mask = 0xfff00fff, 1817 .pvr_value = 0x53400890, 1818 .cpu_name = "440SPe Rev. A", 1819 .cpu_features = CPU_FTRS_44X, 1820 .cpu_user_features = COMMON_USER_BOOKE, 1821 .mmu_features = MMU_FTR_TYPE_44x, 1822 .icache_bsize = 32, 1823 .dcache_bsize = 32, 1824 .cpu_setup = __setup_cpu_440spe, 1825 .machine_check = machine_check_440A, 1826 .platform = "ppc440", 1827 }, 1828 { /* 440SPe Rev. B */ 1829 .pvr_mask = 0xfff00fff, 1830 .pvr_value = 0x53400891, 1831 .cpu_name = "440SPe Rev. B", 1832 .cpu_features = CPU_FTRS_44X, 1833 .cpu_user_features = COMMON_USER_BOOKE, 1834 .mmu_features = MMU_FTR_TYPE_44x, 1835 .icache_bsize = 32, 1836 .dcache_bsize = 32, 1837 .cpu_setup = __setup_cpu_440spe, 1838 .machine_check = machine_check_440A, 1839 .platform = "ppc440", 1840 }, 1841 { /* 440 in Xilinx Virtex-5 FXT */ 1842 .pvr_mask = 0xfffffff0, 1843 .pvr_value = 0x7ff21910, 1844 .cpu_name = "440 in Virtex-5 FXT", 1845 .cpu_features = CPU_FTRS_44X, 1846 .cpu_user_features = COMMON_USER_BOOKE, 1847 .mmu_features = MMU_FTR_TYPE_44x, 1848 .icache_bsize = 32, 1849 .dcache_bsize = 32, 1850 .cpu_setup = __setup_cpu_440x5, 1851 .machine_check = machine_check_440A, 1852 .platform = "ppc440", 1853 }, 1854 { /* 460EX */ 1855 .pvr_mask = 0xffff0006, 1856 .pvr_value = 0x13020002, 1857 .cpu_name = "460EX", 1858 .cpu_features = CPU_FTRS_440x6, 1859 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1860 .mmu_features = MMU_FTR_TYPE_44x, 1861 .icache_bsize = 32, 1862 .dcache_bsize = 32, 1863 .cpu_setup = __setup_cpu_460ex, 1864 .machine_check = machine_check_440A, 1865 .platform = "ppc440", 1866 }, 1867 { /* 460EX Rev B */ 1868 .pvr_mask = 0xffff0007, 1869 .pvr_value = 0x13020004, 1870 .cpu_name = "460EX Rev. B", 1871 .cpu_features = CPU_FTRS_440x6, 1872 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1873 .mmu_features = MMU_FTR_TYPE_44x, 1874 .icache_bsize = 32, 1875 .dcache_bsize = 32, 1876 .cpu_setup = __setup_cpu_460ex, 1877 .machine_check = machine_check_440A, 1878 .platform = "ppc440", 1879 }, 1880 { /* 460GT */ 1881 .pvr_mask = 0xffff0006, 1882 .pvr_value = 0x13020000, 1883 .cpu_name = "460GT", 1884 .cpu_features = CPU_FTRS_440x6, 1885 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1886 .mmu_features = MMU_FTR_TYPE_44x, 1887 .icache_bsize = 32, 1888 .dcache_bsize = 32, 1889 .cpu_setup = __setup_cpu_460gt, 1890 .machine_check = machine_check_440A, 1891 .platform = "ppc440", 1892 }, 1893 { /* 460GT Rev B */ 1894 .pvr_mask = 0xffff0007, 1895 .pvr_value = 0x13020005, 1896 .cpu_name = "460GT Rev. B", 1897 .cpu_features = CPU_FTRS_440x6, 1898 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1899 .mmu_features = MMU_FTR_TYPE_44x, 1900 .icache_bsize = 32, 1901 .dcache_bsize = 32, 1902 .cpu_setup = __setup_cpu_460gt, 1903 .machine_check = machine_check_440A, 1904 .platform = "ppc440", 1905 }, 1906 { /* 460SX */ 1907 .pvr_mask = 0xffffff00, 1908 .pvr_value = 0x13541800, 1909 .cpu_name = "460SX", 1910 .cpu_features = CPU_FTRS_44X, 1911 .cpu_user_features = COMMON_USER_BOOKE, 1912 .mmu_features = MMU_FTR_TYPE_44x, 1913 .icache_bsize = 32, 1914 .dcache_bsize = 32, 1915 .cpu_setup = __setup_cpu_460sx, 1916 .machine_check = machine_check_440A, 1917 .platform = "ppc440", 1918 }, 1919 { /* 464 in APM821xx */ 1920 .pvr_mask = 0xfffffff0, 1921 .pvr_value = 0x12C41C80, 1922 .cpu_name = "APM821XX", 1923 .cpu_features = CPU_FTRS_44X, 1924 .cpu_user_features = COMMON_USER_BOOKE | 1925 PPC_FEATURE_HAS_FPU, 1926 .mmu_features = MMU_FTR_TYPE_44x, 1927 .icache_bsize = 32, 1928 .dcache_bsize = 32, 1929 .cpu_setup = __setup_cpu_apm821xx, 1930 .machine_check = machine_check_440A, 1931 .platform = "ppc440", 1932 }, 1933 #ifdef CONFIG_PPC_47x 1934 { /* 476 DD2 core */ 1935 .pvr_mask = 0xffffffff, 1936 .pvr_value = 0x11a52080, 1937 .cpu_name = "476", 1938 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1939 .cpu_user_features = COMMON_USER_BOOKE | 1940 PPC_FEATURE_HAS_FPU, 1941 .mmu_features = MMU_FTR_TYPE_47x | 1942 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1943 .icache_bsize = 32, 1944 .dcache_bsize = 128, 1945 .machine_check = machine_check_47x, 1946 .platform = "ppc470", 1947 }, 1948 { /* 476fpe */ 1949 .pvr_mask = 0xffff0000, 1950 .pvr_value = 0x7ff50000, 1951 .cpu_name = "476fpe", 1952 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1953 .cpu_user_features = COMMON_USER_BOOKE | 1954 PPC_FEATURE_HAS_FPU, 1955 .mmu_features = MMU_FTR_TYPE_47x | 1956 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1957 .icache_bsize = 32, 1958 .dcache_bsize = 128, 1959 .machine_check = machine_check_47x, 1960 .platform = "ppc470", 1961 }, 1962 { /* 476 iss */ 1963 .pvr_mask = 0xffff0000, 1964 .pvr_value = 0x00050000, 1965 .cpu_name = "476", 1966 .cpu_features = CPU_FTRS_47X, 1967 .cpu_user_features = COMMON_USER_BOOKE | 1968 PPC_FEATURE_HAS_FPU, 1969 .mmu_features = MMU_FTR_TYPE_47x | 1970 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1971 .icache_bsize = 32, 1972 .dcache_bsize = 128, 1973 .machine_check = machine_check_47x, 1974 .platform = "ppc470", 1975 }, 1976 { /* 476 others */ 1977 .pvr_mask = 0xffff0000, 1978 .pvr_value = 0x11a50000, 1979 .cpu_name = "476", 1980 .cpu_features = CPU_FTRS_47X, 1981 .cpu_user_features = COMMON_USER_BOOKE | 1982 PPC_FEATURE_HAS_FPU, 1983 .mmu_features = MMU_FTR_TYPE_47x | 1984 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1985 .icache_bsize = 32, 1986 .dcache_bsize = 128, 1987 .machine_check = machine_check_47x, 1988 .platform = "ppc470", 1989 }, 1990 #endif /* CONFIG_PPC_47x */ 1991 { /* default match */ 1992 .pvr_mask = 0x00000000, 1993 .pvr_value = 0x00000000, 1994 .cpu_name = "(generic 44x PPC)", 1995 .cpu_features = CPU_FTRS_44X, 1996 .cpu_user_features = COMMON_USER_BOOKE, 1997 .mmu_features = MMU_FTR_TYPE_44x, 1998 .icache_bsize = 32, 1999 .dcache_bsize = 32, 2000 .machine_check = machine_check_4xx, 2001 .platform = "ppc440", 2002 } 2003 #endif /* CONFIG_44x */ 2004 #ifdef CONFIG_E200 2005 { /* e200z5 */ 2006 .pvr_mask = 0xfff00000, 2007 .pvr_value = 0x81000000, 2008 .cpu_name = "e200z5", 2009 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 2010 .cpu_features = CPU_FTRS_E200, 2011 .cpu_user_features = COMMON_USER_BOOKE | 2012 PPC_FEATURE_HAS_EFP_SINGLE | 2013 PPC_FEATURE_UNIFIED_CACHE, 2014 .mmu_features = MMU_FTR_TYPE_FSL_E, 2015 .dcache_bsize = 32, 2016 .machine_check = machine_check_e200, 2017 .platform = "ppc5554", 2018 }, 2019 { /* e200z6 */ 2020 .pvr_mask = 0xfff00000, 2021 .pvr_value = 0x81100000, 2022 .cpu_name = "e200z6", 2023 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 2024 .cpu_features = CPU_FTRS_E200, 2025 .cpu_user_features = COMMON_USER_BOOKE | 2026 PPC_FEATURE_HAS_SPE_COMP | 2027 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2028 PPC_FEATURE_UNIFIED_CACHE, 2029 .mmu_features = MMU_FTR_TYPE_FSL_E, 2030 .dcache_bsize = 32, 2031 .machine_check = machine_check_e200, 2032 .platform = "ppc5554", 2033 }, 2034 { /* default match */ 2035 .pvr_mask = 0x00000000, 2036 .pvr_value = 0x00000000, 2037 .cpu_name = "(generic E200 PPC)", 2038 .cpu_features = CPU_FTRS_E200, 2039 .cpu_user_features = COMMON_USER_BOOKE | 2040 PPC_FEATURE_HAS_EFP_SINGLE | 2041 PPC_FEATURE_UNIFIED_CACHE, 2042 .mmu_features = MMU_FTR_TYPE_FSL_E, 2043 .dcache_bsize = 32, 2044 .cpu_setup = __setup_cpu_e200, 2045 .machine_check = machine_check_e200, 2046 .platform = "ppc5554", 2047 } 2048 #endif /* CONFIG_E200 */ 2049 #endif /* CONFIG_PPC32 */ 2050 #ifdef CONFIG_E500 2051 #ifdef CONFIG_PPC32 2052 #ifndef CONFIG_PPC_E500MC 2053 { /* e500 */ 2054 .pvr_mask = 0xffff0000, 2055 .pvr_value = 0x80200000, 2056 .cpu_name = "e500", 2057 .cpu_features = CPU_FTRS_E500, 2058 .cpu_user_features = COMMON_USER_BOOKE | 2059 PPC_FEATURE_HAS_SPE_COMP | 2060 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2061 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2062 .mmu_features = MMU_FTR_TYPE_FSL_E, 2063 .icache_bsize = 32, 2064 .dcache_bsize = 32, 2065 .num_pmcs = 4, 2066 .oprofile_cpu_type = "ppc/e500", 2067 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2068 .cpu_setup = __setup_cpu_e500v1, 2069 .machine_check = machine_check_e500, 2070 .platform = "ppc8540", 2071 }, 2072 { /* e500v2 */ 2073 .pvr_mask = 0xffff0000, 2074 .pvr_value = 0x80210000, 2075 .cpu_name = "e500v2", 2076 .cpu_features = CPU_FTRS_E500_2, 2077 .cpu_user_features = COMMON_USER_BOOKE | 2078 PPC_FEATURE_HAS_SPE_COMP | 2079 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2080 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 2081 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2082 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 2083 .icache_bsize = 32, 2084 .dcache_bsize = 32, 2085 .num_pmcs = 4, 2086 .oprofile_cpu_type = "ppc/e500", 2087 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2088 .cpu_setup = __setup_cpu_e500v2, 2089 .machine_check = machine_check_e500, 2090 .platform = "ppc8548", 2091 .cpu_down_flush = cpu_down_flush_e500v2, 2092 }, 2093 #else 2094 { /* e500mc */ 2095 .pvr_mask = 0xffff0000, 2096 .pvr_value = 0x80230000, 2097 .cpu_name = "e500mc", 2098 .cpu_features = CPU_FTRS_E500MC, 2099 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2100 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2101 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2102 MMU_FTR_USE_TLBILX, 2103 .icache_bsize = 64, 2104 .dcache_bsize = 64, 2105 .num_pmcs = 4, 2106 .oprofile_cpu_type = "ppc/e500mc", 2107 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2108 .cpu_setup = __setup_cpu_e500mc, 2109 .machine_check = machine_check_e500mc, 2110 .platform = "ppce500mc", 2111 .cpu_down_flush = cpu_down_flush_e500mc, 2112 }, 2113 #endif /* CONFIG_PPC_E500MC */ 2114 #endif /* CONFIG_PPC32 */ 2115 #ifdef CONFIG_PPC_E500MC 2116 { /* e5500 */ 2117 .pvr_mask = 0xffff0000, 2118 .pvr_value = 0x80240000, 2119 .cpu_name = "e5500", 2120 .cpu_features = CPU_FTRS_E5500, 2121 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2122 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2123 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2124 MMU_FTR_USE_TLBILX, 2125 .icache_bsize = 64, 2126 .dcache_bsize = 64, 2127 .num_pmcs = 4, 2128 .oprofile_cpu_type = "ppc/e500mc", 2129 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2130 .cpu_setup = __setup_cpu_e5500, 2131 #ifndef CONFIG_PPC32 2132 .cpu_restore = __restore_cpu_e5500, 2133 #endif 2134 .machine_check = machine_check_e500mc, 2135 .platform = "ppce5500", 2136 .cpu_down_flush = cpu_down_flush_e5500, 2137 }, 2138 { /* e6500 */ 2139 .pvr_mask = 0xffff0000, 2140 .pvr_value = 0x80400000, 2141 .cpu_name = "e6500", 2142 .cpu_features = CPU_FTRS_E6500, 2143 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2144 PPC_FEATURE_HAS_ALTIVEC_COMP, 2145 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2146 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2147 MMU_FTR_USE_TLBILX, 2148 .icache_bsize = 64, 2149 .dcache_bsize = 64, 2150 .num_pmcs = 6, 2151 .oprofile_cpu_type = "ppc/e6500", 2152 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2153 .cpu_setup = __setup_cpu_e6500, 2154 #ifndef CONFIG_PPC32 2155 .cpu_restore = __restore_cpu_e6500, 2156 #endif 2157 .machine_check = machine_check_e500mc, 2158 .platform = "ppce6500", 2159 .cpu_down_flush = cpu_down_flush_e6500, 2160 }, 2161 #endif /* CONFIG_PPC_E500MC */ 2162 #ifdef CONFIG_PPC32 2163 { /* default match */ 2164 .pvr_mask = 0x00000000, 2165 .pvr_value = 0x00000000, 2166 .cpu_name = "(generic E500 PPC)", 2167 .cpu_features = CPU_FTRS_E500, 2168 .cpu_user_features = COMMON_USER_BOOKE | 2169 PPC_FEATURE_HAS_SPE_COMP | 2170 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2171 .mmu_features = MMU_FTR_TYPE_FSL_E, 2172 .icache_bsize = 32, 2173 .dcache_bsize = 32, 2174 .machine_check = machine_check_e500, 2175 .platform = "powerpc", 2176 } 2177 #endif /* CONFIG_PPC32 */ 2178 #endif /* CONFIG_E500 */ 2179 }; 2180 2181 void __init set_cur_cpu_spec(struct cpu_spec *s) 2182 { 2183 struct cpu_spec *t = &the_cpu_spec; 2184 2185 t = PTRRELOC(t); 2186 *t = *s; 2187 2188 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2189 } 2190 2191 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2192 struct cpu_spec *s) 2193 { 2194 struct cpu_spec *t = &the_cpu_spec; 2195 struct cpu_spec old; 2196 2197 t = PTRRELOC(t); 2198 old = *t; 2199 2200 /* Copy everything, then do fixups */ 2201 *t = *s; 2202 2203 /* 2204 * If we are overriding a previous value derived from the real 2205 * PVR with a new value obtained using a logical PVR value, 2206 * don't modify the performance monitor fields. 2207 */ 2208 if (old.num_pmcs && !s->num_pmcs) { 2209 t->num_pmcs = old.num_pmcs; 2210 t->pmc_type = old.pmc_type; 2211 t->oprofile_type = old.oprofile_type; 2212 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2213 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2214 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2215 2216 /* 2217 * If we have passed through this logic once before and 2218 * have pulled the default case because the real PVR was 2219 * not found inside cpu_specs[], then we are possibly 2220 * running in compatibility mode. In that case, let the 2221 * oprofiler know which set of compatibility counters to 2222 * pull from by making sure the oprofile_cpu_type string 2223 * is set to that of compatibility mode. If the 2224 * oprofile_cpu_type already has a value, then we are 2225 * possibly overriding a real PVR with a logical one, 2226 * and, in that case, keep the current value for 2227 * oprofile_cpu_type. 2228 */ 2229 if (old.oprofile_cpu_type != NULL) { 2230 t->oprofile_cpu_type = old.oprofile_cpu_type; 2231 t->oprofile_type = old.oprofile_type; 2232 } 2233 } 2234 2235 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2236 2237 /* 2238 * Set the base platform string once; assumes 2239 * we're called with real pvr first. 2240 */ 2241 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2242 *PTRRELOC(&powerpc_base_platform) = t->platform; 2243 2244 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2245 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2246 * that processor. I will consolidate that at a later time, for now, 2247 * just use #ifdef. We also don't need to PTRRELOC the function 2248 * pointer on ppc64 and booke as we are running at 0 in real mode 2249 * on ppc64 and reloc_offset is always 0 on booke. 2250 */ 2251 if (t->cpu_setup) { 2252 t->cpu_setup(offset, t); 2253 } 2254 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2255 2256 return t; 2257 } 2258 2259 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2260 { 2261 struct cpu_spec *s = cpu_specs; 2262 int i; 2263 2264 s = PTRRELOC(s); 2265 2266 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2267 if ((pvr & s->pvr_mask) == s->pvr_value) 2268 return setup_cpu_spec(offset, s); 2269 } 2270 2271 BUG(); 2272 2273 return NULL; 2274 } 2275 2276 /* 2277 * Used by cpufeatures to get the name for CPUs with a PVR table. 2278 * If they don't hae a PVR table, cpufeatures gets the name from 2279 * cpu device-tree node. 2280 */ 2281 void __init identify_cpu_name(unsigned int pvr) 2282 { 2283 struct cpu_spec *s = cpu_specs; 2284 struct cpu_spec *t = &the_cpu_spec; 2285 int i; 2286 2287 s = PTRRELOC(s); 2288 t = PTRRELOC(t); 2289 2290 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2291 if ((pvr & s->pvr_mask) == s->pvr_value) { 2292 t->cpu_name = s->cpu_name; 2293 return; 2294 } 2295 } 2296 } 2297 2298 2299 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2300 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2301 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2302 }; 2303 EXPORT_SYMBOL_GPL(cpu_feature_keys); 2304 2305 void __init cpu_feature_keys_init(void) 2306 { 2307 int i; 2308 2309 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2310 unsigned long f = 1ul << i; 2311 2312 if (!(cur_cpu_spec->cpu_features & f)) 2313 static_branch_disable(&cpu_feature_keys[i]); 2314 } 2315 } 2316 2317 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2318 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2319 }; 2320 EXPORT_SYMBOL_GPL(mmu_feature_keys); 2321 2322 void __init mmu_feature_keys_init(void) 2323 { 2324 int i; 2325 2326 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2327 unsigned long f = 1ul << i; 2328 2329 if (!(cur_cpu_spec->mmu_features & f)) 2330 static_branch_disable(&mmu_feature_keys[i]); 2331 } 2332 } 2333 #endif 2334