1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/module.h> 18 19 #include <asm/oprofile_impl.h> 20 #include <asm/cputable.h> 21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22 #include <asm/mmu.h> 23 24 struct cpu_spec* cur_cpu_spec = NULL; 25 EXPORT_SYMBOL(cur_cpu_spec); 26 27 /* The platform string corresponding to the real PVR */ 28 const char *powerpc_base_platform; 29 30 /* NOTE: 31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 32 * the responsibility of the appropriate CPU save/restore functions to 33 * eventually copy these settings over. Those save/restore aren't yet 34 * part of the cputable though. That has to be fixed for both ppc32 35 * and ppc64 36 */ 37 #ifdef CONFIG_PPC32 38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 51 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 52 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 59 #endif /* CONFIG_PPC32 */ 60 #ifdef CONFIG_PPC64 61 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 62 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 64 extern void __restore_cpu_pa6t(void); 65 extern void __restore_cpu_ppc970(void); 66 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 67 extern void __restore_cpu_power7(void); 68 #endif /* CONFIG_PPC64 */ 69 70 /* This table only contains "desktop" CPUs, it need to be filled with embedded 71 * ones as well... 72 */ 73 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 74 PPC_FEATURE_HAS_MMU) 75 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 76 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 77 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 78 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 79 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 80 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 81 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 82 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 83 PPC_FEATURE_TRUE_LE | \ 84 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 85 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 86 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 87 PPC_FEATURE_TRUE_LE | \ 88 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 89 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 90 PPC_FEATURE_TRUE_LE | \ 91 PPC_FEATURE_HAS_ALTIVEC_COMP) 92 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 93 PPC_FEATURE_BOOKE) 94 95 static struct cpu_spec __initdata cpu_specs[] = { 96 #ifdef CONFIG_PPC64 97 { /* Power3 */ 98 .pvr_mask = 0xffff0000, 99 .pvr_value = 0x00400000, 100 .cpu_name = "POWER3 (630)", 101 .cpu_features = CPU_FTRS_POWER3, 102 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 103 .mmu_features = MMU_FTR_HPTE_TABLE, 104 .icache_bsize = 128, 105 .dcache_bsize = 128, 106 .num_pmcs = 8, 107 .pmc_type = PPC_PMC_IBM, 108 .oprofile_cpu_type = "ppc64/power3", 109 .oprofile_type = PPC_OPROFILE_RS64, 110 .machine_check = machine_check_generic, 111 .platform = "power3", 112 }, 113 { /* Power3+ */ 114 .pvr_mask = 0xffff0000, 115 .pvr_value = 0x00410000, 116 .cpu_name = "POWER3 (630+)", 117 .cpu_features = CPU_FTRS_POWER3, 118 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 119 .mmu_features = MMU_FTR_HPTE_TABLE, 120 .icache_bsize = 128, 121 .dcache_bsize = 128, 122 .num_pmcs = 8, 123 .pmc_type = PPC_PMC_IBM, 124 .oprofile_cpu_type = "ppc64/power3", 125 .oprofile_type = PPC_OPROFILE_RS64, 126 .machine_check = machine_check_generic, 127 .platform = "power3", 128 }, 129 { /* Northstar */ 130 .pvr_mask = 0xffff0000, 131 .pvr_value = 0x00330000, 132 .cpu_name = "RS64-II (northstar)", 133 .cpu_features = CPU_FTRS_RS64, 134 .cpu_user_features = COMMON_USER_PPC64, 135 .mmu_features = MMU_FTR_HPTE_TABLE, 136 .icache_bsize = 128, 137 .dcache_bsize = 128, 138 .num_pmcs = 8, 139 .pmc_type = PPC_PMC_IBM, 140 .oprofile_cpu_type = "ppc64/rs64", 141 .oprofile_type = PPC_OPROFILE_RS64, 142 .machine_check = machine_check_generic, 143 .platform = "rs64", 144 }, 145 { /* Pulsar */ 146 .pvr_mask = 0xffff0000, 147 .pvr_value = 0x00340000, 148 .cpu_name = "RS64-III (pulsar)", 149 .cpu_features = CPU_FTRS_RS64, 150 .cpu_user_features = COMMON_USER_PPC64, 151 .mmu_features = MMU_FTR_HPTE_TABLE, 152 .icache_bsize = 128, 153 .dcache_bsize = 128, 154 .num_pmcs = 8, 155 .pmc_type = PPC_PMC_IBM, 156 .oprofile_cpu_type = "ppc64/rs64", 157 .oprofile_type = PPC_OPROFILE_RS64, 158 .machine_check = machine_check_generic, 159 .platform = "rs64", 160 }, 161 { /* I-star */ 162 .pvr_mask = 0xffff0000, 163 .pvr_value = 0x00360000, 164 .cpu_name = "RS64-III (icestar)", 165 .cpu_features = CPU_FTRS_RS64, 166 .cpu_user_features = COMMON_USER_PPC64, 167 .mmu_features = MMU_FTR_HPTE_TABLE, 168 .icache_bsize = 128, 169 .dcache_bsize = 128, 170 .num_pmcs = 8, 171 .pmc_type = PPC_PMC_IBM, 172 .oprofile_cpu_type = "ppc64/rs64", 173 .oprofile_type = PPC_OPROFILE_RS64, 174 .machine_check = machine_check_generic, 175 .platform = "rs64", 176 }, 177 { /* S-star */ 178 .pvr_mask = 0xffff0000, 179 .pvr_value = 0x00370000, 180 .cpu_name = "RS64-IV (sstar)", 181 .cpu_features = CPU_FTRS_RS64, 182 .cpu_user_features = COMMON_USER_PPC64, 183 .mmu_features = MMU_FTR_HPTE_TABLE, 184 .icache_bsize = 128, 185 .dcache_bsize = 128, 186 .num_pmcs = 8, 187 .pmc_type = PPC_PMC_IBM, 188 .oprofile_cpu_type = "ppc64/rs64", 189 .oprofile_type = PPC_OPROFILE_RS64, 190 .machine_check = machine_check_generic, 191 .platform = "rs64", 192 }, 193 { /* Power4 */ 194 .pvr_mask = 0xffff0000, 195 .pvr_value = 0x00350000, 196 .cpu_name = "POWER4 (gp)", 197 .cpu_features = CPU_FTRS_POWER4, 198 .cpu_user_features = COMMON_USER_POWER4, 199 .mmu_features = MMU_FTR_HPTE_TABLE, 200 .icache_bsize = 128, 201 .dcache_bsize = 128, 202 .num_pmcs = 8, 203 .pmc_type = PPC_PMC_IBM, 204 .oprofile_cpu_type = "ppc64/power4", 205 .oprofile_type = PPC_OPROFILE_POWER4, 206 .machine_check = machine_check_generic, 207 .platform = "power4", 208 }, 209 { /* Power4+ */ 210 .pvr_mask = 0xffff0000, 211 .pvr_value = 0x00380000, 212 .cpu_name = "POWER4+ (gq)", 213 .cpu_features = CPU_FTRS_POWER4, 214 .cpu_user_features = COMMON_USER_POWER4, 215 .mmu_features = MMU_FTR_HPTE_TABLE, 216 .icache_bsize = 128, 217 .dcache_bsize = 128, 218 .num_pmcs = 8, 219 .pmc_type = PPC_PMC_IBM, 220 .oprofile_cpu_type = "ppc64/power4", 221 .oprofile_type = PPC_OPROFILE_POWER4, 222 .machine_check = machine_check_generic, 223 .platform = "power4", 224 }, 225 { /* PPC970 */ 226 .pvr_mask = 0xffff0000, 227 .pvr_value = 0x00390000, 228 .cpu_name = "PPC970", 229 .cpu_features = CPU_FTRS_PPC970, 230 .cpu_user_features = COMMON_USER_POWER4 | 231 PPC_FEATURE_HAS_ALTIVEC_COMP, 232 .mmu_features = MMU_FTR_HPTE_TABLE, 233 .icache_bsize = 128, 234 .dcache_bsize = 128, 235 .num_pmcs = 8, 236 .pmc_type = PPC_PMC_IBM, 237 .cpu_setup = __setup_cpu_ppc970, 238 .cpu_restore = __restore_cpu_ppc970, 239 .oprofile_cpu_type = "ppc64/970", 240 .oprofile_type = PPC_OPROFILE_POWER4, 241 .machine_check = machine_check_generic, 242 .platform = "ppc970", 243 }, 244 { /* PPC970FX */ 245 .pvr_mask = 0xffff0000, 246 .pvr_value = 0x003c0000, 247 .cpu_name = "PPC970FX", 248 .cpu_features = CPU_FTRS_PPC970, 249 .cpu_user_features = COMMON_USER_POWER4 | 250 PPC_FEATURE_HAS_ALTIVEC_COMP, 251 .mmu_features = MMU_FTR_HPTE_TABLE, 252 .icache_bsize = 128, 253 .dcache_bsize = 128, 254 .num_pmcs = 8, 255 .pmc_type = PPC_PMC_IBM, 256 .cpu_setup = __setup_cpu_ppc970, 257 .cpu_restore = __restore_cpu_ppc970, 258 .oprofile_cpu_type = "ppc64/970", 259 .oprofile_type = PPC_OPROFILE_POWER4, 260 .machine_check = machine_check_generic, 261 .platform = "ppc970", 262 }, 263 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 264 .pvr_mask = 0xffffffff, 265 .pvr_value = 0x00440100, 266 .cpu_name = "PPC970MP", 267 .cpu_features = CPU_FTRS_PPC970, 268 .cpu_user_features = COMMON_USER_POWER4 | 269 PPC_FEATURE_HAS_ALTIVEC_COMP, 270 .mmu_features = MMU_FTR_HPTE_TABLE, 271 .icache_bsize = 128, 272 .dcache_bsize = 128, 273 .num_pmcs = 8, 274 .pmc_type = PPC_PMC_IBM, 275 .cpu_setup = __setup_cpu_ppc970, 276 .cpu_restore = __restore_cpu_ppc970, 277 .oprofile_cpu_type = "ppc64/970MP", 278 .oprofile_type = PPC_OPROFILE_POWER4, 279 .machine_check = machine_check_generic, 280 .platform = "ppc970", 281 }, 282 { /* PPC970MP */ 283 .pvr_mask = 0xffff0000, 284 .pvr_value = 0x00440000, 285 .cpu_name = "PPC970MP", 286 .cpu_features = CPU_FTRS_PPC970, 287 .cpu_user_features = COMMON_USER_POWER4 | 288 PPC_FEATURE_HAS_ALTIVEC_COMP, 289 .mmu_features = MMU_FTR_HPTE_TABLE, 290 .icache_bsize = 128, 291 .dcache_bsize = 128, 292 .num_pmcs = 8, 293 .pmc_type = PPC_PMC_IBM, 294 .cpu_setup = __setup_cpu_ppc970MP, 295 .cpu_restore = __restore_cpu_ppc970, 296 .oprofile_cpu_type = "ppc64/970MP", 297 .oprofile_type = PPC_OPROFILE_POWER4, 298 .machine_check = machine_check_generic, 299 .platform = "ppc970", 300 }, 301 { /* PPC970GX */ 302 .pvr_mask = 0xffff0000, 303 .pvr_value = 0x00450000, 304 .cpu_name = "PPC970GX", 305 .cpu_features = CPU_FTRS_PPC970, 306 .cpu_user_features = COMMON_USER_POWER4 | 307 PPC_FEATURE_HAS_ALTIVEC_COMP, 308 .mmu_features = MMU_FTR_HPTE_TABLE, 309 .icache_bsize = 128, 310 .dcache_bsize = 128, 311 .num_pmcs = 8, 312 .pmc_type = PPC_PMC_IBM, 313 .cpu_setup = __setup_cpu_ppc970, 314 .oprofile_cpu_type = "ppc64/970", 315 .oprofile_type = PPC_OPROFILE_POWER4, 316 .machine_check = machine_check_generic, 317 .platform = "ppc970", 318 }, 319 { /* Power5 GR */ 320 .pvr_mask = 0xffff0000, 321 .pvr_value = 0x003a0000, 322 .cpu_name = "POWER5 (gr)", 323 .cpu_features = CPU_FTRS_POWER5, 324 .cpu_user_features = COMMON_USER_POWER5, 325 .mmu_features = MMU_FTR_HPTE_TABLE, 326 .icache_bsize = 128, 327 .dcache_bsize = 128, 328 .num_pmcs = 6, 329 .pmc_type = PPC_PMC_IBM, 330 .oprofile_cpu_type = "ppc64/power5", 331 .oprofile_type = PPC_OPROFILE_POWER4, 332 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 333 * and above but only works on POWER5 and above 334 */ 335 .oprofile_mmcra_sihv = MMCRA_SIHV, 336 .oprofile_mmcra_sipr = MMCRA_SIPR, 337 .machine_check = machine_check_generic, 338 .platform = "power5", 339 }, 340 { /* Power5++ */ 341 .pvr_mask = 0xffffff00, 342 .pvr_value = 0x003b0300, 343 .cpu_name = "POWER5+ (gs)", 344 .cpu_features = CPU_FTRS_POWER5, 345 .cpu_user_features = COMMON_USER_POWER5_PLUS, 346 .mmu_features = MMU_FTR_HPTE_TABLE, 347 .icache_bsize = 128, 348 .dcache_bsize = 128, 349 .num_pmcs = 6, 350 .oprofile_cpu_type = "ppc64/power5++", 351 .oprofile_type = PPC_OPROFILE_POWER4, 352 .oprofile_mmcra_sihv = MMCRA_SIHV, 353 .oprofile_mmcra_sipr = MMCRA_SIPR, 354 .machine_check = machine_check_generic, 355 .platform = "power5+", 356 }, 357 { /* Power5 GS */ 358 .pvr_mask = 0xffff0000, 359 .pvr_value = 0x003b0000, 360 .cpu_name = "POWER5+ (gs)", 361 .cpu_features = CPU_FTRS_POWER5, 362 .cpu_user_features = COMMON_USER_POWER5_PLUS, 363 .mmu_features = MMU_FTR_HPTE_TABLE, 364 .icache_bsize = 128, 365 .dcache_bsize = 128, 366 .num_pmcs = 6, 367 .pmc_type = PPC_PMC_IBM, 368 .oprofile_cpu_type = "ppc64/power5+", 369 .oprofile_type = PPC_OPROFILE_POWER4, 370 .oprofile_mmcra_sihv = MMCRA_SIHV, 371 .oprofile_mmcra_sipr = MMCRA_SIPR, 372 .machine_check = machine_check_generic, 373 .platform = "power5+", 374 }, 375 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 376 .pvr_mask = 0xffffffff, 377 .pvr_value = 0x0f000001, 378 .cpu_name = "POWER5+", 379 .cpu_features = CPU_FTRS_POWER5, 380 .cpu_user_features = COMMON_USER_POWER5_PLUS, 381 .mmu_features = MMU_FTR_HPTE_TABLE, 382 .icache_bsize = 128, 383 .dcache_bsize = 128, 384 .machine_check = machine_check_generic, 385 .oprofile_cpu_type = "ppc64/compat-power5+", 386 .platform = "power5+", 387 }, 388 { /* Power6 */ 389 .pvr_mask = 0xffff0000, 390 .pvr_value = 0x003e0000, 391 .cpu_name = "POWER6 (raw)", 392 .cpu_features = CPU_FTRS_POWER6, 393 .cpu_user_features = COMMON_USER_POWER6 | 394 PPC_FEATURE_POWER6_EXT, 395 .mmu_features = MMU_FTR_HPTE_TABLE, 396 .icache_bsize = 128, 397 .dcache_bsize = 128, 398 .num_pmcs = 6, 399 .pmc_type = PPC_PMC_IBM, 400 .oprofile_cpu_type = "ppc64/power6", 401 .oprofile_type = PPC_OPROFILE_POWER4, 402 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 403 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 404 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 405 POWER6_MMCRA_OTHER, 406 .machine_check = machine_check_generic, 407 .platform = "power6x", 408 }, 409 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 410 .pvr_mask = 0xffffffff, 411 .pvr_value = 0x0f000002, 412 .cpu_name = "POWER6 (architected)", 413 .cpu_features = CPU_FTRS_POWER6, 414 .cpu_user_features = COMMON_USER_POWER6, 415 .mmu_features = MMU_FTR_HPTE_TABLE, 416 .icache_bsize = 128, 417 .dcache_bsize = 128, 418 .machine_check = machine_check_generic, 419 .oprofile_cpu_type = "ppc64/compat-power6", 420 .platform = "power6", 421 }, 422 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 423 .pvr_mask = 0xffffffff, 424 .pvr_value = 0x0f000003, 425 .cpu_name = "POWER7 (architected)", 426 .cpu_features = CPU_FTRS_POWER7, 427 .cpu_user_features = COMMON_USER_POWER7, 428 .mmu_features = MMU_FTR_HPTE_TABLE, 429 .icache_bsize = 128, 430 .dcache_bsize = 128, 431 .machine_check = machine_check_generic, 432 .oprofile_cpu_type = "ppc64/compat-power7", 433 .platform = "power7", 434 }, 435 { /* Power7 */ 436 .pvr_mask = 0xffff0000, 437 .pvr_value = 0x003f0000, 438 .cpu_name = "POWER7 (raw)", 439 .cpu_features = CPU_FTRS_POWER7, 440 .cpu_user_features = COMMON_USER_POWER7, 441 .mmu_features = MMU_FTR_HPTE_TABLE, 442 .icache_bsize = 128, 443 .dcache_bsize = 128, 444 .num_pmcs = 6, 445 .pmc_type = PPC_PMC_IBM, 446 .cpu_setup = __setup_cpu_power7, 447 .cpu_restore = __restore_cpu_power7, 448 .oprofile_cpu_type = "ppc64/power7", 449 .oprofile_type = PPC_OPROFILE_POWER4, 450 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 451 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 452 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 453 POWER6_MMCRA_OTHER, 454 .platform = "power7", 455 }, 456 { /* Cell Broadband Engine */ 457 .pvr_mask = 0xffff0000, 458 .pvr_value = 0x00700000, 459 .cpu_name = "Cell Broadband Engine", 460 .cpu_features = CPU_FTRS_CELL, 461 .cpu_user_features = COMMON_USER_PPC64 | 462 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 463 PPC_FEATURE_SMT, 464 .mmu_features = MMU_FTR_HPTE_TABLE, 465 .icache_bsize = 128, 466 .dcache_bsize = 128, 467 .num_pmcs = 4, 468 .pmc_type = PPC_PMC_IBM, 469 .oprofile_cpu_type = "ppc64/cell-be", 470 .oprofile_type = PPC_OPROFILE_CELL, 471 .machine_check = machine_check_generic, 472 .platform = "ppc-cell-be", 473 }, 474 { /* PA Semi PA6T */ 475 .pvr_mask = 0x7fff0000, 476 .pvr_value = 0x00900000, 477 .cpu_name = "PA6T", 478 .cpu_features = CPU_FTRS_PA6T, 479 .cpu_user_features = COMMON_USER_PA6T, 480 .mmu_features = MMU_FTR_HPTE_TABLE, 481 .icache_bsize = 64, 482 .dcache_bsize = 64, 483 .num_pmcs = 6, 484 .pmc_type = PPC_PMC_PA6T, 485 .cpu_setup = __setup_cpu_pa6t, 486 .cpu_restore = __restore_cpu_pa6t, 487 .oprofile_cpu_type = "ppc64/pa6t", 488 .oprofile_type = PPC_OPROFILE_PA6T, 489 .machine_check = machine_check_generic, 490 .platform = "pa6t", 491 }, 492 { /* default match */ 493 .pvr_mask = 0x00000000, 494 .pvr_value = 0x00000000, 495 .cpu_name = "POWER4 (compatible)", 496 .cpu_features = CPU_FTRS_COMPATIBLE, 497 .cpu_user_features = COMMON_USER_PPC64, 498 .mmu_features = MMU_FTR_HPTE_TABLE, 499 .icache_bsize = 128, 500 .dcache_bsize = 128, 501 .num_pmcs = 6, 502 .pmc_type = PPC_PMC_IBM, 503 .machine_check = machine_check_generic, 504 .platform = "power4", 505 } 506 #endif /* CONFIG_PPC64 */ 507 #ifdef CONFIG_PPC32 508 #if CLASSIC_PPC 509 { /* 601 */ 510 .pvr_mask = 0xffff0000, 511 .pvr_value = 0x00010000, 512 .cpu_name = "601", 513 .cpu_features = CPU_FTRS_PPC601, 514 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 515 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 516 .mmu_features = MMU_FTR_HPTE_TABLE, 517 .icache_bsize = 32, 518 .dcache_bsize = 32, 519 .machine_check = machine_check_generic, 520 .platform = "ppc601", 521 }, 522 { /* 603 */ 523 .pvr_mask = 0xffff0000, 524 .pvr_value = 0x00030000, 525 .cpu_name = "603", 526 .cpu_features = CPU_FTRS_603, 527 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 528 .mmu_features = 0, 529 .icache_bsize = 32, 530 .dcache_bsize = 32, 531 .cpu_setup = __setup_cpu_603, 532 .machine_check = machine_check_generic, 533 .platform = "ppc603", 534 }, 535 { /* 603e */ 536 .pvr_mask = 0xffff0000, 537 .pvr_value = 0x00060000, 538 .cpu_name = "603e", 539 .cpu_features = CPU_FTRS_603, 540 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 541 .mmu_features = 0, 542 .icache_bsize = 32, 543 .dcache_bsize = 32, 544 .cpu_setup = __setup_cpu_603, 545 .machine_check = machine_check_generic, 546 .platform = "ppc603", 547 }, 548 { /* 603ev */ 549 .pvr_mask = 0xffff0000, 550 .pvr_value = 0x00070000, 551 .cpu_name = "603ev", 552 .cpu_features = CPU_FTRS_603, 553 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 554 .mmu_features = 0, 555 .icache_bsize = 32, 556 .dcache_bsize = 32, 557 .cpu_setup = __setup_cpu_603, 558 .machine_check = machine_check_generic, 559 .platform = "ppc603", 560 }, 561 { /* 604 */ 562 .pvr_mask = 0xffff0000, 563 .pvr_value = 0x00040000, 564 .cpu_name = "604", 565 .cpu_features = CPU_FTRS_604, 566 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 567 .mmu_features = MMU_FTR_HPTE_TABLE, 568 .icache_bsize = 32, 569 .dcache_bsize = 32, 570 .num_pmcs = 2, 571 .cpu_setup = __setup_cpu_604, 572 .machine_check = machine_check_generic, 573 .platform = "ppc604", 574 }, 575 { /* 604e */ 576 .pvr_mask = 0xfffff000, 577 .pvr_value = 0x00090000, 578 .cpu_name = "604e", 579 .cpu_features = CPU_FTRS_604, 580 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 581 .mmu_features = MMU_FTR_HPTE_TABLE, 582 .icache_bsize = 32, 583 .dcache_bsize = 32, 584 .num_pmcs = 4, 585 .cpu_setup = __setup_cpu_604, 586 .machine_check = machine_check_generic, 587 .platform = "ppc604", 588 }, 589 { /* 604r */ 590 .pvr_mask = 0xffff0000, 591 .pvr_value = 0x00090000, 592 .cpu_name = "604r", 593 .cpu_features = CPU_FTRS_604, 594 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 595 .mmu_features = MMU_FTR_HPTE_TABLE, 596 .icache_bsize = 32, 597 .dcache_bsize = 32, 598 .num_pmcs = 4, 599 .cpu_setup = __setup_cpu_604, 600 .machine_check = machine_check_generic, 601 .platform = "ppc604", 602 }, 603 { /* 604ev */ 604 .pvr_mask = 0xffff0000, 605 .pvr_value = 0x000a0000, 606 .cpu_name = "604ev", 607 .cpu_features = CPU_FTRS_604, 608 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 609 .mmu_features = MMU_FTR_HPTE_TABLE, 610 .icache_bsize = 32, 611 .dcache_bsize = 32, 612 .num_pmcs = 4, 613 .cpu_setup = __setup_cpu_604, 614 .machine_check = machine_check_generic, 615 .platform = "ppc604", 616 }, 617 { /* 740/750 (0x4202, don't support TAU ?) */ 618 .pvr_mask = 0xffffffff, 619 .pvr_value = 0x00084202, 620 .cpu_name = "740/750", 621 .cpu_features = CPU_FTRS_740_NOTAU, 622 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 623 .mmu_features = MMU_FTR_HPTE_TABLE, 624 .icache_bsize = 32, 625 .dcache_bsize = 32, 626 .num_pmcs = 4, 627 .cpu_setup = __setup_cpu_750, 628 .machine_check = machine_check_generic, 629 .platform = "ppc750", 630 }, 631 { /* 750CX (80100 and 8010x?) */ 632 .pvr_mask = 0xfffffff0, 633 .pvr_value = 0x00080100, 634 .cpu_name = "750CX", 635 .cpu_features = CPU_FTRS_750, 636 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 637 .mmu_features = MMU_FTR_HPTE_TABLE, 638 .icache_bsize = 32, 639 .dcache_bsize = 32, 640 .num_pmcs = 4, 641 .cpu_setup = __setup_cpu_750cx, 642 .machine_check = machine_check_generic, 643 .platform = "ppc750", 644 }, 645 { /* 750CX (82201 and 82202) */ 646 .pvr_mask = 0xfffffff0, 647 .pvr_value = 0x00082200, 648 .cpu_name = "750CX", 649 .cpu_features = CPU_FTRS_750, 650 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 651 .mmu_features = MMU_FTR_HPTE_TABLE, 652 .icache_bsize = 32, 653 .dcache_bsize = 32, 654 .num_pmcs = 4, 655 .pmc_type = PPC_PMC_IBM, 656 .cpu_setup = __setup_cpu_750cx, 657 .machine_check = machine_check_generic, 658 .platform = "ppc750", 659 }, 660 { /* 750CXe (82214) */ 661 .pvr_mask = 0xfffffff0, 662 .pvr_value = 0x00082210, 663 .cpu_name = "750CXe", 664 .cpu_features = CPU_FTRS_750, 665 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 666 .mmu_features = MMU_FTR_HPTE_TABLE, 667 .icache_bsize = 32, 668 .dcache_bsize = 32, 669 .num_pmcs = 4, 670 .pmc_type = PPC_PMC_IBM, 671 .cpu_setup = __setup_cpu_750cx, 672 .machine_check = machine_check_generic, 673 .platform = "ppc750", 674 }, 675 { /* 750CXe "Gekko" (83214) */ 676 .pvr_mask = 0xffffffff, 677 .pvr_value = 0x00083214, 678 .cpu_name = "750CXe", 679 .cpu_features = CPU_FTRS_750, 680 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 681 .mmu_features = MMU_FTR_HPTE_TABLE, 682 .icache_bsize = 32, 683 .dcache_bsize = 32, 684 .num_pmcs = 4, 685 .pmc_type = PPC_PMC_IBM, 686 .cpu_setup = __setup_cpu_750cx, 687 .machine_check = machine_check_generic, 688 .platform = "ppc750", 689 }, 690 { /* 750CL */ 691 .pvr_mask = 0xfffff0f0, 692 .pvr_value = 0x00087010, 693 .cpu_name = "750CL", 694 .cpu_features = CPU_FTRS_750CL, 695 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 696 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 697 .icache_bsize = 32, 698 .dcache_bsize = 32, 699 .num_pmcs = 4, 700 .pmc_type = PPC_PMC_IBM, 701 .cpu_setup = __setup_cpu_750, 702 .machine_check = machine_check_generic, 703 .platform = "ppc750", 704 }, 705 { /* 745/755 */ 706 .pvr_mask = 0xfffff000, 707 .pvr_value = 0x00083000, 708 .cpu_name = "745/755", 709 .cpu_features = CPU_FTRS_750, 710 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 711 .mmu_features = MMU_FTR_HPTE_TABLE, 712 .icache_bsize = 32, 713 .dcache_bsize = 32, 714 .num_pmcs = 4, 715 .pmc_type = PPC_PMC_IBM, 716 .cpu_setup = __setup_cpu_750, 717 .machine_check = machine_check_generic, 718 .platform = "ppc750", 719 }, 720 { /* 750FX rev 1.x */ 721 .pvr_mask = 0xffffff00, 722 .pvr_value = 0x70000100, 723 .cpu_name = "750FX", 724 .cpu_features = CPU_FTRS_750FX1, 725 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 726 .mmu_features = MMU_FTR_HPTE_TABLE, 727 .icache_bsize = 32, 728 .dcache_bsize = 32, 729 .num_pmcs = 4, 730 .pmc_type = PPC_PMC_IBM, 731 .cpu_setup = __setup_cpu_750, 732 .machine_check = machine_check_generic, 733 .platform = "ppc750", 734 .oprofile_cpu_type = "ppc/750", 735 .oprofile_type = PPC_OPROFILE_G4, 736 }, 737 { /* 750FX rev 2.0 must disable HID0[DPM] */ 738 .pvr_mask = 0xffffffff, 739 .pvr_value = 0x70000200, 740 .cpu_name = "750FX", 741 .cpu_features = CPU_FTRS_750FX2, 742 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 743 .mmu_features = MMU_FTR_HPTE_TABLE, 744 .icache_bsize = 32, 745 .dcache_bsize = 32, 746 .num_pmcs = 4, 747 .pmc_type = PPC_PMC_IBM, 748 .cpu_setup = __setup_cpu_750, 749 .machine_check = machine_check_generic, 750 .platform = "ppc750", 751 .oprofile_cpu_type = "ppc/750", 752 .oprofile_type = PPC_OPROFILE_G4, 753 }, 754 { /* 750FX (All revs except 2.0) */ 755 .pvr_mask = 0xffff0000, 756 .pvr_value = 0x70000000, 757 .cpu_name = "750FX", 758 .cpu_features = CPU_FTRS_750FX, 759 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 760 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 761 .icache_bsize = 32, 762 .dcache_bsize = 32, 763 .num_pmcs = 4, 764 .pmc_type = PPC_PMC_IBM, 765 .cpu_setup = __setup_cpu_750fx, 766 .machine_check = machine_check_generic, 767 .platform = "ppc750", 768 .oprofile_cpu_type = "ppc/750", 769 .oprofile_type = PPC_OPROFILE_G4, 770 }, 771 { /* 750GX */ 772 .pvr_mask = 0xffff0000, 773 .pvr_value = 0x70020000, 774 .cpu_name = "750GX", 775 .cpu_features = CPU_FTRS_750GX, 776 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 777 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 778 .icache_bsize = 32, 779 .dcache_bsize = 32, 780 .num_pmcs = 4, 781 .pmc_type = PPC_PMC_IBM, 782 .cpu_setup = __setup_cpu_750fx, 783 .machine_check = machine_check_generic, 784 .platform = "ppc750", 785 .oprofile_cpu_type = "ppc/750", 786 .oprofile_type = PPC_OPROFILE_G4, 787 }, 788 { /* 740/750 (L2CR bit need fixup for 740) */ 789 .pvr_mask = 0xffff0000, 790 .pvr_value = 0x00080000, 791 .cpu_name = "740/750", 792 .cpu_features = CPU_FTRS_740, 793 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 794 .mmu_features = MMU_FTR_HPTE_TABLE, 795 .icache_bsize = 32, 796 .dcache_bsize = 32, 797 .num_pmcs = 4, 798 .pmc_type = PPC_PMC_IBM, 799 .cpu_setup = __setup_cpu_750, 800 .machine_check = machine_check_generic, 801 .platform = "ppc750", 802 }, 803 { /* 7400 rev 1.1 ? (no TAU) */ 804 .pvr_mask = 0xffffffff, 805 .pvr_value = 0x000c1101, 806 .cpu_name = "7400 (1.1)", 807 .cpu_features = CPU_FTRS_7400_NOTAU, 808 .cpu_user_features = COMMON_USER | 809 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 810 .mmu_features = MMU_FTR_HPTE_TABLE, 811 .icache_bsize = 32, 812 .dcache_bsize = 32, 813 .num_pmcs = 4, 814 .pmc_type = PPC_PMC_G4, 815 .cpu_setup = __setup_cpu_7400, 816 .machine_check = machine_check_generic, 817 .platform = "ppc7400", 818 }, 819 { /* 7400 */ 820 .pvr_mask = 0xffff0000, 821 .pvr_value = 0x000c0000, 822 .cpu_name = "7400", 823 .cpu_features = CPU_FTRS_7400, 824 .cpu_user_features = COMMON_USER | 825 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 826 .mmu_features = MMU_FTR_HPTE_TABLE, 827 .icache_bsize = 32, 828 .dcache_bsize = 32, 829 .num_pmcs = 4, 830 .pmc_type = PPC_PMC_G4, 831 .cpu_setup = __setup_cpu_7400, 832 .machine_check = machine_check_generic, 833 .platform = "ppc7400", 834 }, 835 { /* 7410 */ 836 .pvr_mask = 0xffff0000, 837 .pvr_value = 0x800c0000, 838 .cpu_name = "7410", 839 .cpu_features = CPU_FTRS_7400, 840 .cpu_user_features = COMMON_USER | 841 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 842 .mmu_features = MMU_FTR_HPTE_TABLE, 843 .icache_bsize = 32, 844 .dcache_bsize = 32, 845 .num_pmcs = 4, 846 .pmc_type = PPC_PMC_G4, 847 .cpu_setup = __setup_cpu_7410, 848 .machine_check = machine_check_generic, 849 .platform = "ppc7400", 850 }, 851 { /* 7450 2.0 - no doze/nap */ 852 .pvr_mask = 0xffffffff, 853 .pvr_value = 0x80000200, 854 .cpu_name = "7450", 855 .cpu_features = CPU_FTRS_7450_20, 856 .cpu_user_features = COMMON_USER | 857 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 858 .mmu_features = MMU_FTR_HPTE_TABLE, 859 .icache_bsize = 32, 860 .dcache_bsize = 32, 861 .num_pmcs = 6, 862 .pmc_type = PPC_PMC_G4, 863 .cpu_setup = __setup_cpu_745x, 864 .oprofile_cpu_type = "ppc/7450", 865 .oprofile_type = PPC_OPROFILE_G4, 866 .machine_check = machine_check_generic, 867 .platform = "ppc7450", 868 }, 869 { /* 7450 2.1 */ 870 .pvr_mask = 0xffffffff, 871 .pvr_value = 0x80000201, 872 .cpu_name = "7450", 873 .cpu_features = CPU_FTRS_7450_21, 874 .cpu_user_features = COMMON_USER | 875 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 876 .mmu_features = MMU_FTR_HPTE_TABLE, 877 .icache_bsize = 32, 878 .dcache_bsize = 32, 879 .num_pmcs = 6, 880 .pmc_type = PPC_PMC_G4, 881 .cpu_setup = __setup_cpu_745x, 882 .oprofile_cpu_type = "ppc/7450", 883 .oprofile_type = PPC_OPROFILE_G4, 884 .machine_check = machine_check_generic, 885 .platform = "ppc7450", 886 }, 887 { /* 7450 2.3 and newer */ 888 .pvr_mask = 0xffff0000, 889 .pvr_value = 0x80000000, 890 .cpu_name = "7450", 891 .cpu_features = CPU_FTRS_7450_23, 892 .cpu_user_features = COMMON_USER | 893 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 894 .mmu_features = MMU_FTR_HPTE_TABLE, 895 .icache_bsize = 32, 896 .dcache_bsize = 32, 897 .num_pmcs = 6, 898 .pmc_type = PPC_PMC_G4, 899 .cpu_setup = __setup_cpu_745x, 900 .oprofile_cpu_type = "ppc/7450", 901 .oprofile_type = PPC_OPROFILE_G4, 902 .machine_check = machine_check_generic, 903 .platform = "ppc7450", 904 }, 905 { /* 7455 rev 1.x */ 906 .pvr_mask = 0xffffff00, 907 .pvr_value = 0x80010100, 908 .cpu_name = "7455", 909 .cpu_features = CPU_FTRS_7455_1, 910 .cpu_user_features = COMMON_USER | 911 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 912 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 913 .icache_bsize = 32, 914 .dcache_bsize = 32, 915 .num_pmcs = 6, 916 .pmc_type = PPC_PMC_G4, 917 .cpu_setup = __setup_cpu_745x, 918 .oprofile_cpu_type = "ppc/7450", 919 .oprofile_type = PPC_OPROFILE_G4, 920 .machine_check = machine_check_generic, 921 .platform = "ppc7450", 922 }, 923 { /* 7455 rev 2.0 */ 924 .pvr_mask = 0xffffffff, 925 .pvr_value = 0x80010200, 926 .cpu_name = "7455", 927 .cpu_features = CPU_FTRS_7455_20, 928 .cpu_user_features = COMMON_USER | 929 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 930 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 931 .icache_bsize = 32, 932 .dcache_bsize = 32, 933 .num_pmcs = 6, 934 .pmc_type = PPC_PMC_G4, 935 .cpu_setup = __setup_cpu_745x, 936 .oprofile_cpu_type = "ppc/7450", 937 .oprofile_type = PPC_OPROFILE_G4, 938 .machine_check = machine_check_generic, 939 .platform = "ppc7450", 940 }, 941 { /* 7455 others */ 942 .pvr_mask = 0xffff0000, 943 .pvr_value = 0x80010000, 944 .cpu_name = "7455", 945 .cpu_features = CPU_FTRS_7455, 946 .cpu_user_features = COMMON_USER | 947 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 948 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 949 .icache_bsize = 32, 950 .dcache_bsize = 32, 951 .num_pmcs = 6, 952 .pmc_type = PPC_PMC_G4, 953 .cpu_setup = __setup_cpu_745x, 954 .oprofile_cpu_type = "ppc/7450", 955 .oprofile_type = PPC_OPROFILE_G4, 956 .machine_check = machine_check_generic, 957 .platform = "ppc7450", 958 }, 959 { /* 7447/7457 Rev 1.0 */ 960 .pvr_mask = 0xffffffff, 961 .pvr_value = 0x80020100, 962 .cpu_name = "7447/7457", 963 .cpu_features = CPU_FTRS_7447_10, 964 .cpu_user_features = COMMON_USER | 965 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 966 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 967 .icache_bsize = 32, 968 .dcache_bsize = 32, 969 .num_pmcs = 6, 970 .pmc_type = PPC_PMC_G4, 971 .cpu_setup = __setup_cpu_745x, 972 .oprofile_cpu_type = "ppc/7450", 973 .oprofile_type = PPC_OPROFILE_G4, 974 .machine_check = machine_check_generic, 975 .platform = "ppc7450", 976 }, 977 { /* 7447/7457 Rev 1.1 */ 978 .pvr_mask = 0xffffffff, 979 .pvr_value = 0x80020101, 980 .cpu_name = "7447/7457", 981 .cpu_features = CPU_FTRS_7447_10, 982 .cpu_user_features = COMMON_USER | 983 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 984 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 985 .icache_bsize = 32, 986 .dcache_bsize = 32, 987 .num_pmcs = 6, 988 .pmc_type = PPC_PMC_G4, 989 .cpu_setup = __setup_cpu_745x, 990 .oprofile_cpu_type = "ppc/7450", 991 .oprofile_type = PPC_OPROFILE_G4, 992 .machine_check = machine_check_generic, 993 .platform = "ppc7450", 994 }, 995 { /* 7447/7457 Rev 1.2 and later */ 996 .pvr_mask = 0xffff0000, 997 .pvr_value = 0x80020000, 998 .cpu_name = "7447/7457", 999 .cpu_features = CPU_FTRS_7447, 1000 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1001 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1002 .icache_bsize = 32, 1003 .dcache_bsize = 32, 1004 .num_pmcs = 6, 1005 .pmc_type = PPC_PMC_G4, 1006 .cpu_setup = __setup_cpu_745x, 1007 .oprofile_cpu_type = "ppc/7450", 1008 .oprofile_type = PPC_OPROFILE_G4, 1009 .machine_check = machine_check_generic, 1010 .platform = "ppc7450", 1011 }, 1012 { /* 7447A */ 1013 .pvr_mask = 0xffff0000, 1014 .pvr_value = 0x80030000, 1015 .cpu_name = "7447A", 1016 .cpu_features = CPU_FTRS_7447A, 1017 .cpu_user_features = COMMON_USER | 1018 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1019 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1020 .icache_bsize = 32, 1021 .dcache_bsize = 32, 1022 .num_pmcs = 6, 1023 .pmc_type = PPC_PMC_G4, 1024 .cpu_setup = __setup_cpu_745x, 1025 .oprofile_cpu_type = "ppc/7450", 1026 .oprofile_type = PPC_OPROFILE_G4, 1027 .machine_check = machine_check_generic, 1028 .platform = "ppc7450", 1029 }, 1030 { /* 7448 */ 1031 .pvr_mask = 0xffff0000, 1032 .pvr_value = 0x80040000, 1033 .cpu_name = "7448", 1034 .cpu_features = CPU_FTRS_7448, 1035 .cpu_user_features = COMMON_USER | 1036 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1037 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1038 .icache_bsize = 32, 1039 .dcache_bsize = 32, 1040 .num_pmcs = 6, 1041 .pmc_type = PPC_PMC_G4, 1042 .cpu_setup = __setup_cpu_745x, 1043 .oprofile_cpu_type = "ppc/7450", 1044 .oprofile_type = PPC_OPROFILE_G4, 1045 .machine_check = machine_check_generic, 1046 .platform = "ppc7450", 1047 }, 1048 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1049 .pvr_mask = 0x7fff0000, 1050 .pvr_value = 0x00810000, 1051 .cpu_name = "82xx", 1052 .cpu_features = CPU_FTRS_82XX, 1053 .cpu_user_features = COMMON_USER, 1054 .mmu_features = 0, 1055 .icache_bsize = 32, 1056 .dcache_bsize = 32, 1057 .cpu_setup = __setup_cpu_603, 1058 .machine_check = machine_check_generic, 1059 .platform = "ppc603", 1060 }, 1061 { /* All G2_LE (603e core, plus some) have the same pvr */ 1062 .pvr_mask = 0x7fff0000, 1063 .pvr_value = 0x00820000, 1064 .cpu_name = "G2_LE", 1065 .cpu_features = CPU_FTRS_G2_LE, 1066 .cpu_user_features = COMMON_USER, 1067 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1068 .icache_bsize = 32, 1069 .dcache_bsize = 32, 1070 .cpu_setup = __setup_cpu_603, 1071 .machine_check = machine_check_generic, 1072 .platform = "ppc603", 1073 }, 1074 { /* e300c1 (a 603e core, plus some) on 83xx */ 1075 .pvr_mask = 0x7fff0000, 1076 .pvr_value = 0x00830000, 1077 .cpu_name = "e300c1", 1078 .cpu_features = CPU_FTRS_E300, 1079 .cpu_user_features = COMMON_USER, 1080 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1081 .icache_bsize = 32, 1082 .dcache_bsize = 32, 1083 .cpu_setup = __setup_cpu_603, 1084 .machine_check = machine_check_generic, 1085 .platform = "ppc603", 1086 }, 1087 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1088 .pvr_mask = 0x7fff0000, 1089 .pvr_value = 0x00840000, 1090 .cpu_name = "e300c2", 1091 .cpu_features = CPU_FTRS_E300C2, 1092 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1093 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1094 MMU_FTR_NEED_DTLB_SW_LRU, 1095 .icache_bsize = 32, 1096 .dcache_bsize = 32, 1097 .cpu_setup = __setup_cpu_603, 1098 .machine_check = machine_check_generic, 1099 .platform = "ppc603", 1100 }, 1101 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1102 .pvr_mask = 0x7fff0000, 1103 .pvr_value = 0x00850000, 1104 .cpu_name = "e300c3", 1105 .cpu_features = CPU_FTRS_E300, 1106 .cpu_user_features = COMMON_USER, 1107 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1108 MMU_FTR_NEED_DTLB_SW_LRU, 1109 .icache_bsize = 32, 1110 .dcache_bsize = 32, 1111 .cpu_setup = __setup_cpu_603, 1112 .num_pmcs = 4, 1113 .oprofile_cpu_type = "ppc/e300", 1114 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1115 .platform = "ppc603", 1116 }, 1117 { /* e300c4 (e300c1, plus one IU) */ 1118 .pvr_mask = 0x7fff0000, 1119 .pvr_value = 0x00860000, 1120 .cpu_name = "e300c4", 1121 .cpu_features = CPU_FTRS_E300, 1122 .cpu_user_features = COMMON_USER, 1123 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1124 MMU_FTR_NEED_DTLB_SW_LRU, 1125 .icache_bsize = 32, 1126 .dcache_bsize = 32, 1127 .cpu_setup = __setup_cpu_603, 1128 .machine_check = machine_check_generic, 1129 .num_pmcs = 4, 1130 .oprofile_cpu_type = "ppc/e300", 1131 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1132 .platform = "ppc603", 1133 }, 1134 { /* default match, we assume split I/D cache & TB (non-601)... */ 1135 .pvr_mask = 0x00000000, 1136 .pvr_value = 0x00000000, 1137 .cpu_name = "(generic PPC)", 1138 .cpu_features = CPU_FTRS_CLASSIC32, 1139 .cpu_user_features = COMMON_USER, 1140 .mmu_features = MMU_FTR_HPTE_TABLE, 1141 .icache_bsize = 32, 1142 .dcache_bsize = 32, 1143 .machine_check = machine_check_generic, 1144 .platform = "ppc603", 1145 }, 1146 #endif /* CLASSIC_PPC */ 1147 #ifdef CONFIG_8xx 1148 { /* 8xx */ 1149 .pvr_mask = 0xffff0000, 1150 .pvr_value = 0x00500000, 1151 .cpu_name = "8xx", 1152 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1153 * if the 8xx code is there.... */ 1154 .cpu_features = CPU_FTRS_8XX, 1155 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1156 .mmu_features = MMU_FTR_TYPE_8xx, 1157 .icache_bsize = 16, 1158 .dcache_bsize = 16, 1159 .platform = "ppc823", 1160 }, 1161 #endif /* CONFIG_8xx */ 1162 #ifdef CONFIG_40x 1163 { /* 403GC */ 1164 .pvr_mask = 0xffffff00, 1165 .pvr_value = 0x00200200, 1166 .cpu_name = "403GC", 1167 .cpu_features = CPU_FTRS_40X, 1168 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1169 .mmu_features = MMU_FTR_TYPE_40x, 1170 .icache_bsize = 16, 1171 .dcache_bsize = 16, 1172 .machine_check = machine_check_4xx, 1173 .platform = "ppc403", 1174 }, 1175 { /* 403GCX */ 1176 .pvr_mask = 0xffffff00, 1177 .pvr_value = 0x00201400, 1178 .cpu_name = "403GCX", 1179 .cpu_features = CPU_FTRS_40X, 1180 .cpu_user_features = PPC_FEATURE_32 | 1181 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1182 .mmu_features = MMU_FTR_TYPE_40x, 1183 .icache_bsize = 16, 1184 .dcache_bsize = 16, 1185 .machine_check = machine_check_4xx, 1186 .platform = "ppc403", 1187 }, 1188 { /* 403G ?? */ 1189 .pvr_mask = 0xffff0000, 1190 .pvr_value = 0x00200000, 1191 .cpu_name = "403G ??", 1192 .cpu_features = CPU_FTRS_40X, 1193 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1194 .mmu_features = MMU_FTR_TYPE_40x, 1195 .icache_bsize = 16, 1196 .dcache_bsize = 16, 1197 .machine_check = machine_check_4xx, 1198 .platform = "ppc403", 1199 }, 1200 { /* 405GP */ 1201 .pvr_mask = 0xffff0000, 1202 .pvr_value = 0x40110000, 1203 .cpu_name = "405GP", 1204 .cpu_features = CPU_FTRS_40X, 1205 .cpu_user_features = PPC_FEATURE_32 | 1206 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1207 .mmu_features = MMU_FTR_TYPE_40x, 1208 .icache_bsize = 32, 1209 .dcache_bsize = 32, 1210 .machine_check = machine_check_4xx, 1211 .platform = "ppc405", 1212 }, 1213 { /* STB 03xxx */ 1214 .pvr_mask = 0xffff0000, 1215 .pvr_value = 0x40130000, 1216 .cpu_name = "STB03xxx", 1217 .cpu_features = CPU_FTRS_40X, 1218 .cpu_user_features = PPC_FEATURE_32 | 1219 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1220 .mmu_features = MMU_FTR_TYPE_40x, 1221 .icache_bsize = 32, 1222 .dcache_bsize = 32, 1223 .machine_check = machine_check_4xx, 1224 .platform = "ppc405", 1225 }, 1226 { /* STB 04xxx */ 1227 .pvr_mask = 0xffff0000, 1228 .pvr_value = 0x41810000, 1229 .cpu_name = "STB04xxx", 1230 .cpu_features = CPU_FTRS_40X, 1231 .cpu_user_features = PPC_FEATURE_32 | 1232 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1233 .mmu_features = MMU_FTR_TYPE_40x, 1234 .icache_bsize = 32, 1235 .dcache_bsize = 32, 1236 .machine_check = machine_check_4xx, 1237 .platform = "ppc405", 1238 }, 1239 { /* NP405L */ 1240 .pvr_mask = 0xffff0000, 1241 .pvr_value = 0x41610000, 1242 .cpu_name = "NP405L", 1243 .cpu_features = CPU_FTRS_40X, 1244 .cpu_user_features = PPC_FEATURE_32 | 1245 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1246 .mmu_features = MMU_FTR_TYPE_40x, 1247 .icache_bsize = 32, 1248 .dcache_bsize = 32, 1249 .machine_check = machine_check_4xx, 1250 .platform = "ppc405", 1251 }, 1252 { /* NP4GS3 */ 1253 .pvr_mask = 0xffff0000, 1254 .pvr_value = 0x40B10000, 1255 .cpu_name = "NP4GS3", 1256 .cpu_features = CPU_FTRS_40X, 1257 .cpu_user_features = PPC_FEATURE_32 | 1258 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1259 .mmu_features = MMU_FTR_TYPE_40x, 1260 .icache_bsize = 32, 1261 .dcache_bsize = 32, 1262 .machine_check = machine_check_4xx, 1263 .platform = "ppc405", 1264 }, 1265 { /* NP405H */ 1266 .pvr_mask = 0xffff0000, 1267 .pvr_value = 0x41410000, 1268 .cpu_name = "NP405H", 1269 .cpu_features = CPU_FTRS_40X, 1270 .cpu_user_features = PPC_FEATURE_32 | 1271 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1272 .mmu_features = MMU_FTR_TYPE_40x, 1273 .icache_bsize = 32, 1274 .dcache_bsize = 32, 1275 .machine_check = machine_check_4xx, 1276 .platform = "ppc405", 1277 }, 1278 { /* 405GPr */ 1279 .pvr_mask = 0xffff0000, 1280 .pvr_value = 0x50910000, 1281 .cpu_name = "405GPr", 1282 .cpu_features = CPU_FTRS_40X, 1283 .cpu_user_features = PPC_FEATURE_32 | 1284 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1285 .mmu_features = MMU_FTR_TYPE_40x, 1286 .icache_bsize = 32, 1287 .dcache_bsize = 32, 1288 .machine_check = machine_check_4xx, 1289 .platform = "ppc405", 1290 }, 1291 { /* STBx25xx */ 1292 .pvr_mask = 0xffff0000, 1293 .pvr_value = 0x51510000, 1294 .cpu_name = "STBx25xx", 1295 .cpu_features = CPU_FTRS_40X, 1296 .cpu_user_features = PPC_FEATURE_32 | 1297 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1298 .mmu_features = MMU_FTR_TYPE_40x, 1299 .icache_bsize = 32, 1300 .dcache_bsize = 32, 1301 .machine_check = machine_check_4xx, 1302 .platform = "ppc405", 1303 }, 1304 { /* 405LP */ 1305 .pvr_mask = 0xffff0000, 1306 .pvr_value = 0x41F10000, 1307 .cpu_name = "405LP", 1308 .cpu_features = CPU_FTRS_40X, 1309 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1310 .mmu_features = MMU_FTR_TYPE_40x, 1311 .icache_bsize = 32, 1312 .dcache_bsize = 32, 1313 .machine_check = machine_check_4xx, 1314 .platform = "ppc405", 1315 }, 1316 { /* Xilinx Virtex-II Pro */ 1317 .pvr_mask = 0xfffff000, 1318 .pvr_value = 0x20010000, 1319 .cpu_name = "Virtex-II Pro", 1320 .cpu_features = CPU_FTRS_40X, 1321 .cpu_user_features = PPC_FEATURE_32 | 1322 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1323 .mmu_features = MMU_FTR_TYPE_40x, 1324 .icache_bsize = 32, 1325 .dcache_bsize = 32, 1326 .machine_check = machine_check_4xx, 1327 .platform = "ppc405", 1328 }, 1329 { /* Xilinx Virtex-4 FX */ 1330 .pvr_mask = 0xfffff000, 1331 .pvr_value = 0x20011000, 1332 .cpu_name = "Virtex-4 FX", 1333 .cpu_features = CPU_FTRS_40X, 1334 .cpu_user_features = PPC_FEATURE_32 | 1335 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1336 .mmu_features = MMU_FTR_TYPE_40x, 1337 .icache_bsize = 32, 1338 .dcache_bsize = 32, 1339 .machine_check = machine_check_4xx, 1340 .platform = "ppc405", 1341 }, 1342 { /* 405EP */ 1343 .pvr_mask = 0xffff0000, 1344 .pvr_value = 0x51210000, 1345 .cpu_name = "405EP", 1346 .cpu_features = CPU_FTRS_40X, 1347 .cpu_user_features = PPC_FEATURE_32 | 1348 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1349 .mmu_features = MMU_FTR_TYPE_40x, 1350 .icache_bsize = 32, 1351 .dcache_bsize = 32, 1352 .machine_check = machine_check_4xx, 1353 .platform = "ppc405", 1354 }, 1355 { /* 405EX */ 1356 .pvr_mask = 0xffff0004, 1357 .pvr_value = 0x12910004, 1358 .cpu_name = "405EX", 1359 .cpu_features = CPU_FTRS_40X, 1360 .cpu_user_features = PPC_FEATURE_32 | 1361 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1362 .mmu_features = MMU_FTR_TYPE_40x, 1363 .icache_bsize = 32, 1364 .dcache_bsize = 32, 1365 .machine_check = machine_check_4xx, 1366 .platform = "ppc405", 1367 }, 1368 { /* 405EXr */ 1369 .pvr_mask = 0xffff0004, 1370 .pvr_value = 0x12910000, 1371 .cpu_name = "405EXr", 1372 .cpu_features = CPU_FTRS_40X, 1373 .cpu_user_features = PPC_FEATURE_32 | 1374 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1375 .mmu_features = MMU_FTR_TYPE_40x, 1376 .icache_bsize = 32, 1377 .dcache_bsize = 32, 1378 .machine_check = machine_check_4xx, 1379 .platform = "ppc405", 1380 }, 1381 { 1382 /* 405EZ */ 1383 .pvr_mask = 0xffff0000, 1384 .pvr_value = 0x41510000, 1385 .cpu_name = "405EZ", 1386 .cpu_features = CPU_FTRS_40X, 1387 .cpu_user_features = PPC_FEATURE_32 | 1388 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1389 .mmu_features = MMU_FTR_TYPE_40x, 1390 .icache_bsize = 32, 1391 .dcache_bsize = 32, 1392 .machine_check = machine_check_4xx, 1393 .platform = "ppc405", 1394 }, 1395 { /* default match */ 1396 .pvr_mask = 0x00000000, 1397 .pvr_value = 0x00000000, 1398 .cpu_name = "(generic 40x PPC)", 1399 .cpu_features = CPU_FTRS_40X, 1400 .cpu_user_features = PPC_FEATURE_32 | 1401 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1402 .mmu_features = MMU_FTR_TYPE_40x, 1403 .icache_bsize = 32, 1404 .dcache_bsize = 32, 1405 .machine_check = machine_check_4xx, 1406 .platform = "ppc405", 1407 } 1408 1409 #endif /* CONFIG_40x */ 1410 #ifdef CONFIG_44x 1411 { 1412 .pvr_mask = 0xf0000fff, 1413 .pvr_value = 0x40000850, 1414 .cpu_name = "440GR Rev. A", 1415 .cpu_features = CPU_FTRS_44X, 1416 .cpu_user_features = COMMON_USER_BOOKE, 1417 .mmu_features = MMU_FTR_TYPE_44x, 1418 .icache_bsize = 32, 1419 .dcache_bsize = 32, 1420 .machine_check = machine_check_4xx, 1421 .platform = "ppc440", 1422 }, 1423 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1424 .pvr_mask = 0xf0000fff, 1425 .pvr_value = 0x40000858, 1426 .cpu_name = "440EP Rev. A", 1427 .cpu_features = CPU_FTRS_44X, 1428 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1429 .mmu_features = MMU_FTR_TYPE_44x, 1430 .icache_bsize = 32, 1431 .dcache_bsize = 32, 1432 .cpu_setup = __setup_cpu_440ep, 1433 .machine_check = machine_check_4xx, 1434 .platform = "ppc440", 1435 }, 1436 { 1437 .pvr_mask = 0xf0000fff, 1438 .pvr_value = 0x400008d3, 1439 .cpu_name = "440GR Rev. B", 1440 .cpu_features = CPU_FTRS_44X, 1441 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1442 .mmu_features = MMU_FTR_TYPE_44x, 1443 .icache_bsize = 32, 1444 .dcache_bsize = 32, 1445 .machine_check = machine_check_4xx, 1446 .platform = "ppc440", 1447 }, 1448 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1449 .pvr_mask = 0xf0000ff7, 1450 .pvr_value = 0x400008d4, 1451 .cpu_name = "440EP Rev. C", 1452 .cpu_features = CPU_FTRS_44X, 1453 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1454 .mmu_features = MMU_FTR_TYPE_44x, 1455 .icache_bsize = 32, 1456 .dcache_bsize = 32, 1457 .cpu_setup = __setup_cpu_440ep, 1458 .machine_check = machine_check_4xx, 1459 .platform = "ppc440", 1460 }, 1461 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1462 .pvr_mask = 0xf0000fff, 1463 .pvr_value = 0x400008db, 1464 .cpu_name = "440EP Rev. B", 1465 .cpu_features = CPU_FTRS_44X, 1466 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1467 .mmu_features = MMU_FTR_TYPE_44x, 1468 .icache_bsize = 32, 1469 .dcache_bsize = 32, 1470 .cpu_setup = __setup_cpu_440ep, 1471 .machine_check = machine_check_4xx, 1472 .platform = "ppc440", 1473 }, 1474 { /* 440GRX */ 1475 .pvr_mask = 0xf0000ffb, 1476 .pvr_value = 0x200008D0, 1477 .cpu_name = "440GRX", 1478 .cpu_features = CPU_FTRS_44X, 1479 .cpu_user_features = COMMON_USER_BOOKE, 1480 .mmu_features = MMU_FTR_TYPE_44x, 1481 .icache_bsize = 32, 1482 .dcache_bsize = 32, 1483 .cpu_setup = __setup_cpu_440grx, 1484 .machine_check = machine_check_440A, 1485 .platform = "ppc440", 1486 }, 1487 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1488 .pvr_mask = 0xf0000ffb, 1489 .pvr_value = 0x200008D8, 1490 .cpu_name = "440EPX", 1491 .cpu_features = CPU_FTRS_44X, 1492 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1493 .mmu_features = MMU_FTR_TYPE_44x, 1494 .icache_bsize = 32, 1495 .dcache_bsize = 32, 1496 .cpu_setup = __setup_cpu_440epx, 1497 .machine_check = machine_check_440A, 1498 .platform = "ppc440", 1499 }, 1500 { /* 440GP Rev. B */ 1501 .pvr_mask = 0xf0000fff, 1502 .pvr_value = 0x40000440, 1503 .cpu_name = "440GP Rev. B", 1504 .cpu_features = CPU_FTRS_44X, 1505 .cpu_user_features = COMMON_USER_BOOKE, 1506 .mmu_features = MMU_FTR_TYPE_44x, 1507 .icache_bsize = 32, 1508 .dcache_bsize = 32, 1509 .machine_check = machine_check_4xx, 1510 .platform = "ppc440gp", 1511 }, 1512 { /* 440GP Rev. C */ 1513 .pvr_mask = 0xf0000fff, 1514 .pvr_value = 0x40000481, 1515 .cpu_name = "440GP Rev. C", 1516 .cpu_features = CPU_FTRS_44X, 1517 .cpu_user_features = COMMON_USER_BOOKE, 1518 .mmu_features = MMU_FTR_TYPE_44x, 1519 .icache_bsize = 32, 1520 .dcache_bsize = 32, 1521 .machine_check = machine_check_4xx, 1522 .platform = "ppc440gp", 1523 }, 1524 { /* 440GX Rev. A */ 1525 .pvr_mask = 0xf0000fff, 1526 .pvr_value = 0x50000850, 1527 .cpu_name = "440GX Rev. A", 1528 .cpu_features = CPU_FTRS_44X, 1529 .cpu_user_features = COMMON_USER_BOOKE, 1530 .mmu_features = MMU_FTR_TYPE_44x, 1531 .icache_bsize = 32, 1532 .dcache_bsize = 32, 1533 .cpu_setup = __setup_cpu_440gx, 1534 .machine_check = machine_check_440A, 1535 .platform = "ppc440", 1536 }, 1537 { /* 440GX Rev. B */ 1538 .pvr_mask = 0xf0000fff, 1539 .pvr_value = 0x50000851, 1540 .cpu_name = "440GX Rev. B", 1541 .cpu_features = CPU_FTRS_44X, 1542 .cpu_user_features = COMMON_USER_BOOKE, 1543 .mmu_features = MMU_FTR_TYPE_44x, 1544 .icache_bsize = 32, 1545 .dcache_bsize = 32, 1546 .cpu_setup = __setup_cpu_440gx, 1547 .machine_check = machine_check_440A, 1548 .platform = "ppc440", 1549 }, 1550 { /* 440GX Rev. C */ 1551 .pvr_mask = 0xf0000fff, 1552 .pvr_value = 0x50000892, 1553 .cpu_name = "440GX Rev. C", 1554 .cpu_features = CPU_FTRS_44X, 1555 .cpu_user_features = COMMON_USER_BOOKE, 1556 .mmu_features = MMU_FTR_TYPE_44x, 1557 .icache_bsize = 32, 1558 .dcache_bsize = 32, 1559 .cpu_setup = __setup_cpu_440gx, 1560 .machine_check = machine_check_440A, 1561 .platform = "ppc440", 1562 }, 1563 { /* 440GX Rev. F */ 1564 .pvr_mask = 0xf0000fff, 1565 .pvr_value = 0x50000894, 1566 .cpu_name = "440GX Rev. F", 1567 .cpu_features = CPU_FTRS_44X, 1568 .cpu_user_features = COMMON_USER_BOOKE, 1569 .mmu_features = MMU_FTR_TYPE_44x, 1570 .icache_bsize = 32, 1571 .dcache_bsize = 32, 1572 .cpu_setup = __setup_cpu_440gx, 1573 .machine_check = machine_check_440A, 1574 .platform = "ppc440", 1575 }, 1576 { /* 440SP Rev. A */ 1577 .pvr_mask = 0xfff00fff, 1578 .pvr_value = 0x53200891, 1579 .cpu_name = "440SP Rev. A", 1580 .cpu_features = CPU_FTRS_44X, 1581 .cpu_user_features = COMMON_USER_BOOKE, 1582 .mmu_features = MMU_FTR_TYPE_44x, 1583 .icache_bsize = 32, 1584 .dcache_bsize = 32, 1585 .machine_check = machine_check_4xx, 1586 .platform = "ppc440", 1587 }, 1588 { /* 440SPe Rev. A */ 1589 .pvr_mask = 0xfff00fff, 1590 .pvr_value = 0x53400890, 1591 .cpu_name = "440SPe Rev. A", 1592 .cpu_features = CPU_FTRS_44X, 1593 .cpu_user_features = COMMON_USER_BOOKE, 1594 .mmu_features = MMU_FTR_TYPE_44x, 1595 .icache_bsize = 32, 1596 .dcache_bsize = 32, 1597 .cpu_setup = __setup_cpu_440spe, 1598 .machine_check = machine_check_440A, 1599 .platform = "ppc440", 1600 }, 1601 { /* 440SPe Rev. B */ 1602 .pvr_mask = 0xfff00fff, 1603 .pvr_value = 0x53400891, 1604 .cpu_name = "440SPe Rev. B", 1605 .cpu_features = CPU_FTRS_44X, 1606 .cpu_user_features = COMMON_USER_BOOKE, 1607 .mmu_features = MMU_FTR_TYPE_44x, 1608 .icache_bsize = 32, 1609 .dcache_bsize = 32, 1610 .cpu_setup = __setup_cpu_440spe, 1611 .machine_check = machine_check_440A, 1612 .platform = "ppc440", 1613 }, 1614 { /* 440 in Xilinx Virtex-5 FXT */ 1615 .pvr_mask = 0xfffffff0, 1616 .pvr_value = 0x7ff21910, 1617 .cpu_name = "440 in Virtex-5 FXT", 1618 .cpu_features = CPU_FTRS_44X, 1619 .cpu_user_features = COMMON_USER_BOOKE, 1620 .mmu_features = MMU_FTR_TYPE_44x, 1621 .icache_bsize = 32, 1622 .dcache_bsize = 32, 1623 .cpu_setup = __setup_cpu_440x5, 1624 .machine_check = machine_check_440A, 1625 .platform = "ppc440", 1626 }, 1627 { /* 460EX */ 1628 .pvr_mask = 0xffff0002, 1629 .pvr_value = 0x13020002, 1630 .cpu_name = "460EX", 1631 .cpu_features = CPU_FTRS_440x6, 1632 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1633 .mmu_features = MMU_FTR_TYPE_44x, 1634 .icache_bsize = 32, 1635 .dcache_bsize = 32, 1636 .cpu_setup = __setup_cpu_460ex, 1637 .machine_check = machine_check_440A, 1638 .platform = "ppc440", 1639 }, 1640 { /* 460GT */ 1641 .pvr_mask = 0xffff0002, 1642 .pvr_value = 0x13020000, 1643 .cpu_name = "460GT", 1644 .cpu_features = CPU_FTRS_440x6, 1645 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1646 .mmu_features = MMU_FTR_TYPE_44x, 1647 .icache_bsize = 32, 1648 .dcache_bsize = 32, 1649 .cpu_setup = __setup_cpu_460gt, 1650 .machine_check = machine_check_440A, 1651 .platform = "ppc440", 1652 }, 1653 { /* 460SX */ 1654 .pvr_mask = 0xffffff00, 1655 .pvr_value = 0x13541800, 1656 .cpu_name = "460SX", 1657 .cpu_features = CPU_FTRS_44X, 1658 .cpu_user_features = COMMON_USER_BOOKE, 1659 .mmu_features = MMU_FTR_TYPE_44x, 1660 .icache_bsize = 32, 1661 .dcache_bsize = 32, 1662 .cpu_setup = __setup_cpu_460sx, 1663 .machine_check = machine_check_440A, 1664 .platform = "ppc440", 1665 }, 1666 { /* default match */ 1667 .pvr_mask = 0x00000000, 1668 .pvr_value = 0x00000000, 1669 .cpu_name = "(generic 44x PPC)", 1670 .cpu_features = CPU_FTRS_44X, 1671 .cpu_user_features = COMMON_USER_BOOKE, 1672 .mmu_features = MMU_FTR_TYPE_44x, 1673 .icache_bsize = 32, 1674 .dcache_bsize = 32, 1675 .machine_check = machine_check_4xx, 1676 .platform = "ppc440", 1677 } 1678 #endif /* CONFIG_44x */ 1679 #ifdef CONFIG_E200 1680 { /* e200z5 */ 1681 .pvr_mask = 0xfff00000, 1682 .pvr_value = 0x81000000, 1683 .cpu_name = "e200z5", 1684 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1685 .cpu_features = CPU_FTRS_E200, 1686 .cpu_user_features = COMMON_USER_BOOKE | 1687 PPC_FEATURE_HAS_EFP_SINGLE | 1688 PPC_FEATURE_UNIFIED_CACHE, 1689 .mmu_features = MMU_FTR_TYPE_FSL_E, 1690 .dcache_bsize = 32, 1691 .machine_check = machine_check_e200, 1692 .platform = "ppc5554", 1693 }, 1694 { /* e200z6 */ 1695 .pvr_mask = 0xfff00000, 1696 .pvr_value = 0x81100000, 1697 .cpu_name = "e200z6", 1698 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1699 .cpu_features = CPU_FTRS_E200, 1700 .cpu_user_features = COMMON_USER_BOOKE | 1701 PPC_FEATURE_HAS_SPE_COMP | 1702 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1703 PPC_FEATURE_UNIFIED_CACHE, 1704 .mmu_features = MMU_FTR_TYPE_FSL_E, 1705 .dcache_bsize = 32, 1706 .machine_check = machine_check_e200, 1707 .platform = "ppc5554", 1708 }, 1709 { /* default match */ 1710 .pvr_mask = 0x00000000, 1711 .pvr_value = 0x00000000, 1712 .cpu_name = "(generic E200 PPC)", 1713 .cpu_features = CPU_FTRS_E200, 1714 .cpu_user_features = COMMON_USER_BOOKE | 1715 PPC_FEATURE_HAS_EFP_SINGLE | 1716 PPC_FEATURE_UNIFIED_CACHE, 1717 .mmu_features = MMU_FTR_TYPE_FSL_E, 1718 .dcache_bsize = 32, 1719 .cpu_setup = __setup_cpu_e200, 1720 .machine_check = machine_check_e200, 1721 .platform = "ppc5554", 1722 } 1723 #endif /* CONFIG_E200 */ 1724 #ifdef CONFIG_E500 1725 { /* e500 */ 1726 .pvr_mask = 0xffff0000, 1727 .pvr_value = 0x80200000, 1728 .cpu_name = "e500", 1729 .cpu_features = CPU_FTRS_E500, 1730 .cpu_user_features = COMMON_USER_BOOKE | 1731 PPC_FEATURE_HAS_SPE_COMP | 1732 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1733 .mmu_features = MMU_FTR_TYPE_FSL_E, 1734 .icache_bsize = 32, 1735 .dcache_bsize = 32, 1736 .num_pmcs = 4, 1737 .oprofile_cpu_type = "ppc/e500", 1738 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1739 .cpu_setup = __setup_cpu_e500v1, 1740 .machine_check = machine_check_e500, 1741 .platform = "ppc8540", 1742 }, 1743 { /* e500v2 */ 1744 .pvr_mask = 0xffff0000, 1745 .pvr_value = 0x80210000, 1746 .cpu_name = "e500v2", 1747 .cpu_features = CPU_FTRS_E500_2, 1748 .cpu_user_features = COMMON_USER_BOOKE | 1749 PPC_FEATURE_HAS_SPE_COMP | 1750 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1751 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1752 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1753 .icache_bsize = 32, 1754 .dcache_bsize = 32, 1755 .num_pmcs = 4, 1756 .oprofile_cpu_type = "ppc/e500", 1757 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1758 .cpu_setup = __setup_cpu_e500v2, 1759 .machine_check = machine_check_e500, 1760 .platform = "ppc8548", 1761 }, 1762 { /* e500mc */ 1763 .pvr_mask = 0xffff0000, 1764 .pvr_value = 0x80230000, 1765 .cpu_name = "e500mc", 1766 .cpu_features = CPU_FTRS_E500MC, 1767 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1768 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1769 MMU_FTR_USE_TLBILX, 1770 .icache_bsize = 64, 1771 .dcache_bsize = 64, 1772 .num_pmcs = 4, 1773 .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ 1774 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1775 .cpu_setup = __setup_cpu_e500mc, 1776 .machine_check = machine_check_e500, 1777 .platform = "ppce500mc", 1778 }, 1779 { /* default match */ 1780 .pvr_mask = 0x00000000, 1781 .pvr_value = 0x00000000, 1782 .cpu_name = "(generic E500 PPC)", 1783 .cpu_features = CPU_FTRS_E500, 1784 .cpu_user_features = COMMON_USER_BOOKE | 1785 PPC_FEATURE_HAS_SPE_COMP | 1786 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1787 .mmu_features = MMU_FTR_TYPE_FSL_E, 1788 .icache_bsize = 32, 1789 .dcache_bsize = 32, 1790 .machine_check = machine_check_e500, 1791 .platform = "powerpc", 1792 } 1793 #endif /* CONFIG_E500 */ 1794 #endif /* CONFIG_PPC32 */ 1795 }; 1796 1797 static struct cpu_spec the_cpu_spec; 1798 1799 static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s) 1800 { 1801 struct cpu_spec *t = &the_cpu_spec; 1802 struct cpu_spec old; 1803 1804 t = PTRRELOC(t); 1805 old = *t; 1806 1807 /* Copy everything, then do fixups */ 1808 *t = *s; 1809 1810 /* 1811 * If we are overriding a previous value derived from the real 1812 * PVR with a new value obtained using a logical PVR value, 1813 * don't modify the performance monitor fields. 1814 */ 1815 if (old.num_pmcs && !s->num_pmcs) { 1816 t->num_pmcs = old.num_pmcs; 1817 t->pmc_type = old.pmc_type; 1818 t->oprofile_type = old.oprofile_type; 1819 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 1820 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 1821 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 1822 1823 /* 1824 * If we have passed through this logic once before and 1825 * have pulled the default case because the real PVR was 1826 * not found inside cpu_specs[], then we are possibly 1827 * running in compatibility mode. In that case, let the 1828 * oprofiler know which set of compatibility counters to 1829 * pull from by making sure the oprofile_cpu_type string 1830 * is set to that of compatibility mode. If the 1831 * oprofile_cpu_type already has a value, then we are 1832 * possibly overriding a real PVR with a logical one, 1833 * and, in that case, keep the current value for 1834 * oprofile_cpu_type. 1835 */ 1836 if (old.oprofile_cpu_type == NULL) 1837 t->oprofile_cpu_type = s->oprofile_cpu_type; 1838 } 1839 1840 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 1841 1842 /* 1843 * Set the base platform string once; assumes 1844 * we're called with real pvr first. 1845 */ 1846 if (*PTRRELOC(&powerpc_base_platform) == NULL) 1847 *PTRRELOC(&powerpc_base_platform) = t->platform; 1848 1849 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 1850 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 1851 * that processor. I will consolidate that at a later time, for now, 1852 * just use #ifdef. We also don't need to PTRRELOC the function 1853 * pointer on ppc64 and booke as we are running at 0 in real mode 1854 * on ppc64 and reloc_offset is always 0 on booke. 1855 */ 1856 if (s->cpu_setup) { 1857 s->cpu_setup(offset, s); 1858 } 1859 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 1860 } 1861 1862 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 1863 { 1864 struct cpu_spec *s = cpu_specs; 1865 int i; 1866 1867 s = PTRRELOC(s); 1868 1869 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 1870 if ((pvr & s->pvr_mask) == s->pvr_value) { 1871 setup_cpu_spec(offset, s); 1872 return s; 1873 } 1874 } 1875 1876 BUG(); 1877 1878 return NULL; 1879 } 1880