1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 4 * 5 * Modifications for ppc64: 6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 7 */ 8 9 #include <linux/string.h> 10 #include <linux/sched.h> 11 #include <linux/threads.h> 12 #include <linux/init.h> 13 #include <linux/export.h> 14 #include <linux/jump_label.h> 15 16 #include <asm/oprofile_impl.h> 17 #include <asm/cputable.h> 18 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 19 #include <asm/mce.h> 20 #include <asm/mmu.h> 21 #include <asm/setup.h> 22 23 static struct cpu_spec the_cpu_spec __read_mostly; 24 25 struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 26 EXPORT_SYMBOL(cur_cpu_spec); 27 28 /* The platform string corresponding to the real PVR */ 29 const char *powerpc_base_platform; 30 31 /* NOTE: 32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 33 * the responsibility of the appropriate CPU save/restore functions to 34 * eventually copy these settings over. Those save/restore aren't yet 35 * part of the cputable though. That has to be fixed for both ppc32 36 * and ppc64 37 */ 38 #ifdef CONFIG_PPC32 39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 51 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 52 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 60 #endif /* CONFIG_PPC32 */ 61 #ifdef CONFIG_PPC64 62 #include <asm/cpu_setup_power.h> 63 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 64 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 65 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 66 extern void __restore_cpu_pa6t(void); 67 extern void __restore_cpu_ppc970(void); 68 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 69 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 70 extern long __machine_check_early_realmode_p9(struct pt_regs *regs); 71 #endif /* CONFIG_PPC64 */ 72 #if defined(CONFIG_E500) 73 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 74 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 75 extern void __restore_cpu_e5500(void); 76 extern void __restore_cpu_e6500(void); 77 #endif /* CONFIG_E500 */ 78 79 /* This table only contains "desktop" CPUs, it need to be filled with embedded 80 * ones as well... 81 */ 82 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 83 PPC_FEATURE_HAS_MMU) 84 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 85 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 86 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 87 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 88 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 89 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 90 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 91 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 92 PPC_FEATURE_TRUE_LE | \ 93 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 94 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 95 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 96 PPC_FEATURE_TRUE_LE | \ 97 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 98 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 99 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 100 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 101 PPC_FEATURE_TRUE_LE | \ 102 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 103 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 104 PPC_FEATURE2_HTM_COMP | \ 105 PPC_FEATURE2_HTM_NOSC_COMP | \ 106 PPC_FEATURE2_DSCR | \ 107 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 108 PPC_FEATURE2_VEC_CRYPTO) 109 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 110 PPC_FEATURE_TRUE_LE | \ 111 PPC_FEATURE_HAS_ALTIVEC_COMP) 112 #define COMMON_USER_POWER9 COMMON_USER_POWER8 113 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 114 PPC_FEATURE2_ARCH_3_00 | \ 115 PPC_FEATURE2_HAS_IEEE128 | \ 116 PPC_FEATURE2_DARN | \ 117 PPC_FEATURE2_SCV) 118 #define COMMON_USER_POWER10 COMMON_USER_POWER9 119 #define COMMON_USER2_POWER10 (PPC_FEATURE2_ARCH_3_1 | \ 120 PPC_FEATURE2_MMA | \ 121 PPC_FEATURE2_ARCH_3_00 | \ 122 PPC_FEATURE2_HAS_IEEE128 | \ 123 PPC_FEATURE2_DARN | \ 124 PPC_FEATURE2_SCV | \ 125 PPC_FEATURE2_ARCH_2_07 | \ 126 PPC_FEATURE2_DSCR | \ 127 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 128 PPC_FEATURE2_VEC_CRYPTO) 129 130 #ifdef CONFIG_PPC_BOOK3E_64 131 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 132 #else 133 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 134 PPC_FEATURE_BOOKE) 135 #endif 136 137 static struct cpu_spec __initdata cpu_specs[] = { 138 #ifdef CONFIG_PPC_BOOK3S_64 139 { /* PPC970 */ 140 .pvr_mask = 0xffff0000, 141 .pvr_value = 0x00390000, 142 .cpu_name = "PPC970", 143 .cpu_features = CPU_FTRS_PPC970, 144 .cpu_user_features = COMMON_USER_POWER4 | 145 PPC_FEATURE_HAS_ALTIVEC_COMP, 146 .mmu_features = MMU_FTRS_PPC970, 147 .icache_bsize = 128, 148 .dcache_bsize = 128, 149 .num_pmcs = 8, 150 .pmc_type = PPC_PMC_IBM, 151 .cpu_setup = __setup_cpu_ppc970, 152 .cpu_restore = __restore_cpu_ppc970, 153 .oprofile_cpu_type = "ppc64/970", 154 .oprofile_type = PPC_OPROFILE_POWER4, 155 .platform = "ppc970", 156 }, 157 { /* PPC970FX */ 158 .pvr_mask = 0xffff0000, 159 .pvr_value = 0x003c0000, 160 .cpu_name = "PPC970FX", 161 .cpu_features = CPU_FTRS_PPC970, 162 .cpu_user_features = COMMON_USER_POWER4 | 163 PPC_FEATURE_HAS_ALTIVEC_COMP, 164 .mmu_features = MMU_FTRS_PPC970, 165 .icache_bsize = 128, 166 .dcache_bsize = 128, 167 .num_pmcs = 8, 168 .pmc_type = PPC_PMC_IBM, 169 .cpu_setup = __setup_cpu_ppc970, 170 .cpu_restore = __restore_cpu_ppc970, 171 .oprofile_cpu_type = "ppc64/970", 172 .oprofile_type = PPC_OPROFILE_POWER4, 173 .platform = "ppc970", 174 }, 175 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 176 .pvr_mask = 0xffffffff, 177 .pvr_value = 0x00440100, 178 .cpu_name = "PPC970MP", 179 .cpu_features = CPU_FTRS_PPC970, 180 .cpu_user_features = COMMON_USER_POWER4 | 181 PPC_FEATURE_HAS_ALTIVEC_COMP, 182 .mmu_features = MMU_FTRS_PPC970, 183 .icache_bsize = 128, 184 .dcache_bsize = 128, 185 .num_pmcs = 8, 186 .pmc_type = PPC_PMC_IBM, 187 .cpu_setup = __setup_cpu_ppc970, 188 .cpu_restore = __restore_cpu_ppc970, 189 .oprofile_cpu_type = "ppc64/970MP", 190 .oprofile_type = PPC_OPROFILE_POWER4, 191 .platform = "ppc970", 192 }, 193 { /* PPC970MP */ 194 .pvr_mask = 0xffff0000, 195 .pvr_value = 0x00440000, 196 .cpu_name = "PPC970MP", 197 .cpu_features = CPU_FTRS_PPC970, 198 .cpu_user_features = COMMON_USER_POWER4 | 199 PPC_FEATURE_HAS_ALTIVEC_COMP, 200 .mmu_features = MMU_FTRS_PPC970, 201 .icache_bsize = 128, 202 .dcache_bsize = 128, 203 .num_pmcs = 8, 204 .pmc_type = PPC_PMC_IBM, 205 .cpu_setup = __setup_cpu_ppc970MP, 206 .cpu_restore = __restore_cpu_ppc970, 207 .oprofile_cpu_type = "ppc64/970MP", 208 .oprofile_type = PPC_OPROFILE_POWER4, 209 .platform = "ppc970", 210 }, 211 { /* PPC970GX */ 212 .pvr_mask = 0xffff0000, 213 .pvr_value = 0x00450000, 214 .cpu_name = "PPC970GX", 215 .cpu_features = CPU_FTRS_PPC970, 216 .cpu_user_features = COMMON_USER_POWER4 | 217 PPC_FEATURE_HAS_ALTIVEC_COMP, 218 .mmu_features = MMU_FTRS_PPC970, 219 .icache_bsize = 128, 220 .dcache_bsize = 128, 221 .num_pmcs = 8, 222 .pmc_type = PPC_PMC_IBM, 223 .cpu_setup = __setup_cpu_ppc970, 224 .oprofile_cpu_type = "ppc64/970", 225 .oprofile_type = PPC_OPROFILE_POWER4, 226 .platform = "ppc970", 227 }, 228 { /* Power5 GR */ 229 .pvr_mask = 0xffff0000, 230 .pvr_value = 0x003a0000, 231 .cpu_name = "POWER5 (gr)", 232 .cpu_features = CPU_FTRS_POWER5, 233 .cpu_user_features = COMMON_USER_POWER5, 234 .mmu_features = MMU_FTRS_POWER5, 235 .icache_bsize = 128, 236 .dcache_bsize = 128, 237 .num_pmcs = 6, 238 .pmc_type = PPC_PMC_IBM, 239 .oprofile_cpu_type = "ppc64/power5", 240 .oprofile_type = PPC_OPROFILE_POWER4, 241 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 242 * and above but only works on POWER5 and above 243 */ 244 .oprofile_mmcra_sihv = MMCRA_SIHV, 245 .oprofile_mmcra_sipr = MMCRA_SIPR, 246 .platform = "power5", 247 }, 248 { /* Power5++ */ 249 .pvr_mask = 0xffffff00, 250 .pvr_value = 0x003b0300, 251 .cpu_name = "POWER5+ (gs)", 252 .cpu_features = CPU_FTRS_POWER5, 253 .cpu_user_features = COMMON_USER_POWER5_PLUS, 254 .mmu_features = MMU_FTRS_POWER5, 255 .icache_bsize = 128, 256 .dcache_bsize = 128, 257 .num_pmcs = 6, 258 .oprofile_cpu_type = "ppc64/power5++", 259 .oprofile_type = PPC_OPROFILE_POWER4, 260 .oprofile_mmcra_sihv = MMCRA_SIHV, 261 .oprofile_mmcra_sipr = MMCRA_SIPR, 262 .platform = "power5+", 263 }, 264 { /* Power5 GS */ 265 .pvr_mask = 0xffff0000, 266 .pvr_value = 0x003b0000, 267 .cpu_name = "POWER5+ (gs)", 268 .cpu_features = CPU_FTRS_POWER5, 269 .cpu_user_features = COMMON_USER_POWER5_PLUS, 270 .mmu_features = MMU_FTRS_POWER5, 271 .icache_bsize = 128, 272 .dcache_bsize = 128, 273 .num_pmcs = 6, 274 .pmc_type = PPC_PMC_IBM, 275 .oprofile_cpu_type = "ppc64/power5+", 276 .oprofile_type = PPC_OPROFILE_POWER4, 277 .oprofile_mmcra_sihv = MMCRA_SIHV, 278 .oprofile_mmcra_sipr = MMCRA_SIPR, 279 .platform = "power5+", 280 }, 281 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 282 .pvr_mask = 0xffffffff, 283 .pvr_value = 0x0f000001, 284 .cpu_name = "POWER5+", 285 .cpu_features = CPU_FTRS_POWER5, 286 .cpu_user_features = COMMON_USER_POWER5_PLUS, 287 .mmu_features = MMU_FTRS_POWER5, 288 .icache_bsize = 128, 289 .dcache_bsize = 128, 290 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 291 .oprofile_type = PPC_OPROFILE_POWER4, 292 .platform = "power5+", 293 }, 294 { /* Power6 */ 295 .pvr_mask = 0xffff0000, 296 .pvr_value = 0x003e0000, 297 .cpu_name = "POWER6 (raw)", 298 .cpu_features = CPU_FTRS_POWER6, 299 .cpu_user_features = COMMON_USER_POWER6 | 300 PPC_FEATURE_POWER6_EXT, 301 .mmu_features = MMU_FTRS_POWER6, 302 .icache_bsize = 128, 303 .dcache_bsize = 128, 304 .num_pmcs = 6, 305 .pmc_type = PPC_PMC_IBM, 306 .oprofile_cpu_type = "ppc64/power6", 307 .oprofile_type = PPC_OPROFILE_POWER4, 308 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 309 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 310 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 311 POWER6_MMCRA_OTHER, 312 .platform = "power6x", 313 }, 314 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 315 .pvr_mask = 0xffffffff, 316 .pvr_value = 0x0f000002, 317 .cpu_name = "POWER6 (architected)", 318 .cpu_features = CPU_FTRS_POWER6, 319 .cpu_user_features = COMMON_USER_POWER6, 320 .mmu_features = MMU_FTRS_POWER6, 321 .icache_bsize = 128, 322 .dcache_bsize = 128, 323 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 324 .oprofile_type = PPC_OPROFILE_POWER4, 325 .platform = "power6", 326 }, 327 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 328 .pvr_mask = 0xffffffff, 329 .pvr_value = 0x0f000003, 330 .cpu_name = "POWER7 (architected)", 331 .cpu_features = CPU_FTRS_POWER7, 332 .cpu_user_features = COMMON_USER_POWER7, 333 .cpu_user_features2 = COMMON_USER2_POWER7, 334 .mmu_features = MMU_FTRS_POWER7, 335 .icache_bsize = 128, 336 .dcache_bsize = 128, 337 .oprofile_type = PPC_OPROFILE_POWER4, 338 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 339 .cpu_setup = __setup_cpu_power7, 340 .cpu_restore = __restore_cpu_power7, 341 .machine_check_early = __machine_check_early_realmode_p7, 342 .platform = "power7", 343 }, 344 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 345 .pvr_mask = 0xffffffff, 346 .pvr_value = 0x0f000004, 347 .cpu_name = "POWER8 (architected)", 348 .cpu_features = CPU_FTRS_POWER8, 349 .cpu_user_features = COMMON_USER_POWER8, 350 .cpu_user_features2 = COMMON_USER2_POWER8, 351 .mmu_features = MMU_FTRS_POWER8, 352 .icache_bsize = 128, 353 .dcache_bsize = 128, 354 .oprofile_type = PPC_OPROFILE_INVALID, 355 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 356 .cpu_setup = __setup_cpu_power8, 357 .cpu_restore = __restore_cpu_power8, 358 .machine_check_early = __machine_check_early_realmode_p8, 359 .platform = "power8", 360 }, 361 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 362 .pvr_mask = 0xffffffff, 363 .pvr_value = 0x0f000005, 364 .cpu_name = "POWER9 (architected)", 365 .cpu_features = CPU_FTRS_POWER9, 366 .cpu_user_features = COMMON_USER_POWER9, 367 .cpu_user_features2 = COMMON_USER2_POWER9, 368 .mmu_features = MMU_FTRS_POWER9, 369 .icache_bsize = 128, 370 .dcache_bsize = 128, 371 .oprofile_type = PPC_OPROFILE_INVALID, 372 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 373 .cpu_setup = __setup_cpu_power9, 374 .cpu_restore = __restore_cpu_power9, 375 .platform = "power9", 376 }, 377 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */ 378 .pvr_mask = 0xffffffff, 379 .pvr_value = 0x0f000006, 380 .cpu_name = "POWER10 (architected)", 381 .cpu_features = CPU_FTRS_POWER10, 382 .cpu_user_features = COMMON_USER_POWER10, 383 .cpu_user_features2 = COMMON_USER2_POWER10, 384 .mmu_features = MMU_FTRS_POWER10, 385 .icache_bsize = 128, 386 .dcache_bsize = 128, 387 .oprofile_type = PPC_OPROFILE_INVALID, 388 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 389 .cpu_setup = __setup_cpu_power10, 390 .cpu_restore = __restore_cpu_power10, 391 .platform = "power10", 392 }, 393 { /* Power7 */ 394 .pvr_mask = 0xffff0000, 395 .pvr_value = 0x003f0000, 396 .cpu_name = "POWER7 (raw)", 397 .cpu_features = CPU_FTRS_POWER7, 398 .cpu_user_features = COMMON_USER_POWER7, 399 .cpu_user_features2 = COMMON_USER2_POWER7, 400 .mmu_features = MMU_FTRS_POWER7, 401 .icache_bsize = 128, 402 .dcache_bsize = 128, 403 .num_pmcs = 6, 404 .pmc_type = PPC_PMC_IBM, 405 .oprofile_cpu_type = "ppc64/power7", 406 .oprofile_type = PPC_OPROFILE_POWER4, 407 .cpu_setup = __setup_cpu_power7, 408 .cpu_restore = __restore_cpu_power7, 409 .machine_check_early = __machine_check_early_realmode_p7, 410 .platform = "power7", 411 }, 412 { /* Power7+ */ 413 .pvr_mask = 0xffff0000, 414 .pvr_value = 0x004A0000, 415 .cpu_name = "POWER7+ (raw)", 416 .cpu_features = CPU_FTRS_POWER7, 417 .cpu_user_features = COMMON_USER_POWER7, 418 .cpu_user_features2 = COMMON_USER2_POWER7, 419 .mmu_features = MMU_FTRS_POWER7, 420 .icache_bsize = 128, 421 .dcache_bsize = 128, 422 .num_pmcs = 6, 423 .pmc_type = PPC_PMC_IBM, 424 .oprofile_cpu_type = "ppc64/power7", 425 .oprofile_type = PPC_OPROFILE_POWER4, 426 .cpu_setup = __setup_cpu_power7, 427 .cpu_restore = __restore_cpu_power7, 428 .machine_check_early = __machine_check_early_realmode_p7, 429 .platform = "power7+", 430 }, 431 { /* Power8E */ 432 .pvr_mask = 0xffff0000, 433 .pvr_value = 0x004b0000, 434 .cpu_name = "POWER8E (raw)", 435 .cpu_features = CPU_FTRS_POWER8E, 436 .cpu_user_features = COMMON_USER_POWER8, 437 .cpu_user_features2 = COMMON_USER2_POWER8, 438 .mmu_features = MMU_FTRS_POWER8, 439 .icache_bsize = 128, 440 .dcache_bsize = 128, 441 .num_pmcs = 6, 442 .pmc_type = PPC_PMC_IBM, 443 .oprofile_cpu_type = "ppc64/power8", 444 .oprofile_type = PPC_OPROFILE_INVALID, 445 .cpu_setup = __setup_cpu_power8, 446 .cpu_restore = __restore_cpu_power8, 447 .machine_check_early = __machine_check_early_realmode_p8, 448 .platform = "power8", 449 }, 450 { /* Power8NVL */ 451 .pvr_mask = 0xffff0000, 452 .pvr_value = 0x004c0000, 453 .cpu_name = "POWER8NVL (raw)", 454 .cpu_features = CPU_FTRS_POWER8, 455 .cpu_user_features = COMMON_USER_POWER8, 456 .cpu_user_features2 = COMMON_USER2_POWER8, 457 .mmu_features = MMU_FTRS_POWER8, 458 .icache_bsize = 128, 459 .dcache_bsize = 128, 460 .num_pmcs = 6, 461 .pmc_type = PPC_PMC_IBM, 462 .oprofile_cpu_type = "ppc64/power8", 463 .oprofile_type = PPC_OPROFILE_INVALID, 464 .cpu_setup = __setup_cpu_power8, 465 .cpu_restore = __restore_cpu_power8, 466 .machine_check_early = __machine_check_early_realmode_p8, 467 .platform = "power8", 468 }, 469 { /* Power8 */ 470 .pvr_mask = 0xffff0000, 471 .pvr_value = 0x004d0000, 472 .cpu_name = "POWER8 (raw)", 473 .cpu_features = CPU_FTRS_POWER8, 474 .cpu_user_features = COMMON_USER_POWER8, 475 .cpu_user_features2 = COMMON_USER2_POWER8, 476 .mmu_features = MMU_FTRS_POWER8, 477 .icache_bsize = 128, 478 .dcache_bsize = 128, 479 .num_pmcs = 6, 480 .pmc_type = PPC_PMC_IBM, 481 .oprofile_cpu_type = "ppc64/power8", 482 .oprofile_type = PPC_OPROFILE_INVALID, 483 .cpu_setup = __setup_cpu_power8, 484 .cpu_restore = __restore_cpu_power8, 485 .machine_check_early = __machine_check_early_realmode_p8, 486 .platform = "power8", 487 }, 488 { /* Power9 DD2.0 */ 489 .pvr_mask = 0xffffefff, 490 .pvr_value = 0x004e0200, 491 .cpu_name = "POWER9 (raw)", 492 .cpu_features = CPU_FTRS_POWER9_DD2_0, 493 .cpu_user_features = COMMON_USER_POWER9, 494 .cpu_user_features2 = COMMON_USER2_POWER9, 495 .mmu_features = MMU_FTRS_POWER9, 496 .icache_bsize = 128, 497 .dcache_bsize = 128, 498 .num_pmcs = 6, 499 .pmc_type = PPC_PMC_IBM, 500 .oprofile_cpu_type = "ppc64/power9", 501 .oprofile_type = PPC_OPROFILE_INVALID, 502 .cpu_setup = __setup_cpu_power9, 503 .cpu_restore = __restore_cpu_power9, 504 .machine_check_early = __machine_check_early_realmode_p9, 505 .platform = "power9", 506 }, 507 { /* Power9 DD 2.1 */ 508 .pvr_mask = 0xffffefff, 509 .pvr_value = 0x004e0201, 510 .cpu_name = "POWER9 (raw)", 511 .cpu_features = CPU_FTRS_POWER9_DD2_1, 512 .cpu_user_features = COMMON_USER_POWER9, 513 .cpu_user_features2 = COMMON_USER2_POWER9, 514 .mmu_features = MMU_FTRS_POWER9, 515 .icache_bsize = 128, 516 .dcache_bsize = 128, 517 .num_pmcs = 6, 518 .pmc_type = PPC_PMC_IBM, 519 .oprofile_cpu_type = "ppc64/power9", 520 .oprofile_type = PPC_OPROFILE_INVALID, 521 .cpu_setup = __setup_cpu_power9, 522 .cpu_restore = __restore_cpu_power9, 523 .machine_check_early = __machine_check_early_realmode_p9, 524 .platform = "power9", 525 }, 526 { /* Power9 DD2.2 or later */ 527 .pvr_mask = 0xffff0000, 528 .pvr_value = 0x004e0000, 529 .cpu_name = "POWER9 (raw)", 530 .cpu_features = CPU_FTRS_POWER9_DD2_2, 531 .cpu_user_features = COMMON_USER_POWER9, 532 .cpu_user_features2 = COMMON_USER2_POWER9, 533 .mmu_features = MMU_FTRS_POWER9, 534 .icache_bsize = 128, 535 .dcache_bsize = 128, 536 .num_pmcs = 6, 537 .pmc_type = PPC_PMC_IBM, 538 .oprofile_cpu_type = "ppc64/power9", 539 .oprofile_type = PPC_OPROFILE_INVALID, 540 .cpu_setup = __setup_cpu_power9, 541 .cpu_restore = __restore_cpu_power9, 542 .machine_check_early = __machine_check_early_realmode_p9, 543 .platform = "power9", 544 }, 545 { /* Power10 */ 546 .pvr_mask = 0xffff0000, 547 .pvr_value = 0x00800000, 548 .cpu_name = "POWER10 (raw)", 549 .cpu_features = CPU_FTRS_POWER10, 550 .cpu_user_features = COMMON_USER_POWER10, 551 .cpu_user_features2 = COMMON_USER2_POWER10, 552 .mmu_features = MMU_FTRS_POWER10, 553 .icache_bsize = 128, 554 .dcache_bsize = 128, 555 .num_pmcs = 6, 556 .pmc_type = PPC_PMC_IBM, 557 .oprofile_cpu_type = "ppc64/power10", 558 .oprofile_type = PPC_OPROFILE_INVALID, 559 .cpu_setup = __setup_cpu_power10, 560 .cpu_restore = __restore_cpu_power10, 561 .machine_check_early = __machine_check_early_realmode_p10, 562 .platform = "power10", 563 }, 564 { /* Cell Broadband Engine */ 565 .pvr_mask = 0xffff0000, 566 .pvr_value = 0x00700000, 567 .cpu_name = "Cell Broadband Engine", 568 .cpu_features = CPU_FTRS_CELL, 569 .cpu_user_features = COMMON_USER_PPC64 | 570 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 571 PPC_FEATURE_SMT, 572 .mmu_features = MMU_FTRS_CELL, 573 .icache_bsize = 128, 574 .dcache_bsize = 128, 575 .num_pmcs = 4, 576 .pmc_type = PPC_PMC_IBM, 577 .oprofile_cpu_type = "ppc64/cell-be", 578 .oprofile_type = PPC_OPROFILE_CELL, 579 .platform = "ppc-cell-be", 580 }, 581 { /* PA Semi PA6T */ 582 .pvr_mask = 0x7fff0000, 583 .pvr_value = 0x00900000, 584 .cpu_name = "PA6T", 585 .cpu_features = CPU_FTRS_PA6T, 586 .cpu_user_features = COMMON_USER_PA6T, 587 .mmu_features = MMU_FTRS_PA6T, 588 .icache_bsize = 64, 589 .dcache_bsize = 64, 590 .num_pmcs = 6, 591 .pmc_type = PPC_PMC_PA6T, 592 .cpu_setup = __setup_cpu_pa6t, 593 .cpu_restore = __restore_cpu_pa6t, 594 .oprofile_cpu_type = "ppc64/pa6t", 595 .oprofile_type = PPC_OPROFILE_PA6T, 596 .platform = "pa6t", 597 }, 598 { /* default match */ 599 .pvr_mask = 0x00000000, 600 .pvr_value = 0x00000000, 601 .cpu_name = "POWER5 (compatible)", 602 .cpu_features = CPU_FTRS_COMPATIBLE, 603 .cpu_user_features = COMMON_USER_PPC64, 604 .mmu_features = MMU_FTRS_POWER, 605 .icache_bsize = 128, 606 .dcache_bsize = 128, 607 .num_pmcs = 6, 608 .pmc_type = PPC_PMC_IBM, 609 .platform = "power5", 610 } 611 #endif /* CONFIG_PPC_BOOK3S_64 */ 612 613 #ifdef CONFIG_PPC32 614 #ifdef CONFIG_PPC_BOOK3S_32 615 #ifdef CONFIG_PPC_BOOK3S_604 616 { /* 604 */ 617 .pvr_mask = 0xffff0000, 618 .pvr_value = 0x00040000, 619 .cpu_name = "604", 620 .cpu_features = CPU_FTRS_604, 621 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 622 .mmu_features = MMU_FTR_HPTE_TABLE, 623 .icache_bsize = 32, 624 .dcache_bsize = 32, 625 .num_pmcs = 2, 626 .cpu_setup = __setup_cpu_604, 627 .machine_check = machine_check_generic, 628 .platform = "ppc604", 629 }, 630 { /* 604e */ 631 .pvr_mask = 0xfffff000, 632 .pvr_value = 0x00090000, 633 .cpu_name = "604e", 634 .cpu_features = CPU_FTRS_604, 635 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 636 .mmu_features = MMU_FTR_HPTE_TABLE, 637 .icache_bsize = 32, 638 .dcache_bsize = 32, 639 .num_pmcs = 4, 640 .cpu_setup = __setup_cpu_604, 641 .machine_check = machine_check_generic, 642 .platform = "ppc604", 643 }, 644 { /* 604r */ 645 .pvr_mask = 0xffff0000, 646 .pvr_value = 0x00090000, 647 .cpu_name = "604r", 648 .cpu_features = CPU_FTRS_604, 649 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 650 .mmu_features = MMU_FTR_HPTE_TABLE, 651 .icache_bsize = 32, 652 .dcache_bsize = 32, 653 .num_pmcs = 4, 654 .cpu_setup = __setup_cpu_604, 655 .machine_check = machine_check_generic, 656 .platform = "ppc604", 657 }, 658 { /* 604ev */ 659 .pvr_mask = 0xffff0000, 660 .pvr_value = 0x000a0000, 661 .cpu_name = "604ev", 662 .cpu_features = CPU_FTRS_604, 663 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 664 .mmu_features = MMU_FTR_HPTE_TABLE, 665 .icache_bsize = 32, 666 .dcache_bsize = 32, 667 .num_pmcs = 4, 668 .cpu_setup = __setup_cpu_604, 669 .machine_check = machine_check_generic, 670 .platform = "ppc604", 671 }, 672 { /* 740/750 (0x4202, don't support TAU ?) */ 673 .pvr_mask = 0xffffffff, 674 .pvr_value = 0x00084202, 675 .cpu_name = "740/750", 676 .cpu_features = CPU_FTRS_740_NOTAU, 677 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 678 .mmu_features = MMU_FTR_HPTE_TABLE, 679 .icache_bsize = 32, 680 .dcache_bsize = 32, 681 .num_pmcs = 4, 682 .cpu_setup = __setup_cpu_750, 683 .machine_check = machine_check_generic, 684 .platform = "ppc750", 685 }, 686 { /* 750CX (80100 and 8010x?) */ 687 .pvr_mask = 0xfffffff0, 688 .pvr_value = 0x00080100, 689 .cpu_name = "750CX", 690 .cpu_features = CPU_FTRS_750, 691 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 692 .mmu_features = MMU_FTR_HPTE_TABLE, 693 .icache_bsize = 32, 694 .dcache_bsize = 32, 695 .num_pmcs = 4, 696 .cpu_setup = __setup_cpu_750cx, 697 .machine_check = machine_check_generic, 698 .platform = "ppc750", 699 }, 700 { /* 750CX (82201 and 82202) */ 701 .pvr_mask = 0xfffffff0, 702 .pvr_value = 0x00082200, 703 .cpu_name = "750CX", 704 .cpu_features = CPU_FTRS_750, 705 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 706 .mmu_features = MMU_FTR_HPTE_TABLE, 707 .icache_bsize = 32, 708 .dcache_bsize = 32, 709 .num_pmcs = 4, 710 .pmc_type = PPC_PMC_IBM, 711 .cpu_setup = __setup_cpu_750cx, 712 .machine_check = machine_check_generic, 713 .platform = "ppc750", 714 }, 715 { /* 750CXe (82214) */ 716 .pvr_mask = 0xfffffff0, 717 .pvr_value = 0x00082210, 718 .cpu_name = "750CXe", 719 .cpu_features = CPU_FTRS_750, 720 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 721 .mmu_features = MMU_FTR_HPTE_TABLE, 722 .icache_bsize = 32, 723 .dcache_bsize = 32, 724 .num_pmcs = 4, 725 .pmc_type = PPC_PMC_IBM, 726 .cpu_setup = __setup_cpu_750cx, 727 .machine_check = machine_check_generic, 728 .platform = "ppc750", 729 }, 730 { /* 750CXe "Gekko" (83214) */ 731 .pvr_mask = 0xffffffff, 732 .pvr_value = 0x00083214, 733 .cpu_name = "750CXe", 734 .cpu_features = CPU_FTRS_750, 735 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 736 .mmu_features = MMU_FTR_HPTE_TABLE, 737 .icache_bsize = 32, 738 .dcache_bsize = 32, 739 .num_pmcs = 4, 740 .pmc_type = PPC_PMC_IBM, 741 .cpu_setup = __setup_cpu_750cx, 742 .machine_check = machine_check_generic, 743 .platform = "ppc750", 744 }, 745 { /* 750CL (and "Broadway") */ 746 .pvr_mask = 0xfffff0e0, 747 .pvr_value = 0x00087000, 748 .cpu_name = "750CL", 749 .cpu_features = CPU_FTRS_750CL, 750 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 751 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 752 .icache_bsize = 32, 753 .dcache_bsize = 32, 754 .num_pmcs = 4, 755 .pmc_type = PPC_PMC_IBM, 756 .cpu_setup = __setup_cpu_750, 757 .machine_check = machine_check_generic, 758 .platform = "ppc750", 759 .oprofile_cpu_type = "ppc/750", 760 .oprofile_type = PPC_OPROFILE_G4, 761 }, 762 { /* 745/755 */ 763 .pvr_mask = 0xfffff000, 764 .pvr_value = 0x00083000, 765 .cpu_name = "745/755", 766 .cpu_features = CPU_FTRS_750, 767 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 768 .mmu_features = MMU_FTR_HPTE_TABLE, 769 .icache_bsize = 32, 770 .dcache_bsize = 32, 771 .num_pmcs = 4, 772 .pmc_type = PPC_PMC_IBM, 773 .cpu_setup = __setup_cpu_750, 774 .machine_check = machine_check_generic, 775 .platform = "ppc750", 776 }, 777 { /* 750FX rev 1.x */ 778 .pvr_mask = 0xffffff00, 779 .pvr_value = 0x70000100, 780 .cpu_name = "750FX", 781 .cpu_features = CPU_FTRS_750FX1, 782 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 783 .mmu_features = MMU_FTR_HPTE_TABLE, 784 .icache_bsize = 32, 785 .dcache_bsize = 32, 786 .num_pmcs = 4, 787 .pmc_type = PPC_PMC_IBM, 788 .cpu_setup = __setup_cpu_750, 789 .machine_check = machine_check_generic, 790 .platform = "ppc750", 791 .oprofile_cpu_type = "ppc/750", 792 .oprofile_type = PPC_OPROFILE_G4, 793 }, 794 { /* 750FX rev 2.0 must disable HID0[DPM] */ 795 .pvr_mask = 0xffffffff, 796 .pvr_value = 0x70000200, 797 .cpu_name = "750FX", 798 .cpu_features = CPU_FTRS_750FX2, 799 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 800 .mmu_features = MMU_FTR_HPTE_TABLE, 801 .icache_bsize = 32, 802 .dcache_bsize = 32, 803 .num_pmcs = 4, 804 .pmc_type = PPC_PMC_IBM, 805 .cpu_setup = __setup_cpu_750, 806 .machine_check = machine_check_generic, 807 .platform = "ppc750", 808 .oprofile_cpu_type = "ppc/750", 809 .oprofile_type = PPC_OPROFILE_G4, 810 }, 811 { /* 750FX (All revs except 2.0) */ 812 .pvr_mask = 0xffff0000, 813 .pvr_value = 0x70000000, 814 .cpu_name = "750FX", 815 .cpu_features = CPU_FTRS_750FX, 816 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 817 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 818 .icache_bsize = 32, 819 .dcache_bsize = 32, 820 .num_pmcs = 4, 821 .pmc_type = PPC_PMC_IBM, 822 .cpu_setup = __setup_cpu_750fx, 823 .machine_check = machine_check_generic, 824 .platform = "ppc750", 825 .oprofile_cpu_type = "ppc/750", 826 .oprofile_type = PPC_OPROFILE_G4, 827 }, 828 { /* 750GX */ 829 .pvr_mask = 0xffff0000, 830 .pvr_value = 0x70020000, 831 .cpu_name = "750GX", 832 .cpu_features = CPU_FTRS_750GX, 833 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 834 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 835 .icache_bsize = 32, 836 .dcache_bsize = 32, 837 .num_pmcs = 4, 838 .pmc_type = PPC_PMC_IBM, 839 .cpu_setup = __setup_cpu_750fx, 840 .machine_check = machine_check_generic, 841 .platform = "ppc750", 842 .oprofile_cpu_type = "ppc/750", 843 .oprofile_type = PPC_OPROFILE_G4, 844 }, 845 { /* 740/750 (L2CR bit need fixup for 740) */ 846 .pvr_mask = 0xffff0000, 847 .pvr_value = 0x00080000, 848 .cpu_name = "740/750", 849 .cpu_features = CPU_FTRS_740, 850 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 851 .mmu_features = MMU_FTR_HPTE_TABLE, 852 .icache_bsize = 32, 853 .dcache_bsize = 32, 854 .num_pmcs = 4, 855 .pmc_type = PPC_PMC_IBM, 856 .cpu_setup = __setup_cpu_750, 857 .machine_check = machine_check_generic, 858 .platform = "ppc750", 859 }, 860 { /* 7400 rev 1.1 ? (no TAU) */ 861 .pvr_mask = 0xffffffff, 862 .pvr_value = 0x000c1101, 863 .cpu_name = "7400 (1.1)", 864 .cpu_features = CPU_FTRS_7400_NOTAU, 865 .cpu_user_features = COMMON_USER | 866 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 867 .mmu_features = MMU_FTR_HPTE_TABLE, 868 .icache_bsize = 32, 869 .dcache_bsize = 32, 870 .num_pmcs = 4, 871 .pmc_type = PPC_PMC_G4, 872 .cpu_setup = __setup_cpu_7400, 873 .machine_check = machine_check_generic, 874 .platform = "ppc7400", 875 }, 876 { /* 7400 */ 877 .pvr_mask = 0xffff0000, 878 .pvr_value = 0x000c0000, 879 .cpu_name = "7400", 880 .cpu_features = CPU_FTRS_7400, 881 .cpu_user_features = COMMON_USER | 882 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 883 .mmu_features = MMU_FTR_HPTE_TABLE, 884 .icache_bsize = 32, 885 .dcache_bsize = 32, 886 .num_pmcs = 4, 887 .pmc_type = PPC_PMC_G4, 888 .cpu_setup = __setup_cpu_7400, 889 .machine_check = machine_check_generic, 890 .platform = "ppc7400", 891 }, 892 { /* 7410 */ 893 .pvr_mask = 0xffff0000, 894 .pvr_value = 0x800c0000, 895 .cpu_name = "7410", 896 .cpu_features = CPU_FTRS_7400, 897 .cpu_user_features = COMMON_USER | 898 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 899 .mmu_features = MMU_FTR_HPTE_TABLE, 900 .icache_bsize = 32, 901 .dcache_bsize = 32, 902 .num_pmcs = 4, 903 .pmc_type = PPC_PMC_G4, 904 .cpu_setup = __setup_cpu_7410, 905 .machine_check = machine_check_generic, 906 .platform = "ppc7400", 907 }, 908 { /* 7450 2.0 - no doze/nap */ 909 .pvr_mask = 0xffffffff, 910 .pvr_value = 0x80000200, 911 .cpu_name = "7450", 912 .cpu_features = CPU_FTRS_7450_20, 913 .cpu_user_features = COMMON_USER | 914 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 915 .mmu_features = MMU_FTR_HPTE_TABLE, 916 .icache_bsize = 32, 917 .dcache_bsize = 32, 918 .num_pmcs = 6, 919 .pmc_type = PPC_PMC_G4, 920 .cpu_setup = __setup_cpu_745x, 921 .oprofile_cpu_type = "ppc/7450", 922 .oprofile_type = PPC_OPROFILE_G4, 923 .machine_check = machine_check_generic, 924 .platform = "ppc7450", 925 }, 926 { /* 7450 2.1 */ 927 .pvr_mask = 0xffffffff, 928 .pvr_value = 0x80000201, 929 .cpu_name = "7450", 930 .cpu_features = CPU_FTRS_7450_21, 931 .cpu_user_features = COMMON_USER | 932 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 933 .mmu_features = MMU_FTR_HPTE_TABLE, 934 .icache_bsize = 32, 935 .dcache_bsize = 32, 936 .num_pmcs = 6, 937 .pmc_type = PPC_PMC_G4, 938 .cpu_setup = __setup_cpu_745x, 939 .oprofile_cpu_type = "ppc/7450", 940 .oprofile_type = PPC_OPROFILE_G4, 941 .machine_check = machine_check_generic, 942 .platform = "ppc7450", 943 }, 944 { /* 7450 2.3 and newer */ 945 .pvr_mask = 0xffff0000, 946 .pvr_value = 0x80000000, 947 .cpu_name = "7450", 948 .cpu_features = CPU_FTRS_7450_23, 949 .cpu_user_features = COMMON_USER | 950 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 951 .mmu_features = MMU_FTR_HPTE_TABLE, 952 .icache_bsize = 32, 953 .dcache_bsize = 32, 954 .num_pmcs = 6, 955 .pmc_type = PPC_PMC_G4, 956 .cpu_setup = __setup_cpu_745x, 957 .oprofile_cpu_type = "ppc/7450", 958 .oprofile_type = PPC_OPROFILE_G4, 959 .machine_check = machine_check_generic, 960 .platform = "ppc7450", 961 }, 962 { /* 7455 rev 1.x */ 963 .pvr_mask = 0xffffff00, 964 .pvr_value = 0x80010100, 965 .cpu_name = "7455", 966 .cpu_features = CPU_FTRS_7455_1, 967 .cpu_user_features = COMMON_USER | 968 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 969 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 970 .icache_bsize = 32, 971 .dcache_bsize = 32, 972 .num_pmcs = 6, 973 .pmc_type = PPC_PMC_G4, 974 .cpu_setup = __setup_cpu_745x, 975 .oprofile_cpu_type = "ppc/7450", 976 .oprofile_type = PPC_OPROFILE_G4, 977 .machine_check = machine_check_generic, 978 .platform = "ppc7450", 979 }, 980 { /* 7455 rev 2.0 */ 981 .pvr_mask = 0xffffffff, 982 .pvr_value = 0x80010200, 983 .cpu_name = "7455", 984 .cpu_features = CPU_FTRS_7455_20, 985 .cpu_user_features = COMMON_USER | 986 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 987 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 988 .icache_bsize = 32, 989 .dcache_bsize = 32, 990 .num_pmcs = 6, 991 .pmc_type = PPC_PMC_G4, 992 .cpu_setup = __setup_cpu_745x, 993 .oprofile_cpu_type = "ppc/7450", 994 .oprofile_type = PPC_OPROFILE_G4, 995 .machine_check = machine_check_generic, 996 .platform = "ppc7450", 997 }, 998 { /* 7455 others */ 999 .pvr_mask = 0xffff0000, 1000 .pvr_value = 0x80010000, 1001 .cpu_name = "7455", 1002 .cpu_features = CPU_FTRS_7455, 1003 .cpu_user_features = COMMON_USER | 1004 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1005 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1006 .icache_bsize = 32, 1007 .dcache_bsize = 32, 1008 .num_pmcs = 6, 1009 .pmc_type = PPC_PMC_G4, 1010 .cpu_setup = __setup_cpu_745x, 1011 .oprofile_cpu_type = "ppc/7450", 1012 .oprofile_type = PPC_OPROFILE_G4, 1013 .machine_check = machine_check_generic, 1014 .platform = "ppc7450", 1015 }, 1016 { /* 7447/7457 Rev 1.0 */ 1017 .pvr_mask = 0xffffffff, 1018 .pvr_value = 0x80020100, 1019 .cpu_name = "7447/7457", 1020 .cpu_features = CPU_FTRS_7447_10, 1021 .cpu_user_features = COMMON_USER | 1022 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1023 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1024 .icache_bsize = 32, 1025 .dcache_bsize = 32, 1026 .num_pmcs = 6, 1027 .pmc_type = PPC_PMC_G4, 1028 .cpu_setup = __setup_cpu_745x, 1029 .oprofile_cpu_type = "ppc/7450", 1030 .oprofile_type = PPC_OPROFILE_G4, 1031 .machine_check = machine_check_generic, 1032 .platform = "ppc7450", 1033 }, 1034 { /* 7447/7457 Rev 1.1 */ 1035 .pvr_mask = 0xffffffff, 1036 .pvr_value = 0x80020101, 1037 .cpu_name = "7447/7457", 1038 .cpu_features = CPU_FTRS_7447_10, 1039 .cpu_user_features = COMMON_USER | 1040 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1041 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1042 .icache_bsize = 32, 1043 .dcache_bsize = 32, 1044 .num_pmcs = 6, 1045 .pmc_type = PPC_PMC_G4, 1046 .cpu_setup = __setup_cpu_745x, 1047 .oprofile_cpu_type = "ppc/7450", 1048 .oprofile_type = PPC_OPROFILE_G4, 1049 .machine_check = machine_check_generic, 1050 .platform = "ppc7450", 1051 }, 1052 { /* 7447/7457 Rev 1.2 and later */ 1053 .pvr_mask = 0xffff0000, 1054 .pvr_value = 0x80020000, 1055 .cpu_name = "7447/7457", 1056 .cpu_features = CPU_FTRS_7447, 1057 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1058 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1059 .icache_bsize = 32, 1060 .dcache_bsize = 32, 1061 .num_pmcs = 6, 1062 .pmc_type = PPC_PMC_G4, 1063 .cpu_setup = __setup_cpu_745x, 1064 .oprofile_cpu_type = "ppc/7450", 1065 .oprofile_type = PPC_OPROFILE_G4, 1066 .machine_check = machine_check_generic, 1067 .platform = "ppc7450", 1068 }, 1069 { /* 7447A */ 1070 .pvr_mask = 0xffff0000, 1071 .pvr_value = 0x80030000, 1072 .cpu_name = "7447A", 1073 .cpu_features = CPU_FTRS_7447A, 1074 .cpu_user_features = COMMON_USER | 1075 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1076 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1077 .icache_bsize = 32, 1078 .dcache_bsize = 32, 1079 .num_pmcs = 6, 1080 .pmc_type = PPC_PMC_G4, 1081 .cpu_setup = __setup_cpu_745x, 1082 .oprofile_cpu_type = "ppc/7450", 1083 .oprofile_type = PPC_OPROFILE_G4, 1084 .machine_check = machine_check_generic, 1085 .platform = "ppc7450", 1086 }, 1087 { /* 7448 */ 1088 .pvr_mask = 0xffff0000, 1089 .pvr_value = 0x80040000, 1090 .cpu_name = "7448", 1091 .cpu_features = CPU_FTRS_7448, 1092 .cpu_user_features = COMMON_USER | 1093 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1094 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1095 .icache_bsize = 32, 1096 .dcache_bsize = 32, 1097 .num_pmcs = 6, 1098 .pmc_type = PPC_PMC_G4, 1099 .cpu_setup = __setup_cpu_745x, 1100 .oprofile_cpu_type = "ppc/7450", 1101 .oprofile_type = PPC_OPROFILE_G4, 1102 .machine_check = machine_check_generic, 1103 .platform = "ppc7450", 1104 }, 1105 #endif /* CONFIG_PPC_BOOK3S_604 */ 1106 #ifdef CONFIG_PPC_BOOK3S_603 1107 { /* 603 */ 1108 .pvr_mask = 0xffff0000, 1109 .pvr_value = 0x00030000, 1110 .cpu_name = "603", 1111 .cpu_features = CPU_FTRS_603, 1112 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 1113 .mmu_features = 0, 1114 .icache_bsize = 32, 1115 .dcache_bsize = 32, 1116 .cpu_setup = __setup_cpu_603, 1117 .machine_check = machine_check_generic, 1118 .platform = "ppc603", 1119 }, 1120 { /* 603e */ 1121 .pvr_mask = 0xffff0000, 1122 .pvr_value = 0x00060000, 1123 .cpu_name = "603e", 1124 .cpu_features = CPU_FTRS_603, 1125 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 1126 .mmu_features = 0, 1127 .icache_bsize = 32, 1128 .dcache_bsize = 32, 1129 .cpu_setup = __setup_cpu_603, 1130 .machine_check = machine_check_generic, 1131 .platform = "ppc603", 1132 }, 1133 { /* 603ev */ 1134 .pvr_mask = 0xffff0000, 1135 .pvr_value = 0x00070000, 1136 .cpu_name = "603ev", 1137 .cpu_features = CPU_FTRS_603, 1138 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 1139 .mmu_features = 0, 1140 .icache_bsize = 32, 1141 .dcache_bsize = 32, 1142 .cpu_setup = __setup_cpu_603, 1143 .machine_check = machine_check_generic, 1144 .platform = "ppc603", 1145 }, 1146 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1147 .pvr_mask = 0x7fff0000, 1148 .pvr_value = 0x00810000, 1149 .cpu_name = "82xx", 1150 .cpu_features = CPU_FTRS_82XX, 1151 .cpu_user_features = COMMON_USER, 1152 .mmu_features = 0, 1153 .icache_bsize = 32, 1154 .dcache_bsize = 32, 1155 .cpu_setup = __setup_cpu_603, 1156 .machine_check = machine_check_generic, 1157 .platform = "ppc603", 1158 }, 1159 { /* All G2_LE (603e core, plus some) have the same pvr */ 1160 .pvr_mask = 0x7fff0000, 1161 .pvr_value = 0x00820000, 1162 .cpu_name = "G2_LE", 1163 .cpu_features = CPU_FTRS_G2_LE, 1164 .cpu_user_features = COMMON_USER, 1165 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1166 .icache_bsize = 32, 1167 .dcache_bsize = 32, 1168 .cpu_setup = __setup_cpu_603, 1169 .machine_check = machine_check_generic, 1170 .platform = "ppc603", 1171 }, 1172 #ifdef CONFIG_PPC_83xx 1173 { /* e300c1 (a 603e core, plus some) on 83xx */ 1174 .pvr_mask = 0x7fff0000, 1175 .pvr_value = 0x00830000, 1176 .cpu_name = "e300c1", 1177 .cpu_features = CPU_FTRS_E300, 1178 .cpu_user_features = COMMON_USER, 1179 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1180 .icache_bsize = 32, 1181 .dcache_bsize = 32, 1182 .cpu_setup = __setup_cpu_603, 1183 .machine_check = machine_check_83xx, 1184 .platform = "ppc603", 1185 }, 1186 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1187 .pvr_mask = 0x7fff0000, 1188 .pvr_value = 0x00840000, 1189 .cpu_name = "e300c2", 1190 .cpu_features = CPU_FTRS_E300C2, 1191 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1192 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1193 MMU_FTR_NEED_DTLB_SW_LRU, 1194 .icache_bsize = 32, 1195 .dcache_bsize = 32, 1196 .cpu_setup = __setup_cpu_603, 1197 .machine_check = machine_check_83xx, 1198 .platform = "ppc603", 1199 }, 1200 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1201 .pvr_mask = 0x7fff0000, 1202 .pvr_value = 0x00850000, 1203 .cpu_name = "e300c3", 1204 .cpu_features = CPU_FTRS_E300, 1205 .cpu_user_features = COMMON_USER, 1206 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1207 MMU_FTR_NEED_DTLB_SW_LRU, 1208 .icache_bsize = 32, 1209 .dcache_bsize = 32, 1210 .cpu_setup = __setup_cpu_603, 1211 .machine_check = machine_check_83xx, 1212 .num_pmcs = 4, 1213 .oprofile_cpu_type = "ppc/e300", 1214 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1215 .platform = "ppc603", 1216 }, 1217 { /* e300c4 (e300c1, plus one IU) */ 1218 .pvr_mask = 0x7fff0000, 1219 .pvr_value = 0x00860000, 1220 .cpu_name = "e300c4", 1221 .cpu_features = CPU_FTRS_E300, 1222 .cpu_user_features = COMMON_USER, 1223 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1224 MMU_FTR_NEED_DTLB_SW_LRU, 1225 .icache_bsize = 32, 1226 .dcache_bsize = 32, 1227 .cpu_setup = __setup_cpu_603, 1228 .machine_check = machine_check_83xx, 1229 .num_pmcs = 4, 1230 .oprofile_cpu_type = "ppc/e300", 1231 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1232 .platform = "ppc603", 1233 }, 1234 #endif 1235 #endif /* CONFIG_PPC_BOOK3S_603 */ 1236 #ifdef CONFIG_PPC_BOOK3S_604 1237 { /* default match, we assume split I/D cache & TB (non-601)... */ 1238 .pvr_mask = 0x00000000, 1239 .pvr_value = 0x00000000, 1240 .cpu_name = "(generic PPC)", 1241 .cpu_features = CPU_FTRS_CLASSIC32, 1242 .cpu_user_features = COMMON_USER, 1243 .mmu_features = MMU_FTR_HPTE_TABLE, 1244 .icache_bsize = 32, 1245 .dcache_bsize = 32, 1246 .machine_check = machine_check_generic, 1247 .platform = "ppc603", 1248 }, 1249 #endif /* CONFIG_PPC_BOOK3S_604 */ 1250 #endif /* CONFIG_PPC_BOOK3S_32 */ 1251 #ifdef CONFIG_PPC_8xx 1252 { /* 8xx */ 1253 .pvr_mask = 0xffff0000, 1254 .pvr_value = PVR_8xx, 1255 .cpu_name = "8xx", 1256 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1257 * if the 8xx code is there.... */ 1258 .cpu_features = CPU_FTRS_8XX, 1259 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1260 .mmu_features = MMU_FTR_TYPE_8xx, 1261 .icache_bsize = 16, 1262 .dcache_bsize = 16, 1263 .machine_check = machine_check_8xx, 1264 .platform = "ppc823", 1265 }, 1266 #endif /* CONFIG_PPC_8xx */ 1267 #ifdef CONFIG_40x 1268 { /* STB 04xxx */ 1269 .pvr_mask = 0xffff0000, 1270 .pvr_value = 0x41810000, 1271 .cpu_name = "STB04xxx", 1272 .cpu_features = CPU_FTRS_40X, 1273 .cpu_user_features = PPC_FEATURE_32 | 1274 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1275 .mmu_features = MMU_FTR_TYPE_40x, 1276 .icache_bsize = 32, 1277 .dcache_bsize = 32, 1278 .machine_check = machine_check_4xx, 1279 .platform = "ppc405", 1280 }, 1281 { /* NP405L */ 1282 .pvr_mask = 0xffff0000, 1283 .pvr_value = 0x41610000, 1284 .cpu_name = "NP405L", 1285 .cpu_features = CPU_FTRS_40X, 1286 .cpu_user_features = PPC_FEATURE_32 | 1287 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1288 .mmu_features = MMU_FTR_TYPE_40x, 1289 .icache_bsize = 32, 1290 .dcache_bsize = 32, 1291 .machine_check = machine_check_4xx, 1292 .platform = "ppc405", 1293 }, 1294 { /* NP4GS3 */ 1295 .pvr_mask = 0xffff0000, 1296 .pvr_value = 0x40B10000, 1297 .cpu_name = "NP4GS3", 1298 .cpu_features = CPU_FTRS_40X, 1299 .cpu_user_features = PPC_FEATURE_32 | 1300 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1301 .mmu_features = MMU_FTR_TYPE_40x, 1302 .icache_bsize = 32, 1303 .dcache_bsize = 32, 1304 .machine_check = machine_check_4xx, 1305 .platform = "ppc405", 1306 }, 1307 { /* NP405H */ 1308 .pvr_mask = 0xffff0000, 1309 .pvr_value = 0x41410000, 1310 .cpu_name = "NP405H", 1311 .cpu_features = CPU_FTRS_40X, 1312 .cpu_user_features = PPC_FEATURE_32 | 1313 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1314 .mmu_features = MMU_FTR_TYPE_40x, 1315 .icache_bsize = 32, 1316 .dcache_bsize = 32, 1317 .machine_check = machine_check_4xx, 1318 .platform = "ppc405", 1319 }, 1320 { /* 405GPr */ 1321 .pvr_mask = 0xffff0000, 1322 .pvr_value = 0x50910000, 1323 .cpu_name = "405GPr", 1324 .cpu_features = CPU_FTRS_40X, 1325 .cpu_user_features = PPC_FEATURE_32 | 1326 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1327 .mmu_features = MMU_FTR_TYPE_40x, 1328 .icache_bsize = 32, 1329 .dcache_bsize = 32, 1330 .machine_check = machine_check_4xx, 1331 .platform = "ppc405", 1332 }, 1333 { /* STBx25xx */ 1334 .pvr_mask = 0xffff0000, 1335 .pvr_value = 0x51510000, 1336 .cpu_name = "STBx25xx", 1337 .cpu_features = CPU_FTRS_40X, 1338 .cpu_user_features = PPC_FEATURE_32 | 1339 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1340 .mmu_features = MMU_FTR_TYPE_40x, 1341 .icache_bsize = 32, 1342 .dcache_bsize = 32, 1343 .machine_check = machine_check_4xx, 1344 .platform = "ppc405", 1345 }, 1346 { /* 405LP */ 1347 .pvr_mask = 0xffff0000, 1348 .pvr_value = 0x41F10000, 1349 .cpu_name = "405LP", 1350 .cpu_features = CPU_FTRS_40X, 1351 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1352 .mmu_features = MMU_FTR_TYPE_40x, 1353 .icache_bsize = 32, 1354 .dcache_bsize = 32, 1355 .machine_check = machine_check_4xx, 1356 .platform = "ppc405", 1357 }, 1358 { /* 405EP */ 1359 .pvr_mask = 0xffff0000, 1360 .pvr_value = 0x51210000, 1361 .cpu_name = "405EP", 1362 .cpu_features = CPU_FTRS_40X, 1363 .cpu_user_features = PPC_FEATURE_32 | 1364 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1365 .mmu_features = MMU_FTR_TYPE_40x, 1366 .icache_bsize = 32, 1367 .dcache_bsize = 32, 1368 .machine_check = machine_check_4xx, 1369 .platform = "ppc405", 1370 }, 1371 { /* 405EX Rev. A/B with Security */ 1372 .pvr_mask = 0xffff000f, 1373 .pvr_value = 0x12910007, 1374 .cpu_name = "405EX Rev. A/B", 1375 .cpu_features = CPU_FTRS_40X, 1376 .cpu_user_features = PPC_FEATURE_32 | 1377 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1378 .mmu_features = MMU_FTR_TYPE_40x, 1379 .icache_bsize = 32, 1380 .dcache_bsize = 32, 1381 .machine_check = machine_check_4xx, 1382 .platform = "ppc405", 1383 }, 1384 { /* 405EX Rev. C without Security */ 1385 .pvr_mask = 0xffff000f, 1386 .pvr_value = 0x1291000d, 1387 .cpu_name = "405EX Rev. C", 1388 .cpu_features = CPU_FTRS_40X, 1389 .cpu_user_features = PPC_FEATURE_32 | 1390 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1391 .mmu_features = MMU_FTR_TYPE_40x, 1392 .icache_bsize = 32, 1393 .dcache_bsize = 32, 1394 .machine_check = machine_check_4xx, 1395 .platform = "ppc405", 1396 }, 1397 { /* 405EX Rev. C with Security */ 1398 .pvr_mask = 0xffff000f, 1399 .pvr_value = 0x1291000f, 1400 .cpu_name = "405EX Rev. C", 1401 .cpu_features = CPU_FTRS_40X, 1402 .cpu_user_features = PPC_FEATURE_32 | 1403 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1404 .mmu_features = MMU_FTR_TYPE_40x, 1405 .icache_bsize = 32, 1406 .dcache_bsize = 32, 1407 .machine_check = machine_check_4xx, 1408 .platform = "ppc405", 1409 }, 1410 { /* 405EX Rev. D without Security */ 1411 .pvr_mask = 0xffff000f, 1412 .pvr_value = 0x12910003, 1413 .cpu_name = "405EX Rev. D", 1414 .cpu_features = CPU_FTRS_40X, 1415 .cpu_user_features = PPC_FEATURE_32 | 1416 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1417 .mmu_features = MMU_FTR_TYPE_40x, 1418 .icache_bsize = 32, 1419 .dcache_bsize = 32, 1420 .machine_check = machine_check_4xx, 1421 .platform = "ppc405", 1422 }, 1423 { /* 405EX Rev. D with Security */ 1424 .pvr_mask = 0xffff000f, 1425 .pvr_value = 0x12910005, 1426 .cpu_name = "405EX Rev. D", 1427 .cpu_features = CPU_FTRS_40X, 1428 .cpu_user_features = PPC_FEATURE_32 | 1429 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1430 .mmu_features = MMU_FTR_TYPE_40x, 1431 .icache_bsize = 32, 1432 .dcache_bsize = 32, 1433 .machine_check = machine_check_4xx, 1434 .platform = "ppc405", 1435 }, 1436 { /* 405EXr Rev. A/B without Security */ 1437 .pvr_mask = 0xffff000f, 1438 .pvr_value = 0x12910001, 1439 .cpu_name = "405EXr Rev. A/B", 1440 .cpu_features = CPU_FTRS_40X, 1441 .cpu_user_features = PPC_FEATURE_32 | 1442 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1443 .mmu_features = MMU_FTR_TYPE_40x, 1444 .icache_bsize = 32, 1445 .dcache_bsize = 32, 1446 .machine_check = machine_check_4xx, 1447 .platform = "ppc405", 1448 }, 1449 { /* 405EXr Rev. C without Security */ 1450 .pvr_mask = 0xffff000f, 1451 .pvr_value = 0x12910009, 1452 .cpu_name = "405EXr Rev. C", 1453 .cpu_features = CPU_FTRS_40X, 1454 .cpu_user_features = PPC_FEATURE_32 | 1455 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1456 .mmu_features = MMU_FTR_TYPE_40x, 1457 .icache_bsize = 32, 1458 .dcache_bsize = 32, 1459 .machine_check = machine_check_4xx, 1460 .platform = "ppc405", 1461 }, 1462 { /* 405EXr Rev. C with Security */ 1463 .pvr_mask = 0xffff000f, 1464 .pvr_value = 0x1291000b, 1465 .cpu_name = "405EXr Rev. C", 1466 .cpu_features = CPU_FTRS_40X, 1467 .cpu_user_features = PPC_FEATURE_32 | 1468 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1469 .mmu_features = MMU_FTR_TYPE_40x, 1470 .icache_bsize = 32, 1471 .dcache_bsize = 32, 1472 .machine_check = machine_check_4xx, 1473 .platform = "ppc405", 1474 }, 1475 { /* 405EXr Rev. D without Security */ 1476 .pvr_mask = 0xffff000f, 1477 .pvr_value = 0x12910000, 1478 .cpu_name = "405EXr Rev. D", 1479 .cpu_features = CPU_FTRS_40X, 1480 .cpu_user_features = PPC_FEATURE_32 | 1481 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1482 .mmu_features = MMU_FTR_TYPE_40x, 1483 .icache_bsize = 32, 1484 .dcache_bsize = 32, 1485 .machine_check = machine_check_4xx, 1486 .platform = "ppc405", 1487 }, 1488 { /* 405EXr Rev. D with Security */ 1489 .pvr_mask = 0xffff000f, 1490 .pvr_value = 0x12910002, 1491 .cpu_name = "405EXr Rev. D", 1492 .cpu_features = CPU_FTRS_40X, 1493 .cpu_user_features = PPC_FEATURE_32 | 1494 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1495 .mmu_features = MMU_FTR_TYPE_40x, 1496 .icache_bsize = 32, 1497 .dcache_bsize = 32, 1498 .machine_check = machine_check_4xx, 1499 .platform = "ppc405", 1500 }, 1501 { 1502 /* 405EZ */ 1503 .pvr_mask = 0xffff0000, 1504 .pvr_value = 0x41510000, 1505 .cpu_name = "405EZ", 1506 .cpu_features = CPU_FTRS_40X, 1507 .cpu_user_features = PPC_FEATURE_32 | 1508 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1509 .mmu_features = MMU_FTR_TYPE_40x, 1510 .icache_bsize = 32, 1511 .dcache_bsize = 32, 1512 .machine_check = machine_check_4xx, 1513 .platform = "ppc405", 1514 }, 1515 { /* APM8018X */ 1516 .pvr_mask = 0xffff0000, 1517 .pvr_value = 0x7ff11432, 1518 .cpu_name = "APM8018X", 1519 .cpu_features = CPU_FTRS_40X, 1520 .cpu_user_features = PPC_FEATURE_32 | 1521 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1522 .mmu_features = MMU_FTR_TYPE_40x, 1523 .icache_bsize = 32, 1524 .dcache_bsize = 32, 1525 .machine_check = machine_check_4xx, 1526 .platform = "ppc405", 1527 }, 1528 { /* default match */ 1529 .pvr_mask = 0x00000000, 1530 .pvr_value = 0x00000000, 1531 .cpu_name = "(generic 40x PPC)", 1532 .cpu_features = CPU_FTRS_40X, 1533 .cpu_user_features = PPC_FEATURE_32 | 1534 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1535 .mmu_features = MMU_FTR_TYPE_40x, 1536 .icache_bsize = 32, 1537 .dcache_bsize = 32, 1538 .machine_check = machine_check_4xx, 1539 .platform = "ppc405", 1540 } 1541 1542 #endif /* CONFIG_40x */ 1543 #ifdef CONFIG_44x 1544 #ifndef CONFIG_PPC_47x 1545 { 1546 .pvr_mask = 0xf0000fff, 1547 .pvr_value = 0x40000850, 1548 .cpu_name = "440GR Rev. A", 1549 .cpu_features = CPU_FTRS_44X, 1550 .cpu_user_features = COMMON_USER_BOOKE, 1551 .mmu_features = MMU_FTR_TYPE_44x, 1552 .icache_bsize = 32, 1553 .dcache_bsize = 32, 1554 .machine_check = machine_check_4xx, 1555 .platform = "ppc440", 1556 }, 1557 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1558 .pvr_mask = 0xf0000fff, 1559 .pvr_value = 0x40000858, 1560 .cpu_name = "440EP Rev. A", 1561 .cpu_features = CPU_FTRS_44X, 1562 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1563 .mmu_features = MMU_FTR_TYPE_44x, 1564 .icache_bsize = 32, 1565 .dcache_bsize = 32, 1566 .cpu_setup = __setup_cpu_440ep, 1567 .machine_check = machine_check_4xx, 1568 .platform = "ppc440", 1569 }, 1570 { 1571 .pvr_mask = 0xf0000fff, 1572 .pvr_value = 0x400008d3, 1573 .cpu_name = "440GR Rev. B", 1574 .cpu_features = CPU_FTRS_44X, 1575 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1576 .mmu_features = MMU_FTR_TYPE_44x, 1577 .icache_bsize = 32, 1578 .dcache_bsize = 32, 1579 .machine_check = machine_check_4xx, 1580 .platform = "ppc440", 1581 }, 1582 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1583 .pvr_mask = 0xf0000ff7, 1584 .pvr_value = 0x400008d4, 1585 .cpu_name = "440EP Rev. C", 1586 .cpu_features = CPU_FTRS_44X, 1587 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1588 .mmu_features = MMU_FTR_TYPE_44x, 1589 .icache_bsize = 32, 1590 .dcache_bsize = 32, 1591 .cpu_setup = __setup_cpu_440ep, 1592 .machine_check = machine_check_4xx, 1593 .platform = "ppc440", 1594 }, 1595 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1596 .pvr_mask = 0xf0000fff, 1597 .pvr_value = 0x400008db, 1598 .cpu_name = "440EP Rev. B", 1599 .cpu_features = CPU_FTRS_44X, 1600 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1601 .mmu_features = MMU_FTR_TYPE_44x, 1602 .icache_bsize = 32, 1603 .dcache_bsize = 32, 1604 .cpu_setup = __setup_cpu_440ep, 1605 .machine_check = machine_check_4xx, 1606 .platform = "ppc440", 1607 }, 1608 { /* 440GRX */ 1609 .pvr_mask = 0xf0000ffb, 1610 .pvr_value = 0x200008D0, 1611 .cpu_name = "440GRX", 1612 .cpu_features = CPU_FTRS_44X, 1613 .cpu_user_features = COMMON_USER_BOOKE, 1614 .mmu_features = MMU_FTR_TYPE_44x, 1615 .icache_bsize = 32, 1616 .dcache_bsize = 32, 1617 .cpu_setup = __setup_cpu_440grx, 1618 .machine_check = machine_check_440A, 1619 .platform = "ppc440", 1620 }, 1621 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1622 .pvr_mask = 0xf0000ffb, 1623 .pvr_value = 0x200008D8, 1624 .cpu_name = "440EPX", 1625 .cpu_features = CPU_FTRS_44X, 1626 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1627 .mmu_features = MMU_FTR_TYPE_44x, 1628 .icache_bsize = 32, 1629 .dcache_bsize = 32, 1630 .cpu_setup = __setup_cpu_440epx, 1631 .machine_check = machine_check_440A, 1632 .platform = "ppc440", 1633 }, 1634 { /* 440GP Rev. B */ 1635 .pvr_mask = 0xf0000fff, 1636 .pvr_value = 0x40000440, 1637 .cpu_name = "440GP Rev. B", 1638 .cpu_features = CPU_FTRS_44X, 1639 .cpu_user_features = COMMON_USER_BOOKE, 1640 .mmu_features = MMU_FTR_TYPE_44x, 1641 .icache_bsize = 32, 1642 .dcache_bsize = 32, 1643 .machine_check = machine_check_4xx, 1644 .platform = "ppc440gp", 1645 }, 1646 { /* 440GP Rev. C */ 1647 .pvr_mask = 0xf0000fff, 1648 .pvr_value = 0x40000481, 1649 .cpu_name = "440GP Rev. C", 1650 .cpu_features = CPU_FTRS_44X, 1651 .cpu_user_features = COMMON_USER_BOOKE, 1652 .mmu_features = MMU_FTR_TYPE_44x, 1653 .icache_bsize = 32, 1654 .dcache_bsize = 32, 1655 .machine_check = machine_check_4xx, 1656 .platform = "ppc440gp", 1657 }, 1658 { /* 440GX Rev. A */ 1659 .pvr_mask = 0xf0000fff, 1660 .pvr_value = 0x50000850, 1661 .cpu_name = "440GX Rev. A", 1662 .cpu_features = CPU_FTRS_44X, 1663 .cpu_user_features = COMMON_USER_BOOKE, 1664 .mmu_features = MMU_FTR_TYPE_44x, 1665 .icache_bsize = 32, 1666 .dcache_bsize = 32, 1667 .cpu_setup = __setup_cpu_440gx, 1668 .machine_check = machine_check_440A, 1669 .platform = "ppc440", 1670 }, 1671 { /* 440GX Rev. B */ 1672 .pvr_mask = 0xf0000fff, 1673 .pvr_value = 0x50000851, 1674 .cpu_name = "440GX Rev. B", 1675 .cpu_features = CPU_FTRS_44X, 1676 .cpu_user_features = COMMON_USER_BOOKE, 1677 .mmu_features = MMU_FTR_TYPE_44x, 1678 .icache_bsize = 32, 1679 .dcache_bsize = 32, 1680 .cpu_setup = __setup_cpu_440gx, 1681 .machine_check = machine_check_440A, 1682 .platform = "ppc440", 1683 }, 1684 { /* 440GX Rev. C */ 1685 .pvr_mask = 0xf0000fff, 1686 .pvr_value = 0x50000892, 1687 .cpu_name = "440GX Rev. C", 1688 .cpu_features = CPU_FTRS_44X, 1689 .cpu_user_features = COMMON_USER_BOOKE, 1690 .mmu_features = MMU_FTR_TYPE_44x, 1691 .icache_bsize = 32, 1692 .dcache_bsize = 32, 1693 .cpu_setup = __setup_cpu_440gx, 1694 .machine_check = machine_check_440A, 1695 .platform = "ppc440", 1696 }, 1697 { /* 440GX Rev. F */ 1698 .pvr_mask = 0xf0000fff, 1699 .pvr_value = 0x50000894, 1700 .cpu_name = "440GX Rev. F", 1701 .cpu_features = CPU_FTRS_44X, 1702 .cpu_user_features = COMMON_USER_BOOKE, 1703 .mmu_features = MMU_FTR_TYPE_44x, 1704 .icache_bsize = 32, 1705 .dcache_bsize = 32, 1706 .cpu_setup = __setup_cpu_440gx, 1707 .machine_check = machine_check_440A, 1708 .platform = "ppc440", 1709 }, 1710 { /* 440SP Rev. A */ 1711 .pvr_mask = 0xfff00fff, 1712 .pvr_value = 0x53200891, 1713 .cpu_name = "440SP Rev. A", 1714 .cpu_features = CPU_FTRS_44X, 1715 .cpu_user_features = COMMON_USER_BOOKE, 1716 .mmu_features = MMU_FTR_TYPE_44x, 1717 .icache_bsize = 32, 1718 .dcache_bsize = 32, 1719 .machine_check = machine_check_4xx, 1720 .platform = "ppc440", 1721 }, 1722 { /* 440SPe Rev. A */ 1723 .pvr_mask = 0xfff00fff, 1724 .pvr_value = 0x53400890, 1725 .cpu_name = "440SPe Rev. A", 1726 .cpu_features = CPU_FTRS_44X, 1727 .cpu_user_features = COMMON_USER_BOOKE, 1728 .mmu_features = MMU_FTR_TYPE_44x, 1729 .icache_bsize = 32, 1730 .dcache_bsize = 32, 1731 .cpu_setup = __setup_cpu_440spe, 1732 .machine_check = machine_check_440A, 1733 .platform = "ppc440", 1734 }, 1735 { /* 440SPe Rev. B */ 1736 .pvr_mask = 0xfff00fff, 1737 .pvr_value = 0x53400891, 1738 .cpu_name = "440SPe Rev. B", 1739 .cpu_features = CPU_FTRS_44X, 1740 .cpu_user_features = COMMON_USER_BOOKE, 1741 .mmu_features = MMU_FTR_TYPE_44x, 1742 .icache_bsize = 32, 1743 .dcache_bsize = 32, 1744 .cpu_setup = __setup_cpu_440spe, 1745 .machine_check = machine_check_440A, 1746 .platform = "ppc440", 1747 }, 1748 { /* 460EX */ 1749 .pvr_mask = 0xffff0006, 1750 .pvr_value = 0x13020002, 1751 .cpu_name = "460EX", 1752 .cpu_features = CPU_FTRS_440x6, 1753 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1754 .mmu_features = MMU_FTR_TYPE_44x, 1755 .icache_bsize = 32, 1756 .dcache_bsize = 32, 1757 .cpu_setup = __setup_cpu_460ex, 1758 .machine_check = machine_check_440A, 1759 .platform = "ppc440", 1760 }, 1761 { /* 460EX Rev B */ 1762 .pvr_mask = 0xffff0007, 1763 .pvr_value = 0x13020004, 1764 .cpu_name = "460EX Rev. B", 1765 .cpu_features = CPU_FTRS_440x6, 1766 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1767 .mmu_features = MMU_FTR_TYPE_44x, 1768 .icache_bsize = 32, 1769 .dcache_bsize = 32, 1770 .cpu_setup = __setup_cpu_460ex, 1771 .machine_check = machine_check_440A, 1772 .platform = "ppc440", 1773 }, 1774 { /* 460GT */ 1775 .pvr_mask = 0xffff0006, 1776 .pvr_value = 0x13020000, 1777 .cpu_name = "460GT", 1778 .cpu_features = CPU_FTRS_440x6, 1779 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1780 .mmu_features = MMU_FTR_TYPE_44x, 1781 .icache_bsize = 32, 1782 .dcache_bsize = 32, 1783 .cpu_setup = __setup_cpu_460gt, 1784 .machine_check = machine_check_440A, 1785 .platform = "ppc440", 1786 }, 1787 { /* 460GT Rev B */ 1788 .pvr_mask = 0xffff0007, 1789 .pvr_value = 0x13020005, 1790 .cpu_name = "460GT Rev. B", 1791 .cpu_features = CPU_FTRS_440x6, 1792 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1793 .mmu_features = MMU_FTR_TYPE_44x, 1794 .icache_bsize = 32, 1795 .dcache_bsize = 32, 1796 .cpu_setup = __setup_cpu_460gt, 1797 .machine_check = machine_check_440A, 1798 .platform = "ppc440", 1799 }, 1800 { /* 460SX */ 1801 .pvr_mask = 0xffffff00, 1802 .pvr_value = 0x13541800, 1803 .cpu_name = "460SX", 1804 .cpu_features = CPU_FTRS_44X, 1805 .cpu_user_features = COMMON_USER_BOOKE, 1806 .mmu_features = MMU_FTR_TYPE_44x, 1807 .icache_bsize = 32, 1808 .dcache_bsize = 32, 1809 .cpu_setup = __setup_cpu_460sx, 1810 .machine_check = machine_check_440A, 1811 .platform = "ppc440", 1812 }, 1813 { /* 464 in APM821xx */ 1814 .pvr_mask = 0xfffffff0, 1815 .pvr_value = 0x12C41C80, 1816 .cpu_name = "APM821XX", 1817 .cpu_features = CPU_FTRS_44X, 1818 .cpu_user_features = COMMON_USER_BOOKE | 1819 PPC_FEATURE_HAS_FPU, 1820 .mmu_features = MMU_FTR_TYPE_44x, 1821 .icache_bsize = 32, 1822 .dcache_bsize = 32, 1823 .cpu_setup = __setup_cpu_apm821xx, 1824 .machine_check = machine_check_440A, 1825 .platform = "ppc440", 1826 }, 1827 { /* default match */ 1828 .pvr_mask = 0x00000000, 1829 .pvr_value = 0x00000000, 1830 .cpu_name = "(generic 44x PPC)", 1831 .cpu_features = CPU_FTRS_44X, 1832 .cpu_user_features = COMMON_USER_BOOKE, 1833 .mmu_features = MMU_FTR_TYPE_44x, 1834 .icache_bsize = 32, 1835 .dcache_bsize = 32, 1836 .machine_check = machine_check_4xx, 1837 .platform = "ppc440", 1838 } 1839 #else /* CONFIG_PPC_47x */ 1840 { /* 476 DD2 core */ 1841 .pvr_mask = 0xffffffff, 1842 .pvr_value = 0x11a52080, 1843 .cpu_name = "476", 1844 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1845 .cpu_user_features = COMMON_USER_BOOKE | 1846 PPC_FEATURE_HAS_FPU, 1847 .mmu_features = MMU_FTR_TYPE_47x | 1848 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1849 .icache_bsize = 32, 1850 .dcache_bsize = 128, 1851 .machine_check = machine_check_47x, 1852 .platform = "ppc470", 1853 }, 1854 { /* 476fpe */ 1855 .pvr_mask = 0xffff0000, 1856 .pvr_value = 0x7ff50000, 1857 .cpu_name = "476fpe", 1858 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1859 .cpu_user_features = COMMON_USER_BOOKE | 1860 PPC_FEATURE_HAS_FPU, 1861 .mmu_features = MMU_FTR_TYPE_47x | 1862 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1863 .icache_bsize = 32, 1864 .dcache_bsize = 128, 1865 .machine_check = machine_check_47x, 1866 .platform = "ppc470", 1867 }, 1868 { /* 476 iss */ 1869 .pvr_mask = 0xffff0000, 1870 .pvr_value = 0x00050000, 1871 .cpu_name = "476", 1872 .cpu_features = CPU_FTRS_47X, 1873 .cpu_user_features = COMMON_USER_BOOKE | 1874 PPC_FEATURE_HAS_FPU, 1875 .mmu_features = MMU_FTR_TYPE_47x | 1876 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1877 .icache_bsize = 32, 1878 .dcache_bsize = 128, 1879 .machine_check = machine_check_47x, 1880 .platform = "ppc470", 1881 }, 1882 { /* 476 others */ 1883 .pvr_mask = 0xffff0000, 1884 .pvr_value = 0x11a50000, 1885 .cpu_name = "476", 1886 .cpu_features = CPU_FTRS_47X, 1887 .cpu_user_features = COMMON_USER_BOOKE | 1888 PPC_FEATURE_HAS_FPU, 1889 .mmu_features = MMU_FTR_TYPE_47x | 1890 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1891 .icache_bsize = 32, 1892 .dcache_bsize = 128, 1893 .machine_check = machine_check_47x, 1894 .platform = "ppc470", 1895 }, 1896 { /* default match */ 1897 .pvr_mask = 0x00000000, 1898 .pvr_value = 0x00000000, 1899 .cpu_name = "(generic 47x PPC)", 1900 .cpu_features = CPU_FTRS_47X, 1901 .cpu_user_features = COMMON_USER_BOOKE, 1902 .mmu_features = MMU_FTR_TYPE_47x, 1903 .icache_bsize = 32, 1904 .dcache_bsize = 128, 1905 .machine_check = machine_check_47x, 1906 .platform = "ppc470", 1907 } 1908 #endif /* CONFIG_PPC_47x */ 1909 #endif /* CONFIG_44x */ 1910 #endif /* CONFIG_PPC32 */ 1911 #ifdef CONFIG_E500 1912 #ifdef CONFIG_PPC32 1913 #ifndef CONFIG_PPC_E500MC 1914 { /* e500 */ 1915 .pvr_mask = 0xffff0000, 1916 .pvr_value = 0x80200000, 1917 .cpu_name = "e500", 1918 .cpu_features = CPU_FTRS_E500, 1919 .cpu_user_features = COMMON_USER_BOOKE | 1920 PPC_FEATURE_HAS_SPE_COMP | 1921 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1922 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1923 .mmu_features = MMU_FTR_TYPE_FSL_E, 1924 .icache_bsize = 32, 1925 .dcache_bsize = 32, 1926 .num_pmcs = 4, 1927 .oprofile_cpu_type = "ppc/e500", 1928 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1929 .cpu_setup = __setup_cpu_e500v1, 1930 .machine_check = machine_check_e500, 1931 .platform = "ppc8540", 1932 }, 1933 { /* e500v2 */ 1934 .pvr_mask = 0xffff0000, 1935 .pvr_value = 0x80210000, 1936 .cpu_name = "e500v2", 1937 .cpu_features = CPU_FTRS_E500_2, 1938 .cpu_user_features = COMMON_USER_BOOKE | 1939 PPC_FEATURE_HAS_SPE_COMP | 1940 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1941 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1942 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1943 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1944 .icache_bsize = 32, 1945 .dcache_bsize = 32, 1946 .num_pmcs = 4, 1947 .oprofile_cpu_type = "ppc/e500", 1948 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1949 .cpu_setup = __setup_cpu_e500v2, 1950 .machine_check = machine_check_e500, 1951 .platform = "ppc8548", 1952 .cpu_down_flush = cpu_down_flush_e500v2, 1953 }, 1954 #else 1955 { /* e500mc */ 1956 .pvr_mask = 0xffff0000, 1957 .pvr_value = 0x80230000, 1958 .cpu_name = "e500mc", 1959 .cpu_features = CPU_FTRS_E500MC, 1960 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1961 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1962 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1963 MMU_FTR_USE_TLBILX, 1964 .icache_bsize = 64, 1965 .dcache_bsize = 64, 1966 .num_pmcs = 4, 1967 .oprofile_cpu_type = "ppc/e500mc", 1968 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1969 .cpu_setup = __setup_cpu_e500mc, 1970 .machine_check = machine_check_e500mc, 1971 .platform = "ppce500mc", 1972 .cpu_down_flush = cpu_down_flush_e500mc, 1973 }, 1974 #endif /* CONFIG_PPC_E500MC */ 1975 #endif /* CONFIG_PPC32 */ 1976 #ifdef CONFIG_PPC_E500MC 1977 { /* e5500 */ 1978 .pvr_mask = 0xffff0000, 1979 .pvr_value = 0x80240000, 1980 .cpu_name = "e5500", 1981 .cpu_features = CPU_FTRS_E5500, 1982 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1983 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1984 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1985 MMU_FTR_USE_TLBILX, 1986 .icache_bsize = 64, 1987 .dcache_bsize = 64, 1988 .num_pmcs = 4, 1989 .oprofile_cpu_type = "ppc/e500mc", 1990 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1991 .cpu_setup = __setup_cpu_e5500, 1992 #ifndef CONFIG_PPC32 1993 .cpu_restore = __restore_cpu_e5500, 1994 #endif 1995 .machine_check = machine_check_e500mc, 1996 .platform = "ppce5500", 1997 .cpu_down_flush = cpu_down_flush_e5500, 1998 }, 1999 { /* e6500 */ 2000 .pvr_mask = 0xffff0000, 2001 .pvr_value = 0x80400000, 2002 .cpu_name = "e6500", 2003 .cpu_features = CPU_FTRS_E6500, 2004 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2005 PPC_FEATURE_HAS_ALTIVEC_COMP, 2006 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2007 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2008 MMU_FTR_USE_TLBILX, 2009 .icache_bsize = 64, 2010 .dcache_bsize = 64, 2011 .num_pmcs = 6, 2012 .oprofile_cpu_type = "ppc/e6500", 2013 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2014 .cpu_setup = __setup_cpu_e6500, 2015 #ifndef CONFIG_PPC32 2016 .cpu_restore = __restore_cpu_e6500, 2017 #endif 2018 .machine_check = machine_check_e500mc, 2019 .platform = "ppce6500", 2020 .cpu_down_flush = cpu_down_flush_e6500, 2021 }, 2022 #endif /* CONFIG_PPC_E500MC */ 2023 #ifdef CONFIG_PPC32 2024 { /* default match */ 2025 .pvr_mask = 0x00000000, 2026 .pvr_value = 0x00000000, 2027 .cpu_name = "(generic E500 PPC)", 2028 .cpu_features = CPU_FTRS_E500, 2029 .cpu_user_features = COMMON_USER_BOOKE | 2030 PPC_FEATURE_HAS_SPE_COMP | 2031 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2032 .mmu_features = MMU_FTR_TYPE_FSL_E, 2033 .icache_bsize = 32, 2034 .dcache_bsize = 32, 2035 .machine_check = machine_check_e500, 2036 .platform = "powerpc", 2037 } 2038 #endif /* CONFIG_PPC32 */ 2039 #endif /* CONFIG_E500 */ 2040 }; 2041 2042 void __init set_cur_cpu_spec(struct cpu_spec *s) 2043 { 2044 struct cpu_spec *t = &the_cpu_spec; 2045 2046 t = PTRRELOC(t); 2047 /* 2048 * use memcpy() instead of *t = *s so that GCC replaces it 2049 * by __memcpy() when KASAN is active 2050 */ 2051 memcpy(t, s, sizeof(*t)); 2052 2053 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2054 } 2055 2056 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2057 struct cpu_spec *s) 2058 { 2059 struct cpu_spec *t = &the_cpu_spec; 2060 struct cpu_spec old; 2061 2062 t = PTRRELOC(t); 2063 old = *t; 2064 2065 /* 2066 * Copy everything, then do fixups. Use memcpy() instead of *t = *s 2067 * so that GCC replaces it by __memcpy() when KASAN is active 2068 */ 2069 memcpy(t, s, sizeof(*t)); 2070 2071 /* 2072 * If we are overriding a previous value derived from the real 2073 * PVR with a new value obtained using a logical PVR value, 2074 * don't modify the performance monitor fields. 2075 */ 2076 if (old.num_pmcs && !s->num_pmcs) { 2077 t->num_pmcs = old.num_pmcs; 2078 t->pmc_type = old.pmc_type; 2079 t->oprofile_type = old.oprofile_type; 2080 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2081 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2082 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2083 2084 /* 2085 * If we have passed through this logic once before and 2086 * have pulled the default case because the real PVR was 2087 * not found inside cpu_specs[], then we are possibly 2088 * running in compatibility mode. In that case, let the 2089 * oprofiler know which set of compatibility counters to 2090 * pull from by making sure the oprofile_cpu_type string 2091 * is set to that of compatibility mode. If the 2092 * oprofile_cpu_type already has a value, then we are 2093 * possibly overriding a real PVR with a logical one, 2094 * and, in that case, keep the current value for 2095 * oprofile_cpu_type. Futhermore, let's ensure that the 2096 * fix for the PMAO bug is enabled on compatibility mode. 2097 */ 2098 if (old.oprofile_cpu_type != NULL) { 2099 t->oprofile_cpu_type = old.oprofile_cpu_type; 2100 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG; 2101 } 2102 } 2103 2104 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2105 2106 /* 2107 * Set the base platform string once; assumes 2108 * we're called with real pvr first. 2109 */ 2110 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2111 *PTRRELOC(&powerpc_base_platform) = t->platform; 2112 2113 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2114 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2115 * that processor. I will consolidate that at a later time, for now, 2116 * just use #ifdef. We also don't need to PTRRELOC the function 2117 * pointer on ppc64 and booke as we are running at 0 in real mode 2118 * on ppc64 and reloc_offset is always 0 on booke. 2119 */ 2120 if (t->cpu_setup) { 2121 t->cpu_setup(offset, t); 2122 } 2123 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2124 2125 return t; 2126 } 2127 2128 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2129 { 2130 struct cpu_spec *s = cpu_specs; 2131 int i; 2132 2133 s = PTRRELOC(s); 2134 2135 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2136 if ((pvr & s->pvr_mask) == s->pvr_value) 2137 return setup_cpu_spec(offset, s); 2138 } 2139 2140 BUG(); 2141 2142 return NULL; 2143 } 2144 2145 /* 2146 * Used by cpufeatures to get the name for CPUs with a PVR table. 2147 * If they don't hae a PVR table, cpufeatures gets the name from 2148 * cpu device-tree node. 2149 */ 2150 void __init identify_cpu_name(unsigned int pvr) 2151 { 2152 struct cpu_spec *s = cpu_specs; 2153 struct cpu_spec *t = &the_cpu_spec; 2154 int i; 2155 2156 s = PTRRELOC(s); 2157 t = PTRRELOC(t); 2158 2159 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2160 if ((pvr & s->pvr_mask) == s->pvr_value) { 2161 t->cpu_name = s->cpu_name; 2162 return; 2163 } 2164 } 2165 } 2166 2167 2168 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2169 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2170 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2171 }; 2172 EXPORT_SYMBOL_GPL(cpu_feature_keys); 2173 2174 void __init cpu_feature_keys_init(void) 2175 { 2176 int i; 2177 2178 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2179 unsigned long f = 1ul << i; 2180 2181 if (!(cur_cpu_spec->cpu_features & f)) 2182 static_branch_disable(&cpu_feature_keys[i]); 2183 } 2184 } 2185 2186 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2187 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2188 }; 2189 EXPORT_SYMBOL_GPL(mmu_feature_keys); 2190 2191 void __init mmu_feature_keys_init(void) 2192 { 2193 int i; 2194 2195 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2196 unsigned long f = 1ul << i; 2197 2198 if (!(cur_cpu_spec->mmu_features & f)) 2199 static_branch_disable(&mmu_feature_keys[i]); 2200 } 2201 } 2202 #endif 2203