1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/module.h> 18 19 #include <asm/oprofile_impl.h> 20 #include <asm/cputable.h> 21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22 #include <asm/mmu.h> 23 24 struct cpu_spec* cur_cpu_spec = NULL; 25 EXPORT_SYMBOL(cur_cpu_spec); 26 27 /* The platform string corresponding to the real PVR */ 28 const char *powerpc_base_platform; 29 30 /* NOTE: 31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 32 * the responsibility of the appropriate CPU save/restore functions to 33 * eventually copy these settings over. Those save/restore aren't yet 34 * part of the cputable though. That has to be fixed for both ppc32 35 * and ppc64 36 */ 37 #ifdef CONFIG_PPC32 38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 51 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 52 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 59 #endif /* CONFIG_PPC32 */ 60 #ifdef CONFIG_PPC64 61 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 62 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 64 extern void __restore_cpu_pa6t(void); 65 extern void __restore_cpu_ppc970(void); 66 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 67 extern void __restore_cpu_power7(void); 68 #endif /* CONFIG_PPC64 */ 69 70 /* This table only contains "desktop" CPUs, it need to be filled with embedded 71 * ones as well... 72 */ 73 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 74 PPC_FEATURE_HAS_MMU) 75 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 76 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 77 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 78 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 79 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 80 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 81 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 82 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 83 PPC_FEATURE_TRUE_LE | \ 84 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 85 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 86 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 87 PPC_FEATURE_TRUE_LE | \ 88 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 89 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 90 PPC_FEATURE_TRUE_LE | \ 91 PPC_FEATURE_HAS_ALTIVEC_COMP) 92 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 93 PPC_FEATURE_BOOKE) 94 95 static struct cpu_spec __initdata cpu_specs[] = { 96 #ifdef CONFIG_PPC64 97 { /* Power3 */ 98 .pvr_mask = 0xffff0000, 99 .pvr_value = 0x00400000, 100 .cpu_name = "POWER3 (630)", 101 .cpu_features = CPU_FTRS_POWER3, 102 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 103 .mmu_features = MMU_FTR_HPTE_TABLE, 104 .icache_bsize = 128, 105 .dcache_bsize = 128, 106 .num_pmcs = 8, 107 .pmc_type = PPC_PMC_IBM, 108 .oprofile_cpu_type = "ppc64/power3", 109 .oprofile_type = PPC_OPROFILE_RS64, 110 .machine_check = machine_check_generic, 111 .platform = "power3", 112 }, 113 { /* Power3+ */ 114 .pvr_mask = 0xffff0000, 115 .pvr_value = 0x00410000, 116 .cpu_name = "POWER3 (630+)", 117 .cpu_features = CPU_FTRS_POWER3, 118 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 119 .mmu_features = MMU_FTR_HPTE_TABLE, 120 .icache_bsize = 128, 121 .dcache_bsize = 128, 122 .num_pmcs = 8, 123 .pmc_type = PPC_PMC_IBM, 124 .oprofile_cpu_type = "ppc64/power3", 125 .oprofile_type = PPC_OPROFILE_RS64, 126 .machine_check = machine_check_generic, 127 .platform = "power3", 128 }, 129 { /* Northstar */ 130 .pvr_mask = 0xffff0000, 131 .pvr_value = 0x00330000, 132 .cpu_name = "RS64-II (northstar)", 133 .cpu_features = CPU_FTRS_RS64, 134 .cpu_user_features = COMMON_USER_PPC64, 135 .mmu_features = MMU_FTR_HPTE_TABLE, 136 .icache_bsize = 128, 137 .dcache_bsize = 128, 138 .num_pmcs = 8, 139 .pmc_type = PPC_PMC_IBM, 140 .oprofile_cpu_type = "ppc64/rs64", 141 .oprofile_type = PPC_OPROFILE_RS64, 142 .machine_check = machine_check_generic, 143 .platform = "rs64", 144 }, 145 { /* Pulsar */ 146 .pvr_mask = 0xffff0000, 147 .pvr_value = 0x00340000, 148 .cpu_name = "RS64-III (pulsar)", 149 .cpu_features = CPU_FTRS_RS64, 150 .cpu_user_features = COMMON_USER_PPC64, 151 .mmu_features = MMU_FTR_HPTE_TABLE, 152 .icache_bsize = 128, 153 .dcache_bsize = 128, 154 .num_pmcs = 8, 155 .pmc_type = PPC_PMC_IBM, 156 .oprofile_cpu_type = "ppc64/rs64", 157 .oprofile_type = PPC_OPROFILE_RS64, 158 .machine_check = machine_check_generic, 159 .platform = "rs64", 160 }, 161 { /* I-star */ 162 .pvr_mask = 0xffff0000, 163 .pvr_value = 0x00360000, 164 .cpu_name = "RS64-III (icestar)", 165 .cpu_features = CPU_FTRS_RS64, 166 .cpu_user_features = COMMON_USER_PPC64, 167 .mmu_features = MMU_FTR_HPTE_TABLE, 168 .icache_bsize = 128, 169 .dcache_bsize = 128, 170 .num_pmcs = 8, 171 .pmc_type = PPC_PMC_IBM, 172 .oprofile_cpu_type = "ppc64/rs64", 173 .oprofile_type = PPC_OPROFILE_RS64, 174 .machine_check = machine_check_generic, 175 .platform = "rs64", 176 }, 177 { /* S-star */ 178 .pvr_mask = 0xffff0000, 179 .pvr_value = 0x00370000, 180 .cpu_name = "RS64-IV (sstar)", 181 .cpu_features = CPU_FTRS_RS64, 182 .cpu_user_features = COMMON_USER_PPC64, 183 .mmu_features = MMU_FTR_HPTE_TABLE, 184 .icache_bsize = 128, 185 .dcache_bsize = 128, 186 .num_pmcs = 8, 187 .pmc_type = PPC_PMC_IBM, 188 .oprofile_cpu_type = "ppc64/rs64", 189 .oprofile_type = PPC_OPROFILE_RS64, 190 .machine_check = machine_check_generic, 191 .platform = "rs64", 192 }, 193 { /* Power4 */ 194 .pvr_mask = 0xffff0000, 195 .pvr_value = 0x00350000, 196 .cpu_name = "POWER4 (gp)", 197 .cpu_features = CPU_FTRS_POWER4, 198 .cpu_user_features = COMMON_USER_POWER4, 199 .mmu_features = MMU_FTR_HPTE_TABLE, 200 .icache_bsize = 128, 201 .dcache_bsize = 128, 202 .num_pmcs = 8, 203 .pmc_type = PPC_PMC_IBM, 204 .oprofile_cpu_type = "ppc64/power4", 205 .oprofile_type = PPC_OPROFILE_POWER4, 206 .machine_check = machine_check_generic, 207 .platform = "power4", 208 }, 209 { /* Power4+ */ 210 .pvr_mask = 0xffff0000, 211 .pvr_value = 0x00380000, 212 .cpu_name = "POWER4+ (gq)", 213 .cpu_features = CPU_FTRS_POWER4, 214 .cpu_user_features = COMMON_USER_POWER4, 215 .mmu_features = MMU_FTR_HPTE_TABLE, 216 .icache_bsize = 128, 217 .dcache_bsize = 128, 218 .num_pmcs = 8, 219 .pmc_type = PPC_PMC_IBM, 220 .oprofile_cpu_type = "ppc64/power4", 221 .oprofile_type = PPC_OPROFILE_POWER4, 222 .machine_check = machine_check_generic, 223 .platform = "power4", 224 }, 225 { /* PPC970 */ 226 .pvr_mask = 0xffff0000, 227 .pvr_value = 0x00390000, 228 .cpu_name = "PPC970", 229 .cpu_features = CPU_FTRS_PPC970, 230 .cpu_user_features = COMMON_USER_POWER4 | 231 PPC_FEATURE_HAS_ALTIVEC_COMP, 232 .mmu_features = MMU_FTR_HPTE_TABLE, 233 .icache_bsize = 128, 234 .dcache_bsize = 128, 235 .num_pmcs = 8, 236 .pmc_type = PPC_PMC_IBM, 237 .cpu_setup = __setup_cpu_ppc970, 238 .cpu_restore = __restore_cpu_ppc970, 239 .oprofile_cpu_type = "ppc64/970", 240 .oprofile_type = PPC_OPROFILE_POWER4, 241 .machine_check = machine_check_generic, 242 .platform = "ppc970", 243 }, 244 { /* PPC970FX */ 245 .pvr_mask = 0xffff0000, 246 .pvr_value = 0x003c0000, 247 .cpu_name = "PPC970FX", 248 .cpu_features = CPU_FTRS_PPC970, 249 .cpu_user_features = COMMON_USER_POWER4 | 250 PPC_FEATURE_HAS_ALTIVEC_COMP, 251 .mmu_features = MMU_FTR_HPTE_TABLE, 252 .icache_bsize = 128, 253 .dcache_bsize = 128, 254 .num_pmcs = 8, 255 .pmc_type = PPC_PMC_IBM, 256 .cpu_setup = __setup_cpu_ppc970, 257 .cpu_restore = __restore_cpu_ppc970, 258 .oprofile_cpu_type = "ppc64/970", 259 .oprofile_type = PPC_OPROFILE_POWER4, 260 .machine_check = machine_check_generic, 261 .platform = "ppc970", 262 }, 263 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 264 .pvr_mask = 0xffffffff, 265 .pvr_value = 0x00440100, 266 .cpu_name = "PPC970MP", 267 .cpu_features = CPU_FTRS_PPC970, 268 .cpu_user_features = COMMON_USER_POWER4 | 269 PPC_FEATURE_HAS_ALTIVEC_COMP, 270 .mmu_features = MMU_FTR_HPTE_TABLE, 271 .icache_bsize = 128, 272 .dcache_bsize = 128, 273 .num_pmcs = 8, 274 .pmc_type = PPC_PMC_IBM, 275 .cpu_setup = __setup_cpu_ppc970, 276 .cpu_restore = __restore_cpu_ppc970, 277 .oprofile_cpu_type = "ppc64/970MP", 278 .oprofile_type = PPC_OPROFILE_POWER4, 279 .machine_check = machine_check_generic, 280 .platform = "ppc970", 281 }, 282 { /* PPC970MP */ 283 .pvr_mask = 0xffff0000, 284 .pvr_value = 0x00440000, 285 .cpu_name = "PPC970MP", 286 .cpu_features = CPU_FTRS_PPC970, 287 .cpu_user_features = COMMON_USER_POWER4 | 288 PPC_FEATURE_HAS_ALTIVEC_COMP, 289 .mmu_features = MMU_FTR_HPTE_TABLE, 290 .icache_bsize = 128, 291 .dcache_bsize = 128, 292 .num_pmcs = 8, 293 .pmc_type = PPC_PMC_IBM, 294 .cpu_setup = __setup_cpu_ppc970MP, 295 .cpu_restore = __restore_cpu_ppc970, 296 .oprofile_cpu_type = "ppc64/970MP", 297 .oprofile_type = PPC_OPROFILE_POWER4, 298 .machine_check = machine_check_generic, 299 .platform = "ppc970", 300 }, 301 { /* PPC970GX */ 302 .pvr_mask = 0xffff0000, 303 .pvr_value = 0x00450000, 304 .cpu_name = "PPC970GX", 305 .cpu_features = CPU_FTRS_PPC970, 306 .cpu_user_features = COMMON_USER_POWER4 | 307 PPC_FEATURE_HAS_ALTIVEC_COMP, 308 .mmu_features = MMU_FTR_HPTE_TABLE, 309 .icache_bsize = 128, 310 .dcache_bsize = 128, 311 .num_pmcs = 8, 312 .pmc_type = PPC_PMC_IBM, 313 .cpu_setup = __setup_cpu_ppc970, 314 .oprofile_cpu_type = "ppc64/970", 315 .oprofile_type = PPC_OPROFILE_POWER4, 316 .machine_check = machine_check_generic, 317 .platform = "ppc970", 318 }, 319 { /* Power5 GR */ 320 .pvr_mask = 0xffff0000, 321 .pvr_value = 0x003a0000, 322 .cpu_name = "POWER5 (gr)", 323 .cpu_features = CPU_FTRS_POWER5, 324 .cpu_user_features = COMMON_USER_POWER5, 325 .mmu_features = MMU_FTR_HPTE_TABLE, 326 .icache_bsize = 128, 327 .dcache_bsize = 128, 328 .num_pmcs = 6, 329 .pmc_type = PPC_PMC_IBM, 330 .oprofile_cpu_type = "ppc64/power5", 331 .oprofile_type = PPC_OPROFILE_POWER4, 332 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 333 * and above but only works on POWER5 and above 334 */ 335 .oprofile_mmcra_sihv = MMCRA_SIHV, 336 .oprofile_mmcra_sipr = MMCRA_SIPR, 337 .machine_check = machine_check_generic, 338 .platform = "power5", 339 }, 340 { /* Power5++ */ 341 .pvr_mask = 0xffffff00, 342 .pvr_value = 0x003b0300, 343 .cpu_name = "POWER5+ (gs)", 344 .cpu_features = CPU_FTRS_POWER5, 345 .cpu_user_features = COMMON_USER_POWER5_PLUS, 346 .mmu_features = MMU_FTR_HPTE_TABLE, 347 .icache_bsize = 128, 348 .dcache_bsize = 128, 349 .num_pmcs = 6, 350 .oprofile_cpu_type = "ppc64/power5++", 351 .oprofile_type = PPC_OPROFILE_POWER4, 352 .oprofile_mmcra_sihv = MMCRA_SIHV, 353 .oprofile_mmcra_sipr = MMCRA_SIPR, 354 .machine_check = machine_check_generic, 355 .platform = "power5+", 356 }, 357 { /* Power5 GS */ 358 .pvr_mask = 0xffff0000, 359 .pvr_value = 0x003b0000, 360 .cpu_name = "POWER5+ (gs)", 361 .cpu_features = CPU_FTRS_POWER5, 362 .cpu_user_features = COMMON_USER_POWER5_PLUS, 363 .mmu_features = MMU_FTR_HPTE_TABLE, 364 .icache_bsize = 128, 365 .dcache_bsize = 128, 366 .num_pmcs = 6, 367 .pmc_type = PPC_PMC_IBM, 368 .oprofile_cpu_type = "ppc64/power5+", 369 .oprofile_type = PPC_OPROFILE_POWER4, 370 .oprofile_mmcra_sihv = MMCRA_SIHV, 371 .oprofile_mmcra_sipr = MMCRA_SIPR, 372 .machine_check = machine_check_generic, 373 .platform = "power5+", 374 }, 375 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 376 .pvr_mask = 0xffffffff, 377 .pvr_value = 0x0f000001, 378 .cpu_name = "POWER5+", 379 .cpu_features = CPU_FTRS_POWER5, 380 .cpu_user_features = COMMON_USER_POWER5_PLUS, 381 .mmu_features = MMU_FTR_HPTE_TABLE, 382 .icache_bsize = 128, 383 .dcache_bsize = 128, 384 .machine_check = machine_check_generic, 385 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 386 .oprofile_type = PPC_OPROFILE_POWER4, 387 .platform = "power5+", 388 }, 389 { /* Power6 */ 390 .pvr_mask = 0xffff0000, 391 .pvr_value = 0x003e0000, 392 .cpu_name = "POWER6 (raw)", 393 .cpu_features = CPU_FTRS_POWER6, 394 .cpu_user_features = COMMON_USER_POWER6 | 395 PPC_FEATURE_POWER6_EXT, 396 .mmu_features = MMU_FTR_HPTE_TABLE, 397 .icache_bsize = 128, 398 .dcache_bsize = 128, 399 .num_pmcs = 6, 400 .pmc_type = PPC_PMC_IBM, 401 .oprofile_cpu_type = "ppc64/power6", 402 .oprofile_type = PPC_OPROFILE_POWER4, 403 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 404 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 405 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 406 POWER6_MMCRA_OTHER, 407 .machine_check = machine_check_generic, 408 .platform = "power6x", 409 }, 410 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 411 .pvr_mask = 0xffffffff, 412 .pvr_value = 0x0f000002, 413 .cpu_name = "POWER6 (architected)", 414 .cpu_features = CPU_FTRS_POWER6, 415 .cpu_user_features = COMMON_USER_POWER6, 416 .mmu_features = MMU_FTR_HPTE_TABLE, 417 .icache_bsize = 128, 418 .dcache_bsize = 128, 419 .machine_check = machine_check_generic, 420 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 421 .oprofile_type = PPC_OPROFILE_POWER4, 422 .platform = "power6", 423 }, 424 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 425 .pvr_mask = 0xffffffff, 426 .pvr_value = 0x0f000003, 427 .cpu_name = "POWER7 (architected)", 428 .cpu_features = CPU_FTRS_POWER7, 429 .cpu_user_features = COMMON_USER_POWER7, 430 .mmu_features = MMU_FTR_HPTE_TABLE, 431 .icache_bsize = 128, 432 .dcache_bsize = 128, 433 .machine_check = machine_check_generic, 434 .oprofile_type = PPC_OPROFILE_POWER4, 435 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 436 .platform = "power7", 437 }, 438 { /* Power7 */ 439 .pvr_mask = 0xffff0000, 440 .pvr_value = 0x003f0000, 441 .cpu_name = "POWER7 (raw)", 442 .cpu_features = CPU_FTRS_POWER7, 443 .cpu_user_features = COMMON_USER_POWER7, 444 .mmu_features = MMU_FTR_HPTE_TABLE, 445 .icache_bsize = 128, 446 .dcache_bsize = 128, 447 .num_pmcs = 6, 448 .pmc_type = PPC_PMC_IBM, 449 .cpu_setup = __setup_cpu_power7, 450 .cpu_restore = __restore_cpu_power7, 451 .oprofile_cpu_type = "ppc64/power7", 452 .oprofile_type = PPC_OPROFILE_POWER4, 453 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 454 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 455 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 456 POWER6_MMCRA_OTHER, 457 .platform = "power7", 458 }, 459 { /* Cell Broadband Engine */ 460 .pvr_mask = 0xffff0000, 461 .pvr_value = 0x00700000, 462 .cpu_name = "Cell Broadband Engine", 463 .cpu_features = CPU_FTRS_CELL, 464 .cpu_user_features = COMMON_USER_PPC64 | 465 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 466 PPC_FEATURE_SMT, 467 .mmu_features = MMU_FTR_HPTE_TABLE, 468 .icache_bsize = 128, 469 .dcache_bsize = 128, 470 .num_pmcs = 4, 471 .pmc_type = PPC_PMC_IBM, 472 .oprofile_cpu_type = "ppc64/cell-be", 473 .oprofile_type = PPC_OPROFILE_CELL, 474 .machine_check = machine_check_generic, 475 .platform = "ppc-cell-be", 476 }, 477 { /* PA Semi PA6T */ 478 .pvr_mask = 0x7fff0000, 479 .pvr_value = 0x00900000, 480 .cpu_name = "PA6T", 481 .cpu_features = CPU_FTRS_PA6T, 482 .cpu_user_features = COMMON_USER_PA6T, 483 .mmu_features = MMU_FTR_HPTE_TABLE, 484 .icache_bsize = 64, 485 .dcache_bsize = 64, 486 .num_pmcs = 6, 487 .pmc_type = PPC_PMC_PA6T, 488 .cpu_setup = __setup_cpu_pa6t, 489 .cpu_restore = __restore_cpu_pa6t, 490 .oprofile_cpu_type = "ppc64/pa6t", 491 .oprofile_type = PPC_OPROFILE_PA6T, 492 .machine_check = machine_check_generic, 493 .platform = "pa6t", 494 }, 495 { /* default match */ 496 .pvr_mask = 0x00000000, 497 .pvr_value = 0x00000000, 498 .cpu_name = "POWER4 (compatible)", 499 .cpu_features = CPU_FTRS_COMPATIBLE, 500 .cpu_user_features = COMMON_USER_PPC64, 501 .mmu_features = MMU_FTR_HPTE_TABLE, 502 .icache_bsize = 128, 503 .dcache_bsize = 128, 504 .num_pmcs = 6, 505 .pmc_type = PPC_PMC_IBM, 506 .machine_check = machine_check_generic, 507 .platform = "power4", 508 } 509 #endif /* CONFIG_PPC64 */ 510 #ifdef CONFIG_PPC32 511 #if CLASSIC_PPC 512 { /* 601 */ 513 .pvr_mask = 0xffff0000, 514 .pvr_value = 0x00010000, 515 .cpu_name = "601", 516 .cpu_features = CPU_FTRS_PPC601, 517 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 518 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 519 .mmu_features = MMU_FTR_HPTE_TABLE, 520 .icache_bsize = 32, 521 .dcache_bsize = 32, 522 .machine_check = machine_check_generic, 523 .platform = "ppc601", 524 }, 525 { /* 603 */ 526 .pvr_mask = 0xffff0000, 527 .pvr_value = 0x00030000, 528 .cpu_name = "603", 529 .cpu_features = CPU_FTRS_603, 530 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 531 .mmu_features = 0, 532 .icache_bsize = 32, 533 .dcache_bsize = 32, 534 .cpu_setup = __setup_cpu_603, 535 .machine_check = machine_check_generic, 536 .platform = "ppc603", 537 }, 538 { /* 603e */ 539 .pvr_mask = 0xffff0000, 540 .pvr_value = 0x00060000, 541 .cpu_name = "603e", 542 .cpu_features = CPU_FTRS_603, 543 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 544 .mmu_features = 0, 545 .icache_bsize = 32, 546 .dcache_bsize = 32, 547 .cpu_setup = __setup_cpu_603, 548 .machine_check = machine_check_generic, 549 .platform = "ppc603", 550 }, 551 { /* 603ev */ 552 .pvr_mask = 0xffff0000, 553 .pvr_value = 0x00070000, 554 .cpu_name = "603ev", 555 .cpu_features = CPU_FTRS_603, 556 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 557 .mmu_features = 0, 558 .icache_bsize = 32, 559 .dcache_bsize = 32, 560 .cpu_setup = __setup_cpu_603, 561 .machine_check = machine_check_generic, 562 .platform = "ppc603", 563 }, 564 { /* 604 */ 565 .pvr_mask = 0xffff0000, 566 .pvr_value = 0x00040000, 567 .cpu_name = "604", 568 .cpu_features = CPU_FTRS_604, 569 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 570 .mmu_features = MMU_FTR_HPTE_TABLE, 571 .icache_bsize = 32, 572 .dcache_bsize = 32, 573 .num_pmcs = 2, 574 .cpu_setup = __setup_cpu_604, 575 .machine_check = machine_check_generic, 576 .platform = "ppc604", 577 }, 578 { /* 604e */ 579 .pvr_mask = 0xfffff000, 580 .pvr_value = 0x00090000, 581 .cpu_name = "604e", 582 .cpu_features = CPU_FTRS_604, 583 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 584 .mmu_features = MMU_FTR_HPTE_TABLE, 585 .icache_bsize = 32, 586 .dcache_bsize = 32, 587 .num_pmcs = 4, 588 .cpu_setup = __setup_cpu_604, 589 .machine_check = machine_check_generic, 590 .platform = "ppc604", 591 }, 592 { /* 604r */ 593 .pvr_mask = 0xffff0000, 594 .pvr_value = 0x00090000, 595 .cpu_name = "604r", 596 .cpu_features = CPU_FTRS_604, 597 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 598 .mmu_features = MMU_FTR_HPTE_TABLE, 599 .icache_bsize = 32, 600 .dcache_bsize = 32, 601 .num_pmcs = 4, 602 .cpu_setup = __setup_cpu_604, 603 .machine_check = machine_check_generic, 604 .platform = "ppc604", 605 }, 606 { /* 604ev */ 607 .pvr_mask = 0xffff0000, 608 .pvr_value = 0x000a0000, 609 .cpu_name = "604ev", 610 .cpu_features = CPU_FTRS_604, 611 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 612 .mmu_features = MMU_FTR_HPTE_TABLE, 613 .icache_bsize = 32, 614 .dcache_bsize = 32, 615 .num_pmcs = 4, 616 .cpu_setup = __setup_cpu_604, 617 .machine_check = machine_check_generic, 618 .platform = "ppc604", 619 }, 620 { /* 740/750 (0x4202, don't support TAU ?) */ 621 .pvr_mask = 0xffffffff, 622 .pvr_value = 0x00084202, 623 .cpu_name = "740/750", 624 .cpu_features = CPU_FTRS_740_NOTAU, 625 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 626 .mmu_features = MMU_FTR_HPTE_TABLE, 627 .icache_bsize = 32, 628 .dcache_bsize = 32, 629 .num_pmcs = 4, 630 .cpu_setup = __setup_cpu_750, 631 .machine_check = machine_check_generic, 632 .platform = "ppc750", 633 }, 634 { /* 750CX (80100 and 8010x?) */ 635 .pvr_mask = 0xfffffff0, 636 .pvr_value = 0x00080100, 637 .cpu_name = "750CX", 638 .cpu_features = CPU_FTRS_750, 639 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 640 .mmu_features = MMU_FTR_HPTE_TABLE, 641 .icache_bsize = 32, 642 .dcache_bsize = 32, 643 .num_pmcs = 4, 644 .cpu_setup = __setup_cpu_750cx, 645 .machine_check = machine_check_generic, 646 .platform = "ppc750", 647 }, 648 { /* 750CX (82201 and 82202) */ 649 .pvr_mask = 0xfffffff0, 650 .pvr_value = 0x00082200, 651 .cpu_name = "750CX", 652 .cpu_features = CPU_FTRS_750, 653 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 654 .mmu_features = MMU_FTR_HPTE_TABLE, 655 .icache_bsize = 32, 656 .dcache_bsize = 32, 657 .num_pmcs = 4, 658 .pmc_type = PPC_PMC_IBM, 659 .cpu_setup = __setup_cpu_750cx, 660 .machine_check = machine_check_generic, 661 .platform = "ppc750", 662 }, 663 { /* 750CXe (82214) */ 664 .pvr_mask = 0xfffffff0, 665 .pvr_value = 0x00082210, 666 .cpu_name = "750CXe", 667 .cpu_features = CPU_FTRS_750, 668 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 669 .mmu_features = MMU_FTR_HPTE_TABLE, 670 .icache_bsize = 32, 671 .dcache_bsize = 32, 672 .num_pmcs = 4, 673 .pmc_type = PPC_PMC_IBM, 674 .cpu_setup = __setup_cpu_750cx, 675 .machine_check = machine_check_generic, 676 .platform = "ppc750", 677 }, 678 { /* 750CXe "Gekko" (83214) */ 679 .pvr_mask = 0xffffffff, 680 .pvr_value = 0x00083214, 681 .cpu_name = "750CXe", 682 .cpu_features = CPU_FTRS_750, 683 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 684 .mmu_features = MMU_FTR_HPTE_TABLE, 685 .icache_bsize = 32, 686 .dcache_bsize = 32, 687 .num_pmcs = 4, 688 .pmc_type = PPC_PMC_IBM, 689 .cpu_setup = __setup_cpu_750cx, 690 .machine_check = machine_check_generic, 691 .platform = "ppc750", 692 }, 693 { /* 750CL */ 694 .pvr_mask = 0xfffff0f0, 695 .pvr_value = 0x00087010, 696 .cpu_name = "750CL", 697 .cpu_features = CPU_FTRS_750CL, 698 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 699 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 700 .icache_bsize = 32, 701 .dcache_bsize = 32, 702 .num_pmcs = 4, 703 .pmc_type = PPC_PMC_IBM, 704 .cpu_setup = __setup_cpu_750, 705 .machine_check = machine_check_generic, 706 .platform = "ppc750", 707 }, 708 { /* 745/755 */ 709 .pvr_mask = 0xfffff000, 710 .pvr_value = 0x00083000, 711 .cpu_name = "745/755", 712 .cpu_features = CPU_FTRS_750, 713 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 714 .mmu_features = MMU_FTR_HPTE_TABLE, 715 .icache_bsize = 32, 716 .dcache_bsize = 32, 717 .num_pmcs = 4, 718 .pmc_type = PPC_PMC_IBM, 719 .cpu_setup = __setup_cpu_750, 720 .machine_check = machine_check_generic, 721 .platform = "ppc750", 722 }, 723 { /* 750FX rev 1.x */ 724 .pvr_mask = 0xffffff00, 725 .pvr_value = 0x70000100, 726 .cpu_name = "750FX", 727 .cpu_features = CPU_FTRS_750FX1, 728 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 729 .mmu_features = MMU_FTR_HPTE_TABLE, 730 .icache_bsize = 32, 731 .dcache_bsize = 32, 732 .num_pmcs = 4, 733 .pmc_type = PPC_PMC_IBM, 734 .cpu_setup = __setup_cpu_750, 735 .machine_check = machine_check_generic, 736 .platform = "ppc750", 737 .oprofile_cpu_type = "ppc/750", 738 .oprofile_type = PPC_OPROFILE_G4, 739 }, 740 { /* 750FX rev 2.0 must disable HID0[DPM] */ 741 .pvr_mask = 0xffffffff, 742 .pvr_value = 0x70000200, 743 .cpu_name = "750FX", 744 .cpu_features = CPU_FTRS_750FX2, 745 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 746 .mmu_features = MMU_FTR_HPTE_TABLE, 747 .icache_bsize = 32, 748 .dcache_bsize = 32, 749 .num_pmcs = 4, 750 .pmc_type = PPC_PMC_IBM, 751 .cpu_setup = __setup_cpu_750, 752 .machine_check = machine_check_generic, 753 .platform = "ppc750", 754 .oprofile_cpu_type = "ppc/750", 755 .oprofile_type = PPC_OPROFILE_G4, 756 }, 757 { /* 750FX (All revs except 2.0) */ 758 .pvr_mask = 0xffff0000, 759 .pvr_value = 0x70000000, 760 .cpu_name = "750FX", 761 .cpu_features = CPU_FTRS_750FX, 762 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 763 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 764 .icache_bsize = 32, 765 .dcache_bsize = 32, 766 .num_pmcs = 4, 767 .pmc_type = PPC_PMC_IBM, 768 .cpu_setup = __setup_cpu_750fx, 769 .machine_check = machine_check_generic, 770 .platform = "ppc750", 771 .oprofile_cpu_type = "ppc/750", 772 .oprofile_type = PPC_OPROFILE_G4, 773 }, 774 { /* 750GX */ 775 .pvr_mask = 0xffff0000, 776 .pvr_value = 0x70020000, 777 .cpu_name = "750GX", 778 .cpu_features = CPU_FTRS_750GX, 779 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 780 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 781 .icache_bsize = 32, 782 .dcache_bsize = 32, 783 .num_pmcs = 4, 784 .pmc_type = PPC_PMC_IBM, 785 .cpu_setup = __setup_cpu_750fx, 786 .machine_check = machine_check_generic, 787 .platform = "ppc750", 788 .oprofile_cpu_type = "ppc/750", 789 .oprofile_type = PPC_OPROFILE_G4, 790 }, 791 { /* 740/750 (L2CR bit need fixup for 740) */ 792 .pvr_mask = 0xffff0000, 793 .pvr_value = 0x00080000, 794 .cpu_name = "740/750", 795 .cpu_features = CPU_FTRS_740, 796 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 797 .mmu_features = MMU_FTR_HPTE_TABLE, 798 .icache_bsize = 32, 799 .dcache_bsize = 32, 800 .num_pmcs = 4, 801 .pmc_type = PPC_PMC_IBM, 802 .cpu_setup = __setup_cpu_750, 803 .machine_check = machine_check_generic, 804 .platform = "ppc750", 805 }, 806 { /* 7400 rev 1.1 ? (no TAU) */ 807 .pvr_mask = 0xffffffff, 808 .pvr_value = 0x000c1101, 809 .cpu_name = "7400 (1.1)", 810 .cpu_features = CPU_FTRS_7400_NOTAU, 811 .cpu_user_features = COMMON_USER | 812 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 813 .mmu_features = MMU_FTR_HPTE_TABLE, 814 .icache_bsize = 32, 815 .dcache_bsize = 32, 816 .num_pmcs = 4, 817 .pmc_type = PPC_PMC_G4, 818 .cpu_setup = __setup_cpu_7400, 819 .machine_check = machine_check_generic, 820 .platform = "ppc7400", 821 }, 822 { /* 7400 */ 823 .pvr_mask = 0xffff0000, 824 .pvr_value = 0x000c0000, 825 .cpu_name = "7400", 826 .cpu_features = CPU_FTRS_7400, 827 .cpu_user_features = COMMON_USER | 828 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 829 .mmu_features = MMU_FTR_HPTE_TABLE, 830 .icache_bsize = 32, 831 .dcache_bsize = 32, 832 .num_pmcs = 4, 833 .pmc_type = PPC_PMC_G4, 834 .cpu_setup = __setup_cpu_7400, 835 .machine_check = machine_check_generic, 836 .platform = "ppc7400", 837 }, 838 { /* 7410 */ 839 .pvr_mask = 0xffff0000, 840 .pvr_value = 0x800c0000, 841 .cpu_name = "7410", 842 .cpu_features = CPU_FTRS_7400, 843 .cpu_user_features = COMMON_USER | 844 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 845 .mmu_features = MMU_FTR_HPTE_TABLE, 846 .icache_bsize = 32, 847 .dcache_bsize = 32, 848 .num_pmcs = 4, 849 .pmc_type = PPC_PMC_G4, 850 .cpu_setup = __setup_cpu_7410, 851 .machine_check = machine_check_generic, 852 .platform = "ppc7400", 853 }, 854 { /* 7450 2.0 - no doze/nap */ 855 .pvr_mask = 0xffffffff, 856 .pvr_value = 0x80000200, 857 .cpu_name = "7450", 858 .cpu_features = CPU_FTRS_7450_20, 859 .cpu_user_features = COMMON_USER | 860 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 861 .mmu_features = MMU_FTR_HPTE_TABLE, 862 .icache_bsize = 32, 863 .dcache_bsize = 32, 864 .num_pmcs = 6, 865 .pmc_type = PPC_PMC_G4, 866 .cpu_setup = __setup_cpu_745x, 867 .oprofile_cpu_type = "ppc/7450", 868 .oprofile_type = PPC_OPROFILE_G4, 869 .machine_check = machine_check_generic, 870 .platform = "ppc7450", 871 }, 872 { /* 7450 2.1 */ 873 .pvr_mask = 0xffffffff, 874 .pvr_value = 0x80000201, 875 .cpu_name = "7450", 876 .cpu_features = CPU_FTRS_7450_21, 877 .cpu_user_features = COMMON_USER | 878 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 879 .mmu_features = MMU_FTR_HPTE_TABLE, 880 .icache_bsize = 32, 881 .dcache_bsize = 32, 882 .num_pmcs = 6, 883 .pmc_type = PPC_PMC_G4, 884 .cpu_setup = __setup_cpu_745x, 885 .oprofile_cpu_type = "ppc/7450", 886 .oprofile_type = PPC_OPROFILE_G4, 887 .machine_check = machine_check_generic, 888 .platform = "ppc7450", 889 }, 890 { /* 7450 2.3 and newer */ 891 .pvr_mask = 0xffff0000, 892 .pvr_value = 0x80000000, 893 .cpu_name = "7450", 894 .cpu_features = CPU_FTRS_7450_23, 895 .cpu_user_features = COMMON_USER | 896 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 897 .mmu_features = MMU_FTR_HPTE_TABLE, 898 .icache_bsize = 32, 899 .dcache_bsize = 32, 900 .num_pmcs = 6, 901 .pmc_type = PPC_PMC_G4, 902 .cpu_setup = __setup_cpu_745x, 903 .oprofile_cpu_type = "ppc/7450", 904 .oprofile_type = PPC_OPROFILE_G4, 905 .machine_check = machine_check_generic, 906 .platform = "ppc7450", 907 }, 908 { /* 7455 rev 1.x */ 909 .pvr_mask = 0xffffff00, 910 .pvr_value = 0x80010100, 911 .cpu_name = "7455", 912 .cpu_features = CPU_FTRS_7455_1, 913 .cpu_user_features = COMMON_USER | 914 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 915 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 916 .icache_bsize = 32, 917 .dcache_bsize = 32, 918 .num_pmcs = 6, 919 .pmc_type = PPC_PMC_G4, 920 .cpu_setup = __setup_cpu_745x, 921 .oprofile_cpu_type = "ppc/7450", 922 .oprofile_type = PPC_OPROFILE_G4, 923 .machine_check = machine_check_generic, 924 .platform = "ppc7450", 925 }, 926 { /* 7455 rev 2.0 */ 927 .pvr_mask = 0xffffffff, 928 .pvr_value = 0x80010200, 929 .cpu_name = "7455", 930 .cpu_features = CPU_FTRS_7455_20, 931 .cpu_user_features = COMMON_USER | 932 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 933 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 934 .icache_bsize = 32, 935 .dcache_bsize = 32, 936 .num_pmcs = 6, 937 .pmc_type = PPC_PMC_G4, 938 .cpu_setup = __setup_cpu_745x, 939 .oprofile_cpu_type = "ppc/7450", 940 .oprofile_type = PPC_OPROFILE_G4, 941 .machine_check = machine_check_generic, 942 .platform = "ppc7450", 943 }, 944 { /* 7455 others */ 945 .pvr_mask = 0xffff0000, 946 .pvr_value = 0x80010000, 947 .cpu_name = "7455", 948 .cpu_features = CPU_FTRS_7455, 949 .cpu_user_features = COMMON_USER | 950 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 951 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 952 .icache_bsize = 32, 953 .dcache_bsize = 32, 954 .num_pmcs = 6, 955 .pmc_type = PPC_PMC_G4, 956 .cpu_setup = __setup_cpu_745x, 957 .oprofile_cpu_type = "ppc/7450", 958 .oprofile_type = PPC_OPROFILE_G4, 959 .machine_check = machine_check_generic, 960 .platform = "ppc7450", 961 }, 962 { /* 7447/7457 Rev 1.0 */ 963 .pvr_mask = 0xffffffff, 964 .pvr_value = 0x80020100, 965 .cpu_name = "7447/7457", 966 .cpu_features = CPU_FTRS_7447_10, 967 .cpu_user_features = COMMON_USER | 968 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 969 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 970 .icache_bsize = 32, 971 .dcache_bsize = 32, 972 .num_pmcs = 6, 973 .pmc_type = PPC_PMC_G4, 974 .cpu_setup = __setup_cpu_745x, 975 .oprofile_cpu_type = "ppc/7450", 976 .oprofile_type = PPC_OPROFILE_G4, 977 .machine_check = machine_check_generic, 978 .platform = "ppc7450", 979 }, 980 { /* 7447/7457 Rev 1.1 */ 981 .pvr_mask = 0xffffffff, 982 .pvr_value = 0x80020101, 983 .cpu_name = "7447/7457", 984 .cpu_features = CPU_FTRS_7447_10, 985 .cpu_user_features = COMMON_USER | 986 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 987 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 988 .icache_bsize = 32, 989 .dcache_bsize = 32, 990 .num_pmcs = 6, 991 .pmc_type = PPC_PMC_G4, 992 .cpu_setup = __setup_cpu_745x, 993 .oprofile_cpu_type = "ppc/7450", 994 .oprofile_type = PPC_OPROFILE_G4, 995 .machine_check = machine_check_generic, 996 .platform = "ppc7450", 997 }, 998 { /* 7447/7457 Rev 1.2 and later */ 999 .pvr_mask = 0xffff0000, 1000 .pvr_value = 0x80020000, 1001 .cpu_name = "7447/7457", 1002 .cpu_features = CPU_FTRS_7447, 1003 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1004 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1005 .icache_bsize = 32, 1006 .dcache_bsize = 32, 1007 .num_pmcs = 6, 1008 .pmc_type = PPC_PMC_G4, 1009 .cpu_setup = __setup_cpu_745x, 1010 .oprofile_cpu_type = "ppc/7450", 1011 .oprofile_type = PPC_OPROFILE_G4, 1012 .machine_check = machine_check_generic, 1013 .platform = "ppc7450", 1014 }, 1015 { /* 7447A */ 1016 .pvr_mask = 0xffff0000, 1017 .pvr_value = 0x80030000, 1018 .cpu_name = "7447A", 1019 .cpu_features = CPU_FTRS_7447A, 1020 .cpu_user_features = COMMON_USER | 1021 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1022 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1023 .icache_bsize = 32, 1024 .dcache_bsize = 32, 1025 .num_pmcs = 6, 1026 .pmc_type = PPC_PMC_G4, 1027 .cpu_setup = __setup_cpu_745x, 1028 .oprofile_cpu_type = "ppc/7450", 1029 .oprofile_type = PPC_OPROFILE_G4, 1030 .machine_check = machine_check_generic, 1031 .platform = "ppc7450", 1032 }, 1033 { /* 7448 */ 1034 .pvr_mask = 0xffff0000, 1035 .pvr_value = 0x80040000, 1036 .cpu_name = "7448", 1037 .cpu_features = CPU_FTRS_7448, 1038 .cpu_user_features = COMMON_USER | 1039 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1040 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1041 .icache_bsize = 32, 1042 .dcache_bsize = 32, 1043 .num_pmcs = 6, 1044 .pmc_type = PPC_PMC_G4, 1045 .cpu_setup = __setup_cpu_745x, 1046 .oprofile_cpu_type = "ppc/7450", 1047 .oprofile_type = PPC_OPROFILE_G4, 1048 .machine_check = machine_check_generic, 1049 .platform = "ppc7450", 1050 }, 1051 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1052 .pvr_mask = 0x7fff0000, 1053 .pvr_value = 0x00810000, 1054 .cpu_name = "82xx", 1055 .cpu_features = CPU_FTRS_82XX, 1056 .cpu_user_features = COMMON_USER, 1057 .mmu_features = 0, 1058 .icache_bsize = 32, 1059 .dcache_bsize = 32, 1060 .cpu_setup = __setup_cpu_603, 1061 .machine_check = machine_check_generic, 1062 .platform = "ppc603", 1063 }, 1064 { /* All G2_LE (603e core, plus some) have the same pvr */ 1065 .pvr_mask = 0x7fff0000, 1066 .pvr_value = 0x00820000, 1067 .cpu_name = "G2_LE", 1068 .cpu_features = CPU_FTRS_G2_LE, 1069 .cpu_user_features = COMMON_USER, 1070 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1071 .icache_bsize = 32, 1072 .dcache_bsize = 32, 1073 .cpu_setup = __setup_cpu_603, 1074 .machine_check = machine_check_generic, 1075 .platform = "ppc603", 1076 }, 1077 { /* e300c1 (a 603e core, plus some) on 83xx */ 1078 .pvr_mask = 0x7fff0000, 1079 .pvr_value = 0x00830000, 1080 .cpu_name = "e300c1", 1081 .cpu_features = CPU_FTRS_E300, 1082 .cpu_user_features = COMMON_USER, 1083 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1084 .icache_bsize = 32, 1085 .dcache_bsize = 32, 1086 .cpu_setup = __setup_cpu_603, 1087 .machine_check = machine_check_generic, 1088 .platform = "ppc603", 1089 }, 1090 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1091 .pvr_mask = 0x7fff0000, 1092 .pvr_value = 0x00840000, 1093 .cpu_name = "e300c2", 1094 .cpu_features = CPU_FTRS_E300C2, 1095 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1096 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1097 MMU_FTR_NEED_DTLB_SW_LRU, 1098 .icache_bsize = 32, 1099 .dcache_bsize = 32, 1100 .cpu_setup = __setup_cpu_603, 1101 .machine_check = machine_check_generic, 1102 .platform = "ppc603", 1103 }, 1104 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1105 .pvr_mask = 0x7fff0000, 1106 .pvr_value = 0x00850000, 1107 .cpu_name = "e300c3", 1108 .cpu_features = CPU_FTRS_E300, 1109 .cpu_user_features = COMMON_USER, 1110 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1111 MMU_FTR_NEED_DTLB_SW_LRU, 1112 .icache_bsize = 32, 1113 .dcache_bsize = 32, 1114 .cpu_setup = __setup_cpu_603, 1115 .num_pmcs = 4, 1116 .oprofile_cpu_type = "ppc/e300", 1117 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1118 .platform = "ppc603", 1119 }, 1120 { /* e300c4 (e300c1, plus one IU) */ 1121 .pvr_mask = 0x7fff0000, 1122 .pvr_value = 0x00860000, 1123 .cpu_name = "e300c4", 1124 .cpu_features = CPU_FTRS_E300, 1125 .cpu_user_features = COMMON_USER, 1126 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1127 MMU_FTR_NEED_DTLB_SW_LRU, 1128 .icache_bsize = 32, 1129 .dcache_bsize = 32, 1130 .cpu_setup = __setup_cpu_603, 1131 .machine_check = machine_check_generic, 1132 .num_pmcs = 4, 1133 .oprofile_cpu_type = "ppc/e300", 1134 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1135 .platform = "ppc603", 1136 }, 1137 { /* default match, we assume split I/D cache & TB (non-601)... */ 1138 .pvr_mask = 0x00000000, 1139 .pvr_value = 0x00000000, 1140 .cpu_name = "(generic PPC)", 1141 .cpu_features = CPU_FTRS_CLASSIC32, 1142 .cpu_user_features = COMMON_USER, 1143 .mmu_features = MMU_FTR_HPTE_TABLE, 1144 .icache_bsize = 32, 1145 .dcache_bsize = 32, 1146 .machine_check = machine_check_generic, 1147 .platform = "ppc603", 1148 }, 1149 #endif /* CLASSIC_PPC */ 1150 #ifdef CONFIG_8xx 1151 { /* 8xx */ 1152 .pvr_mask = 0xffff0000, 1153 .pvr_value = 0x00500000, 1154 .cpu_name = "8xx", 1155 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1156 * if the 8xx code is there.... */ 1157 .cpu_features = CPU_FTRS_8XX, 1158 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1159 .mmu_features = MMU_FTR_TYPE_8xx, 1160 .icache_bsize = 16, 1161 .dcache_bsize = 16, 1162 .platform = "ppc823", 1163 }, 1164 #endif /* CONFIG_8xx */ 1165 #ifdef CONFIG_40x 1166 { /* 403GC */ 1167 .pvr_mask = 0xffffff00, 1168 .pvr_value = 0x00200200, 1169 .cpu_name = "403GC", 1170 .cpu_features = CPU_FTRS_40X, 1171 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1172 .mmu_features = MMU_FTR_TYPE_40x, 1173 .icache_bsize = 16, 1174 .dcache_bsize = 16, 1175 .machine_check = machine_check_4xx, 1176 .platform = "ppc403", 1177 }, 1178 { /* 403GCX */ 1179 .pvr_mask = 0xffffff00, 1180 .pvr_value = 0x00201400, 1181 .cpu_name = "403GCX", 1182 .cpu_features = CPU_FTRS_40X, 1183 .cpu_user_features = PPC_FEATURE_32 | 1184 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1185 .mmu_features = MMU_FTR_TYPE_40x, 1186 .icache_bsize = 16, 1187 .dcache_bsize = 16, 1188 .machine_check = machine_check_4xx, 1189 .platform = "ppc403", 1190 }, 1191 { /* 403G ?? */ 1192 .pvr_mask = 0xffff0000, 1193 .pvr_value = 0x00200000, 1194 .cpu_name = "403G ??", 1195 .cpu_features = CPU_FTRS_40X, 1196 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1197 .mmu_features = MMU_FTR_TYPE_40x, 1198 .icache_bsize = 16, 1199 .dcache_bsize = 16, 1200 .machine_check = machine_check_4xx, 1201 .platform = "ppc403", 1202 }, 1203 { /* 405GP */ 1204 .pvr_mask = 0xffff0000, 1205 .pvr_value = 0x40110000, 1206 .cpu_name = "405GP", 1207 .cpu_features = CPU_FTRS_40X, 1208 .cpu_user_features = PPC_FEATURE_32 | 1209 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1210 .mmu_features = MMU_FTR_TYPE_40x, 1211 .icache_bsize = 32, 1212 .dcache_bsize = 32, 1213 .machine_check = machine_check_4xx, 1214 .platform = "ppc405", 1215 }, 1216 { /* STB 03xxx */ 1217 .pvr_mask = 0xffff0000, 1218 .pvr_value = 0x40130000, 1219 .cpu_name = "STB03xxx", 1220 .cpu_features = CPU_FTRS_40X, 1221 .cpu_user_features = PPC_FEATURE_32 | 1222 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1223 .mmu_features = MMU_FTR_TYPE_40x, 1224 .icache_bsize = 32, 1225 .dcache_bsize = 32, 1226 .machine_check = machine_check_4xx, 1227 .platform = "ppc405", 1228 }, 1229 { /* STB 04xxx */ 1230 .pvr_mask = 0xffff0000, 1231 .pvr_value = 0x41810000, 1232 .cpu_name = "STB04xxx", 1233 .cpu_features = CPU_FTRS_40X, 1234 .cpu_user_features = PPC_FEATURE_32 | 1235 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1236 .mmu_features = MMU_FTR_TYPE_40x, 1237 .icache_bsize = 32, 1238 .dcache_bsize = 32, 1239 .machine_check = machine_check_4xx, 1240 .platform = "ppc405", 1241 }, 1242 { /* NP405L */ 1243 .pvr_mask = 0xffff0000, 1244 .pvr_value = 0x41610000, 1245 .cpu_name = "NP405L", 1246 .cpu_features = CPU_FTRS_40X, 1247 .cpu_user_features = PPC_FEATURE_32 | 1248 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1249 .mmu_features = MMU_FTR_TYPE_40x, 1250 .icache_bsize = 32, 1251 .dcache_bsize = 32, 1252 .machine_check = machine_check_4xx, 1253 .platform = "ppc405", 1254 }, 1255 { /* NP4GS3 */ 1256 .pvr_mask = 0xffff0000, 1257 .pvr_value = 0x40B10000, 1258 .cpu_name = "NP4GS3", 1259 .cpu_features = CPU_FTRS_40X, 1260 .cpu_user_features = PPC_FEATURE_32 | 1261 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1262 .mmu_features = MMU_FTR_TYPE_40x, 1263 .icache_bsize = 32, 1264 .dcache_bsize = 32, 1265 .machine_check = machine_check_4xx, 1266 .platform = "ppc405", 1267 }, 1268 { /* NP405H */ 1269 .pvr_mask = 0xffff0000, 1270 .pvr_value = 0x41410000, 1271 .cpu_name = "NP405H", 1272 .cpu_features = CPU_FTRS_40X, 1273 .cpu_user_features = PPC_FEATURE_32 | 1274 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1275 .mmu_features = MMU_FTR_TYPE_40x, 1276 .icache_bsize = 32, 1277 .dcache_bsize = 32, 1278 .machine_check = machine_check_4xx, 1279 .platform = "ppc405", 1280 }, 1281 { /* 405GPr */ 1282 .pvr_mask = 0xffff0000, 1283 .pvr_value = 0x50910000, 1284 .cpu_name = "405GPr", 1285 .cpu_features = CPU_FTRS_40X, 1286 .cpu_user_features = PPC_FEATURE_32 | 1287 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1288 .mmu_features = MMU_FTR_TYPE_40x, 1289 .icache_bsize = 32, 1290 .dcache_bsize = 32, 1291 .machine_check = machine_check_4xx, 1292 .platform = "ppc405", 1293 }, 1294 { /* STBx25xx */ 1295 .pvr_mask = 0xffff0000, 1296 .pvr_value = 0x51510000, 1297 .cpu_name = "STBx25xx", 1298 .cpu_features = CPU_FTRS_40X, 1299 .cpu_user_features = PPC_FEATURE_32 | 1300 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1301 .mmu_features = MMU_FTR_TYPE_40x, 1302 .icache_bsize = 32, 1303 .dcache_bsize = 32, 1304 .machine_check = machine_check_4xx, 1305 .platform = "ppc405", 1306 }, 1307 { /* 405LP */ 1308 .pvr_mask = 0xffff0000, 1309 .pvr_value = 0x41F10000, 1310 .cpu_name = "405LP", 1311 .cpu_features = CPU_FTRS_40X, 1312 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1313 .mmu_features = MMU_FTR_TYPE_40x, 1314 .icache_bsize = 32, 1315 .dcache_bsize = 32, 1316 .machine_check = machine_check_4xx, 1317 .platform = "ppc405", 1318 }, 1319 { /* Xilinx Virtex-II Pro */ 1320 .pvr_mask = 0xfffff000, 1321 .pvr_value = 0x20010000, 1322 .cpu_name = "Virtex-II Pro", 1323 .cpu_features = CPU_FTRS_40X, 1324 .cpu_user_features = PPC_FEATURE_32 | 1325 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1326 .mmu_features = MMU_FTR_TYPE_40x, 1327 .icache_bsize = 32, 1328 .dcache_bsize = 32, 1329 .machine_check = machine_check_4xx, 1330 .platform = "ppc405", 1331 }, 1332 { /* Xilinx Virtex-4 FX */ 1333 .pvr_mask = 0xfffff000, 1334 .pvr_value = 0x20011000, 1335 .cpu_name = "Virtex-4 FX", 1336 .cpu_features = CPU_FTRS_40X, 1337 .cpu_user_features = PPC_FEATURE_32 | 1338 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1339 .mmu_features = MMU_FTR_TYPE_40x, 1340 .icache_bsize = 32, 1341 .dcache_bsize = 32, 1342 .machine_check = machine_check_4xx, 1343 .platform = "ppc405", 1344 }, 1345 { /* 405EP */ 1346 .pvr_mask = 0xffff0000, 1347 .pvr_value = 0x51210000, 1348 .cpu_name = "405EP", 1349 .cpu_features = CPU_FTRS_40X, 1350 .cpu_user_features = PPC_FEATURE_32 | 1351 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1352 .mmu_features = MMU_FTR_TYPE_40x, 1353 .icache_bsize = 32, 1354 .dcache_bsize = 32, 1355 .machine_check = machine_check_4xx, 1356 .platform = "ppc405", 1357 }, 1358 { /* 405EX */ 1359 .pvr_mask = 0xffff0004, 1360 .pvr_value = 0x12910004, 1361 .cpu_name = "405EX", 1362 .cpu_features = CPU_FTRS_40X, 1363 .cpu_user_features = PPC_FEATURE_32 | 1364 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1365 .mmu_features = MMU_FTR_TYPE_40x, 1366 .icache_bsize = 32, 1367 .dcache_bsize = 32, 1368 .machine_check = machine_check_4xx, 1369 .platform = "ppc405", 1370 }, 1371 { /* 405EXr */ 1372 .pvr_mask = 0xffff0004, 1373 .pvr_value = 0x12910000, 1374 .cpu_name = "405EXr", 1375 .cpu_features = CPU_FTRS_40X, 1376 .cpu_user_features = PPC_FEATURE_32 | 1377 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1378 .mmu_features = MMU_FTR_TYPE_40x, 1379 .icache_bsize = 32, 1380 .dcache_bsize = 32, 1381 .machine_check = machine_check_4xx, 1382 .platform = "ppc405", 1383 }, 1384 { 1385 /* 405EZ */ 1386 .pvr_mask = 0xffff0000, 1387 .pvr_value = 0x41510000, 1388 .cpu_name = "405EZ", 1389 .cpu_features = CPU_FTRS_40X, 1390 .cpu_user_features = PPC_FEATURE_32 | 1391 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1392 .mmu_features = MMU_FTR_TYPE_40x, 1393 .icache_bsize = 32, 1394 .dcache_bsize = 32, 1395 .machine_check = machine_check_4xx, 1396 .platform = "ppc405", 1397 }, 1398 { /* default match */ 1399 .pvr_mask = 0x00000000, 1400 .pvr_value = 0x00000000, 1401 .cpu_name = "(generic 40x PPC)", 1402 .cpu_features = CPU_FTRS_40X, 1403 .cpu_user_features = PPC_FEATURE_32 | 1404 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1405 .mmu_features = MMU_FTR_TYPE_40x, 1406 .icache_bsize = 32, 1407 .dcache_bsize = 32, 1408 .machine_check = machine_check_4xx, 1409 .platform = "ppc405", 1410 } 1411 1412 #endif /* CONFIG_40x */ 1413 #ifdef CONFIG_44x 1414 { 1415 .pvr_mask = 0xf0000fff, 1416 .pvr_value = 0x40000850, 1417 .cpu_name = "440GR Rev. A", 1418 .cpu_features = CPU_FTRS_44X, 1419 .cpu_user_features = COMMON_USER_BOOKE, 1420 .mmu_features = MMU_FTR_TYPE_44x, 1421 .icache_bsize = 32, 1422 .dcache_bsize = 32, 1423 .machine_check = machine_check_4xx, 1424 .platform = "ppc440", 1425 }, 1426 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1427 .pvr_mask = 0xf0000fff, 1428 .pvr_value = 0x40000858, 1429 .cpu_name = "440EP Rev. A", 1430 .cpu_features = CPU_FTRS_44X, 1431 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1432 .mmu_features = MMU_FTR_TYPE_44x, 1433 .icache_bsize = 32, 1434 .dcache_bsize = 32, 1435 .cpu_setup = __setup_cpu_440ep, 1436 .machine_check = machine_check_4xx, 1437 .platform = "ppc440", 1438 }, 1439 { 1440 .pvr_mask = 0xf0000fff, 1441 .pvr_value = 0x400008d3, 1442 .cpu_name = "440GR Rev. B", 1443 .cpu_features = CPU_FTRS_44X, 1444 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1445 .mmu_features = MMU_FTR_TYPE_44x, 1446 .icache_bsize = 32, 1447 .dcache_bsize = 32, 1448 .machine_check = machine_check_4xx, 1449 .platform = "ppc440", 1450 }, 1451 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1452 .pvr_mask = 0xf0000ff7, 1453 .pvr_value = 0x400008d4, 1454 .cpu_name = "440EP Rev. C", 1455 .cpu_features = CPU_FTRS_44X, 1456 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1457 .mmu_features = MMU_FTR_TYPE_44x, 1458 .icache_bsize = 32, 1459 .dcache_bsize = 32, 1460 .cpu_setup = __setup_cpu_440ep, 1461 .machine_check = machine_check_4xx, 1462 .platform = "ppc440", 1463 }, 1464 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1465 .pvr_mask = 0xf0000fff, 1466 .pvr_value = 0x400008db, 1467 .cpu_name = "440EP Rev. B", 1468 .cpu_features = CPU_FTRS_44X, 1469 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1470 .mmu_features = MMU_FTR_TYPE_44x, 1471 .icache_bsize = 32, 1472 .dcache_bsize = 32, 1473 .cpu_setup = __setup_cpu_440ep, 1474 .machine_check = machine_check_4xx, 1475 .platform = "ppc440", 1476 }, 1477 { /* 440GRX */ 1478 .pvr_mask = 0xf0000ffb, 1479 .pvr_value = 0x200008D0, 1480 .cpu_name = "440GRX", 1481 .cpu_features = CPU_FTRS_44X, 1482 .cpu_user_features = COMMON_USER_BOOKE, 1483 .mmu_features = MMU_FTR_TYPE_44x, 1484 .icache_bsize = 32, 1485 .dcache_bsize = 32, 1486 .cpu_setup = __setup_cpu_440grx, 1487 .machine_check = machine_check_440A, 1488 .platform = "ppc440", 1489 }, 1490 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1491 .pvr_mask = 0xf0000ffb, 1492 .pvr_value = 0x200008D8, 1493 .cpu_name = "440EPX", 1494 .cpu_features = CPU_FTRS_44X, 1495 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1496 .mmu_features = MMU_FTR_TYPE_44x, 1497 .icache_bsize = 32, 1498 .dcache_bsize = 32, 1499 .cpu_setup = __setup_cpu_440epx, 1500 .machine_check = machine_check_440A, 1501 .platform = "ppc440", 1502 }, 1503 { /* 440GP Rev. B */ 1504 .pvr_mask = 0xf0000fff, 1505 .pvr_value = 0x40000440, 1506 .cpu_name = "440GP Rev. B", 1507 .cpu_features = CPU_FTRS_44X, 1508 .cpu_user_features = COMMON_USER_BOOKE, 1509 .mmu_features = MMU_FTR_TYPE_44x, 1510 .icache_bsize = 32, 1511 .dcache_bsize = 32, 1512 .machine_check = machine_check_4xx, 1513 .platform = "ppc440gp", 1514 }, 1515 { /* 440GP Rev. C */ 1516 .pvr_mask = 0xf0000fff, 1517 .pvr_value = 0x40000481, 1518 .cpu_name = "440GP Rev. C", 1519 .cpu_features = CPU_FTRS_44X, 1520 .cpu_user_features = COMMON_USER_BOOKE, 1521 .mmu_features = MMU_FTR_TYPE_44x, 1522 .icache_bsize = 32, 1523 .dcache_bsize = 32, 1524 .machine_check = machine_check_4xx, 1525 .platform = "ppc440gp", 1526 }, 1527 { /* 440GX Rev. A */ 1528 .pvr_mask = 0xf0000fff, 1529 .pvr_value = 0x50000850, 1530 .cpu_name = "440GX Rev. A", 1531 .cpu_features = CPU_FTRS_44X, 1532 .cpu_user_features = COMMON_USER_BOOKE, 1533 .mmu_features = MMU_FTR_TYPE_44x, 1534 .icache_bsize = 32, 1535 .dcache_bsize = 32, 1536 .cpu_setup = __setup_cpu_440gx, 1537 .machine_check = machine_check_440A, 1538 .platform = "ppc440", 1539 }, 1540 { /* 440GX Rev. B */ 1541 .pvr_mask = 0xf0000fff, 1542 .pvr_value = 0x50000851, 1543 .cpu_name = "440GX Rev. B", 1544 .cpu_features = CPU_FTRS_44X, 1545 .cpu_user_features = COMMON_USER_BOOKE, 1546 .mmu_features = MMU_FTR_TYPE_44x, 1547 .icache_bsize = 32, 1548 .dcache_bsize = 32, 1549 .cpu_setup = __setup_cpu_440gx, 1550 .machine_check = machine_check_440A, 1551 .platform = "ppc440", 1552 }, 1553 { /* 440GX Rev. C */ 1554 .pvr_mask = 0xf0000fff, 1555 .pvr_value = 0x50000892, 1556 .cpu_name = "440GX Rev. C", 1557 .cpu_features = CPU_FTRS_44X, 1558 .cpu_user_features = COMMON_USER_BOOKE, 1559 .mmu_features = MMU_FTR_TYPE_44x, 1560 .icache_bsize = 32, 1561 .dcache_bsize = 32, 1562 .cpu_setup = __setup_cpu_440gx, 1563 .machine_check = machine_check_440A, 1564 .platform = "ppc440", 1565 }, 1566 { /* 440GX Rev. F */ 1567 .pvr_mask = 0xf0000fff, 1568 .pvr_value = 0x50000894, 1569 .cpu_name = "440GX Rev. F", 1570 .cpu_features = CPU_FTRS_44X, 1571 .cpu_user_features = COMMON_USER_BOOKE, 1572 .mmu_features = MMU_FTR_TYPE_44x, 1573 .icache_bsize = 32, 1574 .dcache_bsize = 32, 1575 .cpu_setup = __setup_cpu_440gx, 1576 .machine_check = machine_check_440A, 1577 .platform = "ppc440", 1578 }, 1579 { /* 440SP Rev. A */ 1580 .pvr_mask = 0xfff00fff, 1581 .pvr_value = 0x53200891, 1582 .cpu_name = "440SP Rev. A", 1583 .cpu_features = CPU_FTRS_44X, 1584 .cpu_user_features = COMMON_USER_BOOKE, 1585 .mmu_features = MMU_FTR_TYPE_44x, 1586 .icache_bsize = 32, 1587 .dcache_bsize = 32, 1588 .machine_check = machine_check_4xx, 1589 .platform = "ppc440", 1590 }, 1591 { /* 440SPe Rev. A */ 1592 .pvr_mask = 0xfff00fff, 1593 .pvr_value = 0x53400890, 1594 .cpu_name = "440SPe Rev. A", 1595 .cpu_features = CPU_FTRS_44X, 1596 .cpu_user_features = COMMON_USER_BOOKE, 1597 .mmu_features = MMU_FTR_TYPE_44x, 1598 .icache_bsize = 32, 1599 .dcache_bsize = 32, 1600 .cpu_setup = __setup_cpu_440spe, 1601 .machine_check = machine_check_440A, 1602 .platform = "ppc440", 1603 }, 1604 { /* 440SPe Rev. B */ 1605 .pvr_mask = 0xfff00fff, 1606 .pvr_value = 0x53400891, 1607 .cpu_name = "440SPe Rev. B", 1608 .cpu_features = CPU_FTRS_44X, 1609 .cpu_user_features = COMMON_USER_BOOKE, 1610 .mmu_features = MMU_FTR_TYPE_44x, 1611 .icache_bsize = 32, 1612 .dcache_bsize = 32, 1613 .cpu_setup = __setup_cpu_440spe, 1614 .machine_check = machine_check_440A, 1615 .platform = "ppc440", 1616 }, 1617 { /* 440 in Xilinx Virtex-5 FXT */ 1618 .pvr_mask = 0xfffffff0, 1619 .pvr_value = 0x7ff21910, 1620 .cpu_name = "440 in Virtex-5 FXT", 1621 .cpu_features = CPU_FTRS_44X, 1622 .cpu_user_features = COMMON_USER_BOOKE, 1623 .mmu_features = MMU_FTR_TYPE_44x, 1624 .icache_bsize = 32, 1625 .dcache_bsize = 32, 1626 .cpu_setup = __setup_cpu_440x5, 1627 .machine_check = machine_check_440A, 1628 .platform = "ppc440", 1629 }, 1630 { /* 460EX */ 1631 .pvr_mask = 0xffff0002, 1632 .pvr_value = 0x13020002, 1633 .cpu_name = "460EX", 1634 .cpu_features = CPU_FTRS_440x6, 1635 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1636 .mmu_features = MMU_FTR_TYPE_44x, 1637 .icache_bsize = 32, 1638 .dcache_bsize = 32, 1639 .cpu_setup = __setup_cpu_460ex, 1640 .machine_check = machine_check_440A, 1641 .platform = "ppc440", 1642 }, 1643 { /* 460GT */ 1644 .pvr_mask = 0xffff0002, 1645 .pvr_value = 0x13020000, 1646 .cpu_name = "460GT", 1647 .cpu_features = CPU_FTRS_440x6, 1648 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1649 .mmu_features = MMU_FTR_TYPE_44x, 1650 .icache_bsize = 32, 1651 .dcache_bsize = 32, 1652 .cpu_setup = __setup_cpu_460gt, 1653 .machine_check = machine_check_440A, 1654 .platform = "ppc440", 1655 }, 1656 { /* 460SX */ 1657 .pvr_mask = 0xffffff00, 1658 .pvr_value = 0x13541800, 1659 .cpu_name = "460SX", 1660 .cpu_features = CPU_FTRS_44X, 1661 .cpu_user_features = COMMON_USER_BOOKE, 1662 .mmu_features = MMU_FTR_TYPE_44x, 1663 .icache_bsize = 32, 1664 .dcache_bsize = 32, 1665 .cpu_setup = __setup_cpu_460sx, 1666 .machine_check = machine_check_440A, 1667 .platform = "ppc440", 1668 }, 1669 { /* default match */ 1670 .pvr_mask = 0x00000000, 1671 .pvr_value = 0x00000000, 1672 .cpu_name = "(generic 44x PPC)", 1673 .cpu_features = CPU_FTRS_44X, 1674 .cpu_user_features = COMMON_USER_BOOKE, 1675 .mmu_features = MMU_FTR_TYPE_44x, 1676 .icache_bsize = 32, 1677 .dcache_bsize = 32, 1678 .machine_check = machine_check_4xx, 1679 .platform = "ppc440", 1680 } 1681 #endif /* CONFIG_44x */ 1682 #ifdef CONFIG_E200 1683 { /* e200z5 */ 1684 .pvr_mask = 0xfff00000, 1685 .pvr_value = 0x81000000, 1686 .cpu_name = "e200z5", 1687 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1688 .cpu_features = CPU_FTRS_E200, 1689 .cpu_user_features = COMMON_USER_BOOKE | 1690 PPC_FEATURE_HAS_EFP_SINGLE | 1691 PPC_FEATURE_UNIFIED_CACHE, 1692 .mmu_features = MMU_FTR_TYPE_FSL_E, 1693 .dcache_bsize = 32, 1694 .machine_check = machine_check_e200, 1695 .platform = "ppc5554", 1696 }, 1697 { /* e200z6 */ 1698 .pvr_mask = 0xfff00000, 1699 .pvr_value = 0x81100000, 1700 .cpu_name = "e200z6", 1701 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1702 .cpu_features = CPU_FTRS_E200, 1703 .cpu_user_features = COMMON_USER_BOOKE | 1704 PPC_FEATURE_HAS_SPE_COMP | 1705 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1706 PPC_FEATURE_UNIFIED_CACHE, 1707 .mmu_features = MMU_FTR_TYPE_FSL_E, 1708 .dcache_bsize = 32, 1709 .machine_check = machine_check_e200, 1710 .platform = "ppc5554", 1711 }, 1712 { /* default match */ 1713 .pvr_mask = 0x00000000, 1714 .pvr_value = 0x00000000, 1715 .cpu_name = "(generic E200 PPC)", 1716 .cpu_features = CPU_FTRS_E200, 1717 .cpu_user_features = COMMON_USER_BOOKE | 1718 PPC_FEATURE_HAS_EFP_SINGLE | 1719 PPC_FEATURE_UNIFIED_CACHE, 1720 .mmu_features = MMU_FTR_TYPE_FSL_E, 1721 .dcache_bsize = 32, 1722 .cpu_setup = __setup_cpu_e200, 1723 .machine_check = machine_check_e200, 1724 .platform = "ppc5554", 1725 } 1726 #endif /* CONFIG_E200 */ 1727 #ifdef CONFIG_E500 1728 { /* e500 */ 1729 .pvr_mask = 0xffff0000, 1730 .pvr_value = 0x80200000, 1731 .cpu_name = "e500", 1732 .cpu_features = CPU_FTRS_E500, 1733 .cpu_user_features = COMMON_USER_BOOKE | 1734 PPC_FEATURE_HAS_SPE_COMP | 1735 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1736 .mmu_features = MMU_FTR_TYPE_FSL_E, 1737 .icache_bsize = 32, 1738 .dcache_bsize = 32, 1739 .num_pmcs = 4, 1740 .oprofile_cpu_type = "ppc/e500", 1741 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1742 .cpu_setup = __setup_cpu_e500v1, 1743 .machine_check = machine_check_e500, 1744 .platform = "ppc8540", 1745 }, 1746 { /* e500v2 */ 1747 .pvr_mask = 0xffff0000, 1748 .pvr_value = 0x80210000, 1749 .cpu_name = "e500v2", 1750 .cpu_features = CPU_FTRS_E500_2, 1751 .cpu_user_features = COMMON_USER_BOOKE | 1752 PPC_FEATURE_HAS_SPE_COMP | 1753 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1754 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1755 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1756 .icache_bsize = 32, 1757 .dcache_bsize = 32, 1758 .num_pmcs = 4, 1759 .oprofile_cpu_type = "ppc/e500", 1760 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1761 .cpu_setup = __setup_cpu_e500v2, 1762 .machine_check = machine_check_e500, 1763 .platform = "ppc8548", 1764 }, 1765 { /* e500mc */ 1766 .pvr_mask = 0xffff0000, 1767 .pvr_value = 0x80230000, 1768 .cpu_name = "e500mc", 1769 .cpu_features = CPU_FTRS_E500MC, 1770 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1771 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1772 MMU_FTR_USE_TLBILX, 1773 .icache_bsize = 64, 1774 .dcache_bsize = 64, 1775 .num_pmcs = 4, 1776 .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ 1777 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1778 .cpu_setup = __setup_cpu_e500mc, 1779 .machine_check = machine_check_e500, 1780 .platform = "ppce500mc", 1781 }, 1782 { /* default match */ 1783 .pvr_mask = 0x00000000, 1784 .pvr_value = 0x00000000, 1785 .cpu_name = "(generic E500 PPC)", 1786 .cpu_features = CPU_FTRS_E500, 1787 .cpu_user_features = COMMON_USER_BOOKE | 1788 PPC_FEATURE_HAS_SPE_COMP | 1789 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1790 .mmu_features = MMU_FTR_TYPE_FSL_E, 1791 .icache_bsize = 32, 1792 .dcache_bsize = 32, 1793 .machine_check = machine_check_e500, 1794 .platform = "powerpc", 1795 } 1796 #endif /* CONFIG_E500 */ 1797 #endif /* CONFIG_PPC32 */ 1798 }; 1799 1800 static struct cpu_spec the_cpu_spec; 1801 1802 static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s) 1803 { 1804 struct cpu_spec *t = &the_cpu_spec; 1805 struct cpu_spec old; 1806 1807 t = PTRRELOC(t); 1808 old = *t; 1809 1810 /* Copy everything, then do fixups */ 1811 *t = *s; 1812 1813 /* 1814 * If we are overriding a previous value derived from the real 1815 * PVR with a new value obtained using a logical PVR value, 1816 * don't modify the performance monitor fields. 1817 */ 1818 if (old.num_pmcs && !s->num_pmcs) { 1819 t->num_pmcs = old.num_pmcs; 1820 t->pmc_type = old.pmc_type; 1821 t->oprofile_type = old.oprofile_type; 1822 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 1823 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 1824 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 1825 1826 /* 1827 * If we have passed through this logic once before and 1828 * have pulled the default case because the real PVR was 1829 * not found inside cpu_specs[], then we are possibly 1830 * running in compatibility mode. In that case, let the 1831 * oprofiler know which set of compatibility counters to 1832 * pull from by making sure the oprofile_cpu_type string 1833 * is set to that of compatibility mode. If the 1834 * oprofile_cpu_type already has a value, then we are 1835 * possibly overriding a real PVR with a logical one, 1836 * and, in that case, keep the current value for 1837 * oprofile_cpu_type. 1838 */ 1839 if (old.oprofile_cpu_type == NULL) { 1840 t->oprofile_cpu_type = old.oprofile_cpu_type; 1841 t->oprofile_type = old.oprofile_type; 1842 } 1843 } 1844 1845 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 1846 1847 /* 1848 * Set the base platform string once; assumes 1849 * we're called with real pvr first. 1850 */ 1851 if (*PTRRELOC(&powerpc_base_platform) == NULL) 1852 *PTRRELOC(&powerpc_base_platform) = t->platform; 1853 1854 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 1855 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 1856 * that processor. I will consolidate that at a later time, for now, 1857 * just use #ifdef. We also don't need to PTRRELOC the function 1858 * pointer on ppc64 and booke as we are running at 0 in real mode 1859 * on ppc64 and reloc_offset is always 0 on booke. 1860 */ 1861 if (s->cpu_setup) { 1862 s->cpu_setup(offset, s); 1863 } 1864 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 1865 } 1866 1867 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 1868 { 1869 struct cpu_spec *s = cpu_specs; 1870 int i; 1871 1872 s = PTRRELOC(s); 1873 1874 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 1875 if ((pvr & s->pvr_mask) == s->pvr_value) { 1876 setup_cpu_spec(offset, s); 1877 return s; 1878 } 1879 } 1880 1881 BUG(); 1882 1883 return NULL; 1884 } 1885