1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/export.h> 18 #include <linux/jump_label.h> 19 20 #include <asm/oprofile_impl.h> 21 #include <asm/cputable.h> 22 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 23 #include <asm/mmu.h> 24 #include <asm/setup.h> 25 26 static struct cpu_spec the_cpu_spec __read_mostly; 27 28 struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 29 EXPORT_SYMBOL(cur_cpu_spec); 30 31 /* The platform string corresponding to the real PVR */ 32 const char *powerpc_base_platform; 33 34 /* NOTE: 35 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 36 * the responsibility of the appropriate CPU save/restore functions to 37 * eventually copy these settings over. Those save/restore aren't yet 38 * part of the cputable though. That has to be fixed for both ppc32 39 * and ppc64 40 */ 41 #ifdef CONFIG_PPC32 42 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 51 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 52 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 55 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 56 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 60 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 61 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 62 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 64 #endif /* CONFIG_PPC32 */ 65 #ifdef CONFIG_PPC64 66 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 67 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 68 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 69 extern void __restore_cpu_pa6t(void); 70 extern void __restore_cpu_ppc970(void); 71 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 72 extern void __restore_cpu_power7(void); 73 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 74 extern void __restore_cpu_power8(void); 75 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); 76 extern void __restore_cpu_power9(void); 77 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 78 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 79 extern long __machine_check_early_realmode_p9(struct pt_regs *regs); 80 #endif /* CONFIG_PPC64 */ 81 #if defined(CONFIG_E500) 82 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 83 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 84 extern void __restore_cpu_e5500(void); 85 extern void __restore_cpu_e6500(void); 86 #endif /* CONFIG_E500 */ 87 88 /* This table only contains "desktop" CPUs, it need to be filled with embedded 89 * ones as well... 90 */ 91 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 92 PPC_FEATURE_HAS_MMU) 93 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 94 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 95 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 97 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 99 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 100 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 101 PPC_FEATURE_TRUE_LE | \ 102 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 103 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 104 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 105 PPC_FEATURE_TRUE_LE | \ 106 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 107 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 108 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 109 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 110 PPC_FEATURE_TRUE_LE | \ 111 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 112 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 113 PPC_FEATURE2_HTM_COMP | \ 114 PPC_FEATURE2_HTM_NOSC_COMP | \ 115 PPC_FEATURE2_DSCR | \ 116 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 117 PPC_FEATURE2_VEC_CRYPTO) 118 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 119 PPC_FEATURE_TRUE_LE | \ 120 PPC_FEATURE_HAS_ALTIVEC_COMP) 121 #define COMMON_USER_POWER9 COMMON_USER_POWER8 122 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 123 PPC_FEATURE2_ARCH_3_00 | \ 124 PPC_FEATURE2_HAS_IEEE128 | \ 125 PPC_FEATURE2_DARN ) 126 127 #ifdef CONFIG_PPC_BOOK3E_64 128 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 129 #else 130 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 131 PPC_FEATURE_BOOKE) 132 #endif 133 134 static struct cpu_spec __initdata cpu_specs[] = { 135 #ifdef CONFIG_PPC_BOOK3S_64 136 { /* PPC970 */ 137 .pvr_mask = 0xffff0000, 138 .pvr_value = 0x00390000, 139 .cpu_name = "PPC970", 140 .cpu_features = CPU_FTRS_PPC970, 141 .cpu_user_features = COMMON_USER_POWER4 | 142 PPC_FEATURE_HAS_ALTIVEC_COMP, 143 .mmu_features = MMU_FTRS_PPC970, 144 .icache_bsize = 128, 145 .dcache_bsize = 128, 146 .num_pmcs = 8, 147 .pmc_type = PPC_PMC_IBM, 148 .cpu_setup = __setup_cpu_ppc970, 149 .cpu_restore = __restore_cpu_ppc970, 150 .oprofile_cpu_type = "ppc64/970", 151 .oprofile_type = PPC_OPROFILE_POWER4, 152 .platform = "ppc970", 153 }, 154 { /* PPC970FX */ 155 .pvr_mask = 0xffff0000, 156 .pvr_value = 0x003c0000, 157 .cpu_name = "PPC970FX", 158 .cpu_features = CPU_FTRS_PPC970, 159 .cpu_user_features = COMMON_USER_POWER4 | 160 PPC_FEATURE_HAS_ALTIVEC_COMP, 161 .mmu_features = MMU_FTRS_PPC970, 162 .icache_bsize = 128, 163 .dcache_bsize = 128, 164 .num_pmcs = 8, 165 .pmc_type = PPC_PMC_IBM, 166 .cpu_setup = __setup_cpu_ppc970, 167 .cpu_restore = __restore_cpu_ppc970, 168 .oprofile_cpu_type = "ppc64/970", 169 .oprofile_type = PPC_OPROFILE_POWER4, 170 .platform = "ppc970", 171 }, 172 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 173 .pvr_mask = 0xffffffff, 174 .pvr_value = 0x00440100, 175 .cpu_name = "PPC970MP", 176 .cpu_features = CPU_FTRS_PPC970, 177 .cpu_user_features = COMMON_USER_POWER4 | 178 PPC_FEATURE_HAS_ALTIVEC_COMP, 179 .mmu_features = MMU_FTRS_PPC970, 180 .icache_bsize = 128, 181 .dcache_bsize = 128, 182 .num_pmcs = 8, 183 .pmc_type = PPC_PMC_IBM, 184 .cpu_setup = __setup_cpu_ppc970, 185 .cpu_restore = __restore_cpu_ppc970, 186 .oprofile_cpu_type = "ppc64/970MP", 187 .oprofile_type = PPC_OPROFILE_POWER4, 188 .platform = "ppc970", 189 }, 190 { /* PPC970MP */ 191 .pvr_mask = 0xffff0000, 192 .pvr_value = 0x00440000, 193 .cpu_name = "PPC970MP", 194 .cpu_features = CPU_FTRS_PPC970, 195 .cpu_user_features = COMMON_USER_POWER4 | 196 PPC_FEATURE_HAS_ALTIVEC_COMP, 197 .mmu_features = MMU_FTRS_PPC970, 198 .icache_bsize = 128, 199 .dcache_bsize = 128, 200 .num_pmcs = 8, 201 .pmc_type = PPC_PMC_IBM, 202 .cpu_setup = __setup_cpu_ppc970MP, 203 .cpu_restore = __restore_cpu_ppc970, 204 .oprofile_cpu_type = "ppc64/970MP", 205 .oprofile_type = PPC_OPROFILE_POWER4, 206 .platform = "ppc970", 207 }, 208 { /* PPC970GX */ 209 .pvr_mask = 0xffff0000, 210 .pvr_value = 0x00450000, 211 .cpu_name = "PPC970GX", 212 .cpu_features = CPU_FTRS_PPC970, 213 .cpu_user_features = COMMON_USER_POWER4 | 214 PPC_FEATURE_HAS_ALTIVEC_COMP, 215 .mmu_features = MMU_FTRS_PPC970, 216 .icache_bsize = 128, 217 .dcache_bsize = 128, 218 .num_pmcs = 8, 219 .pmc_type = PPC_PMC_IBM, 220 .cpu_setup = __setup_cpu_ppc970, 221 .oprofile_cpu_type = "ppc64/970", 222 .oprofile_type = PPC_OPROFILE_POWER4, 223 .platform = "ppc970", 224 }, 225 { /* Power5 GR */ 226 .pvr_mask = 0xffff0000, 227 .pvr_value = 0x003a0000, 228 .cpu_name = "POWER5 (gr)", 229 .cpu_features = CPU_FTRS_POWER5, 230 .cpu_user_features = COMMON_USER_POWER5, 231 .mmu_features = MMU_FTRS_POWER5, 232 .icache_bsize = 128, 233 .dcache_bsize = 128, 234 .num_pmcs = 6, 235 .pmc_type = PPC_PMC_IBM, 236 .oprofile_cpu_type = "ppc64/power5", 237 .oprofile_type = PPC_OPROFILE_POWER4, 238 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 239 * and above but only works on POWER5 and above 240 */ 241 .oprofile_mmcra_sihv = MMCRA_SIHV, 242 .oprofile_mmcra_sipr = MMCRA_SIPR, 243 .platform = "power5", 244 }, 245 { /* Power5++ */ 246 .pvr_mask = 0xffffff00, 247 .pvr_value = 0x003b0300, 248 .cpu_name = "POWER5+ (gs)", 249 .cpu_features = CPU_FTRS_POWER5, 250 .cpu_user_features = COMMON_USER_POWER5_PLUS, 251 .mmu_features = MMU_FTRS_POWER5, 252 .icache_bsize = 128, 253 .dcache_bsize = 128, 254 .num_pmcs = 6, 255 .oprofile_cpu_type = "ppc64/power5++", 256 .oprofile_type = PPC_OPROFILE_POWER4, 257 .oprofile_mmcra_sihv = MMCRA_SIHV, 258 .oprofile_mmcra_sipr = MMCRA_SIPR, 259 .platform = "power5+", 260 }, 261 { /* Power5 GS */ 262 .pvr_mask = 0xffff0000, 263 .pvr_value = 0x003b0000, 264 .cpu_name = "POWER5+ (gs)", 265 .cpu_features = CPU_FTRS_POWER5, 266 .cpu_user_features = COMMON_USER_POWER5_PLUS, 267 .mmu_features = MMU_FTRS_POWER5, 268 .icache_bsize = 128, 269 .dcache_bsize = 128, 270 .num_pmcs = 6, 271 .pmc_type = PPC_PMC_IBM, 272 .oprofile_cpu_type = "ppc64/power5+", 273 .oprofile_type = PPC_OPROFILE_POWER4, 274 .oprofile_mmcra_sihv = MMCRA_SIHV, 275 .oprofile_mmcra_sipr = MMCRA_SIPR, 276 .platform = "power5+", 277 }, 278 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 279 .pvr_mask = 0xffffffff, 280 .pvr_value = 0x0f000001, 281 .cpu_name = "POWER5+", 282 .cpu_features = CPU_FTRS_POWER5, 283 .cpu_user_features = COMMON_USER_POWER5_PLUS, 284 .mmu_features = MMU_FTRS_POWER5, 285 .icache_bsize = 128, 286 .dcache_bsize = 128, 287 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 288 .oprofile_type = PPC_OPROFILE_POWER4, 289 .platform = "power5+", 290 }, 291 { /* Power6 */ 292 .pvr_mask = 0xffff0000, 293 .pvr_value = 0x003e0000, 294 .cpu_name = "POWER6 (raw)", 295 .cpu_features = CPU_FTRS_POWER6, 296 .cpu_user_features = COMMON_USER_POWER6 | 297 PPC_FEATURE_POWER6_EXT, 298 .mmu_features = MMU_FTRS_POWER6, 299 .icache_bsize = 128, 300 .dcache_bsize = 128, 301 .num_pmcs = 6, 302 .pmc_type = PPC_PMC_IBM, 303 .oprofile_cpu_type = "ppc64/power6", 304 .oprofile_type = PPC_OPROFILE_POWER4, 305 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 306 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 307 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 308 POWER6_MMCRA_OTHER, 309 .platform = "power6x", 310 }, 311 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 312 .pvr_mask = 0xffffffff, 313 .pvr_value = 0x0f000002, 314 .cpu_name = "POWER6 (architected)", 315 .cpu_features = CPU_FTRS_POWER6, 316 .cpu_user_features = COMMON_USER_POWER6, 317 .mmu_features = MMU_FTRS_POWER6, 318 .icache_bsize = 128, 319 .dcache_bsize = 128, 320 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 321 .oprofile_type = PPC_OPROFILE_POWER4, 322 .platform = "power6", 323 }, 324 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 325 .pvr_mask = 0xffffffff, 326 .pvr_value = 0x0f000003, 327 .cpu_name = "POWER7 (architected)", 328 .cpu_features = CPU_FTRS_POWER7, 329 .cpu_user_features = COMMON_USER_POWER7, 330 .cpu_user_features2 = COMMON_USER2_POWER7, 331 .mmu_features = MMU_FTRS_POWER7, 332 .icache_bsize = 128, 333 .dcache_bsize = 128, 334 .oprofile_type = PPC_OPROFILE_POWER4, 335 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 336 .cpu_setup = __setup_cpu_power7, 337 .cpu_restore = __restore_cpu_power7, 338 .machine_check_early = __machine_check_early_realmode_p7, 339 .platform = "power7", 340 }, 341 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 342 .pvr_mask = 0xffffffff, 343 .pvr_value = 0x0f000004, 344 .cpu_name = "POWER8 (architected)", 345 .cpu_features = CPU_FTRS_POWER8, 346 .cpu_user_features = COMMON_USER_POWER8, 347 .cpu_user_features2 = COMMON_USER2_POWER8, 348 .mmu_features = MMU_FTRS_POWER8, 349 .icache_bsize = 128, 350 .dcache_bsize = 128, 351 .oprofile_type = PPC_OPROFILE_INVALID, 352 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 353 .cpu_setup = __setup_cpu_power8, 354 .cpu_restore = __restore_cpu_power8, 355 .machine_check_early = __machine_check_early_realmode_p8, 356 .platform = "power8", 357 }, 358 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 359 .pvr_mask = 0xffffffff, 360 .pvr_value = 0x0f000005, 361 .cpu_name = "POWER9 (architected)", 362 .cpu_features = CPU_FTRS_POWER9, 363 .cpu_user_features = COMMON_USER_POWER9, 364 .cpu_user_features2 = COMMON_USER2_POWER9, 365 .mmu_features = MMU_FTRS_POWER9, 366 .icache_bsize = 128, 367 .dcache_bsize = 128, 368 .oprofile_type = PPC_OPROFILE_INVALID, 369 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 370 .cpu_setup = __setup_cpu_power9, 371 .cpu_restore = __restore_cpu_power9, 372 .platform = "power9", 373 }, 374 { /* Power7 */ 375 .pvr_mask = 0xffff0000, 376 .pvr_value = 0x003f0000, 377 .cpu_name = "POWER7 (raw)", 378 .cpu_features = CPU_FTRS_POWER7, 379 .cpu_user_features = COMMON_USER_POWER7, 380 .cpu_user_features2 = COMMON_USER2_POWER7, 381 .mmu_features = MMU_FTRS_POWER7, 382 .icache_bsize = 128, 383 .dcache_bsize = 128, 384 .num_pmcs = 6, 385 .pmc_type = PPC_PMC_IBM, 386 .oprofile_cpu_type = "ppc64/power7", 387 .oprofile_type = PPC_OPROFILE_POWER4, 388 .cpu_setup = __setup_cpu_power7, 389 .cpu_restore = __restore_cpu_power7, 390 .machine_check_early = __machine_check_early_realmode_p7, 391 .platform = "power7", 392 }, 393 { /* Power7+ */ 394 .pvr_mask = 0xffff0000, 395 .pvr_value = 0x004A0000, 396 .cpu_name = "POWER7+ (raw)", 397 .cpu_features = CPU_FTRS_POWER7, 398 .cpu_user_features = COMMON_USER_POWER7, 399 .cpu_user_features2 = COMMON_USER2_POWER7, 400 .mmu_features = MMU_FTRS_POWER7, 401 .icache_bsize = 128, 402 .dcache_bsize = 128, 403 .num_pmcs = 6, 404 .pmc_type = PPC_PMC_IBM, 405 .oprofile_cpu_type = "ppc64/power7", 406 .oprofile_type = PPC_OPROFILE_POWER4, 407 .cpu_setup = __setup_cpu_power7, 408 .cpu_restore = __restore_cpu_power7, 409 .machine_check_early = __machine_check_early_realmode_p7, 410 .platform = "power7+", 411 }, 412 { /* Power8E */ 413 .pvr_mask = 0xffff0000, 414 .pvr_value = 0x004b0000, 415 .cpu_name = "POWER8E (raw)", 416 .cpu_features = CPU_FTRS_POWER8E, 417 .cpu_user_features = COMMON_USER_POWER8, 418 .cpu_user_features2 = COMMON_USER2_POWER8, 419 .mmu_features = MMU_FTRS_POWER8, 420 .icache_bsize = 128, 421 .dcache_bsize = 128, 422 .num_pmcs = 6, 423 .pmc_type = PPC_PMC_IBM, 424 .oprofile_cpu_type = "ppc64/power8", 425 .oprofile_type = PPC_OPROFILE_INVALID, 426 .cpu_setup = __setup_cpu_power8, 427 .cpu_restore = __restore_cpu_power8, 428 .machine_check_early = __machine_check_early_realmode_p8, 429 .platform = "power8", 430 }, 431 { /* Power8NVL */ 432 .pvr_mask = 0xffff0000, 433 .pvr_value = 0x004c0000, 434 .cpu_name = "POWER8NVL (raw)", 435 .cpu_features = CPU_FTRS_POWER8, 436 .cpu_user_features = COMMON_USER_POWER8, 437 .cpu_user_features2 = COMMON_USER2_POWER8, 438 .mmu_features = MMU_FTRS_POWER8, 439 .icache_bsize = 128, 440 .dcache_bsize = 128, 441 .num_pmcs = 6, 442 .pmc_type = PPC_PMC_IBM, 443 .oprofile_cpu_type = "ppc64/power8", 444 .oprofile_type = PPC_OPROFILE_INVALID, 445 .cpu_setup = __setup_cpu_power8, 446 .cpu_restore = __restore_cpu_power8, 447 .machine_check_early = __machine_check_early_realmode_p8, 448 .platform = "power8", 449 }, 450 { /* Power8 */ 451 .pvr_mask = 0xffff0000, 452 .pvr_value = 0x004d0000, 453 .cpu_name = "POWER8 (raw)", 454 .cpu_features = CPU_FTRS_POWER8, 455 .cpu_user_features = COMMON_USER_POWER8, 456 .cpu_user_features2 = COMMON_USER2_POWER8, 457 .mmu_features = MMU_FTRS_POWER8, 458 .icache_bsize = 128, 459 .dcache_bsize = 128, 460 .num_pmcs = 6, 461 .pmc_type = PPC_PMC_IBM, 462 .oprofile_cpu_type = "ppc64/power8", 463 .oprofile_type = PPC_OPROFILE_INVALID, 464 .cpu_setup = __setup_cpu_power8, 465 .cpu_restore = __restore_cpu_power8, 466 .machine_check_early = __machine_check_early_realmode_p8, 467 .platform = "power8", 468 }, 469 { /* Power9 DD2.0 */ 470 .pvr_mask = 0xffffefff, 471 .pvr_value = 0x004e0200, 472 .cpu_name = "POWER9 (raw)", 473 .cpu_features = CPU_FTRS_POWER9_DD2_0, 474 .cpu_user_features = COMMON_USER_POWER9, 475 .cpu_user_features2 = COMMON_USER2_POWER9, 476 .mmu_features = MMU_FTRS_POWER9, 477 .icache_bsize = 128, 478 .dcache_bsize = 128, 479 .num_pmcs = 6, 480 .pmc_type = PPC_PMC_IBM, 481 .oprofile_cpu_type = "ppc64/power9", 482 .oprofile_type = PPC_OPROFILE_INVALID, 483 .cpu_setup = __setup_cpu_power9, 484 .cpu_restore = __restore_cpu_power9, 485 .machine_check_early = __machine_check_early_realmode_p9, 486 .platform = "power9", 487 }, 488 { /* Power9 DD 2.1 */ 489 .pvr_mask = 0xffffefff, 490 .pvr_value = 0x004e0201, 491 .cpu_name = "POWER9 (raw)", 492 .cpu_features = CPU_FTRS_POWER9_DD2_1, 493 .cpu_user_features = COMMON_USER_POWER9, 494 .cpu_user_features2 = COMMON_USER2_POWER9, 495 .mmu_features = MMU_FTRS_POWER9, 496 .icache_bsize = 128, 497 .dcache_bsize = 128, 498 .num_pmcs = 6, 499 .pmc_type = PPC_PMC_IBM, 500 .oprofile_cpu_type = "ppc64/power9", 501 .oprofile_type = PPC_OPROFILE_INVALID, 502 .cpu_setup = __setup_cpu_power9, 503 .cpu_restore = __restore_cpu_power9, 504 .machine_check_early = __machine_check_early_realmode_p9, 505 .platform = "power9", 506 }, 507 { /* Power9 DD2.2 or later */ 508 .pvr_mask = 0xffff0000, 509 .pvr_value = 0x004e0000, 510 .cpu_name = "POWER9 (raw)", 511 .cpu_features = CPU_FTRS_POWER9_DD2_2, 512 .cpu_user_features = COMMON_USER_POWER9, 513 .cpu_user_features2 = COMMON_USER2_POWER9, 514 .mmu_features = MMU_FTRS_POWER9, 515 .icache_bsize = 128, 516 .dcache_bsize = 128, 517 .num_pmcs = 6, 518 .pmc_type = PPC_PMC_IBM, 519 .oprofile_cpu_type = "ppc64/power9", 520 .oprofile_type = PPC_OPROFILE_INVALID, 521 .cpu_setup = __setup_cpu_power9, 522 .cpu_restore = __restore_cpu_power9, 523 .machine_check_early = __machine_check_early_realmode_p9, 524 .platform = "power9", 525 }, 526 { /* Cell Broadband Engine */ 527 .pvr_mask = 0xffff0000, 528 .pvr_value = 0x00700000, 529 .cpu_name = "Cell Broadband Engine", 530 .cpu_features = CPU_FTRS_CELL, 531 .cpu_user_features = COMMON_USER_PPC64 | 532 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 533 PPC_FEATURE_SMT, 534 .mmu_features = MMU_FTRS_CELL, 535 .icache_bsize = 128, 536 .dcache_bsize = 128, 537 .num_pmcs = 4, 538 .pmc_type = PPC_PMC_IBM, 539 .oprofile_cpu_type = "ppc64/cell-be", 540 .oprofile_type = PPC_OPROFILE_CELL, 541 .platform = "ppc-cell-be", 542 }, 543 { /* PA Semi PA6T */ 544 .pvr_mask = 0x7fff0000, 545 .pvr_value = 0x00900000, 546 .cpu_name = "PA6T", 547 .cpu_features = CPU_FTRS_PA6T, 548 .cpu_user_features = COMMON_USER_PA6T, 549 .mmu_features = MMU_FTRS_PA6T, 550 .icache_bsize = 64, 551 .dcache_bsize = 64, 552 .num_pmcs = 6, 553 .pmc_type = PPC_PMC_PA6T, 554 .cpu_setup = __setup_cpu_pa6t, 555 .cpu_restore = __restore_cpu_pa6t, 556 .oprofile_cpu_type = "ppc64/pa6t", 557 .oprofile_type = PPC_OPROFILE_PA6T, 558 .platform = "pa6t", 559 }, 560 { /* default match */ 561 .pvr_mask = 0x00000000, 562 .pvr_value = 0x00000000, 563 .cpu_name = "POWER5 (compatible)", 564 .cpu_features = CPU_FTRS_COMPATIBLE, 565 .cpu_user_features = COMMON_USER_PPC64, 566 .mmu_features = MMU_FTRS_POWER, 567 .icache_bsize = 128, 568 .dcache_bsize = 128, 569 .num_pmcs = 6, 570 .pmc_type = PPC_PMC_IBM, 571 .platform = "power5", 572 } 573 #endif /* CONFIG_PPC_BOOK3S_64 */ 574 575 #ifdef CONFIG_PPC32 576 #ifdef CONFIG_PPC_BOOK3S_32 577 { /* 601 */ 578 .pvr_mask = 0xffff0000, 579 .pvr_value = 0x00010000, 580 .cpu_name = "601", 581 .cpu_features = CPU_FTRS_PPC601, 582 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 583 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 584 .mmu_features = MMU_FTR_HPTE_TABLE, 585 .icache_bsize = 32, 586 .dcache_bsize = 32, 587 .machine_check = machine_check_generic, 588 .platform = "ppc601", 589 }, 590 { /* 603 */ 591 .pvr_mask = 0xffff0000, 592 .pvr_value = 0x00030000, 593 .cpu_name = "603", 594 .cpu_features = CPU_FTRS_603, 595 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 596 .mmu_features = 0, 597 .icache_bsize = 32, 598 .dcache_bsize = 32, 599 .cpu_setup = __setup_cpu_603, 600 .machine_check = machine_check_generic, 601 .platform = "ppc603", 602 }, 603 { /* 603e */ 604 .pvr_mask = 0xffff0000, 605 .pvr_value = 0x00060000, 606 .cpu_name = "603e", 607 .cpu_features = CPU_FTRS_603, 608 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 609 .mmu_features = 0, 610 .icache_bsize = 32, 611 .dcache_bsize = 32, 612 .cpu_setup = __setup_cpu_603, 613 .machine_check = machine_check_generic, 614 .platform = "ppc603", 615 }, 616 { /* 603ev */ 617 .pvr_mask = 0xffff0000, 618 .pvr_value = 0x00070000, 619 .cpu_name = "603ev", 620 .cpu_features = CPU_FTRS_603, 621 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 622 .mmu_features = 0, 623 .icache_bsize = 32, 624 .dcache_bsize = 32, 625 .cpu_setup = __setup_cpu_603, 626 .machine_check = machine_check_generic, 627 .platform = "ppc603", 628 }, 629 { /* 604 */ 630 .pvr_mask = 0xffff0000, 631 .pvr_value = 0x00040000, 632 .cpu_name = "604", 633 .cpu_features = CPU_FTRS_604, 634 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 635 .mmu_features = MMU_FTR_HPTE_TABLE, 636 .icache_bsize = 32, 637 .dcache_bsize = 32, 638 .num_pmcs = 2, 639 .cpu_setup = __setup_cpu_604, 640 .machine_check = machine_check_generic, 641 .platform = "ppc604", 642 }, 643 { /* 604e */ 644 .pvr_mask = 0xfffff000, 645 .pvr_value = 0x00090000, 646 .cpu_name = "604e", 647 .cpu_features = CPU_FTRS_604, 648 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 649 .mmu_features = MMU_FTR_HPTE_TABLE, 650 .icache_bsize = 32, 651 .dcache_bsize = 32, 652 .num_pmcs = 4, 653 .cpu_setup = __setup_cpu_604, 654 .machine_check = machine_check_generic, 655 .platform = "ppc604", 656 }, 657 { /* 604r */ 658 .pvr_mask = 0xffff0000, 659 .pvr_value = 0x00090000, 660 .cpu_name = "604r", 661 .cpu_features = CPU_FTRS_604, 662 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 663 .mmu_features = MMU_FTR_HPTE_TABLE, 664 .icache_bsize = 32, 665 .dcache_bsize = 32, 666 .num_pmcs = 4, 667 .cpu_setup = __setup_cpu_604, 668 .machine_check = machine_check_generic, 669 .platform = "ppc604", 670 }, 671 { /* 604ev */ 672 .pvr_mask = 0xffff0000, 673 .pvr_value = 0x000a0000, 674 .cpu_name = "604ev", 675 .cpu_features = CPU_FTRS_604, 676 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 677 .mmu_features = MMU_FTR_HPTE_TABLE, 678 .icache_bsize = 32, 679 .dcache_bsize = 32, 680 .num_pmcs = 4, 681 .cpu_setup = __setup_cpu_604, 682 .machine_check = machine_check_generic, 683 .platform = "ppc604", 684 }, 685 { /* 740/750 (0x4202, don't support TAU ?) */ 686 .pvr_mask = 0xffffffff, 687 .pvr_value = 0x00084202, 688 .cpu_name = "740/750", 689 .cpu_features = CPU_FTRS_740_NOTAU, 690 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 691 .mmu_features = MMU_FTR_HPTE_TABLE, 692 .icache_bsize = 32, 693 .dcache_bsize = 32, 694 .num_pmcs = 4, 695 .cpu_setup = __setup_cpu_750, 696 .machine_check = machine_check_generic, 697 .platform = "ppc750", 698 }, 699 { /* 750CX (80100 and 8010x?) */ 700 .pvr_mask = 0xfffffff0, 701 .pvr_value = 0x00080100, 702 .cpu_name = "750CX", 703 .cpu_features = CPU_FTRS_750, 704 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 705 .mmu_features = MMU_FTR_HPTE_TABLE, 706 .icache_bsize = 32, 707 .dcache_bsize = 32, 708 .num_pmcs = 4, 709 .cpu_setup = __setup_cpu_750cx, 710 .machine_check = machine_check_generic, 711 .platform = "ppc750", 712 }, 713 { /* 750CX (82201 and 82202) */ 714 .pvr_mask = 0xfffffff0, 715 .pvr_value = 0x00082200, 716 .cpu_name = "750CX", 717 .cpu_features = CPU_FTRS_750, 718 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 719 .mmu_features = MMU_FTR_HPTE_TABLE, 720 .icache_bsize = 32, 721 .dcache_bsize = 32, 722 .num_pmcs = 4, 723 .pmc_type = PPC_PMC_IBM, 724 .cpu_setup = __setup_cpu_750cx, 725 .machine_check = machine_check_generic, 726 .platform = "ppc750", 727 }, 728 { /* 750CXe (82214) */ 729 .pvr_mask = 0xfffffff0, 730 .pvr_value = 0x00082210, 731 .cpu_name = "750CXe", 732 .cpu_features = CPU_FTRS_750, 733 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 734 .mmu_features = MMU_FTR_HPTE_TABLE, 735 .icache_bsize = 32, 736 .dcache_bsize = 32, 737 .num_pmcs = 4, 738 .pmc_type = PPC_PMC_IBM, 739 .cpu_setup = __setup_cpu_750cx, 740 .machine_check = machine_check_generic, 741 .platform = "ppc750", 742 }, 743 { /* 750CXe "Gekko" (83214) */ 744 .pvr_mask = 0xffffffff, 745 .pvr_value = 0x00083214, 746 .cpu_name = "750CXe", 747 .cpu_features = CPU_FTRS_750, 748 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 749 .mmu_features = MMU_FTR_HPTE_TABLE, 750 .icache_bsize = 32, 751 .dcache_bsize = 32, 752 .num_pmcs = 4, 753 .pmc_type = PPC_PMC_IBM, 754 .cpu_setup = __setup_cpu_750cx, 755 .machine_check = machine_check_generic, 756 .platform = "ppc750", 757 }, 758 { /* 750CL (and "Broadway") */ 759 .pvr_mask = 0xfffff0e0, 760 .pvr_value = 0x00087000, 761 .cpu_name = "750CL", 762 .cpu_features = CPU_FTRS_750CL, 763 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 764 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 765 .icache_bsize = 32, 766 .dcache_bsize = 32, 767 .num_pmcs = 4, 768 .pmc_type = PPC_PMC_IBM, 769 .cpu_setup = __setup_cpu_750, 770 .machine_check = machine_check_generic, 771 .platform = "ppc750", 772 .oprofile_cpu_type = "ppc/750", 773 .oprofile_type = PPC_OPROFILE_G4, 774 }, 775 { /* 745/755 */ 776 .pvr_mask = 0xfffff000, 777 .pvr_value = 0x00083000, 778 .cpu_name = "745/755", 779 .cpu_features = CPU_FTRS_750, 780 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 781 .mmu_features = MMU_FTR_HPTE_TABLE, 782 .icache_bsize = 32, 783 .dcache_bsize = 32, 784 .num_pmcs = 4, 785 .pmc_type = PPC_PMC_IBM, 786 .cpu_setup = __setup_cpu_750, 787 .machine_check = machine_check_generic, 788 .platform = "ppc750", 789 }, 790 { /* 750FX rev 1.x */ 791 .pvr_mask = 0xffffff00, 792 .pvr_value = 0x70000100, 793 .cpu_name = "750FX", 794 .cpu_features = CPU_FTRS_750FX1, 795 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 796 .mmu_features = MMU_FTR_HPTE_TABLE, 797 .icache_bsize = 32, 798 .dcache_bsize = 32, 799 .num_pmcs = 4, 800 .pmc_type = PPC_PMC_IBM, 801 .cpu_setup = __setup_cpu_750, 802 .machine_check = machine_check_generic, 803 .platform = "ppc750", 804 .oprofile_cpu_type = "ppc/750", 805 .oprofile_type = PPC_OPROFILE_G4, 806 }, 807 { /* 750FX rev 2.0 must disable HID0[DPM] */ 808 .pvr_mask = 0xffffffff, 809 .pvr_value = 0x70000200, 810 .cpu_name = "750FX", 811 .cpu_features = CPU_FTRS_750FX2, 812 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 813 .mmu_features = MMU_FTR_HPTE_TABLE, 814 .icache_bsize = 32, 815 .dcache_bsize = 32, 816 .num_pmcs = 4, 817 .pmc_type = PPC_PMC_IBM, 818 .cpu_setup = __setup_cpu_750, 819 .machine_check = machine_check_generic, 820 .platform = "ppc750", 821 .oprofile_cpu_type = "ppc/750", 822 .oprofile_type = PPC_OPROFILE_G4, 823 }, 824 { /* 750FX (All revs except 2.0) */ 825 .pvr_mask = 0xffff0000, 826 .pvr_value = 0x70000000, 827 .cpu_name = "750FX", 828 .cpu_features = CPU_FTRS_750FX, 829 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 830 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 831 .icache_bsize = 32, 832 .dcache_bsize = 32, 833 .num_pmcs = 4, 834 .pmc_type = PPC_PMC_IBM, 835 .cpu_setup = __setup_cpu_750fx, 836 .machine_check = machine_check_generic, 837 .platform = "ppc750", 838 .oprofile_cpu_type = "ppc/750", 839 .oprofile_type = PPC_OPROFILE_G4, 840 }, 841 { /* 750GX */ 842 .pvr_mask = 0xffff0000, 843 .pvr_value = 0x70020000, 844 .cpu_name = "750GX", 845 .cpu_features = CPU_FTRS_750GX, 846 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 847 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 848 .icache_bsize = 32, 849 .dcache_bsize = 32, 850 .num_pmcs = 4, 851 .pmc_type = PPC_PMC_IBM, 852 .cpu_setup = __setup_cpu_750fx, 853 .machine_check = machine_check_generic, 854 .platform = "ppc750", 855 .oprofile_cpu_type = "ppc/750", 856 .oprofile_type = PPC_OPROFILE_G4, 857 }, 858 { /* 740/750 (L2CR bit need fixup for 740) */ 859 .pvr_mask = 0xffff0000, 860 .pvr_value = 0x00080000, 861 .cpu_name = "740/750", 862 .cpu_features = CPU_FTRS_740, 863 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 864 .mmu_features = MMU_FTR_HPTE_TABLE, 865 .icache_bsize = 32, 866 .dcache_bsize = 32, 867 .num_pmcs = 4, 868 .pmc_type = PPC_PMC_IBM, 869 .cpu_setup = __setup_cpu_750, 870 .machine_check = machine_check_generic, 871 .platform = "ppc750", 872 }, 873 { /* 7400 rev 1.1 ? (no TAU) */ 874 .pvr_mask = 0xffffffff, 875 .pvr_value = 0x000c1101, 876 .cpu_name = "7400 (1.1)", 877 .cpu_features = CPU_FTRS_7400_NOTAU, 878 .cpu_user_features = COMMON_USER | 879 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 880 .mmu_features = MMU_FTR_HPTE_TABLE, 881 .icache_bsize = 32, 882 .dcache_bsize = 32, 883 .num_pmcs = 4, 884 .pmc_type = PPC_PMC_G4, 885 .cpu_setup = __setup_cpu_7400, 886 .machine_check = machine_check_generic, 887 .platform = "ppc7400", 888 }, 889 { /* 7400 */ 890 .pvr_mask = 0xffff0000, 891 .pvr_value = 0x000c0000, 892 .cpu_name = "7400", 893 .cpu_features = CPU_FTRS_7400, 894 .cpu_user_features = COMMON_USER | 895 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 896 .mmu_features = MMU_FTR_HPTE_TABLE, 897 .icache_bsize = 32, 898 .dcache_bsize = 32, 899 .num_pmcs = 4, 900 .pmc_type = PPC_PMC_G4, 901 .cpu_setup = __setup_cpu_7400, 902 .machine_check = machine_check_generic, 903 .platform = "ppc7400", 904 }, 905 { /* 7410 */ 906 .pvr_mask = 0xffff0000, 907 .pvr_value = 0x800c0000, 908 .cpu_name = "7410", 909 .cpu_features = CPU_FTRS_7400, 910 .cpu_user_features = COMMON_USER | 911 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 912 .mmu_features = MMU_FTR_HPTE_TABLE, 913 .icache_bsize = 32, 914 .dcache_bsize = 32, 915 .num_pmcs = 4, 916 .pmc_type = PPC_PMC_G4, 917 .cpu_setup = __setup_cpu_7410, 918 .machine_check = machine_check_generic, 919 .platform = "ppc7400", 920 }, 921 { /* 7450 2.0 - no doze/nap */ 922 .pvr_mask = 0xffffffff, 923 .pvr_value = 0x80000200, 924 .cpu_name = "7450", 925 .cpu_features = CPU_FTRS_7450_20, 926 .cpu_user_features = COMMON_USER | 927 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 928 .mmu_features = MMU_FTR_HPTE_TABLE, 929 .icache_bsize = 32, 930 .dcache_bsize = 32, 931 .num_pmcs = 6, 932 .pmc_type = PPC_PMC_G4, 933 .cpu_setup = __setup_cpu_745x, 934 .oprofile_cpu_type = "ppc/7450", 935 .oprofile_type = PPC_OPROFILE_G4, 936 .machine_check = machine_check_generic, 937 .platform = "ppc7450", 938 }, 939 { /* 7450 2.1 */ 940 .pvr_mask = 0xffffffff, 941 .pvr_value = 0x80000201, 942 .cpu_name = "7450", 943 .cpu_features = CPU_FTRS_7450_21, 944 .cpu_user_features = COMMON_USER | 945 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 946 .mmu_features = MMU_FTR_HPTE_TABLE, 947 .icache_bsize = 32, 948 .dcache_bsize = 32, 949 .num_pmcs = 6, 950 .pmc_type = PPC_PMC_G4, 951 .cpu_setup = __setup_cpu_745x, 952 .oprofile_cpu_type = "ppc/7450", 953 .oprofile_type = PPC_OPROFILE_G4, 954 .machine_check = machine_check_generic, 955 .platform = "ppc7450", 956 }, 957 { /* 7450 2.3 and newer */ 958 .pvr_mask = 0xffff0000, 959 .pvr_value = 0x80000000, 960 .cpu_name = "7450", 961 .cpu_features = CPU_FTRS_7450_23, 962 .cpu_user_features = COMMON_USER | 963 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 964 .mmu_features = MMU_FTR_HPTE_TABLE, 965 .icache_bsize = 32, 966 .dcache_bsize = 32, 967 .num_pmcs = 6, 968 .pmc_type = PPC_PMC_G4, 969 .cpu_setup = __setup_cpu_745x, 970 .oprofile_cpu_type = "ppc/7450", 971 .oprofile_type = PPC_OPROFILE_G4, 972 .machine_check = machine_check_generic, 973 .platform = "ppc7450", 974 }, 975 { /* 7455 rev 1.x */ 976 .pvr_mask = 0xffffff00, 977 .pvr_value = 0x80010100, 978 .cpu_name = "7455", 979 .cpu_features = CPU_FTRS_7455_1, 980 .cpu_user_features = COMMON_USER | 981 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 982 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 983 .icache_bsize = 32, 984 .dcache_bsize = 32, 985 .num_pmcs = 6, 986 .pmc_type = PPC_PMC_G4, 987 .cpu_setup = __setup_cpu_745x, 988 .oprofile_cpu_type = "ppc/7450", 989 .oprofile_type = PPC_OPROFILE_G4, 990 .machine_check = machine_check_generic, 991 .platform = "ppc7450", 992 }, 993 { /* 7455 rev 2.0 */ 994 .pvr_mask = 0xffffffff, 995 .pvr_value = 0x80010200, 996 .cpu_name = "7455", 997 .cpu_features = CPU_FTRS_7455_20, 998 .cpu_user_features = COMMON_USER | 999 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1000 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1001 .icache_bsize = 32, 1002 .dcache_bsize = 32, 1003 .num_pmcs = 6, 1004 .pmc_type = PPC_PMC_G4, 1005 .cpu_setup = __setup_cpu_745x, 1006 .oprofile_cpu_type = "ppc/7450", 1007 .oprofile_type = PPC_OPROFILE_G4, 1008 .machine_check = machine_check_generic, 1009 .platform = "ppc7450", 1010 }, 1011 { /* 7455 others */ 1012 .pvr_mask = 0xffff0000, 1013 .pvr_value = 0x80010000, 1014 .cpu_name = "7455", 1015 .cpu_features = CPU_FTRS_7455, 1016 .cpu_user_features = COMMON_USER | 1017 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1018 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1019 .icache_bsize = 32, 1020 .dcache_bsize = 32, 1021 .num_pmcs = 6, 1022 .pmc_type = PPC_PMC_G4, 1023 .cpu_setup = __setup_cpu_745x, 1024 .oprofile_cpu_type = "ppc/7450", 1025 .oprofile_type = PPC_OPROFILE_G4, 1026 .machine_check = machine_check_generic, 1027 .platform = "ppc7450", 1028 }, 1029 { /* 7447/7457 Rev 1.0 */ 1030 .pvr_mask = 0xffffffff, 1031 .pvr_value = 0x80020100, 1032 .cpu_name = "7447/7457", 1033 .cpu_features = CPU_FTRS_7447_10, 1034 .cpu_user_features = COMMON_USER | 1035 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1036 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1037 .icache_bsize = 32, 1038 .dcache_bsize = 32, 1039 .num_pmcs = 6, 1040 .pmc_type = PPC_PMC_G4, 1041 .cpu_setup = __setup_cpu_745x, 1042 .oprofile_cpu_type = "ppc/7450", 1043 .oprofile_type = PPC_OPROFILE_G4, 1044 .machine_check = machine_check_generic, 1045 .platform = "ppc7450", 1046 }, 1047 { /* 7447/7457 Rev 1.1 */ 1048 .pvr_mask = 0xffffffff, 1049 .pvr_value = 0x80020101, 1050 .cpu_name = "7447/7457", 1051 .cpu_features = CPU_FTRS_7447_10, 1052 .cpu_user_features = COMMON_USER | 1053 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1054 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1055 .icache_bsize = 32, 1056 .dcache_bsize = 32, 1057 .num_pmcs = 6, 1058 .pmc_type = PPC_PMC_G4, 1059 .cpu_setup = __setup_cpu_745x, 1060 .oprofile_cpu_type = "ppc/7450", 1061 .oprofile_type = PPC_OPROFILE_G4, 1062 .machine_check = machine_check_generic, 1063 .platform = "ppc7450", 1064 }, 1065 { /* 7447/7457 Rev 1.2 and later */ 1066 .pvr_mask = 0xffff0000, 1067 .pvr_value = 0x80020000, 1068 .cpu_name = "7447/7457", 1069 .cpu_features = CPU_FTRS_7447, 1070 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1071 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1072 .icache_bsize = 32, 1073 .dcache_bsize = 32, 1074 .num_pmcs = 6, 1075 .pmc_type = PPC_PMC_G4, 1076 .cpu_setup = __setup_cpu_745x, 1077 .oprofile_cpu_type = "ppc/7450", 1078 .oprofile_type = PPC_OPROFILE_G4, 1079 .machine_check = machine_check_generic, 1080 .platform = "ppc7450", 1081 }, 1082 { /* 7447A */ 1083 .pvr_mask = 0xffff0000, 1084 .pvr_value = 0x80030000, 1085 .cpu_name = "7447A", 1086 .cpu_features = CPU_FTRS_7447A, 1087 .cpu_user_features = COMMON_USER | 1088 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1089 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1090 .icache_bsize = 32, 1091 .dcache_bsize = 32, 1092 .num_pmcs = 6, 1093 .pmc_type = PPC_PMC_G4, 1094 .cpu_setup = __setup_cpu_745x, 1095 .oprofile_cpu_type = "ppc/7450", 1096 .oprofile_type = PPC_OPROFILE_G4, 1097 .machine_check = machine_check_generic, 1098 .platform = "ppc7450", 1099 }, 1100 { /* 7448 */ 1101 .pvr_mask = 0xffff0000, 1102 .pvr_value = 0x80040000, 1103 .cpu_name = "7448", 1104 .cpu_features = CPU_FTRS_7448, 1105 .cpu_user_features = COMMON_USER | 1106 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1107 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1108 .icache_bsize = 32, 1109 .dcache_bsize = 32, 1110 .num_pmcs = 6, 1111 .pmc_type = PPC_PMC_G4, 1112 .cpu_setup = __setup_cpu_745x, 1113 .oprofile_cpu_type = "ppc/7450", 1114 .oprofile_type = PPC_OPROFILE_G4, 1115 .machine_check = machine_check_generic, 1116 .platform = "ppc7450", 1117 }, 1118 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1119 .pvr_mask = 0x7fff0000, 1120 .pvr_value = 0x00810000, 1121 .cpu_name = "82xx", 1122 .cpu_features = CPU_FTRS_82XX, 1123 .cpu_user_features = COMMON_USER, 1124 .mmu_features = 0, 1125 .icache_bsize = 32, 1126 .dcache_bsize = 32, 1127 .cpu_setup = __setup_cpu_603, 1128 .machine_check = machine_check_generic, 1129 .platform = "ppc603", 1130 }, 1131 { /* All G2_LE (603e core, plus some) have the same pvr */ 1132 .pvr_mask = 0x7fff0000, 1133 .pvr_value = 0x00820000, 1134 .cpu_name = "G2_LE", 1135 .cpu_features = CPU_FTRS_G2_LE, 1136 .cpu_user_features = COMMON_USER, 1137 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1138 .icache_bsize = 32, 1139 .dcache_bsize = 32, 1140 .cpu_setup = __setup_cpu_603, 1141 .machine_check = machine_check_generic, 1142 .platform = "ppc603", 1143 }, 1144 #ifdef CONFIG_PPC_83xx 1145 { /* e300c1 (a 603e core, plus some) on 83xx */ 1146 .pvr_mask = 0x7fff0000, 1147 .pvr_value = 0x00830000, 1148 .cpu_name = "e300c1", 1149 .cpu_features = CPU_FTRS_E300, 1150 .cpu_user_features = COMMON_USER, 1151 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1152 .icache_bsize = 32, 1153 .dcache_bsize = 32, 1154 .cpu_setup = __setup_cpu_603, 1155 .machine_check = machine_check_83xx, 1156 .platform = "ppc603", 1157 }, 1158 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1159 .pvr_mask = 0x7fff0000, 1160 .pvr_value = 0x00840000, 1161 .cpu_name = "e300c2", 1162 .cpu_features = CPU_FTRS_E300C2, 1163 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1164 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1165 MMU_FTR_NEED_DTLB_SW_LRU, 1166 .icache_bsize = 32, 1167 .dcache_bsize = 32, 1168 .cpu_setup = __setup_cpu_603, 1169 .machine_check = machine_check_83xx, 1170 .platform = "ppc603", 1171 }, 1172 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1173 .pvr_mask = 0x7fff0000, 1174 .pvr_value = 0x00850000, 1175 .cpu_name = "e300c3", 1176 .cpu_features = CPU_FTRS_E300, 1177 .cpu_user_features = COMMON_USER, 1178 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1179 MMU_FTR_NEED_DTLB_SW_LRU, 1180 .icache_bsize = 32, 1181 .dcache_bsize = 32, 1182 .cpu_setup = __setup_cpu_603, 1183 .machine_check = machine_check_83xx, 1184 .num_pmcs = 4, 1185 .oprofile_cpu_type = "ppc/e300", 1186 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1187 .platform = "ppc603", 1188 }, 1189 { /* e300c4 (e300c1, plus one IU) */ 1190 .pvr_mask = 0x7fff0000, 1191 .pvr_value = 0x00860000, 1192 .cpu_name = "e300c4", 1193 .cpu_features = CPU_FTRS_E300, 1194 .cpu_user_features = COMMON_USER, 1195 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1196 MMU_FTR_NEED_DTLB_SW_LRU, 1197 .icache_bsize = 32, 1198 .dcache_bsize = 32, 1199 .cpu_setup = __setup_cpu_603, 1200 .machine_check = machine_check_83xx, 1201 .num_pmcs = 4, 1202 .oprofile_cpu_type = "ppc/e300", 1203 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1204 .platform = "ppc603", 1205 }, 1206 #endif 1207 { /* default match, we assume split I/D cache & TB (non-601)... */ 1208 .pvr_mask = 0x00000000, 1209 .pvr_value = 0x00000000, 1210 .cpu_name = "(generic PPC)", 1211 .cpu_features = CPU_FTRS_CLASSIC32, 1212 .cpu_user_features = COMMON_USER, 1213 .mmu_features = MMU_FTR_HPTE_TABLE, 1214 .icache_bsize = 32, 1215 .dcache_bsize = 32, 1216 .machine_check = machine_check_generic, 1217 .platform = "ppc603", 1218 }, 1219 #endif /* CONFIG_PPC_BOOK3S_32 */ 1220 #ifdef CONFIG_PPC_8xx 1221 { /* 8xx */ 1222 .pvr_mask = 0xffff0000, 1223 .pvr_value = PVR_8xx, 1224 .cpu_name = "8xx", 1225 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1226 * if the 8xx code is there.... */ 1227 .cpu_features = CPU_FTRS_8XX, 1228 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1229 .mmu_features = MMU_FTR_TYPE_8xx, 1230 .icache_bsize = 16, 1231 .dcache_bsize = 16, 1232 .machine_check = machine_check_8xx, 1233 .platform = "ppc823", 1234 }, 1235 #endif /* CONFIG_PPC_8xx */ 1236 #ifdef CONFIG_40x 1237 { /* 403GC */ 1238 .pvr_mask = 0xffffff00, 1239 .pvr_value = 0x00200200, 1240 .cpu_name = "403GC", 1241 .cpu_features = CPU_FTRS_40X, 1242 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1243 .mmu_features = MMU_FTR_TYPE_40x, 1244 .icache_bsize = 16, 1245 .dcache_bsize = 16, 1246 .machine_check = machine_check_4xx, 1247 .platform = "ppc403", 1248 }, 1249 { /* 403GCX */ 1250 .pvr_mask = 0xffffff00, 1251 .pvr_value = 0x00201400, 1252 .cpu_name = "403GCX", 1253 .cpu_features = CPU_FTRS_40X, 1254 .cpu_user_features = PPC_FEATURE_32 | 1255 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1256 .mmu_features = MMU_FTR_TYPE_40x, 1257 .icache_bsize = 16, 1258 .dcache_bsize = 16, 1259 .machine_check = machine_check_4xx, 1260 .platform = "ppc403", 1261 }, 1262 { /* 403G ?? */ 1263 .pvr_mask = 0xffff0000, 1264 .pvr_value = 0x00200000, 1265 .cpu_name = "403G ??", 1266 .cpu_features = CPU_FTRS_40X, 1267 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1268 .mmu_features = MMU_FTR_TYPE_40x, 1269 .icache_bsize = 16, 1270 .dcache_bsize = 16, 1271 .machine_check = machine_check_4xx, 1272 .platform = "ppc403", 1273 }, 1274 { /* 405GP */ 1275 .pvr_mask = 0xffff0000, 1276 .pvr_value = 0x40110000, 1277 .cpu_name = "405GP", 1278 .cpu_features = CPU_FTRS_40X, 1279 .cpu_user_features = PPC_FEATURE_32 | 1280 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1281 .mmu_features = MMU_FTR_TYPE_40x, 1282 .icache_bsize = 32, 1283 .dcache_bsize = 32, 1284 .machine_check = machine_check_4xx, 1285 .platform = "ppc405", 1286 }, 1287 { /* STB 03xxx */ 1288 .pvr_mask = 0xffff0000, 1289 .pvr_value = 0x40130000, 1290 .cpu_name = "STB03xxx", 1291 .cpu_features = CPU_FTRS_40X, 1292 .cpu_user_features = PPC_FEATURE_32 | 1293 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1294 .mmu_features = MMU_FTR_TYPE_40x, 1295 .icache_bsize = 32, 1296 .dcache_bsize = 32, 1297 .machine_check = machine_check_4xx, 1298 .platform = "ppc405", 1299 }, 1300 { /* STB 04xxx */ 1301 .pvr_mask = 0xffff0000, 1302 .pvr_value = 0x41810000, 1303 .cpu_name = "STB04xxx", 1304 .cpu_features = CPU_FTRS_40X, 1305 .cpu_user_features = PPC_FEATURE_32 | 1306 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1307 .mmu_features = MMU_FTR_TYPE_40x, 1308 .icache_bsize = 32, 1309 .dcache_bsize = 32, 1310 .machine_check = machine_check_4xx, 1311 .platform = "ppc405", 1312 }, 1313 { /* NP405L */ 1314 .pvr_mask = 0xffff0000, 1315 .pvr_value = 0x41610000, 1316 .cpu_name = "NP405L", 1317 .cpu_features = CPU_FTRS_40X, 1318 .cpu_user_features = PPC_FEATURE_32 | 1319 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1320 .mmu_features = MMU_FTR_TYPE_40x, 1321 .icache_bsize = 32, 1322 .dcache_bsize = 32, 1323 .machine_check = machine_check_4xx, 1324 .platform = "ppc405", 1325 }, 1326 { /* NP4GS3 */ 1327 .pvr_mask = 0xffff0000, 1328 .pvr_value = 0x40B10000, 1329 .cpu_name = "NP4GS3", 1330 .cpu_features = CPU_FTRS_40X, 1331 .cpu_user_features = PPC_FEATURE_32 | 1332 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1333 .mmu_features = MMU_FTR_TYPE_40x, 1334 .icache_bsize = 32, 1335 .dcache_bsize = 32, 1336 .machine_check = machine_check_4xx, 1337 .platform = "ppc405", 1338 }, 1339 { /* NP405H */ 1340 .pvr_mask = 0xffff0000, 1341 .pvr_value = 0x41410000, 1342 .cpu_name = "NP405H", 1343 .cpu_features = CPU_FTRS_40X, 1344 .cpu_user_features = PPC_FEATURE_32 | 1345 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1346 .mmu_features = MMU_FTR_TYPE_40x, 1347 .icache_bsize = 32, 1348 .dcache_bsize = 32, 1349 .machine_check = machine_check_4xx, 1350 .platform = "ppc405", 1351 }, 1352 { /* 405GPr */ 1353 .pvr_mask = 0xffff0000, 1354 .pvr_value = 0x50910000, 1355 .cpu_name = "405GPr", 1356 .cpu_features = CPU_FTRS_40X, 1357 .cpu_user_features = PPC_FEATURE_32 | 1358 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1359 .mmu_features = MMU_FTR_TYPE_40x, 1360 .icache_bsize = 32, 1361 .dcache_bsize = 32, 1362 .machine_check = machine_check_4xx, 1363 .platform = "ppc405", 1364 }, 1365 { /* STBx25xx */ 1366 .pvr_mask = 0xffff0000, 1367 .pvr_value = 0x51510000, 1368 .cpu_name = "STBx25xx", 1369 .cpu_features = CPU_FTRS_40X, 1370 .cpu_user_features = PPC_FEATURE_32 | 1371 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1372 .mmu_features = MMU_FTR_TYPE_40x, 1373 .icache_bsize = 32, 1374 .dcache_bsize = 32, 1375 .machine_check = machine_check_4xx, 1376 .platform = "ppc405", 1377 }, 1378 { /* 405LP */ 1379 .pvr_mask = 0xffff0000, 1380 .pvr_value = 0x41F10000, 1381 .cpu_name = "405LP", 1382 .cpu_features = CPU_FTRS_40X, 1383 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1384 .mmu_features = MMU_FTR_TYPE_40x, 1385 .icache_bsize = 32, 1386 .dcache_bsize = 32, 1387 .machine_check = machine_check_4xx, 1388 .platform = "ppc405", 1389 }, 1390 { /* Xilinx Virtex-II Pro */ 1391 .pvr_mask = 0xfffff000, 1392 .pvr_value = 0x20010000, 1393 .cpu_name = "Virtex-II Pro", 1394 .cpu_features = CPU_FTRS_40X, 1395 .cpu_user_features = PPC_FEATURE_32 | 1396 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1397 .mmu_features = MMU_FTR_TYPE_40x, 1398 .icache_bsize = 32, 1399 .dcache_bsize = 32, 1400 .machine_check = machine_check_4xx, 1401 .platform = "ppc405", 1402 }, 1403 { /* Xilinx Virtex-4 FX */ 1404 .pvr_mask = 0xfffff000, 1405 .pvr_value = 0x20011000, 1406 .cpu_name = "Virtex-4 FX", 1407 .cpu_features = CPU_FTRS_40X, 1408 .cpu_user_features = PPC_FEATURE_32 | 1409 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1410 .mmu_features = MMU_FTR_TYPE_40x, 1411 .icache_bsize = 32, 1412 .dcache_bsize = 32, 1413 .machine_check = machine_check_4xx, 1414 .platform = "ppc405", 1415 }, 1416 { /* 405EP */ 1417 .pvr_mask = 0xffff0000, 1418 .pvr_value = 0x51210000, 1419 .cpu_name = "405EP", 1420 .cpu_features = CPU_FTRS_40X, 1421 .cpu_user_features = PPC_FEATURE_32 | 1422 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1423 .mmu_features = MMU_FTR_TYPE_40x, 1424 .icache_bsize = 32, 1425 .dcache_bsize = 32, 1426 .machine_check = machine_check_4xx, 1427 .platform = "ppc405", 1428 }, 1429 { /* 405EX Rev. A/B with Security */ 1430 .pvr_mask = 0xffff000f, 1431 .pvr_value = 0x12910007, 1432 .cpu_name = "405EX Rev. A/B", 1433 .cpu_features = CPU_FTRS_40X, 1434 .cpu_user_features = PPC_FEATURE_32 | 1435 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1436 .mmu_features = MMU_FTR_TYPE_40x, 1437 .icache_bsize = 32, 1438 .dcache_bsize = 32, 1439 .machine_check = machine_check_4xx, 1440 .platform = "ppc405", 1441 }, 1442 { /* 405EX Rev. C without Security */ 1443 .pvr_mask = 0xffff000f, 1444 .pvr_value = 0x1291000d, 1445 .cpu_name = "405EX Rev. C", 1446 .cpu_features = CPU_FTRS_40X, 1447 .cpu_user_features = PPC_FEATURE_32 | 1448 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1449 .mmu_features = MMU_FTR_TYPE_40x, 1450 .icache_bsize = 32, 1451 .dcache_bsize = 32, 1452 .machine_check = machine_check_4xx, 1453 .platform = "ppc405", 1454 }, 1455 { /* 405EX Rev. C with Security */ 1456 .pvr_mask = 0xffff000f, 1457 .pvr_value = 0x1291000f, 1458 .cpu_name = "405EX Rev. C", 1459 .cpu_features = CPU_FTRS_40X, 1460 .cpu_user_features = PPC_FEATURE_32 | 1461 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1462 .mmu_features = MMU_FTR_TYPE_40x, 1463 .icache_bsize = 32, 1464 .dcache_bsize = 32, 1465 .machine_check = machine_check_4xx, 1466 .platform = "ppc405", 1467 }, 1468 { /* 405EX Rev. D without Security */ 1469 .pvr_mask = 0xffff000f, 1470 .pvr_value = 0x12910003, 1471 .cpu_name = "405EX Rev. D", 1472 .cpu_features = CPU_FTRS_40X, 1473 .cpu_user_features = PPC_FEATURE_32 | 1474 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1475 .mmu_features = MMU_FTR_TYPE_40x, 1476 .icache_bsize = 32, 1477 .dcache_bsize = 32, 1478 .machine_check = machine_check_4xx, 1479 .platform = "ppc405", 1480 }, 1481 { /* 405EX Rev. D with Security */ 1482 .pvr_mask = 0xffff000f, 1483 .pvr_value = 0x12910005, 1484 .cpu_name = "405EX Rev. D", 1485 .cpu_features = CPU_FTRS_40X, 1486 .cpu_user_features = PPC_FEATURE_32 | 1487 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1488 .mmu_features = MMU_FTR_TYPE_40x, 1489 .icache_bsize = 32, 1490 .dcache_bsize = 32, 1491 .machine_check = machine_check_4xx, 1492 .platform = "ppc405", 1493 }, 1494 { /* 405EXr Rev. A/B without Security */ 1495 .pvr_mask = 0xffff000f, 1496 .pvr_value = 0x12910001, 1497 .cpu_name = "405EXr Rev. A/B", 1498 .cpu_features = CPU_FTRS_40X, 1499 .cpu_user_features = PPC_FEATURE_32 | 1500 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1501 .mmu_features = MMU_FTR_TYPE_40x, 1502 .icache_bsize = 32, 1503 .dcache_bsize = 32, 1504 .machine_check = machine_check_4xx, 1505 .platform = "ppc405", 1506 }, 1507 { /* 405EXr Rev. C without Security */ 1508 .pvr_mask = 0xffff000f, 1509 .pvr_value = 0x12910009, 1510 .cpu_name = "405EXr Rev. C", 1511 .cpu_features = CPU_FTRS_40X, 1512 .cpu_user_features = PPC_FEATURE_32 | 1513 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1514 .mmu_features = MMU_FTR_TYPE_40x, 1515 .icache_bsize = 32, 1516 .dcache_bsize = 32, 1517 .machine_check = machine_check_4xx, 1518 .platform = "ppc405", 1519 }, 1520 { /* 405EXr Rev. C with Security */ 1521 .pvr_mask = 0xffff000f, 1522 .pvr_value = 0x1291000b, 1523 .cpu_name = "405EXr Rev. C", 1524 .cpu_features = CPU_FTRS_40X, 1525 .cpu_user_features = PPC_FEATURE_32 | 1526 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1527 .mmu_features = MMU_FTR_TYPE_40x, 1528 .icache_bsize = 32, 1529 .dcache_bsize = 32, 1530 .machine_check = machine_check_4xx, 1531 .platform = "ppc405", 1532 }, 1533 { /* 405EXr Rev. D without Security */ 1534 .pvr_mask = 0xffff000f, 1535 .pvr_value = 0x12910000, 1536 .cpu_name = "405EXr Rev. D", 1537 .cpu_features = CPU_FTRS_40X, 1538 .cpu_user_features = PPC_FEATURE_32 | 1539 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1540 .mmu_features = MMU_FTR_TYPE_40x, 1541 .icache_bsize = 32, 1542 .dcache_bsize = 32, 1543 .machine_check = machine_check_4xx, 1544 .platform = "ppc405", 1545 }, 1546 { /* 405EXr Rev. D with Security */ 1547 .pvr_mask = 0xffff000f, 1548 .pvr_value = 0x12910002, 1549 .cpu_name = "405EXr Rev. D", 1550 .cpu_features = CPU_FTRS_40X, 1551 .cpu_user_features = PPC_FEATURE_32 | 1552 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1553 .mmu_features = MMU_FTR_TYPE_40x, 1554 .icache_bsize = 32, 1555 .dcache_bsize = 32, 1556 .machine_check = machine_check_4xx, 1557 .platform = "ppc405", 1558 }, 1559 { 1560 /* 405EZ */ 1561 .pvr_mask = 0xffff0000, 1562 .pvr_value = 0x41510000, 1563 .cpu_name = "405EZ", 1564 .cpu_features = CPU_FTRS_40X, 1565 .cpu_user_features = PPC_FEATURE_32 | 1566 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1567 .mmu_features = MMU_FTR_TYPE_40x, 1568 .icache_bsize = 32, 1569 .dcache_bsize = 32, 1570 .machine_check = machine_check_4xx, 1571 .platform = "ppc405", 1572 }, 1573 { /* APM8018X */ 1574 .pvr_mask = 0xffff0000, 1575 .pvr_value = 0x7ff11432, 1576 .cpu_name = "APM8018X", 1577 .cpu_features = CPU_FTRS_40X, 1578 .cpu_user_features = PPC_FEATURE_32 | 1579 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1580 .mmu_features = MMU_FTR_TYPE_40x, 1581 .icache_bsize = 32, 1582 .dcache_bsize = 32, 1583 .machine_check = machine_check_4xx, 1584 .platform = "ppc405", 1585 }, 1586 { /* default match */ 1587 .pvr_mask = 0x00000000, 1588 .pvr_value = 0x00000000, 1589 .cpu_name = "(generic 40x PPC)", 1590 .cpu_features = CPU_FTRS_40X, 1591 .cpu_user_features = PPC_FEATURE_32 | 1592 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1593 .mmu_features = MMU_FTR_TYPE_40x, 1594 .icache_bsize = 32, 1595 .dcache_bsize = 32, 1596 .machine_check = machine_check_4xx, 1597 .platform = "ppc405", 1598 } 1599 1600 #endif /* CONFIG_40x */ 1601 #ifdef CONFIG_44x 1602 { 1603 .pvr_mask = 0xf0000fff, 1604 .pvr_value = 0x40000850, 1605 .cpu_name = "440GR Rev. A", 1606 .cpu_features = CPU_FTRS_44X, 1607 .cpu_user_features = COMMON_USER_BOOKE, 1608 .mmu_features = MMU_FTR_TYPE_44x, 1609 .icache_bsize = 32, 1610 .dcache_bsize = 32, 1611 .machine_check = machine_check_4xx, 1612 .platform = "ppc440", 1613 }, 1614 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1615 .pvr_mask = 0xf0000fff, 1616 .pvr_value = 0x40000858, 1617 .cpu_name = "440EP Rev. A", 1618 .cpu_features = CPU_FTRS_44X, 1619 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1620 .mmu_features = MMU_FTR_TYPE_44x, 1621 .icache_bsize = 32, 1622 .dcache_bsize = 32, 1623 .cpu_setup = __setup_cpu_440ep, 1624 .machine_check = machine_check_4xx, 1625 .platform = "ppc440", 1626 }, 1627 { 1628 .pvr_mask = 0xf0000fff, 1629 .pvr_value = 0x400008d3, 1630 .cpu_name = "440GR Rev. B", 1631 .cpu_features = CPU_FTRS_44X, 1632 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1633 .mmu_features = MMU_FTR_TYPE_44x, 1634 .icache_bsize = 32, 1635 .dcache_bsize = 32, 1636 .machine_check = machine_check_4xx, 1637 .platform = "ppc440", 1638 }, 1639 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1640 .pvr_mask = 0xf0000ff7, 1641 .pvr_value = 0x400008d4, 1642 .cpu_name = "440EP Rev. C", 1643 .cpu_features = CPU_FTRS_44X, 1644 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1645 .mmu_features = MMU_FTR_TYPE_44x, 1646 .icache_bsize = 32, 1647 .dcache_bsize = 32, 1648 .cpu_setup = __setup_cpu_440ep, 1649 .machine_check = machine_check_4xx, 1650 .platform = "ppc440", 1651 }, 1652 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1653 .pvr_mask = 0xf0000fff, 1654 .pvr_value = 0x400008db, 1655 .cpu_name = "440EP Rev. B", 1656 .cpu_features = CPU_FTRS_44X, 1657 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1658 .mmu_features = MMU_FTR_TYPE_44x, 1659 .icache_bsize = 32, 1660 .dcache_bsize = 32, 1661 .cpu_setup = __setup_cpu_440ep, 1662 .machine_check = machine_check_4xx, 1663 .platform = "ppc440", 1664 }, 1665 { /* 440GRX */ 1666 .pvr_mask = 0xf0000ffb, 1667 .pvr_value = 0x200008D0, 1668 .cpu_name = "440GRX", 1669 .cpu_features = CPU_FTRS_44X, 1670 .cpu_user_features = COMMON_USER_BOOKE, 1671 .mmu_features = MMU_FTR_TYPE_44x, 1672 .icache_bsize = 32, 1673 .dcache_bsize = 32, 1674 .cpu_setup = __setup_cpu_440grx, 1675 .machine_check = machine_check_440A, 1676 .platform = "ppc440", 1677 }, 1678 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1679 .pvr_mask = 0xf0000ffb, 1680 .pvr_value = 0x200008D8, 1681 .cpu_name = "440EPX", 1682 .cpu_features = CPU_FTRS_44X, 1683 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1684 .mmu_features = MMU_FTR_TYPE_44x, 1685 .icache_bsize = 32, 1686 .dcache_bsize = 32, 1687 .cpu_setup = __setup_cpu_440epx, 1688 .machine_check = machine_check_440A, 1689 .platform = "ppc440", 1690 }, 1691 { /* 440GP Rev. B */ 1692 .pvr_mask = 0xf0000fff, 1693 .pvr_value = 0x40000440, 1694 .cpu_name = "440GP Rev. B", 1695 .cpu_features = CPU_FTRS_44X, 1696 .cpu_user_features = COMMON_USER_BOOKE, 1697 .mmu_features = MMU_FTR_TYPE_44x, 1698 .icache_bsize = 32, 1699 .dcache_bsize = 32, 1700 .machine_check = machine_check_4xx, 1701 .platform = "ppc440gp", 1702 }, 1703 { /* 440GP Rev. C */ 1704 .pvr_mask = 0xf0000fff, 1705 .pvr_value = 0x40000481, 1706 .cpu_name = "440GP Rev. C", 1707 .cpu_features = CPU_FTRS_44X, 1708 .cpu_user_features = COMMON_USER_BOOKE, 1709 .mmu_features = MMU_FTR_TYPE_44x, 1710 .icache_bsize = 32, 1711 .dcache_bsize = 32, 1712 .machine_check = machine_check_4xx, 1713 .platform = "ppc440gp", 1714 }, 1715 { /* 440GX Rev. A */ 1716 .pvr_mask = 0xf0000fff, 1717 .pvr_value = 0x50000850, 1718 .cpu_name = "440GX Rev. A", 1719 .cpu_features = CPU_FTRS_44X, 1720 .cpu_user_features = COMMON_USER_BOOKE, 1721 .mmu_features = MMU_FTR_TYPE_44x, 1722 .icache_bsize = 32, 1723 .dcache_bsize = 32, 1724 .cpu_setup = __setup_cpu_440gx, 1725 .machine_check = machine_check_440A, 1726 .platform = "ppc440", 1727 }, 1728 { /* 440GX Rev. B */ 1729 .pvr_mask = 0xf0000fff, 1730 .pvr_value = 0x50000851, 1731 .cpu_name = "440GX Rev. B", 1732 .cpu_features = CPU_FTRS_44X, 1733 .cpu_user_features = COMMON_USER_BOOKE, 1734 .mmu_features = MMU_FTR_TYPE_44x, 1735 .icache_bsize = 32, 1736 .dcache_bsize = 32, 1737 .cpu_setup = __setup_cpu_440gx, 1738 .machine_check = machine_check_440A, 1739 .platform = "ppc440", 1740 }, 1741 { /* 440GX Rev. C */ 1742 .pvr_mask = 0xf0000fff, 1743 .pvr_value = 0x50000892, 1744 .cpu_name = "440GX Rev. C", 1745 .cpu_features = CPU_FTRS_44X, 1746 .cpu_user_features = COMMON_USER_BOOKE, 1747 .mmu_features = MMU_FTR_TYPE_44x, 1748 .icache_bsize = 32, 1749 .dcache_bsize = 32, 1750 .cpu_setup = __setup_cpu_440gx, 1751 .machine_check = machine_check_440A, 1752 .platform = "ppc440", 1753 }, 1754 { /* 440GX Rev. F */ 1755 .pvr_mask = 0xf0000fff, 1756 .pvr_value = 0x50000894, 1757 .cpu_name = "440GX Rev. F", 1758 .cpu_features = CPU_FTRS_44X, 1759 .cpu_user_features = COMMON_USER_BOOKE, 1760 .mmu_features = MMU_FTR_TYPE_44x, 1761 .icache_bsize = 32, 1762 .dcache_bsize = 32, 1763 .cpu_setup = __setup_cpu_440gx, 1764 .machine_check = machine_check_440A, 1765 .platform = "ppc440", 1766 }, 1767 { /* 440SP Rev. A */ 1768 .pvr_mask = 0xfff00fff, 1769 .pvr_value = 0x53200891, 1770 .cpu_name = "440SP Rev. A", 1771 .cpu_features = CPU_FTRS_44X, 1772 .cpu_user_features = COMMON_USER_BOOKE, 1773 .mmu_features = MMU_FTR_TYPE_44x, 1774 .icache_bsize = 32, 1775 .dcache_bsize = 32, 1776 .machine_check = machine_check_4xx, 1777 .platform = "ppc440", 1778 }, 1779 { /* 440SPe Rev. A */ 1780 .pvr_mask = 0xfff00fff, 1781 .pvr_value = 0x53400890, 1782 .cpu_name = "440SPe Rev. A", 1783 .cpu_features = CPU_FTRS_44X, 1784 .cpu_user_features = COMMON_USER_BOOKE, 1785 .mmu_features = MMU_FTR_TYPE_44x, 1786 .icache_bsize = 32, 1787 .dcache_bsize = 32, 1788 .cpu_setup = __setup_cpu_440spe, 1789 .machine_check = machine_check_440A, 1790 .platform = "ppc440", 1791 }, 1792 { /* 440SPe Rev. B */ 1793 .pvr_mask = 0xfff00fff, 1794 .pvr_value = 0x53400891, 1795 .cpu_name = "440SPe Rev. B", 1796 .cpu_features = CPU_FTRS_44X, 1797 .cpu_user_features = COMMON_USER_BOOKE, 1798 .mmu_features = MMU_FTR_TYPE_44x, 1799 .icache_bsize = 32, 1800 .dcache_bsize = 32, 1801 .cpu_setup = __setup_cpu_440spe, 1802 .machine_check = machine_check_440A, 1803 .platform = "ppc440", 1804 }, 1805 { /* 440 in Xilinx Virtex-5 FXT */ 1806 .pvr_mask = 0xfffffff0, 1807 .pvr_value = 0x7ff21910, 1808 .cpu_name = "440 in Virtex-5 FXT", 1809 .cpu_features = CPU_FTRS_44X, 1810 .cpu_user_features = COMMON_USER_BOOKE, 1811 .mmu_features = MMU_FTR_TYPE_44x, 1812 .icache_bsize = 32, 1813 .dcache_bsize = 32, 1814 .cpu_setup = __setup_cpu_440x5, 1815 .machine_check = machine_check_440A, 1816 .platform = "ppc440", 1817 }, 1818 { /* 460EX */ 1819 .pvr_mask = 0xffff0006, 1820 .pvr_value = 0x13020002, 1821 .cpu_name = "460EX", 1822 .cpu_features = CPU_FTRS_440x6, 1823 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1824 .mmu_features = MMU_FTR_TYPE_44x, 1825 .icache_bsize = 32, 1826 .dcache_bsize = 32, 1827 .cpu_setup = __setup_cpu_460ex, 1828 .machine_check = machine_check_440A, 1829 .platform = "ppc440", 1830 }, 1831 { /* 460EX Rev B */ 1832 .pvr_mask = 0xffff0007, 1833 .pvr_value = 0x13020004, 1834 .cpu_name = "460EX Rev. B", 1835 .cpu_features = CPU_FTRS_440x6, 1836 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1837 .mmu_features = MMU_FTR_TYPE_44x, 1838 .icache_bsize = 32, 1839 .dcache_bsize = 32, 1840 .cpu_setup = __setup_cpu_460ex, 1841 .machine_check = machine_check_440A, 1842 .platform = "ppc440", 1843 }, 1844 { /* 460GT */ 1845 .pvr_mask = 0xffff0006, 1846 .pvr_value = 0x13020000, 1847 .cpu_name = "460GT", 1848 .cpu_features = CPU_FTRS_440x6, 1849 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1850 .mmu_features = MMU_FTR_TYPE_44x, 1851 .icache_bsize = 32, 1852 .dcache_bsize = 32, 1853 .cpu_setup = __setup_cpu_460gt, 1854 .machine_check = machine_check_440A, 1855 .platform = "ppc440", 1856 }, 1857 { /* 460GT Rev B */ 1858 .pvr_mask = 0xffff0007, 1859 .pvr_value = 0x13020005, 1860 .cpu_name = "460GT Rev. B", 1861 .cpu_features = CPU_FTRS_440x6, 1862 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1863 .mmu_features = MMU_FTR_TYPE_44x, 1864 .icache_bsize = 32, 1865 .dcache_bsize = 32, 1866 .cpu_setup = __setup_cpu_460gt, 1867 .machine_check = machine_check_440A, 1868 .platform = "ppc440", 1869 }, 1870 { /* 460SX */ 1871 .pvr_mask = 0xffffff00, 1872 .pvr_value = 0x13541800, 1873 .cpu_name = "460SX", 1874 .cpu_features = CPU_FTRS_44X, 1875 .cpu_user_features = COMMON_USER_BOOKE, 1876 .mmu_features = MMU_FTR_TYPE_44x, 1877 .icache_bsize = 32, 1878 .dcache_bsize = 32, 1879 .cpu_setup = __setup_cpu_460sx, 1880 .machine_check = machine_check_440A, 1881 .platform = "ppc440", 1882 }, 1883 { /* 464 in APM821xx */ 1884 .pvr_mask = 0xfffffff0, 1885 .pvr_value = 0x12C41C80, 1886 .cpu_name = "APM821XX", 1887 .cpu_features = CPU_FTRS_44X, 1888 .cpu_user_features = COMMON_USER_BOOKE | 1889 PPC_FEATURE_HAS_FPU, 1890 .mmu_features = MMU_FTR_TYPE_44x, 1891 .icache_bsize = 32, 1892 .dcache_bsize = 32, 1893 .cpu_setup = __setup_cpu_apm821xx, 1894 .machine_check = machine_check_440A, 1895 .platform = "ppc440", 1896 }, 1897 #ifdef CONFIG_PPC_47x 1898 { /* 476 DD2 core */ 1899 .pvr_mask = 0xffffffff, 1900 .pvr_value = 0x11a52080, 1901 .cpu_name = "476", 1902 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1903 .cpu_user_features = COMMON_USER_BOOKE | 1904 PPC_FEATURE_HAS_FPU, 1905 .mmu_features = MMU_FTR_TYPE_47x | 1906 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1907 .icache_bsize = 32, 1908 .dcache_bsize = 128, 1909 .machine_check = machine_check_47x, 1910 .platform = "ppc470", 1911 }, 1912 { /* 476fpe */ 1913 .pvr_mask = 0xffff0000, 1914 .pvr_value = 0x7ff50000, 1915 .cpu_name = "476fpe", 1916 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1917 .cpu_user_features = COMMON_USER_BOOKE | 1918 PPC_FEATURE_HAS_FPU, 1919 .mmu_features = MMU_FTR_TYPE_47x | 1920 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1921 .icache_bsize = 32, 1922 .dcache_bsize = 128, 1923 .machine_check = machine_check_47x, 1924 .platform = "ppc470", 1925 }, 1926 { /* 476 iss */ 1927 .pvr_mask = 0xffff0000, 1928 .pvr_value = 0x00050000, 1929 .cpu_name = "476", 1930 .cpu_features = CPU_FTRS_47X, 1931 .cpu_user_features = COMMON_USER_BOOKE | 1932 PPC_FEATURE_HAS_FPU, 1933 .mmu_features = MMU_FTR_TYPE_47x | 1934 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1935 .icache_bsize = 32, 1936 .dcache_bsize = 128, 1937 .machine_check = machine_check_47x, 1938 .platform = "ppc470", 1939 }, 1940 { /* 476 others */ 1941 .pvr_mask = 0xffff0000, 1942 .pvr_value = 0x11a50000, 1943 .cpu_name = "476", 1944 .cpu_features = CPU_FTRS_47X, 1945 .cpu_user_features = COMMON_USER_BOOKE | 1946 PPC_FEATURE_HAS_FPU, 1947 .mmu_features = MMU_FTR_TYPE_47x | 1948 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1949 .icache_bsize = 32, 1950 .dcache_bsize = 128, 1951 .machine_check = machine_check_47x, 1952 .platform = "ppc470", 1953 }, 1954 #endif /* CONFIG_PPC_47x */ 1955 { /* default match */ 1956 .pvr_mask = 0x00000000, 1957 .pvr_value = 0x00000000, 1958 .cpu_name = "(generic 44x PPC)", 1959 .cpu_features = CPU_FTRS_44X, 1960 .cpu_user_features = COMMON_USER_BOOKE, 1961 .mmu_features = MMU_FTR_TYPE_44x, 1962 .icache_bsize = 32, 1963 .dcache_bsize = 32, 1964 .machine_check = machine_check_4xx, 1965 .platform = "ppc440", 1966 } 1967 #endif /* CONFIG_44x */ 1968 #ifdef CONFIG_E200 1969 { /* e200z5 */ 1970 .pvr_mask = 0xfff00000, 1971 .pvr_value = 0x81000000, 1972 .cpu_name = "e200z5", 1973 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1974 .cpu_features = CPU_FTRS_E200, 1975 .cpu_user_features = COMMON_USER_BOOKE | 1976 PPC_FEATURE_HAS_EFP_SINGLE | 1977 PPC_FEATURE_UNIFIED_CACHE, 1978 .mmu_features = MMU_FTR_TYPE_FSL_E, 1979 .dcache_bsize = 32, 1980 .machine_check = machine_check_e200, 1981 .platform = "ppc5554", 1982 }, 1983 { /* e200z6 */ 1984 .pvr_mask = 0xfff00000, 1985 .pvr_value = 0x81100000, 1986 .cpu_name = "e200z6", 1987 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1988 .cpu_features = CPU_FTRS_E200, 1989 .cpu_user_features = COMMON_USER_BOOKE | 1990 PPC_FEATURE_HAS_SPE_COMP | 1991 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1992 PPC_FEATURE_UNIFIED_CACHE, 1993 .mmu_features = MMU_FTR_TYPE_FSL_E, 1994 .dcache_bsize = 32, 1995 .machine_check = machine_check_e200, 1996 .platform = "ppc5554", 1997 }, 1998 { /* default match */ 1999 .pvr_mask = 0x00000000, 2000 .pvr_value = 0x00000000, 2001 .cpu_name = "(generic E200 PPC)", 2002 .cpu_features = CPU_FTRS_E200, 2003 .cpu_user_features = COMMON_USER_BOOKE | 2004 PPC_FEATURE_HAS_EFP_SINGLE | 2005 PPC_FEATURE_UNIFIED_CACHE, 2006 .mmu_features = MMU_FTR_TYPE_FSL_E, 2007 .dcache_bsize = 32, 2008 .cpu_setup = __setup_cpu_e200, 2009 .machine_check = machine_check_e200, 2010 .platform = "ppc5554", 2011 } 2012 #endif /* CONFIG_E200 */ 2013 #endif /* CONFIG_PPC32 */ 2014 #ifdef CONFIG_E500 2015 #ifdef CONFIG_PPC32 2016 #ifndef CONFIG_PPC_E500MC 2017 { /* e500 */ 2018 .pvr_mask = 0xffff0000, 2019 .pvr_value = 0x80200000, 2020 .cpu_name = "e500", 2021 .cpu_features = CPU_FTRS_E500, 2022 .cpu_user_features = COMMON_USER_BOOKE | 2023 PPC_FEATURE_HAS_SPE_COMP | 2024 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2025 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2026 .mmu_features = MMU_FTR_TYPE_FSL_E, 2027 .icache_bsize = 32, 2028 .dcache_bsize = 32, 2029 .num_pmcs = 4, 2030 .oprofile_cpu_type = "ppc/e500", 2031 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2032 .cpu_setup = __setup_cpu_e500v1, 2033 .machine_check = machine_check_e500, 2034 .platform = "ppc8540", 2035 }, 2036 { /* e500v2 */ 2037 .pvr_mask = 0xffff0000, 2038 .pvr_value = 0x80210000, 2039 .cpu_name = "e500v2", 2040 .cpu_features = CPU_FTRS_E500_2, 2041 .cpu_user_features = COMMON_USER_BOOKE | 2042 PPC_FEATURE_HAS_SPE_COMP | 2043 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2044 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 2045 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2046 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 2047 .icache_bsize = 32, 2048 .dcache_bsize = 32, 2049 .num_pmcs = 4, 2050 .oprofile_cpu_type = "ppc/e500", 2051 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2052 .cpu_setup = __setup_cpu_e500v2, 2053 .machine_check = machine_check_e500, 2054 .platform = "ppc8548", 2055 .cpu_down_flush = cpu_down_flush_e500v2, 2056 }, 2057 #else 2058 { /* e500mc */ 2059 .pvr_mask = 0xffff0000, 2060 .pvr_value = 0x80230000, 2061 .cpu_name = "e500mc", 2062 .cpu_features = CPU_FTRS_E500MC, 2063 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2064 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2065 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2066 MMU_FTR_USE_TLBILX, 2067 .icache_bsize = 64, 2068 .dcache_bsize = 64, 2069 .num_pmcs = 4, 2070 .oprofile_cpu_type = "ppc/e500mc", 2071 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2072 .cpu_setup = __setup_cpu_e500mc, 2073 .machine_check = machine_check_e500mc, 2074 .platform = "ppce500mc", 2075 .cpu_down_flush = cpu_down_flush_e500mc, 2076 }, 2077 #endif /* CONFIG_PPC_E500MC */ 2078 #endif /* CONFIG_PPC32 */ 2079 #ifdef CONFIG_PPC_E500MC 2080 { /* e5500 */ 2081 .pvr_mask = 0xffff0000, 2082 .pvr_value = 0x80240000, 2083 .cpu_name = "e5500", 2084 .cpu_features = CPU_FTRS_E5500, 2085 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2086 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2087 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2088 MMU_FTR_USE_TLBILX, 2089 .icache_bsize = 64, 2090 .dcache_bsize = 64, 2091 .num_pmcs = 4, 2092 .oprofile_cpu_type = "ppc/e500mc", 2093 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2094 .cpu_setup = __setup_cpu_e5500, 2095 #ifndef CONFIG_PPC32 2096 .cpu_restore = __restore_cpu_e5500, 2097 #endif 2098 .machine_check = machine_check_e500mc, 2099 .platform = "ppce5500", 2100 .cpu_down_flush = cpu_down_flush_e5500, 2101 }, 2102 { /* e6500 */ 2103 .pvr_mask = 0xffff0000, 2104 .pvr_value = 0x80400000, 2105 .cpu_name = "e6500", 2106 .cpu_features = CPU_FTRS_E6500, 2107 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2108 PPC_FEATURE_HAS_ALTIVEC_COMP, 2109 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2110 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2111 MMU_FTR_USE_TLBILX, 2112 .icache_bsize = 64, 2113 .dcache_bsize = 64, 2114 .num_pmcs = 6, 2115 .oprofile_cpu_type = "ppc/e6500", 2116 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2117 .cpu_setup = __setup_cpu_e6500, 2118 #ifndef CONFIG_PPC32 2119 .cpu_restore = __restore_cpu_e6500, 2120 #endif 2121 .machine_check = machine_check_e500mc, 2122 .platform = "ppce6500", 2123 .cpu_down_flush = cpu_down_flush_e6500, 2124 }, 2125 #endif /* CONFIG_PPC_E500MC */ 2126 #ifdef CONFIG_PPC32 2127 { /* default match */ 2128 .pvr_mask = 0x00000000, 2129 .pvr_value = 0x00000000, 2130 .cpu_name = "(generic E500 PPC)", 2131 .cpu_features = CPU_FTRS_E500, 2132 .cpu_user_features = COMMON_USER_BOOKE | 2133 PPC_FEATURE_HAS_SPE_COMP | 2134 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2135 .mmu_features = MMU_FTR_TYPE_FSL_E, 2136 .icache_bsize = 32, 2137 .dcache_bsize = 32, 2138 .machine_check = machine_check_e500, 2139 .platform = "powerpc", 2140 } 2141 #endif /* CONFIG_PPC32 */ 2142 #endif /* CONFIG_E500 */ 2143 }; 2144 2145 void __init set_cur_cpu_spec(struct cpu_spec *s) 2146 { 2147 struct cpu_spec *t = &the_cpu_spec; 2148 2149 t = PTRRELOC(t); 2150 /* 2151 * use memcpy() instead of *t = *s so that GCC replaces it 2152 * by __memcpy() when KASAN is active 2153 */ 2154 memcpy(t, s, sizeof(*t)); 2155 2156 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2157 } 2158 2159 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2160 struct cpu_spec *s) 2161 { 2162 struct cpu_spec *t = &the_cpu_spec; 2163 struct cpu_spec old; 2164 2165 t = PTRRELOC(t); 2166 old = *t; 2167 2168 /* 2169 * Copy everything, then do fixups. Use memcpy() instead of *t = *s 2170 * so that GCC replaces it by __memcpy() when KASAN is active 2171 */ 2172 memcpy(t, s, sizeof(*t)); 2173 2174 /* 2175 * If we are overriding a previous value derived from the real 2176 * PVR with a new value obtained using a logical PVR value, 2177 * don't modify the performance monitor fields. 2178 */ 2179 if (old.num_pmcs && !s->num_pmcs) { 2180 t->num_pmcs = old.num_pmcs; 2181 t->pmc_type = old.pmc_type; 2182 t->oprofile_type = old.oprofile_type; 2183 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2184 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2185 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2186 2187 /* 2188 * If we have passed through this logic once before and 2189 * have pulled the default case because the real PVR was 2190 * not found inside cpu_specs[], then we are possibly 2191 * running in compatibility mode. In that case, let the 2192 * oprofiler know which set of compatibility counters to 2193 * pull from by making sure the oprofile_cpu_type string 2194 * is set to that of compatibility mode. If the 2195 * oprofile_cpu_type already has a value, then we are 2196 * possibly overriding a real PVR with a logical one, 2197 * and, in that case, keep the current value for 2198 * oprofile_cpu_type. 2199 */ 2200 if (old.oprofile_cpu_type != NULL) { 2201 t->oprofile_cpu_type = old.oprofile_cpu_type; 2202 t->oprofile_type = old.oprofile_type; 2203 } 2204 } 2205 2206 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2207 2208 /* 2209 * Set the base platform string once; assumes 2210 * we're called with real pvr first. 2211 */ 2212 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2213 *PTRRELOC(&powerpc_base_platform) = t->platform; 2214 2215 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2216 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2217 * that processor. I will consolidate that at a later time, for now, 2218 * just use #ifdef. We also don't need to PTRRELOC the function 2219 * pointer on ppc64 and booke as we are running at 0 in real mode 2220 * on ppc64 and reloc_offset is always 0 on booke. 2221 */ 2222 if (t->cpu_setup) { 2223 t->cpu_setup(offset, t); 2224 } 2225 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2226 2227 return t; 2228 } 2229 2230 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2231 { 2232 struct cpu_spec *s = cpu_specs; 2233 int i; 2234 2235 s = PTRRELOC(s); 2236 2237 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2238 if ((pvr & s->pvr_mask) == s->pvr_value) 2239 return setup_cpu_spec(offset, s); 2240 } 2241 2242 BUG(); 2243 2244 return NULL; 2245 } 2246 2247 /* 2248 * Used by cpufeatures to get the name for CPUs with a PVR table. 2249 * If they don't hae a PVR table, cpufeatures gets the name from 2250 * cpu device-tree node. 2251 */ 2252 void __init identify_cpu_name(unsigned int pvr) 2253 { 2254 struct cpu_spec *s = cpu_specs; 2255 struct cpu_spec *t = &the_cpu_spec; 2256 int i; 2257 2258 s = PTRRELOC(s); 2259 t = PTRRELOC(t); 2260 2261 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2262 if ((pvr & s->pvr_mask) == s->pvr_value) { 2263 t->cpu_name = s->cpu_name; 2264 return; 2265 } 2266 } 2267 } 2268 2269 2270 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2271 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2272 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2273 }; 2274 EXPORT_SYMBOL_GPL(cpu_feature_keys); 2275 2276 void __init cpu_feature_keys_init(void) 2277 { 2278 int i; 2279 2280 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2281 unsigned long f = 1ul << i; 2282 2283 if (!(cur_cpu_spec->cpu_features & f)) 2284 static_branch_disable(&cpu_feature_keys[i]); 2285 } 2286 } 2287 2288 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2289 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2290 }; 2291 EXPORT_SYMBOL_GPL(mmu_feature_keys); 2292 2293 void __init mmu_feature_keys_init(void) 2294 { 2295 int i; 2296 2297 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2298 unsigned long f = 1ul << i; 2299 2300 if (!(cur_cpu_spec->mmu_features & f)) 2301 static_branch_disable(&mmu_feature_keys[i]); 2302 } 2303 } 2304 #endif 2305