1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/export.h> 18 19 #include <asm/oprofile_impl.h> 20 #include <asm/cputable.h> 21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22 #include <asm/mmu.h> 23 #include <asm/setup.h> 24 25 struct cpu_spec* cur_cpu_spec = NULL; 26 EXPORT_SYMBOL(cur_cpu_spec); 27 28 /* The platform string corresponding to the real PVR */ 29 const char *powerpc_base_platform; 30 31 /* NOTE: 32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 33 * the responsibility of the appropriate CPU save/restore functions to 34 * eventually copy these settings over. Those save/restore aren't yet 35 * part of the cputable though. That has to be fixed for both ppc32 36 * and ppc64 37 */ 38 #ifdef CONFIG_PPC32 39 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 51 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 52 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 53 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 60 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 61 #endif /* CONFIG_PPC32 */ 62 #ifdef CONFIG_PPC64 63 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 64 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 65 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 66 extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec); 67 extern void __restore_cpu_pa6t(void); 68 extern void __restore_cpu_ppc970(void); 69 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 70 extern void __restore_cpu_power7(void); 71 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 72 extern void __restore_cpu_power8(void); 73 extern void __restore_cpu_a2(void); 74 #endif /* CONFIG_PPC64 */ 75 #if defined(CONFIG_E500) 76 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 77 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 78 extern void __restore_cpu_e5500(void); 79 extern void __restore_cpu_e6500(void); 80 #endif /* CONFIG_E500 */ 81 82 /* This table only contains "desktop" CPUs, it need to be filled with embedded 83 * ones as well... 84 */ 85 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 86 PPC_FEATURE_HAS_MMU) 87 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 88 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 89 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 90 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 91 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 92 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 93 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 95 PPC_FEATURE_TRUE_LE | \ 96 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 97 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 99 PPC_FEATURE_TRUE_LE | \ 100 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 101 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 102 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 103 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 104 PPC_FEATURE_TRUE_LE | \ 105 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 106 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 107 PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_DSCR | \ 108 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR) 109 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 110 PPC_FEATURE_TRUE_LE | \ 111 PPC_FEATURE_HAS_ALTIVEC_COMP) 112 #ifdef CONFIG_PPC_BOOK3E_64 113 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 114 #else 115 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 116 PPC_FEATURE_BOOKE) 117 #endif 118 119 static struct cpu_spec __initdata cpu_specs[] = { 120 #ifdef CONFIG_PPC_BOOK3S_64 121 { /* Power3 */ 122 .pvr_mask = 0xffff0000, 123 .pvr_value = 0x00400000, 124 .cpu_name = "POWER3 (630)", 125 .cpu_features = CPU_FTRS_POWER3, 126 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 127 .mmu_features = MMU_FTR_HPTE_TABLE, 128 .icache_bsize = 128, 129 .dcache_bsize = 128, 130 .num_pmcs = 8, 131 .pmc_type = PPC_PMC_IBM, 132 .oprofile_cpu_type = "ppc64/power3", 133 .oprofile_type = PPC_OPROFILE_RS64, 134 .platform = "power3", 135 }, 136 { /* Power3+ */ 137 .pvr_mask = 0xffff0000, 138 .pvr_value = 0x00410000, 139 .cpu_name = "POWER3 (630+)", 140 .cpu_features = CPU_FTRS_POWER3, 141 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 142 .mmu_features = MMU_FTR_HPTE_TABLE, 143 .icache_bsize = 128, 144 .dcache_bsize = 128, 145 .num_pmcs = 8, 146 .pmc_type = PPC_PMC_IBM, 147 .oprofile_cpu_type = "ppc64/power3", 148 .oprofile_type = PPC_OPROFILE_RS64, 149 .platform = "power3", 150 }, 151 { /* Northstar */ 152 .pvr_mask = 0xffff0000, 153 .pvr_value = 0x00330000, 154 .cpu_name = "RS64-II (northstar)", 155 .cpu_features = CPU_FTRS_RS64, 156 .cpu_user_features = COMMON_USER_PPC64, 157 .mmu_features = MMU_FTR_HPTE_TABLE, 158 .icache_bsize = 128, 159 .dcache_bsize = 128, 160 .num_pmcs = 8, 161 .pmc_type = PPC_PMC_IBM, 162 .oprofile_cpu_type = "ppc64/rs64", 163 .oprofile_type = PPC_OPROFILE_RS64, 164 .platform = "rs64", 165 }, 166 { /* Pulsar */ 167 .pvr_mask = 0xffff0000, 168 .pvr_value = 0x00340000, 169 .cpu_name = "RS64-III (pulsar)", 170 .cpu_features = CPU_FTRS_RS64, 171 .cpu_user_features = COMMON_USER_PPC64, 172 .mmu_features = MMU_FTR_HPTE_TABLE, 173 .icache_bsize = 128, 174 .dcache_bsize = 128, 175 .num_pmcs = 8, 176 .pmc_type = PPC_PMC_IBM, 177 .oprofile_cpu_type = "ppc64/rs64", 178 .oprofile_type = PPC_OPROFILE_RS64, 179 .platform = "rs64", 180 }, 181 { /* I-star */ 182 .pvr_mask = 0xffff0000, 183 .pvr_value = 0x00360000, 184 .cpu_name = "RS64-III (icestar)", 185 .cpu_features = CPU_FTRS_RS64, 186 .cpu_user_features = COMMON_USER_PPC64, 187 .mmu_features = MMU_FTR_HPTE_TABLE, 188 .icache_bsize = 128, 189 .dcache_bsize = 128, 190 .num_pmcs = 8, 191 .pmc_type = PPC_PMC_IBM, 192 .oprofile_cpu_type = "ppc64/rs64", 193 .oprofile_type = PPC_OPROFILE_RS64, 194 .platform = "rs64", 195 }, 196 { /* S-star */ 197 .pvr_mask = 0xffff0000, 198 .pvr_value = 0x00370000, 199 .cpu_name = "RS64-IV (sstar)", 200 .cpu_features = CPU_FTRS_RS64, 201 .cpu_user_features = COMMON_USER_PPC64, 202 .mmu_features = MMU_FTR_HPTE_TABLE, 203 .icache_bsize = 128, 204 .dcache_bsize = 128, 205 .num_pmcs = 8, 206 .pmc_type = PPC_PMC_IBM, 207 .oprofile_cpu_type = "ppc64/rs64", 208 .oprofile_type = PPC_OPROFILE_RS64, 209 .platform = "rs64", 210 }, 211 { /* Power4 */ 212 .pvr_mask = 0xffff0000, 213 .pvr_value = 0x00350000, 214 .cpu_name = "POWER4 (gp)", 215 .cpu_features = CPU_FTRS_POWER4, 216 .cpu_user_features = COMMON_USER_POWER4, 217 .mmu_features = MMU_FTRS_POWER4, 218 .icache_bsize = 128, 219 .dcache_bsize = 128, 220 .num_pmcs = 8, 221 .pmc_type = PPC_PMC_IBM, 222 .oprofile_cpu_type = "ppc64/power4", 223 .oprofile_type = PPC_OPROFILE_POWER4, 224 .platform = "power4", 225 }, 226 { /* Power4+ */ 227 .pvr_mask = 0xffff0000, 228 .pvr_value = 0x00380000, 229 .cpu_name = "POWER4+ (gq)", 230 .cpu_features = CPU_FTRS_POWER4, 231 .cpu_user_features = COMMON_USER_POWER4, 232 .mmu_features = MMU_FTRS_POWER4, 233 .icache_bsize = 128, 234 .dcache_bsize = 128, 235 .num_pmcs = 8, 236 .pmc_type = PPC_PMC_IBM, 237 .oprofile_cpu_type = "ppc64/power4", 238 .oprofile_type = PPC_OPROFILE_POWER4, 239 .platform = "power4", 240 }, 241 { /* PPC970 */ 242 .pvr_mask = 0xffff0000, 243 .pvr_value = 0x00390000, 244 .cpu_name = "PPC970", 245 .cpu_features = CPU_FTRS_PPC970, 246 .cpu_user_features = COMMON_USER_POWER4 | 247 PPC_FEATURE_HAS_ALTIVEC_COMP, 248 .mmu_features = MMU_FTRS_PPC970, 249 .icache_bsize = 128, 250 .dcache_bsize = 128, 251 .num_pmcs = 8, 252 .pmc_type = PPC_PMC_IBM, 253 .cpu_setup = __setup_cpu_ppc970, 254 .cpu_restore = __restore_cpu_ppc970, 255 .oprofile_cpu_type = "ppc64/970", 256 .oprofile_type = PPC_OPROFILE_POWER4, 257 .platform = "ppc970", 258 }, 259 { /* PPC970FX */ 260 .pvr_mask = 0xffff0000, 261 .pvr_value = 0x003c0000, 262 .cpu_name = "PPC970FX", 263 .cpu_features = CPU_FTRS_PPC970, 264 .cpu_user_features = COMMON_USER_POWER4 | 265 PPC_FEATURE_HAS_ALTIVEC_COMP, 266 .mmu_features = MMU_FTRS_PPC970, 267 .icache_bsize = 128, 268 .dcache_bsize = 128, 269 .num_pmcs = 8, 270 .pmc_type = PPC_PMC_IBM, 271 .cpu_setup = __setup_cpu_ppc970, 272 .cpu_restore = __restore_cpu_ppc970, 273 .oprofile_cpu_type = "ppc64/970", 274 .oprofile_type = PPC_OPROFILE_POWER4, 275 .platform = "ppc970", 276 }, 277 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 278 .pvr_mask = 0xffffffff, 279 .pvr_value = 0x00440100, 280 .cpu_name = "PPC970MP", 281 .cpu_features = CPU_FTRS_PPC970, 282 .cpu_user_features = COMMON_USER_POWER4 | 283 PPC_FEATURE_HAS_ALTIVEC_COMP, 284 .mmu_features = MMU_FTRS_PPC970, 285 .icache_bsize = 128, 286 .dcache_bsize = 128, 287 .num_pmcs = 8, 288 .pmc_type = PPC_PMC_IBM, 289 .cpu_setup = __setup_cpu_ppc970, 290 .cpu_restore = __restore_cpu_ppc970, 291 .oprofile_cpu_type = "ppc64/970MP", 292 .oprofile_type = PPC_OPROFILE_POWER4, 293 .platform = "ppc970", 294 }, 295 { /* PPC970MP */ 296 .pvr_mask = 0xffff0000, 297 .pvr_value = 0x00440000, 298 .cpu_name = "PPC970MP", 299 .cpu_features = CPU_FTRS_PPC970, 300 .cpu_user_features = COMMON_USER_POWER4 | 301 PPC_FEATURE_HAS_ALTIVEC_COMP, 302 .mmu_features = MMU_FTRS_PPC970, 303 .icache_bsize = 128, 304 .dcache_bsize = 128, 305 .num_pmcs = 8, 306 .pmc_type = PPC_PMC_IBM, 307 .cpu_setup = __setup_cpu_ppc970MP, 308 .cpu_restore = __restore_cpu_ppc970, 309 .oprofile_cpu_type = "ppc64/970MP", 310 .oprofile_type = PPC_OPROFILE_POWER4, 311 .platform = "ppc970", 312 }, 313 { /* PPC970GX */ 314 .pvr_mask = 0xffff0000, 315 .pvr_value = 0x00450000, 316 .cpu_name = "PPC970GX", 317 .cpu_features = CPU_FTRS_PPC970, 318 .cpu_user_features = COMMON_USER_POWER4 | 319 PPC_FEATURE_HAS_ALTIVEC_COMP, 320 .mmu_features = MMU_FTRS_PPC970, 321 .icache_bsize = 128, 322 .dcache_bsize = 128, 323 .num_pmcs = 8, 324 .pmc_type = PPC_PMC_IBM, 325 .cpu_setup = __setup_cpu_ppc970, 326 .oprofile_cpu_type = "ppc64/970", 327 .oprofile_type = PPC_OPROFILE_POWER4, 328 .platform = "ppc970", 329 }, 330 { /* Power5 GR */ 331 .pvr_mask = 0xffff0000, 332 .pvr_value = 0x003a0000, 333 .cpu_name = "POWER5 (gr)", 334 .cpu_features = CPU_FTRS_POWER5, 335 .cpu_user_features = COMMON_USER_POWER5, 336 .mmu_features = MMU_FTRS_POWER5, 337 .icache_bsize = 128, 338 .dcache_bsize = 128, 339 .num_pmcs = 6, 340 .pmc_type = PPC_PMC_IBM, 341 .oprofile_cpu_type = "ppc64/power5", 342 .oprofile_type = PPC_OPROFILE_POWER4, 343 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 344 * and above but only works on POWER5 and above 345 */ 346 .oprofile_mmcra_sihv = MMCRA_SIHV, 347 .oprofile_mmcra_sipr = MMCRA_SIPR, 348 .platform = "power5", 349 }, 350 { /* Power5++ */ 351 .pvr_mask = 0xffffff00, 352 .pvr_value = 0x003b0300, 353 .cpu_name = "POWER5+ (gs)", 354 .cpu_features = CPU_FTRS_POWER5, 355 .cpu_user_features = COMMON_USER_POWER5_PLUS, 356 .mmu_features = MMU_FTRS_POWER5, 357 .icache_bsize = 128, 358 .dcache_bsize = 128, 359 .num_pmcs = 6, 360 .oprofile_cpu_type = "ppc64/power5++", 361 .oprofile_type = PPC_OPROFILE_POWER4, 362 .oprofile_mmcra_sihv = MMCRA_SIHV, 363 .oprofile_mmcra_sipr = MMCRA_SIPR, 364 .platform = "power5+", 365 }, 366 { /* Power5 GS */ 367 .pvr_mask = 0xffff0000, 368 .pvr_value = 0x003b0000, 369 .cpu_name = "POWER5+ (gs)", 370 .cpu_features = CPU_FTRS_POWER5, 371 .cpu_user_features = COMMON_USER_POWER5_PLUS, 372 .mmu_features = MMU_FTRS_POWER5, 373 .icache_bsize = 128, 374 .dcache_bsize = 128, 375 .num_pmcs = 6, 376 .pmc_type = PPC_PMC_IBM, 377 .oprofile_cpu_type = "ppc64/power5+", 378 .oprofile_type = PPC_OPROFILE_POWER4, 379 .oprofile_mmcra_sihv = MMCRA_SIHV, 380 .oprofile_mmcra_sipr = MMCRA_SIPR, 381 .platform = "power5+", 382 }, 383 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 384 .pvr_mask = 0xffffffff, 385 .pvr_value = 0x0f000001, 386 .cpu_name = "POWER5+", 387 .cpu_features = CPU_FTRS_POWER5, 388 .cpu_user_features = COMMON_USER_POWER5_PLUS, 389 .mmu_features = MMU_FTRS_POWER5, 390 .icache_bsize = 128, 391 .dcache_bsize = 128, 392 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 393 .oprofile_type = PPC_OPROFILE_POWER4, 394 .platform = "power5+", 395 }, 396 { /* Power6 */ 397 .pvr_mask = 0xffff0000, 398 .pvr_value = 0x003e0000, 399 .cpu_name = "POWER6 (raw)", 400 .cpu_features = CPU_FTRS_POWER6, 401 .cpu_user_features = COMMON_USER_POWER6 | 402 PPC_FEATURE_POWER6_EXT, 403 .mmu_features = MMU_FTRS_POWER6, 404 .icache_bsize = 128, 405 .dcache_bsize = 128, 406 .num_pmcs = 6, 407 .pmc_type = PPC_PMC_IBM, 408 .oprofile_cpu_type = "ppc64/power6", 409 .oprofile_type = PPC_OPROFILE_POWER4, 410 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 411 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 412 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 413 POWER6_MMCRA_OTHER, 414 .platform = "power6x", 415 }, 416 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 417 .pvr_mask = 0xffffffff, 418 .pvr_value = 0x0f000002, 419 .cpu_name = "POWER6 (architected)", 420 .cpu_features = CPU_FTRS_POWER6, 421 .cpu_user_features = COMMON_USER_POWER6, 422 .mmu_features = MMU_FTRS_POWER6, 423 .icache_bsize = 128, 424 .dcache_bsize = 128, 425 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 426 .oprofile_type = PPC_OPROFILE_POWER4, 427 .platform = "power6", 428 }, 429 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 430 .pvr_mask = 0xffffffff, 431 .pvr_value = 0x0f000003, 432 .cpu_name = "POWER7 (architected)", 433 .cpu_features = CPU_FTRS_POWER7, 434 .cpu_user_features = COMMON_USER_POWER7, 435 .cpu_user_features2 = COMMON_USER2_POWER7, 436 .mmu_features = MMU_FTRS_POWER7, 437 .icache_bsize = 128, 438 .dcache_bsize = 128, 439 .oprofile_type = PPC_OPROFILE_POWER4, 440 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 441 .cpu_setup = __setup_cpu_power7, 442 .cpu_restore = __restore_cpu_power7, 443 .platform = "power7", 444 }, 445 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 446 .pvr_mask = 0xffffffff, 447 .pvr_value = 0x0f000004, 448 .cpu_name = "POWER8 (architected)", 449 .cpu_features = CPU_FTRS_POWER8, 450 .cpu_user_features = COMMON_USER_POWER8, 451 .cpu_user_features2 = COMMON_USER2_POWER8, 452 .mmu_features = MMU_FTRS_POWER8, 453 .icache_bsize = 128, 454 .dcache_bsize = 128, 455 .oprofile_type = PPC_OPROFILE_INVALID, 456 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 457 .cpu_setup = __setup_cpu_power8, 458 .cpu_restore = __restore_cpu_power8, 459 .platform = "power8", 460 }, 461 { /* Power7 */ 462 .pvr_mask = 0xffff0000, 463 .pvr_value = 0x003f0000, 464 .cpu_name = "POWER7 (raw)", 465 .cpu_features = CPU_FTRS_POWER7, 466 .cpu_user_features = COMMON_USER_POWER7, 467 .cpu_user_features2 = COMMON_USER2_POWER7, 468 .mmu_features = MMU_FTRS_POWER7, 469 .icache_bsize = 128, 470 .dcache_bsize = 128, 471 .num_pmcs = 6, 472 .pmc_type = PPC_PMC_IBM, 473 .oprofile_cpu_type = "ppc64/power7", 474 .oprofile_type = PPC_OPROFILE_POWER4, 475 .cpu_setup = __setup_cpu_power7, 476 .cpu_restore = __restore_cpu_power7, 477 .platform = "power7", 478 }, 479 { /* Power7+ */ 480 .pvr_mask = 0xffff0000, 481 .pvr_value = 0x004A0000, 482 .cpu_name = "POWER7+ (raw)", 483 .cpu_features = CPU_FTRS_POWER7, 484 .cpu_user_features = COMMON_USER_POWER7, 485 .cpu_user_features2 = COMMON_USER2_POWER7, 486 .mmu_features = MMU_FTRS_POWER7, 487 .icache_bsize = 128, 488 .dcache_bsize = 128, 489 .num_pmcs = 6, 490 .pmc_type = PPC_PMC_IBM, 491 .oprofile_cpu_type = "ppc64/power7", 492 .oprofile_type = PPC_OPROFILE_POWER4, 493 .cpu_setup = __setup_cpu_power7, 494 .cpu_restore = __restore_cpu_power7, 495 .platform = "power7+", 496 }, 497 { /* Power8E */ 498 .pvr_mask = 0xffff0000, 499 .pvr_value = 0x004b0000, 500 .cpu_name = "POWER8E (raw)", 501 .cpu_features = CPU_FTRS_POWER8, 502 .cpu_user_features = COMMON_USER_POWER8, 503 .cpu_user_features2 = COMMON_USER2_POWER8, 504 .mmu_features = MMU_FTRS_POWER8, 505 .icache_bsize = 128, 506 .dcache_bsize = 128, 507 .num_pmcs = 6, 508 .pmc_type = PPC_PMC_IBM, 509 .oprofile_cpu_type = "ppc64/power8", 510 .oprofile_type = PPC_OPROFILE_INVALID, 511 .cpu_setup = __setup_cpu_power8, 512 .cpu_restore = __restore_cpu_power8, 513 .platform = "power8", 514 }, 515 { /* Power8 */ 516 .pvr_mask = 0xffff0000, 517 .pvr_value = 0x004d0000, 518 .cpu_name = "POWER8 (raw)", 519 .cpu_features = CPU_FTRS_POWER8, 520 .cpu_user_features = COMMON_USER_POWER8, 521 .cpu_user_features2 = COMMON_USER2_POWER8, 522 .mmu_features = MMU_FTRS_POWER8, 523 .icache_bsize = 128, 524 .dcache_bsize = 128, 525 .num_pmcs = 6, 526 .pmc_type = PPC_PMC_IBM, 527 .oprofile_cpu_type = "ppc64/power8", 528 .oprofile_type = PPC_OPROFILE_INVALID, 529 .cpu_setup = __setup_cpu_power8, 530 .cpu_restore = __restore_cpu_power8, 531 .platform = "power8", 532 }, 533 { /* Cell Broadband Engine */ 534 .pvr_mask = 0xffff0000, 535 .pvr_value = 0x00700000, 536 .cpu_name = "Cell Broadband Engine", 537 .cpu_features = CPU_FTRS_CELL, 538 .cpu_user_features = COMMON_USER_PPC64 | 539 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 540 PPC_FEATURE_SMT, 541 .mmu_features = MMU_FTRS_CELL, 542 .icache_bsize = 128, 543 .dcache_bsize = 128, 544 .num_pmcs = 4, 545 .pmc_type = PPC_PMC_IBM, 546 .oprofile_cpu_type = "ppc64/cell-be", 547 .oprofile_type = PPC_OPROFILE_CELL, 548 .platform = "ppc-cell-be", 549 }, 550 { /* PA Semi PA6T */ 551 .pvr_mask = 0x7fff0000, 552 .pvr_value = 0x00900000, 553 .cpu_name = "PA6T", 554 .cpu_features = CPU_FTRS_PA6T, 555 .cpu_user_features = COMMON_USER_PA6T, 556 .mmu_features = MMU_FTRS_PA6T, 557 .icache_bsize = 64, 558 .dcache_bsize = 64, 559 .num_pmcs = 6, 560 .pmc_type = PPC_PMC_PA6T, 561 .cpu_setup = __setup_cpu_pa6t, 562 .cpu_restore = __restore_cpu_pa6t, 563 .oprofile_cpu_type = "ppc64/pa6t", 564 .oprofile_type = PPC_OPROFILE_PA6T, 565 .platform = "pa6t", 566 }, 567 { /* default match */ 568 .pvr_mask = 0x00000000, 569 .pvr_value = 0x00000000, 570 .cpu_name = "POWER4 (compatible)", 571 .cpu_features = CPU_FTRS_COMPATIBLE, 572 .cpu_user_features = COMMON_USER_PPC64, 573 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2, 574 .icache_bsize = 128, 575 .dcache_bsize = 128, 576 .num_pmcs = 6, 577 .pmc_type = PPC_PMC_IBM, 578 .platform = "power4", 579 } 580 #endif /* CONFIG_PPC_BOOK3S_64 */ 581 582 #ifdef CONFIG_PPC32 583 #if CLASSIC_PPC 584 { /* 601 */ 585 .pvr_mask = 0xffff0000, 586 .pvr_value = 0x00010000, 587 .cpu_name = "601", 588 .cpu_features = CPU_FTRS_PPC601, 589 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 590 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 591 .mmu_features = MMU_FTR_HPTE_TABLE, 592 .icache_bsize = 32, 593 .dcache_bsize = 32, 594 .machine_check = machine_check_generic, 595 .platform = "ppc601", 596 }, 597 { /* 603 */ 598 .pvr_mask = 0xffff0000, 599 .pvr_value = 0x00030000, 600 .cpu_name = "603", 601 .cpu_features = CPU_FTRS_603, 602 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 603 .mmu_features = 0, 604 .icache_bsize = 32, 605 .dcache_bsize = 32, 606 .cpu_setup = __setup_cpu_603, 607 .machine_check = machine_check_generic, 608 .platform = "ppc603", 609 }, 610 { /* 603e */ 611 .pvr_mask = 0xffff0000, 612 .pvr_value = 0x00060000, 613 .cpu_name = "603e", 614 .cpu_features = CPU_FTRS_603, 615 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 616 .mmu_features = 0, 617 .icache_bsize = 32, 618 .dcache_bsize = 32, 619 .cpu_setup = __setup_cpu_603, 620 .machine_check = machine_check_generic, 621 .platform = "ppc603", 622 }, 623 { /* 603ev */ 624 .pvr_mask = 0xffff0000, 625 .pvr_value = 0x00070000, 626 .cpu_name = "603ev", 627 .cpu_features = CPU_FTRS_603, 628 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 629 .mmu_features = 0, 630 .icache_bsize = 32, 631 .dcache_bsize = 32, 632 .cpu_setup = __setup_cpu_603, 633 .machine_check = machine_check_generic, 634 .platform = "ppc603", 635 }, 636 { /* 604 */ 637 .pvr_mask = 0xffff0000, 638 .pvr_value = 0x00040000, 639 .cpu_name = "604", 640 .cpu_features = CPU_FTRS_604, 641 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 642 .mmu_features = MMU_FTR_HPTE_TABLE, 643 .icache_bsize = 32, 644 .dcache_bsize = 32, 645 .num_pmcs = 2, 646 .cpu_setup = __setup_cpu_604, 647 .machine_check = machine_check_generic, 648 .platform = "ppc604", 649 }, 650 { /* 604e */ 651 .pvr_mask = 0xfffff000, 652 .pvr_value = 0x00090000, 653 .cpu_name = "604e", 654 .cpu_features = CPU_FTRS_604, 655 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 656 .mmu_features = MMU_FTR_HPTE_TABLE, 657 .icache_bsize = 32, 658 .dcache_bsize = 32, 659 .num_pmcs = 4, 660 .cpu_setup = __setup_cpu_604, 661 .machine_check = machine_check_generic, 662 .platform = "ppc604", 663 }, 664 { /* 604r */ 665 .pvr_mask = 0xffff0000, 666 .pvr_value = 0x00090000, 667 .cpu_name = "604r", 668 .cpu_features = CPU_FTRS_604, 669 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 670 .mmu_features = MMU_FTR_HPTE_TABLE, 671 .icache_bsize = 32, 672 .dcache_bsize = 32, 673 .num_pmcs = 4, 674 .cpu_setup = __setup_cpu_604, 675 .machine_check = machine_check_generic, 676 .platform = "ppc604", 677 }, 678 { /* 604ev */ 679 .pvr_mask = 0xffff0000, 680 .pvr_value = 0x000a0000, 681 .cpu_name = "604ev", 682 .cpu_features = CPU_FTRS_604, 683 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 684 .mmu_features = MMU_FTR_HPTE_TABLE, 685 .icache_bsize = 32, 686 .dcache_bsize = 32, 687 .num_pmcs = 4, 688 .cpu_setup = __setup_cpu_604, 689 .machine_check = machine_check_generic, 690 .platform = "ppc604", 691 }, 692 { /* 740/750 (0x4202, don't support TAU ?) */ 693 .pvr_mask = 0xffffffff, 694 .pvr_value = 0x00084202, 695 .cpu_name = "740/750", 696 .cpu_features = CPU_FTRS_740_NOTAU, 697 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 698 .mmu_features = MMU_FTR_HPTE_TABLE, 699 .icache_bsize = 32, 700 .dcache_bsize = 32, 701 .num_pmcs = 4, 702 .cpu_setup = __setup_cpu_750, 703 .machine_check = machine_check_generic, 704 .platform = "ppc750", 705 }, 706 { /* 750CX (80100 and 8010x?) */ 707 .pvr_mask = 0xfffffff0, 708 .pvr_value = 0x00080100, 709 .cpu_name = "750CX", 710 .cpu_features = CPU_FTRS_750, 711 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 712 .mmu_features = MMU_FTR_HPTE_TABLE, 713 .icache_bsize = 32, 714 .dcache_bsize = 32, 715 .num_pmcs = 4, 716 .cpu_setup = __setup_cpu_750cx, 717 .machine_check = machine_check_generic, 718 .platform = "ppc750", 719 }, 720 { /* 750CX (82201 and 82202) */ 721 .pvr_mask = 0xfffffff0, 722 .pvr_value = 0x00082200, 723 .cpu_name = "750CX", 724 .cpu_features = CPU_FTRS_750, 725 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 726 .mmu_features = MMU_FTR_HPTE_TABLE, 727 .icache_bsize = 32, 728 .dcache_bsize = 32, 729 .num_pmcs = 4, 730 .pmc_type = PPC_PMC_IBM, 731 .cpu_setup = __setup_cpu_750cx, 732 .machine_check = machine_check_generic, 733 .platform = "ppc750", 734 }, 735 { /* 750CXe (82214) */ 736 .pvr_mask = 0xfffffff0, 737 .pvr_value = 0x00082210, 738 .cpu_name = "750CXe", 739 .cpu_features = CPU_FTRS_750, 740 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 741 .mmu_features = MMU_FTR_HPTE_TABLE, 742 .icache_bsize = 32, 743 .dcache_bsize = 32, 744 .num_pmcs = 4, 745 .pmc_type = PPC_PMC_IBM, 746 .cpu_setup = __setup_cpu_750cx, 747 .machine_check = machine_check_generic, 748 .platform = "ppc750", 749 }, 750 { /* 750CXe "Gekko" (83214) */ 751 .pvr_mask = 0xffffffff, 752 .pvr_value = 0x00083214, 753 .cpu_name = "750CXe", 754 .cpu_features = CPU_FTRS_750, 755 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 756 .mmu_features = MMU_FTR_HPTE_TABLE, 757 .icache_bsize = 32, 758 .dcache_bsize = 32, 759 .num_pmcs = 4, 760 .pmc_type = PPC_PMC_IBM, 761 .cpu_setup = __setup_cpu_750cx, 762 .machine_check = machine_check_generic, 763 .platform = "ppc750", 764 }, 765 { /* 750CL (and "Broadway") */ 766 .pvr_mask = 0xfffff0e0, 767 .pvr_value = 0x00087000, 768 .cpu_name = "750CL", 769 .cpu_features = CPU_FTRS_750CL, 770 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 771 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 772 .icache_bsize = 32, 773 .dcache_bsize = 32, 774 .num_pmcs = 4, 775 .pmc_type = PPC_PMC_IBM, 776 .cpu_setup = __setup_cpu_750, 777 .machine_check = machine_check_generic, 778 .platform = "ppc750", 779 .oprofile_cpu_type = "ppc/750", 780 .oprofile_type = PPC_OPROFILE_G4, 781 }, 782 { /* 745/755 */ 783 .pvr_mask = 0xfffff000, 784 .pvr_value = 0x00083000, 785 .cpu_name = "745/755", 786 .cpu_features = CPU_FTRS_750, 787 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 788 .mmu_features = MMU_FTR_HPTE_TABLE, 789 .icache_bsize = 32, 790 .dcache_bsize = 32, 791 .num_pmcs = 4, 792 .pmc_type = PPC_PMC_IBM, 793 .cpu_setup = __setup_cpu_750, 794 .machine_check = machine_check_generic, 795 .platform = "ppc750", 796 }, 797 { /* 750FX rev 1.x */ 798 .pvr_mask = 0xffffff00, 799 .pvr_value = 0x70000100, 800 .cpu_name = "750FX", 801 .cpu_features = CPU_FTRS_750FX1, 802 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 803 .mmu_features = MMU_FTR_HPTE_TABLE, 804 .icache_bsize = 32, 805 .dcache_bsize = 32, 806 .num_pmcs = 4, 807 .pmc_type = PPC_PMC_IBM, 808 .cpu_setup = __setup_cpu_750, 809 .machine_check = machine_check_generic, 810 .platform = "ppc750", 811 .oprofile_cpu_type = "ppc/750", 812 .oprofile_type = PPC_OPROFILE_G4, 813 }, 814 { /* 750FX rev 2.0 must disable HID0[DPM] */ 815 .pvr_mask = 0xffffffff, 816 .pvr_value = 0x70000200, 817 .cpu_name = "750FX", 818 .cpu_features = CPU_FTRS_750FX2, 819 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 820 .mmu_features = MMU_FTR_HPTE_TABLE, 821 .icache_bsize = 32, 822 .dcache_bsize = 32, 823 .num_pmcs = 4, 824 .pmc_type = PPC_PMC_IBM, 825 .cpu_setup = __setup_cpu_750, 826 .machine_check = machine_check_generic, 827 .platform = "ppc750", 828 .oprofile_cpu_type = "ppc/750", 829 .oprofile_type = PPC_OPROFILE_G4, 830 }, 831 { /* 750FX (All revs except 2.0) */ 832 .pvr_mask = 0xffff0000, 833 .pvr_value = 0x70000000, 834 .cpu_name = "750FX", 835 .cpu_features = CPU_FTRS_750FX, 836 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 837 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 838 .icache_bsize = 32, 839 .dcache_bsize = 32, 840 .num_pmcs = 4, 841 .pmc_type = PPC_PMC_IBM, 842 .cpu_setup = __setup_cpu_750fx, 843 .machine_check = machine_check_generic, 844 .platform = "ppc750", 845 .oprofile_cpu_type = "ppc/750", 846 .oprofile_type = PPC_OPROFILE_G4, 847 }, 848 { /* 750GX */ 849 .pvr_mask = 0xffff0000, 850 .pvr_value = 0x70020000, 851 .cpu_name = "750GX", 852 .cpu_features = CPU_FTRS_750GX, 853 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 854 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 855 .icache_bsize = 32, 856 .dcache_bsize = 32, 857 .num_pmcs = 4, 858 .pmc_type = PPC_PMC_IBM, 859 .cpu_setup = __setup_cpu_750fx, 860 .machine_check = machine_check_generic, 861 .platform = "ppc750", 862 .oprofile_cpu_type = "ppc/750", 863 .oprofile_type = PPC_OPROFILE_G4, 864 }, 865 { /* 740/750 (L2CR bit need fixup for 740) */ 866 .pvr_mask = 0xffff0000, 867 .pvr_value = 0x00080000, 868 .cpu_name = "740/750", 869 .cpu_features = CPU_FTRS_740, 870 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 871 .mmu_features = MMU_FTR_HPTE_TABLE, 872 .icache_bsize = 32, 873 .dcache_bsize = 32, 874 .num_pmcs = 4, 875 .pmc_type = PPC_PMC_IBM, 876 .cpu_setup = __setup_cpu_750, 877 .machine_check = machine_check_generic, 878 .platform = "ppc750", 879 }, 880 { /* 7400 rev 1.1 ? (no TAU) */ 881 .pvr_mask = 0xffffffff, 882 .pvr_value = 0x000c1101, 883 .cpu_name = "7400 (1.1)", 884 .cpu_features = CPU_FTRS_7400_NOTAU, 885 .cpu_user_features = COMMON_USER | 886 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 887 .mmu_features = MMU_FTR_HPTE_TABLE, 888 .icache_bsize = 32, 889 .dcache_bsize = 32, 890 .num_pmcs = 4, 891 .pmc_type = PPC_PMC_G4, 892 .cpu_setup = __setup_cpu_7400, 893 .machine_check = machine_check_generic, 894 .platform = "ppc7400", 895 }, 896 { /* 7400 */ 897 .pvr_mask = 0xffff0000, 898 .pvr_value = 0x000c0000, 899 .cpu_name = "7400", 900 .cpu_features = CPU_FTRS_7400, 901 .cpu_user_features = COMMON_USER | 902 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 903 .mmu_features = MMU_FTR_HPTE_TABLE, 904 .icache_bsize = 32, 905 .dcache_bsize = 32, 906 .num_pmcs = 4, 907 .pmc_type = PPC_PMC_G4, 908 .cpu_setup = __setup_cpu_7400, 909 .machine_check = machine_check_generic, 910 .platform = "ppc7400", 911 }, 912 { /* 7410 */ 913 .pvr_mask = 0xffff0000, 914 .pvr_value = 0x800c0000, 915 .cpu_name = "7410", 916 .cpu_features = CPU_FTRS_7400, 917 .cpu_user_features = COMMON_USER | 918 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 919 .mmu_features = MMU_FTR_HPTE_TABLE, 920 .icache_bsize = 32, 921 .dcache_bsize = 32, 922 .num_pmcs = 4, 923 .pmc_type = PPC_PMC_G4, 924 .cpu_setup = __setup_cpu_7410, 925 .machine_check = machine_check_generic, 926 .platform = "ppc7400", 927 }, 928 { /* 7450 2.0 - no doze/nap */ 929 .pvr_mask = 0xffffffff, 930 .pvr_value = 0x80000200, 931 .cpu_name = "7450", 932 .cpu_features = CPU_FTRS_7450_20, 933 .cpu_user_features = COMMON_USER | 934 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 935 .mmu_features = MMU_FTR_HPTE_TABLE, 936 .icache_bsize = 32, 937 .dcache_bsize = 32, 938 .num_pmcs = 6, 939 .pmc_type = PPC_PMC_G4, 940 .cpu_setup = __setup_cpu_745x, 941 .oprofile_cpu_type = "ppc/7450", 942 .oprofile_type = PPC_OPROFILE_G4, 943 .machine_check = machine_check_generic, 944 .platform = "ppc7450", 945 }, 946 { /* 7450 2.1 */ 947 .pvr_mask = 0xffffffff, 948 .pvr_value = 0x80000201, 949 .cpu_name = "7450", 950 .cpu_features = CPU_FTRS_7450_21, 951 .cpu_user_features = COMMON_USER | 952 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 953 .mmu_features = MMU_FTR_HPTE_TABLE, 954 .icache_bsize = 32, 955 .dcache_bsize = 32, 956 .num_pmcs = 6, 957 .pmc_type = PPC_PMC_G4, 958 .cpu_setup = __setup_cpu_745x, 959 .oprofile_cpu_type = "ppc/7450", 960 .oprofile_type = PPC_OPROFILE_G4, 961 .machine_check = machine_check_generic, 962 .platform = "ppc7450", 963 }, 964 { /* 7450 2.3 and newer */ 965 .pvr_mask = 0xffff0000, 966 .pvr_value = 0x80000000, 967 .cpu_name = "7450", 968 .cpu_features = CPU_FTRS_7450_23, 969 .cpu_user_features = COMMON_USER | 970 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 971 .mmu_features = MMU_FTR_HPTE_TABLE, 972 .icache_bsize = 32, 973 .dcache_bsize = 32, 974 .num_pmcs = 6, 975 .pmc_type = PPC_PMC_G4, 976 .cpu_setup = __setup_cpu_745x, 977 .oprofile_cpu_type = "ppc/7450", 978 .oprofile_type = PPC_OPROFILE_G4, 979 .machine_check = machine_check_generic, 980 .platform = "ppc7450", 981 }, 982 { /* 7455 rev 1.x */ 983 .pvr_mask = 0xffffff00, 984 .pvr_value = 0x80010100, 985 .cpu_name = "7455", 986 .cpu_features = CPU_FTRS_7455_1, 987 .cpu_user_features = COMMON_USER | 988 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 989 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 990 .icache_bsize = 32, 991 .dcache_bsize = 32, 992 .num_pmcs = 6, 993 .pmc_type = PPC_PMC_G4, 994 .cpu_setup = __setup_cpu_745x, 995 .oprofile_cpu_type = "ppc/7450", 996 .oprofile_type = PPC_OPROFILE_G4, 997 .machine_check = machine_check_generic, 998 .platform = "ppc7450", 999 }, 1000 { /* 7455 rev 2.0 */ 1001 .pvr_mask = 0xffffffff, 1002 .pvr_value = 0x80010200, 1003 .cpu_name = "7455", 1004 .cpu_features = CPU_FTRS_7455_20, 1005 .cpu_user_features = COMMON_USER | 1006 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1007 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1008 .icache_bsize = 32, 1009 .dcache_bsize = 32, 1010 .num_pmcs = 6, 1011 .pmc_type = PPC_PMC_G4, 1012 .cpu_setup = __setup_cpu_745x, 1013 .oprofile_cpu_type = "ppc/7450", 1014 .oprofile_type = PPC_OPROFILE_G4, 1015 .machine_check = machine_check_generic, 1016 .platform = "ppc7450", 1017 }, 1018 { /* 7455 others */ 1019 .pvr_mask = 0xffff0000, 1020 .pvr_value = 0x80010000, 1021 .cpu_name = "7455", 1022 .cpu_features = CPU_FTRS_7455, 1023 .cpu_user_features = COMMON_USER | 1024 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1025 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1026 .icache_bsize = 32, 1027 .dcache_bsize = 32, 1028 .num_pmcs = 6, 1029 .pmc_type = PPC_PMC_G4, 1030 .cpu_setup = __setup_cpu_745x, 1031 .oprofile_cpu_type = "ppc/7450", 1032 .oprofile_type = PPC_OPROFILE_G4, 1033 .machine_check = machine_check_generic, 1034 .platform = "ppc7450", 1035 }, 1036 { /* 7447/7457 Rev 1.0 */ 1037 .pvr_mask = 0xffffffff, 1038 .pvr_value = 0x80020100, 1039 .cpu_name = "7447/7457", 1040 .cpu_features = CPU_FTRS_7447_10, 1041 .cpu_user_features = COMMON_USER | 1042 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1043 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1044 .icache_bsize = 32, 1045 .dcache_bsize = 32, 1046 .num_pmcs = 6, 1047 .pmc_type = PPC_PMC_G4, 1048 .cpu_setup = __setup_cpu_745x, 1049 .oprofile_cpu_type = "ppc/7450", 1050 .oprofile_type = PPC_OPROFILE_G4, 1051 .machine_check = machine_check_generic, 1052 .platform = "ppc7450", 1053 }, 1054 { /* 7447/7457 Rev 1.1 */ 1055 .pvr_mask = 0xffffffff, 1056 .pvr_value = 0x80020101, 1057 .cpu_name = "7447/7457", 1058 .cpu_features = CPU_FTRS_7447_10, 1059 .cpu_user_features = COMMON_USER | 1060 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1061 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1062 .icache_bsize = 32, 1063 .dcache_bsize = 32, 1064 .num_pmcs = 6, 1065 .pmc_type = PPC_PMC_G4, 1066 .cpu_setup = __setup_cpu_745x, 1067 .oprofile_cpu_type = "ppc/7450", 1068 .oprofile_type = PPC_OPROFILE_G4, 1069 .machine_check = machine_check_generic, 1070 .platform = "ppc7450", 1071 }, 1072 { /* 7447/7457 Rev 1.2 and later */ 1073 .pvr_mask = 0xffff0000, 1074 .pvr_value = 0x80020000, 1075 .cpu_name = "7447/7457", 1076 .cpu_features = CPU_FTRS_7447, 1077 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1078 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1079 .icache_bsize = 32, 1080 .dcache_bsize = 32, 1081 .num_pmcs = 6, 1082 .pmc_type = PPC_PMC_G4, 1083 .cpu_setup = __setup_cpu_745x, 1084 .oprofile_cpu_type = "ppc/7450", 1085 .oprofile_type = PPC_OPROFILE_G4, 1086 .machine_check = machine_check_generic, 1087 .platform = "ppc7450", 1088 }, 1089 { /* 7447A */ 1090 .pvr_mask = 0xffff0000, 1091 .pvr_value = 0x80030000, 1092 .cpu_name = "7447A", 1093 .cpu_features = CPU_FTRS_7447A, 1094 .cpu_user_features = COMMON_USER | 1095 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1096 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1097 .icache_bsize = 32, 1098 .dcache_bsize = 32, 1099 .num_pmcs = 6, 1100 .pmc_type = PPC_PMC_G4, 1101 .cpu_setup = __setup_cpu_745x, 1102 .oprofile_cpu_type = "ppc/7450", 1103 .oprofile_type = PPC_OPROFILE_G4, 1104 .machine_check = machine_check_generic, 1105 .platform = "ppc7450", 1106 }, 1107 { /* 7448 */ 1108 .pvr_mask = 0xffff0000, 1109 .pvr_value = 0x80040000, 1110 .cpu_name = "7448", 1111 .cpu_features = CPU_FTRS_7448, 1112 .cpu_user_features = COMMON_USER | 1113 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1114 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1115 .icache_bsize = 32, 1116 .dcache_bsize = 32, 1117 .num_pmcs = 6, 1118 .pmc_type = PPC_PMC_G4, 1119 .cpu_setup = __setup_cpu_745x, 1120 .oprofile_cpu_type = "ppc/7450", 1121 .oprofile_type = PPC_OPROFILE_G4, 1122 .machine_check = machine_check_generic, 1123 .platform = "ppc7450", 1124 }, 1125 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1126 .pvr_mask = 0x7fff0000, 1127 .pvr_value = 0x00810000, 1128 .cpu_name = "82xx", 1129 .cpu_features = CPU_FTRS_82XX, 1130 .cpu_user_features = COMMON_USER, 1131 .mmu_features = 0, 1132 .icache_bsize = 32, 1133 .dcache_bsize = 32, 1134 .cpu_setup = __setup_cpu_603, 1135 .machine_check = machine_check_generic, 1136 .platform = "ppc603", 1137 }, 1138 { /* All G2_LE (603e core, plus some) have the same pvr */ 1139 .pvr_mask = 0x7fff0000, 1140 .pvr_value = 0x00820000, 1141 .cpu_name = "G2_LE", 1142 .cpu_features = CPU_FTRS_G2_LE, 1143 .cpu_user_features = COMMON_USER, 1144 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1145 .icache_bsize = 32, 1146 .dcache_bsize = 32, 1147 .cpu_setup = __setup_cpu_603, 1148 .machine_check = machine_check_generic, 1149 .platform = "ppc603", 1150 }, 1151 { /* e300c1 (a 603e core, plus some) on 83xx */ 1152 .pvr_mask = 0x7fff0000, 1153 .pvr_value = 0x00830000, 1154 .cpu_name = "e300c1", 1155 .cpu_features = CPU_FTRS_E300, 1156 .cpu_user_features = COMMON_USER, 1157 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1158 .icache_bsize = 32, 1159 .dcache_bsize = 32, 1160 .cpu_setup = __setup_cpu_603, 1161 .machine_check = machine_check_generic, 1162 .platform = "ppc603", 1163 }, 1164 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1165 .pvr_mask = 0x7fff0000, 1166 .pvr_value = 0x00840000, 1167 .cpu_name = "e300c2", 1168 .cpu_features = CPU_FTRS_E300C2, 1169 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1170 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1171 MMU_FTR_NEED_DTLB_SW_LRU, 1172 .icache_bsize = 32, 1173 .dcache_bsize = 32, 1174 .cpu_setup = __setup_cpu_603, 1175 .machine_check = machine_check_generic, 1176 .platform = "ppc603", 1177 }, 1178 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1179 .pvr_mask = 0x7fff0000, 1180 .pvr_value = 0x00850000, 1181 .cpu_name = "e300c3", 1182 .cpu_features = CPU_FTRS_E300, 1183 .cpu_user_features = COMMON_USER, 1184 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1185 MMU_FTR_NEED_DTLB_SW_LRU, 1186 .icache_bsize = 32, 1187 .dcache_bsize = 32, 1188 .cpu_setup = __setup_cpu_603, 1189 .num_pmcs = 4, 1190 .oprofile_cpu_type = "ppc/e300", 1191 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1192 .platform = "ppc603", 1193 }, 1194 { /* e300c4 (e300c1, plus one IU) */ 1195 .pvr_mask = 0x7fff0000, 1196 .pvr_value = 0x00860000, 1197 .cpu_name = "e300c4", 1198 .cpu_features = CPU_FTRS_E300, 1199 .cpu_user_features = COMMON_USER, 1200 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1201 MMU_FTR_NEED_DTLB_SW_LRU, 1202 .icache_bsize = 32, 1203 .dcache_bsize = 32, 1204 .cpu_setup = __setup_cpu_603, 1205 .machine_check = machine_check_generic, 1206 .num_pmcs = 4, 1207 .oprofile_cpu_type = "ppc/e300", 1208 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1209 .platform = "ppc603", 1210 }, 1211 { /* default match, we assume split I/D cache & TB (non-601)... */ 1212 .pvr_mask = 0x00000000, 1213 .pvr_value = 0x00000000, 1214 .cpu_name = "(generic PPC)", 1215 .cpu_features = CPU_FTRS_CLASSIC32, 1216 .cpu_user_features = COMMON_USER, 1217 .mmu_features = MMU_FTR_HPTE_TABLE, 1218 .icache_bsize = 32, 1219 .dcache_bsize = 32, 1220 .machine_check = machine_check_generic, 1221 .platform = "ppc603", 1222 }, 1223 #endif /* CLASSIC_PPC */ 1224 #ifdef CONFIG_8xx 1225 { /* 8xx */ 1226 .pvr_mask = 0xffff0000, 1227 .pvr_value = 0x00500000, 1228 .cpu_name = "8xx", 1229 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1230 * if the 8xx code is there.... */ 1231 .cpu_features = CPU_FTRS_8XX, 1232 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1233 .mmu_features = MMU_FTR_TYPE_8xx, 1234 .icache_bsize = 16, 1235 .dcache_bsize = 16, 1236 .platform = "ppc823", 1237 }, 1238 #endif /* CONFIG_8xx */ 1239 #ifdef CONFIG_40x 1240 { /* 403GC */ 1241 .pvr_mask = 0xffffff00, 1242 .pvr_value = 0x00200200, 1243 .cpu_name = "403GC", 1244 .cpu_features = CPU_FTRS_40X, 1245 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1246 .mmu_features = MMU_FTR_TYPE_40x, 1247 .icache_bsize = 16, 1248 .dcache_bsize = 16, 1249 .machine_check = machine_check_4xx, 1250 .platform = "ppc403", 1251 }, 1252 { /* 403GCX */ 1253 .pvr_mask = 0xffffff00, 1254 .pvr_value = 0x00201400, 1255 .cpu_name = "403GCX", 1256 .cpu_features = CPU_FTRS_40X, 1257 .cpu_user_features = PPC_FEATURE_32 | 1258 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1259 .mmu_features = MMU_FTR_TYPE_40x, 1260 .icache_bsize = 16, 1261 .dcache_bsize = 16, 1262 .machine_check = machine_check_4xx, 1263 .platform = "ppc403", 1264 }, 1265 { /* 403G ?? */ 1266 .pvr_mask = 0xffff0000, 1267 .pvr_value = 0x00200000, 1268 .cpu_name = "403G ??", 1269 .cpu_features = CPU_FTRS_40X, 1270 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1271 .mmu_features = MMU_FTR_TYPE_40x, 1272 .icache_bsize = 16, 1273 .dcache_bsize = 16, 1274 .machine_check = machine_check_4xx, 1275 .platform = "ppc403", 1276 }, 1277 { /* 405GP */ 1278 .pvr_mask = 0xffff0000, 1279 .pvr_value = 0x40110000, 1280 .cpu_name = "405GP", 1281 .cpu_features = CPU_FTRS_40X, 1282 .cpu_user_features = PPC_FEATURE_32 | 1283 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1284 .mmu_features = MMU_FTR_TYPE_40x, 1285 .icache_bsize = 32, 1286 .dcache_bsize = 32, 1287 .machine_check = machine_check_4xx, 1288 .platform = "ppc405", 1289 }, 1290 { /* STB 03xxx */ 1291 .pvr_mask = 0xffff0000, 1292 .pvr_value = 0x40130000, 1293 .cpu_name = "STB03xxx", 1294 .cpu_features = CPU_FTRS_40X, 1295 .cpu_user_features = PPC_FEATURE_32 | 1296 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1297 .mmu_features = MMU_FTR_TYPE_40x, 1298 .icache_bsize = 32, 1299 .dcache_bsize = 32, 1300 .machine_check = machine_check_4xx, 1301 .platform = "ppc405", 1302 }, 1303 { /* STB 04xxx */ 1304 .pvr_mask = 0xffff0000, 1305 .pvr_value = 0x41810000, 1306 .cpu_name = "STB04xxx", 1307 .cpu_features = CPU_FTRS_40X, 1308 .cpu_user_features = PPC_FEATURE_32 | 1309 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1310 .mmu_features = MMU_FTR_TYPE_40x, 1311 .icache_bsize = 32, 1312 .dcache_bsize = 32, 1313 .machine_check = machine_check_4xx, 1314 .platform = "ppc405", 1315 }, 1316 { /* NP405L */ 1317 .pvr_mask = 0xffff0000, 1318 .pvr_value = 0x41610000, 1319 .cpu_name = "NP405L", 1320 .cpu_features = CPU_FTRS_40X, 1321 .cpu_user_features = PPC_FEATURE_32 | 1322 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1323 .mmu_features = MMU_FTR_TYPE_40x, 1324 .icache_bsize = 32, 1325 .dcache_bsize = 32, 1326 .machine_check = machine_check_4xx, 1327 .platform = "ppc405", 1328 }, 1329 { /* NP4GS3 */ 1330 .pvr_mask = 0xffff0000, 1331 .pvr_value = 0x40B10000, 1332 .cpu_name = "NP4GS3", 1333 .cpu_features = CPU_FTRS_40X, 1334 .cpu_user_features = PPC_FEATURE_32 | 1335 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1336 .mmu_features = MMU_FTR_TYPE_40x, 1337 .icache_bsize = 32, 1338 .dcache_bsize = 32, 1339 .machine_check = machine_check_4xx, 1340 .platform = "ppc405", 1341 }, 1342 { /* NP405H */ 1343 .pvr_mask = 0xffff0000, 1344 .pvr_value = 0x41410000, 1345 .cpu_name = "NP405H", 1346 .cpu_features = CPU_FTRS_40X, 1347 .cpu_user_features = PPC_FEATURE_32 | 1348 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1349 .mmu_features = MMU_FTR_TYPE_40x, 1350 .icache_bsize = 32, 1351 .dcache_bsize = 32, 1352 .machine_check = machine_check_4xx, 1353 .platform = "ppc405", 1354 }, 1355 { /* 405GPr */ 1356 .pvr_mask = 0xffff0000, 1357 .pvr_value = 0x50910000, 1358 .cpu_name = "405GPr", 1359 .cpu_features = CPU_FTRS_40X, 1360 .cpu_user_features = PPC_FEATURE_32 | 1361 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1362 .mmu_features = MMU_FTR_TYPE_40x, 1363 .icache_bsize = 32, 1364 .dcache_bsize = 32, 1365 .machine_check = machine_check_4xx, 1366 .platform = "ppc405", 1367 }, 1368 { /* STBx25xx */ 1369 .pvr_mask = 0xffff0000, 1370 .pvr_value = 0x51510000, 1371 .cpu_name = "STBx25xx", 1372 .cpu_features = CPU_FTRS_40X, 1373 .cpu_user_features = PPC_FEATURE_32 | 1374 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1375 .mmu_features = MMU_FTR_TYPE_40x, 1376 .icache_bsize = 32, 1377 .dcache_bsize = 32, 1378 .machine_check = machine_check_4xx, 1379 .platform = "ppc405", 1380 }, 1381 { /* 405LP */ 1382 .pvr_mask = 0xffff0000, 1383 .pvr_value = 0x41F10000, 1384 .cpu_name = "405LP", 1385 .cpu_features = CPU_FTRS_40X, 1386 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1387 .mmu_features = MMU_FTR_TYPE_40x, 1388 .icache_bsize = 32, 1389 .dcache_bsize = 32, 1390 .machine_check = machine_check_4xx, 1391 .platform = "ppc405", 1392 }, 1393 { /* Xilinx Virtex-II Pro */ 1394 .pvr_mask = 0xfffff000, 1395 .pvr_value = 0x20010000, 1396 .cpu_name = "Virtex-II Pro", 1397 .cpu_features = CPU_FTRS_40X, 1398 .cpu_user_features = PPC_FEATURE_32 | 1399 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1400 .mmu_features = MMU_FTR_TYPE_40x, 1401 .icache_bsize = 32, 1402 .dcache_bsize = 32, 1403 .machine_check = machine_check_4xx, 1404 .platform = "ppc405", 1405 }, 1406 { /* Xilinx Virtex-4 FX */ 1407 .pvr_mask = 0xfffff000, 1408 .pvr_value = 0x20011000, 1409 .cpu_name = "Virtex-4 FX", 1410 .cpu_features = CPU_FTRS_40X, 1411 .cpu_user_features = PPC_FEATURE_32 | 1412 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1413 .mmu_features = MMU_FTR_TYPE_40x, 1414 .icache_bsize = 32, 1415 .dcache_bsize = 32, 1416 .machine_check = machine_check_4xx, 1417 .platform = "ppc405", 1418 }, 1419 { /* 405EP */ 1420 .pvr_mask = 0xffff0000, 1421 .pvr_value = 0x51210000, 1422 .cpu_name = "405EP", 1423 .cpu_features = CPU_FTRS_40X, 1424 .cpu_user_features = PPC_FEATURE_32 | 1425 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1426 .mmu_features = MMU_FTR_TYPE_40x, 1427 .icache_bsize = 32, 1428 .dcache_bsize = 32, 1429 .machine_check = machine_check_4xx, 1430 .platform = "ppc405", 1431 }, 1432 { /* 405EX Rev. A/B with Security */ 1433 .pvr_mask = 0xffff000f, 1434 .pvr_value = 0x12910007, 1435 .cpu_name = "405EX Rev. A/B", 1436 .cpu_features = CPU_FTRS_40X, 1437 .cpu_user_features = PPC_FEATURE_32 | 1438 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1439 .mmu_features = MMU_FTR_TYPE_40x, 1440 .icache_bsize = 32, 1441 .dcache_bsize = 32, 1442 .machine_check = machine_check_4xx, 1443 .platform = "ppc405", 1444 }, 1445 { /* 405EX Rev. C without Security */ 1446 .pvr_mask = 0xffff000f, 1447 .pvr_value = 0x1291000d, 1448 .cpu_name = "405EX Rev. C", 1449 .cpu_features = CPU_FTRS_40X, 1450 .cpu_user_features = PPC_FEATURE_32 | 1451 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1452 .mmu_features = MMU_FTR_TYPE_40x, 1453 .icache_bsize = 32, 1454 .dcache_bsize = 32, 1455 .machine_check = machine_check_4xx, 1456 .platform = "ppc405", 1457 }, 1458 { /* 405EX Rev. C with Security */ 1459 .pvr_mask = 0xffff000f, 1460 .pvr_value = 0x1291000f, 1461 .cpu_name = "405EX Rev. C", 1462 .cpu_features = CPU_FTRS_40X, 1463 .cpu_user_features = PPC_FEATURE_32 | 1464 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1465 .mmu_features = MMU_FTR_TYPE_40x, 1466 .icache_bsize = 32, 1467 .dcache_bsize = 32, 1468 .machine_check = machine_check_4xx, 1469 .platform = "ppc405", 1470 }, 1471 { /* 405EX Rev. D without Security */ 1472 .pvr_mask = 0xffff000f, 1473 .pvr_value = 0x12910003, 1474 .cpu_name = "405EX Rev. D", 1475 .cpu_features = CPU_FTRS_40X, 1476 .cpu_user_features = PPC_FEATURE_32 | 1477 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1478 .mmu_features = MMU_FTR_TYPE_40x, 1479 .icache_bsize = 32, 1480 .dcache_bsize = 32, 1481 .machine_check = machine_check_4xx, 1482 .platform = "ppc405", 1483 }, 1484 { /* 405EX Rev. D with Security */ 1485 .pvr_mask = 0xffff000f, 1486 .pvr_value = 0x12910005, 1487 .cpu_name = "405EX Rev. D", 1488 .cpu_features = CPU_FTRS_40X, 1489 .cpu_user_features = PPC_FEATURE_32 | 1490 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1491 .mmu_features = MMU_FTR_TYPE_40x, 1492 .icache_bsize = 32, 1493 .dcache_bsize = 32, 1494 .machine_check = machine_check_4xx, 1495 .platform = "ppc405", 1496 }, 1497 { /* 405EXr Rev. A/B without Security */ 1498 .pvr_mask = 0xffff000f, 1499 .pvr_value = 0x12910001, 1500 .cpu_name = "405EXr Rev. A/B", 1501 .cpu_features = CPU_FTRS_40X, 1502 .cpu_user_features = PPC_FEATURE_32 | 1503 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1504 .mmu_features = MMU_FTR_TYPE_40x, 1505 .icache_bsize = 32, 1506 .dcache_bsize = 32, 1507 .machine_check = machine_check_4xx, 1508 .platform = "ppc405", 1509 }, 1510 { /* 405EXr Rev. C without Security */ 1511 .pvr_mask = 0xffff000f, 1512 .pvr_value = 0x12910009, 1513 .cpu_name = "405EXr Rev. C", 1514 .cpu_features = CPU_FTRS_40X, 1515 .cpu_user_features = PPC_FEATURE_32 | 1516 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1517 .mmu_features = MMU_FTR_TYPE_40x, 1518 .icache_bsize = 32, 1519 .dcache_bsize = 32, 1520 .machine_check = machine_check_4xx, 1521 .platform = "ppc405", 1522 }, 1523 { /* 405EXr Rev. C with Security */ 1524 .pvr_mask = 0xffff000f, 1525 .pvr_value = 0x1291000b, 1526 .cpu_name = "405EXr Rev. C", 1527 .cpu_features = CPU_FTRS_40X, 1528 .cpu_user_features = PPC_FEATURE_32 | 1529 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1530 .mmu_features = MMU_FTR_TYPE_40x, 1531 .icache_bsize = 32, 1532 .dcache_bsize = 32, 1533 .machine_check = machine_check_4xx, 1534 .platform = "ppc405", 1535 }, 1536 { /* 405EXr Rev. D without Security */ 1537 .pvr_mask = 0xffff000f, 1538 .pvr_value = 0x12910000, 1539 .cpu_name = "405EXr Rev. D", 1540 .cpu_features = CPU_FTRS_40X, 1541 .cpu_user_features = PPC_FEATURE_32 | 1542 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1543 .mmu_features = MMU_FTR_TYPE_40x, 1544 .icache_bsize = 32, 1545 .dcache_bsize = 32, 1546 .machine_check = machine_check_4xx, 1547 .platform = "ppc405", 1548 }, 1549 { /* 405EXr Rev. D with Security */ 1550 .pvr_mask = 0xffff000f, 1551 .pvr_value = 0x12910002, 1552 .cpu_name = "405EXr Rev. D", 1553 .cpu_features = CPU_FTRS_40X, 1554 .cpu_user_features = PPC_FEATURE_32 | 1555 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1556 .mmu_features = MMU_FTR_TYPE_40x, 1557 .icache_bsize = 32, 1558 .dcache_bsize = 32, 1559 .machine_check = machine_check_4xx, 1560 .platform = "ppc405", 1561 }, 1562 { 1563 /* 405EZ */ 1564 .pvr_mask = 0xffff0000, 1565 .pvr_value = 0x41510000, 1566 .cpu_name = "405EZ", 1567 .cpu_features = CPU_FTRS_40X, 1568 .cpu_user_features = PPC_FEATURE_32 | 1569 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1570 .mmu_features = MMU_FTR_TYPE_40x, 1571 .icache_bsize = 32, 1572 .dcache_bsize = 32, 1573 .machine_check = machine_check_4xx, 1574 .platform = "ppc405", 1575 }, 1576 { /* APM8018X */ 1577 .pvr_mask = 0xffff0000, 1578 .pvr_value = 0x7ff11432, 1579 .cpu_name = "APM8018X", 1580 .cpu_features = CPU_FTRS_40X, 1581 .cpu_user_features = PPC_FEATURE_32 | 1582 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1583 .mmu_features = MMU_FTR_TYPE_40x, 1584 .icache_bsize = 32, 1585 .dcache_bsize = 32, 1586 .machine_check = machine_check_4xx, 1587 .platform = "ppc405", 1588 }, 1589 { /* default match */ 1590 .pvr_mask = 0x00000000, 1591 .pvr_value = 0x00000000, 1592 .cpu_name = "(generic 40x PPC)", 1593 .cpu_features = CPU_FTRS_40X, 1594 .cpu_user_features = PPC_FEATURE_32 | 1595 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1596 .mmu_features = MMU_FTR_TYPE_40x, 1597 .icache_bsize = 32, 1598 .dcache_bsize = 32, 1599 .machine_check = machine_check_4xx, 1600 .platform = "ppc405", 1601 } 1602 1603 #endif /* CONFIG_40x */ 1604 #ifdef CONFIG_44x 1605 { 1606 .pvr_mask = 0xf0000fff, 1607 .pvr_value = 0x40000850, 1608 .cpu_name = "440GR Rev. A", 1609 .cpu_features = CPU_FTRS_44X, 1610 .cpu_user_features = COMMON_USER_BOOKE, 1611 .mmu_features = MMU_FTR_TYPE_44x, 1612 .icache_bsize = 32, 1613 .dcache_bsize = 32, 1614 .machine_check = machine_check_4xx, 1615 .platform = "ppc440", 1616 }, 1617 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1618 .pvr_mask = 0xf0000fff, 1619 .pvr_value = 0x40000858, 1620 .cpu_name = "440EP Rev. A", 1621 .cpu_features = CPU_FTRS_44X, 1622 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1623 .mmu_features = MMU_FTR_TYPE_44x, 1624 .icache_bsize = 32, 1625 .dcache_bsize = 32, 1626 .cpu_setup = __setup_cpu_440ep, 1627 .machine_check = machine_check_4xx, 1628 .platform = "ppc440", 1629 }, 1630 { 1631 .pvr_mask = 0xf0000fff, 1632 .pvr_value = 0x400008d3, 1633 .cpu_name = "440GR Rev. B", 1634 .cpu_features = CPU_FTRS_44X, 1635 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1636 .mmu_features = MMU_FTR_TYPE_44x, 1637 .icache_bsize = 32, 1638 .dcache_bsize = 32, 1639 .machine_check = machine_check_4xx, 1640 .platform = "ppc440", 1641 }, 1642 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1643 .pvr_mask = 0xf0000ff7, 1644 .pvr_value = 0x400008d4, 1645 .cpu_name = "440EP Rev. C", 1646 .cpu_features = CPU_FTRS_44X, 1647 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1648 .mmu_features = MMU_FTR_TYPE_44x, 1649 .icache_bsize = 32, 1650 .dcache_bsize = 32, 1651 .cpu_setup = __setup_cpu_440ep, 1652 .machine_check = machine_check_4xx, 1653 .platform = "ppc440", 1654 }, 1655 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1656 .pvr_mask = 0xf0000fff, 1657 .pvr_value = 0x400008db, 1658 .cpu_name = "440EP Rev. B", 1659 .cpu_features = CPU_FTRS_44X, 1660 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1661 .mmu_features = MMU_FTR_TYPE_44x, 1662 .icache_bsize = 32, 1663 .dcache_bsize = 32, 1664 .cpu_setup = __setup_cpu_440ep, 1665 .machine_check = machine_check_4xx, 1666 .platform = "ppc440", 1667 }, 1668 { /* 440GRX */ 1669 .pvr_mask = 0xf0000ffb, 1670 .pvr_value = 0x200008D0, 1671 .cpu_name = "440GRX", 1672 .cpu_features = CPU_FTRS_44X, 1673 .cpu_user_features = COMMON_USER_BOOKE, 1674 .mmu_features = MMU_FTR_TYPE_44x, 1675 .icache_bsize = 32, 1676 .dcache_bsize = 32, 1677 .cpu_setup = __setup_cpu_440grx, 1678 .machine_check = machine_check_440A, 1679 .platform = "ppc440", 1680 }, 1681 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1682 .pvr_mask = 0xf0000ffb, 1683 .pvr_value = 0x200008D8, 1684 .cpu_name = "440EPX", 1685 .cpu_features = CPU_FTRS_44X, 1686 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1687 .mmu_features = MMU_FTR_TYPE_44x, 1688 .icache_bsize = 32, 1689 .dcache_bsize = 32, 1690 .cpu_setup = __setup_cpu_440epx, 1691 .machine_check = machine_check_440A, 1692 .platform = "ppc440", 1693 }, 1694 { /* 440GP Rev. B */ 1695 .pvr_mask = 0xf0000fff, 1696 .pvr_value = 0x40000440, 1697 .cpu_name = "440GP Rev. B", 1698 .cpu_features = CPU_FTRS_44X, 1699 .cpu_user_features = COMMON_USER_BOOKE, 1700 .mmu_features = MMU_FTR_TYPE_44x, 1701 .icache_bsize = 32, 1702 .dcache_bsize = 32, 1703 .machine_check = machine_check_4xx, 1704 .platform = "ppc440gp", 1705 }, 1706 { /* 440GP Rev. C */ 1707 .pvr_mask = 0xf0000fff, 1708 .pvr_value = 0x40000481, 1709 .cpu_name = "440GP Rev. C", 1710 .cpu_features = CPU_FTRS_44X, 1711 .cpu_user_features = COMMON_USER_BOOKE, 1712 .mmu_features = MMU_FTR_TYPE_44x, 1713 .icache_bsize = 32, 1714 .dcache_bsize = 32, 1715 .machine_check = machine_check_4xx, 1716 .platform = "ppc440gp", 1717 }, 1718 { /* 440GX Rev. A */ 1719 .pvr_mask = 0xf0000fff, 1720 .pvr_value = 0x50000850, 1721 .cpu_name = "440GX Rev. A", 1722 .cpu_features = CPU_FTRS_44X, 1723 .cpu_user_features = COMMON_USER_BOOKE, 1724 .mmu_features = MMU_FTR_TYPE_44x, 1725 .icache_bsize = 32, 1726 .dcache_bsize = 32, 1727 .cpu_setup = __setup_cpu_440gx, 1728 .machine_check = machine_check_440A, 1729 .platform = "ppc440", 1730 }, 1731 { /* 440GX Rev. B */ 1732 .pvr_mask = 0xf0000fff, 1733 .pvr_value = 0x50000851, 1734 .cpu_name = "440GX Rev. B", 1735 .cpu_features = CPU_FTRS_44X, 1736 .cpu_user_features = COMMON_USER_BOOKE, 1737 .mmu_features = MMU_FTR_TYPE_44x, 1738 .icache_bsize = 32, 1739 .dcache_bsize = 32, 1740 .cpu_setup = __setup_cpu_440gx, 1741 .machine_check = machine_check_440A, 1742 .platform = "ppc440", 1743 }, 1744 { /* 440GX Rev. C */ 1745 .pvr_mask = 0xf0000fff, 1746 .pvr_value = 0x50000892, 1747 .cpu_name = "440GX Rev. C", 1748 .cpu_features = CPU_FTRS_44X, 1749 .cpu_user_features = COMMON_USER_BOOKE, 1750 .mmu_features = MMU_FTR_TYPE_44x, 1751 .icache_bsize = 32, 1752 .dcache_bsize = 32, 1753 .cpu_setup = __setup_cpu_440gx, 1754 .machine_check = machine_check_440A, 1755 .platform = "ppc440", 1756 }, 1757 { /* 440GX Rev. F */ 1758 .pvr_mask = 0xf0000fff, 1759 .pvr_value = 0x50000894, 1760 .cpu_name = "440GX Rev. F", 1761 .cpu_features = CPU_FTRS_44X, 1762 .cpu_user_features = COMMON_USER_BOOKE, 1763 .mmu_features = MMU_FTR_TYPE_44x, 1764 .icache_bsize = 32, 1765 .dcache_bsize = 32, 1766 .cpu_setup = __setup_cpu_440gx, 1767 .machine_check = machine_check_440A, 1768 .platform = "ppc440", 1769 }, 1770 { /* 440SP Rev. A */ 1771 .pvr_mask = 0xfff00fff, 1772 .pvr_value = 0x53200891, 1773 .cpu_name = "440SP Rev. A", 1774 .cpu_features = CPU_FTRS_44X, 1775 .cpu_user_features = COMMON_USER_BOOKE, 1776 .mmu_features = MMU_FTR_TYPE_44x, 1777 .icache_bsize = 32, 1778 .dcache_bsize = 32, 1779 .machine_check = machine_check_4xx, 1780 .platform = "ppc440", 1781 }, 1782 { /* 440SPe Rev. A */ 1783 .pvr_mask = 0xfff00fff, 1784 .pvr_value = 0x53400890, 1785 .cpu_name = "440SPe Rev. A", 1786 .cpu_features = CPU_FTRS_44X, 1787 .cpu_user_features = COMMON_USER_BOOKE, 1788 .mmu_features = MMU_FTR_TYPE_44x, 1789 .icache_bsize = 32, 1790 .dcache_bsize = 32, 1791 .cpu_setup = __setup_cpu_440spe, 1792 .machine_check = machine_check_440A, 1793 .platform = "ppc440", 1794 }, 1795 { /* 440SPe Rev. B */ 1796 .pvr_mask = 0xfff00fff, 1797 .pvr_value = 0x53400891, 1798 .cpu_name = "440SPe Rev. B", 1799 .cpu_features = CPU_FTRS_44X, 1800 .cpu_user_features = COMMON_USER_BOOKE, 1801 .mmu_features = MMU_FTR_TYPE_44x, 1802 .icache_bsize = 32, 1803 .dcache_bsize = 32, 1804 .cpu_setup = __setup_cpu_440spe, 1805 .machine_check = machine_check_440A, 1806 .platform = "ppc440", 1807 }, 1808 { /* 440 in Xilinx Virtex-5 FXT */ 1809 .pvr_mask = 0xfffffff0, 1810 .pvr_value = 0x7ff21910, 1811 .cpu_name = "440 in Virtex-5 FXT", 1812 .cpu_features = CPU_FTRS_44X, 1813 .cpu_user_features = COMMON_USER_BOOKE, 1814 .mmu_features = MMU_FTR_TYPE_44x, 1815 .icache_bsize = 32, 1816 .dcache_bsize = 32, 1817 .cpu_setup = __setup_cpu_440x5, 1818 .machine_check = machine_check_440A, 1819 .platform = "ppc440", 1820 }, 1821 { /* 460EX */ 1822 .pvr_mask = 0xffff0006, 1823 .pvr_value = 0x13020002, 1824 .cpu_name = "460EX", 1825 .cpu_features = CPU_FTRS_440x6, 1826 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1827 .mmu_features = MMU_FTR_TYPE_44x, 1828 .icache_bsize = 32, 1829 .dcache_bsize = 32, 1830 .cpu_setup = __setup_cpu_460ex, 1831 .machine_check = machine_check_440A, 1832 .platform = "ppc440", 1833 }, 1834 { /* 460EX Rev B */ 1835 .pvr_mask = 0xffff0007, 1836 .pvr_value = 0x13020004, 1837 .cpu_name = "460EX Rev. B", 1838 .cpu_features = CPU_FTRS_440x6, 1839 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1840 .mmu_features = MMU_FTR_TYPE_44x, 1841 .icache_bsize = 32, 1842 .dcache_bsize = 32, 1843 .cpu_setup = __setup_cpu_460ex, 1844 .machine_check = machine_check_440A, 1845 .platform = "ppc440", 1846 }, 1847 { /* 460GT */ 1848 .pvr_mask = 0xffff0006, 1849 .pvr_value = 0x13020000, 1850 .cpu_name = "460GT", 1851 .cpu_features = CPU_FTRS_440x6, 1852 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1853 .mmu_features = MMU_FTR_TYPE_44x, 1854 .icache_bsize = 32, 1855 .dcache_bsize = 32, 1856 .cpu_setup = __setup_cpu_460gt, 1857 .machine_check = machine_check_440A, 1858 .platform = "ppc440", 1859 }, 1860 { /* 460GT Rev B */ 1861 .pvr_mask = 0xffff0007, 1862 .pvr_value = 0x13020005, 1863 .cpu_name = "460GT Rev. B", 1864 .cpu_features = CPU_FTRS_440x6, 1865 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1866 .mmu_features = MMU_FTR_TYPE_44x, 1867 .icache_bsize = 32, 1868 .dcache_bsize = 32, 1869 .cpu_setup = __setup_cpu_460gt, 1870 .machine_check = machine_check_440A, 1871 .platform = "ppc440", 1872 }, 1873 { /* 460SX */ 1874 .pvr_mask = 0xffffff00, 1875 .pvr_value = 0x13541800, 1876 .cpu_name = "460SX", 1877 .cpu_features = CPU_FTRS_44X, 1878 .cpu_user_features = COMMON_USER_BOOKE, 1879 .mmu_features = MMU_FTR_TYPE_44x, 1880 .icache_bsize = 32, 1881 .dcache_bsize = 32, 1882 .cpu_setup = __setup_cpu_460sx, 1883 .machine_check = machine_check_440A, 1884 .platform = "ppc440", 1885 }, 1886 { /* 464 in APM821xx */ 1887 .pvr_mask = 0xfffffff0, 1888 .pvr_value = 0x12C41C80, 1889 .cpu_name = "APM821XX", 1890 .cpu_features = CPU_FTRS_44X, 1891 .cpu_user_features = COMMON_USER_BOOKE | 1892 PPC_FEATURE_HAS_FPU, 1893 .mmu_features = MMU_FTR_TYPE_44x, 1894 .icache_bsize = 32, 1895 .dcache_bsize = 32, 1896 .cpu_setup = __setup_cpu_apm821xx, 1897 .machine_check = machine_check_440A, 1898 .platform = "ppc440", 1899 }, 1900 { /* 476 DD2 core */ 1901 .pvr_mask = 0xffffffff, 1902 .pvr_value = 0x11a52080, 1903 .cpu_name = "476", 1904 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1905 .cpu_user_features = COMMON_USER_BOOKE | 1906 PPC_FEATURE_HAS_FPU, 1907 .mmu_features = MMU_FTR_TYPE_47x | 1908 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1909 .icache_bsize = 32, 1910 .dcache_bsize = 128, 1911 .machine_check = machine_check_47x, 1912 .platform = "ppc470", 1913 }, 1914 { /* 476fpe */ 1915 .pvr_mask = 0xffff0000, 1916 .pvr_value = 0x7ff50000, 1917 .cpu_name = "476fpe", 1918 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1919 .cpu_user_features = COMMON_USER_BOOKE | 1920 PPC_FEATURE_HAS_FPU, 1921 .mmu_features = MMU_FTR_TYPE_47x | 1922 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1923 .icache_bsize = 32, 1924 .dcache_bsize = 128, 1925 .machine_check = machine_check_47x, 1926 .platform = "ppc470", 1927 }, 1928 { /* 476 iss */ 1929 .pvr_mask = 0xffff0000, 1930 .pvr_value = 0x00050000, 1931 .cpu_name = "476", 1932 .cpu_features = CPU_FTRS_47X, 1933 .cpu_user_features = COMMON_USER_BOOKE | 1934 PPC_FEATURE_HAS_FPU, 1935 .mmu_features = MMU_FTR_TYPE_47x | 1936 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1937 .icache_bsize = 32, 1938 .dcache_bsize = 128, 1939 .machine_check = machine_check_47x, 1940 .platform = "ppc470", 1941 }, 1942 { /* 476 others */ 1943 .pvr_mask = 0xffff0000, 1944 .pvr_value = 0x11a50000, 1945 .cpu_name = "476", 1946 .cpu_features = CPU_FTRS_47X, 1947 .cpu_user_features = COMMON_USER_BOOKE | 1948 PPC_FEATURE_HAS_FPU, 1949 .mmu_features = MMU_FTR_TYPE_47x | 1950 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1951 .icache_bsize = 32, 1952 .dcache_bsize = 128, 1953 .machine_check = machine_check_47x, 1954 .platform = "ppc470", 1955 }, 1956 { /* default match */ 1957 .pvr_mask = 0x00000000, 1958 .pvr_value = 0x00000000, 1959 .cpu_name = "(generic 44x PPC)", 1960 .cpu_features = CPU_FTRS_44X, 1961 .cpu_user_features = COMMON_USER_BOOKE, 1962 .mmu_features = MMU_FTR_TYPE_44x, 1963 .icache_bsize = 32, 1964 .dcache_bsize = 32, 1965 .machine_check = machine_check_4xx, 1966 .platform = "ppc440", 1967 } 1968 #endif /* CONFIG_44x */ 1969 #ifdef CONFIG_E200 1970 { /* e200z5 */ 1971 .pvr_mask = 0xfff00000, 1972 .pvr_value = 0x81000000, 1973 .cpu_name = "e200z5", 1974 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1975 .cpu_features = CPU_FTRS_E200, 1976 .cpu_user_features = COMMON_USER_BOOKE | 1977 PPC_FEATURE_HAS_EFP_SINGLE | 1978 PPC_FEATURE_UNIFIED_CACHE, 1979 .mmu_features = MMU_FTR_TYPE_FSL_E, 1980 .dcache_bsize = 32, 1981 .machine_check = machine_check_e200, 1982 .platform = "ppc5554", 1983 }, 1984 { /* e200z6 */ 1985 .pvr_mask = 0xfff00000, 1986 .pvr_value = 0x81100000, 1987 .cpu_name = "e200z6", 1988 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1989 .cpu_features = CPU_FTRS_E200, 1990 .cpu_user_features = COMMON_USER_BOOKE | 1991 PPC_FEATURE_HAS_SPE_COMP | 1992 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1993 PPC_FEATURE_UNIFIED_CACHE, 1994 .mmu_features = MMU_FTR_TYPE_FSL_E, 1995 .dcache_bsize = 32, 1996 .machine_check = machine_check_e200, 1997 .platform = "ppc5554", 1998 }, 1999 { /* default match */ 2000 .pvr_mask = 0x00000000, 2001 .pvr_value = 0x00000000, 2002 .cpu_name = "(generic E200 PPC)", 2003 .cpu_features = CPU_FTRS_E200, 2004 .cpu_user_features = COMMON_USER_BOOKE | 2005 PPC_FEATURE_HAS_EFP_SINGLE | 2006 PPC_FEATURE_UNIFIED_CACHE, 2007 .mmu_features = MMU_FTR_TYPE_FSL_E, 2008 .dcache_bsize = 32, 2009 .cpu_setup = __setup_cpu_e200, 2010 .machine_check = machine_check_e200, 2011 .platform = "ppc5554", 2012 } 2013 #endif /* CONFIG_E200 */ 2014 #endif /* CONFIG_PPC32 */ 2015 #ifdef CONFIG_E500 2016 #ifdef CONFIG_PPC32 2017 { /* e500 */ 2018 .pvr_mask = 0xffff0000, 2019 .pvr_value = 0x80200000, 2020 .cpu_name = "e500", 2021 .cpu_features = CPU_FTRS_E500, 2022 .cpu_user_features = COMMON_USER_BOOKE | 2023 PPC_FEATURE_HAS_SPE_COMP | 2024 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2025 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2026 .mmu_features = MMU_FTR_TYPE_FSL_E, 2027 .icache_bsize = 32, 2028 .dcache_bsize = 32, 2029 .num_pmcs = 4, 2030 .oprofile_cpu_type = "ppc/e500", 2031 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2032 .cpu_setup = __setup_cpu_e500v1, 2033 .machine_check = machine_check_e500, 2034 .platform = "ppc8540", 2035 }, 2036 { /* e500v2 */ 2037 .pvr_mask = 0xffff0000, 2038 .pvr_value = 0x80210000, 2039 .cpu_name = "e500v2", 2040 .cpu_features = CPU_FTRS_E500_2, 2041 .cpu_user_features = COMMON_USER_BOOKE | 2042 PPC_FEATURE_HAS_SPE_COMP | 2043 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2044 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 2045 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2046 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 2047 .icache_bsize = 32, 2048 .dcache_bsize = 32, 2049 .num_pmcs = 4, 2050 .oprofile_cpu_type = "ppc/e500", 2051 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2052 .cpu_setup = __setup_cpu_e500v2, 2053 .machine_check = machine_check_e500, 2054 .platform = "ppc8548", 2055 }, 2056 { /* e500mc */ 2057 .pvr_mask = 0xffff0000, 2058 .pvr_value = 0x80230000, 2059 .cpu_name = "e500mc", 2060 .cpu_features = CPU_FTRS_E500MC, 2061 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2062 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2063 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2064 MMU_FTR_USE_TLBILX, 2065 .icache_bsize = 64, 2066 .dcache_bsize = 64, 2067 .num_pmcs = 4, 2068 .oprofile_cpu_type = "ppc/e500mc", 2069 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2070 .cpu_setup = __setup_cpu_e500mc, 2071 .machine_check = machine_check_e500mc, 2072 .platform = "ppce500mc", 2073 }, 2074 #endif /* CONFIG_PPC32 */ 2075 { /* e5500 */ 2076 .pvr_mask = 0xffff0000, 2077 .pvr_value = 0x80240000, 2078 .cpu_name = "e5500", 2079 .cpu_features = CPU_FTRS_E5500, 2080 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2081 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2082 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2083 MMU_FTR_USE_TLBILX, 2084 .icache_bsize = 64, 2085 .dcache_bsize = 64, 2086 .num_pmcs = 4, 2087 .oprofile_cpu_type = "ppc/e500mc", 2088 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2089 .cpu_setup = __setup_cpu_e5500, 2090 #ifndef CONFIG_PPC32 2091 .cpu_restore = __restore_cpu_e5500, 2092 #endif 2093 .machine_check = machine_check_e500mc, 2094 .platform = "ppce5500", 2095 }, 2096 { /* e6500 */ 2097 .pvr_mask = 0xffff0000, 2098 .pvr_value = 0x80400000, 2099 .cpu_name = "e6500", 2100 .cpu_features = CPU_FTRS_E6500, 2101 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2102 PPC_FEATURE_HAS_ALTIVEC_COMP, 2103 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2104 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2105 MMU_FTR_USE_TLBILX, 2106 .icache_bsize = 64, 2107 .dcache_bsize = 64, 2108 .num_pmcs = 4, 2109 .oprofile_cpu_type = "ppc/e6500", 2110 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2111 .cpu_setup = __setup_cpu_e6500, 2112 #ifndef CONFIG_PPC32 2113 .cpu_restore = __restore_cpu_e6500, 2114 #endif 2115 .machine_check = machine_check_e500mc, 2116 .platform = "ppce6500", 2117 }, 2118 #ifdef CONFIG_PPC32 2119 { /* default match */ 2120 .pvr_mask = 0x00000000, 2121 .pvr_value = 0x00000000, 2122 .cpu_name = "(generic E500 PPC)", 2123 .cpu_features = CPU_FTRS_E500, 2124 .cpu_user_features = COMMON_USER_BOOKE | 2125 PPC_FEATURE_HAS_SPE_COMP | 2126 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2127 .mmu_features = MMU_FTR_TYPE_FSL_E, 2128 .icache_bsize = 32, 2129 .dcache_bsize = 32, 2130 .machine_check = machine_check_e500, 2131 .platform = "powerpc", 2132 } 2133 #endif /* CONFIG_PPC32 */ 2134 #endif /* CONFIG_E500 */ 2135 2136 #ifdef CONFIG_PPC_A2 2137 { /* Standard A2 (>= DD2) + FPU core */ 2138 .pvr_mask = 0xffff0000, 2139 .pvr_value = 0x00480000, 2140 .cpu_name = "A2 (>= DD2)", 2141 .cpu_features = CPU_FTRS_A2, 2142 .cpu_user_features = COMMON_USER_PPC64, 2143 .mmu_features = MMU_FTRS_A2, 2144 .icache_bsize = 64, 2145 .dcache_bsize = 64, 2146 .num_pmcs = 0, 2147 .cpu_setup = __setup_cpu_a2, 2148 .cpu_restore = __restore_cpu_a2, 2149 .machine_check = machine_check_generic, 2150 .platform = "ppca2", 2151 }, 2152 { /* This is a default entry to get going, to be replaced by 2153 * a real one at some stage 2154 */ 2155 #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \ 2156 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \ 2157 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) 2158 .pvr_mask = 0x00000000, 2159 .pvr_value = 0x00000000, 2160 .cpu_name = "Book3E", 2161 .cpu_features = CPU_FTRS_BASE_BOOK3E, 2162 .cpu_user_features = COMMON_USER_PPC64, 2163 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX | 2164 MMU_FTR_USE_TLBIVAX_BCAST | 2165 MMU_FTR_LOCK_BCAST_INVAL, 2166 .icache_bsize = 64, 2167 .dcache_bsize = 64, 2168 .num_pmcs = 0, 2169 .machine_check = machine_check_generic, 2170 .platform = "power6", 2171 }, 2172 #endif /* CONFIG_PPC_A2 */ 2173 }; 2174 2175 static struct cpu_spec the_cpu_spec; 2176 2177 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2178 struct cpu_spec *s) 2179 { 2180 struct cpu_spec *t = &the_cpu_spec; 2181 struct cpu_spec old; 2182 2183 t = PTRRELOC(t); 2184 old = *t; 2185 2186 /* Copy everything, then do fixups */ 2187 *t = *s; 2188 2189 /* 2190 * If we are overriding a previous value derived from the real 2191 * PVR with a new value obtained using a logical PVR value, 2192 * don't modify the performance monitor fields. 2193 */ 2194 if (old.num_pmcs && !s->num_pmcs) { 2195 t->num_pmcs = old.num_pmcs; 2196 t->pmc_type = old.pmc_type; 2197 t->oprofile_type = old.oprofile_type; 2198 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2199 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2200 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2201 2202 /* 2203 * If we have passed through this logic once before and 2204 * have pulled the default case because the real PVR was 2205 * not found inside cpu_specs[], then we are possibly 2206 * running in compatibility mode. In that case, let the 2207 * oprofiler know which set of compatibility counters to 2208 * pull from by making sure the oprofile_cpu_type string 2209 * is set to that of compatibility mode. If the 2210 * oprofile_cpu_type already has a value, then we are 2211 * possibly overriding a real PVR with a logical one, 2212 * and, in that case, keep the current value for 2213 * oprofile_cpu_type. 2214 */ 2215 if (old.oprofile_cpu_type != NULL) { 2216 t->oprofile_cpu_type = old.oprofile_cpu_type; 2217 t->oprofile_type = old.oprofile_type; 2218 } 2219 } 2220 2221 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2222 2223 /* 2224 * Set the base platform string once; assumes 2225 * we're called with real pvr first. 2226 */ 2227 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2228 *PTRRELOC(&powerpc_base_platform) = t->platform; 2229 2230 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2231 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2232 * that processor. I will consolidate that at a later time, for now, 2233 * just use #ifdef. We also don't need to PTRRELOC the function 2234 * pointer on ppc64 and booke as we are running at 0 in real mode 2235 * on ppc64 and reloc_offset is always 0 on booke. 2236 */ 2237 if (t->cpu_setup) { 2238 t->cpu_setup(offset, t); 2239 } 2240 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2241 2242 return t; 2243 } 2244 2245 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2246 { 2247 struct cpu_spec *s = cpu_specs; 2248 int i; 2249 2250 s = PTRRELOC(s); 2251 2252 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2253 if ((pvr & s->pvr_mask) == s->pvr_value) 2254 return setup_cpu_spec(offset, s); 2255 } 2256 2257 BUG(); 2258 2259 return NULL; 2260 } 2261