1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 4 * 5 * Modifications for ppc64: 6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 7 */ 8 9 #include <linux/string.h> 10 #include <linux/sched.h> 11 #include <linux/threads.h> 12 #include <linux/init.h> 13 #include <linux/export.h> 14 #include <linux/jump_label.h> 15 16 #include <asm/oprofile_impl.h> 17 #include <asm/cputable.h> 18 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 19 #include <asm/mmu.h> 20 #include <asm/setup.h> 21 22 static struct cpu_spec the_cpu_spec __read_mostly; 23 24 struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 25 EXPORT_SYMBOL(cur_cpu_spec); 26 27 /* The platform string corresponding to the real PVR */ 28 const char *powerpc_base_platform; 29 30 /* NOTE: 31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 32 * the responsibility of the appropriate CPU save/restore functions to 33 * eventually copy these settings over. Those save/restore aren't yet 34 * part of the cputable though. That has to be fixed for both ppc32 35 * and ppc64 36 */ 37 #ifdef CONFIG_PPC32 38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 51 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 52 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 60 #endif /* CONFIG_PPC32 */ 61 #ifdef CONFIG_PPC64 62 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 64 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 65 extern void __restore_cpu_pa6t(void); 66 extern void __restore_cpu_ppc970(void); 67 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 68 extern void __restore_cpu_power7(void); 69 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 70 extern void __restore_cpu_power8(void); 71 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); 72 extern void __restore_cpu_power9(void); 73 extern void __setup_cpu_power10(unsigned long offset, struct cpu_spec* spec); 74 extern void __restore_cpu_power10(void); 75 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 76 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 77 extern long __machine_check_early_realmode_p9(struct pt_regs *regs); 78 #endif /* CONFIG_PPC64 */ 79 #if defined(CONFIG_E500) 80 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 81 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 82 extern void __restore_cpu_e5500(void); 83 extern void __restore_cpu_e6500(void); 84 #endif /* CONFIG_E500 */ 85 86 /* This table only contains "desktop" CPUs, it need to be filled with embedded 87 * ones as well... 88 */ 89 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 90 PPC_FEATURE_HAS_MMU) 91 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 92 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 93 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 95 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 97 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 99 PPC_FEATURE_TRUE_LE | \ 100 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 101 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 102 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 103 PPC_FEATURE_TRUE_LE | \ 104 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 105 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 106 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 107 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 108 PPC_FEATURE_TRUE_LE | \ 109 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 110 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 111 PPC_FEATURE2_HTM_COMP | \ 112 PPC_FEATURE2_HTM_NOSC_COMP | \ 113 PPC_FEATURE2_DSCR | \ 114 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 115 PPC_FEATURE2_VEC_CRYPTO) 116 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 117 PPC_FEATURE_TRUE_LE | \ 118 PPC_FEATURE_HAS_ALTIVEC_COMP) 119 #define COMMON_USER_POWER9 COMMON_USER_POWER8 120 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 121 PPC_FEATURE2_ARCH_3_00 | \ 122 PPC_FEATURE2_HAS_IEEE128 | \ 123 PPC_FEATURE2_DARN | \ 124 PPC_FEATURE2_SCV) 125 #define COMMON_USER_POWER10 COMMON_USER_POWER9 126 #define COMMON_USER2_POWER10 (COMMON_USER2_POWER9 | \ 127 PPC_FEATURE2_ARCH_3_1 | \ 128 PPC_FEATURE2_MMA) 129 130 #ifdef CONFIG_PPC_BOOK3E_64 131 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 132 #else 133 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 134 PPC_FEATURE_BOOKE) 135 #endif 136 137 static struct cpu_spec __initdata cpu_specs[] = { 138 #ifdef CONFIG_PPC_BOOK3S_64 139 { /* PPC970 */ 140 .pvr_mask = 0xffff0000, 141 .pvr_value = 0x00390000, 142 .cpu_name = "PPC970", 143 .cpu_features = CPU_FTRS_PPC970, 144 .cpu_user_features = COMMON_USER_POWER4 | 145 PPC_FEATURE_HAS_ALTIVEC_COMP, 146 .mmu_features = MMU_FTRS_PPC970, 147 .icache_bsize = 128, 148 .dcache_bsize = 128, 149 .num_pmcs = 8, 150 .pmc_type = PPC_PMC_IBM, 151 .cpu_setup = __setup_cpu_ppc970, 152 .cpu_restore = __restore_cpu_ppc970, 153 .oprofile_cpu_type = "ppc64/970", 154 .oprofile_type = PPC_OPROFILE_POWER4, 155 .platform = "ppc970", 156 }, 157 { /* PPC970FX */ 158 .pvr_mask = 0xffff0000, 159 .pvr_value = 0x003c0000, 160 .cpu_name = "PPC970FX", 161 .cpu_features = CPU_FTRS_PPC970, 162 .cpu_user_features = COMMON_USER_POWER4 | 163 PPC_FEATURE_HAS_ALTIVEC_COMP, 164 .mmu_features = MMU_FTRS_PPC970, 165 .icache_bsize = 128, 166 .dcache_bsize = 128, 167 .num_pmcs = 8, 168 .pmc_type = PPC_PMC_IBM, 169 .cpu_setup = __setup_cpu_ppc970, 170 .cpu_restore = __restore_cpu_ppc970, 171 .oprofile_cpu_type = "ppc64/970", 172 .oprofile_type = PPC_OPROFILE_POWER4, 173 .platform = "ppc970", 174 }, 175 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 176 .pvr_mask = 0xffffffff, 177 .pvr_value = 0x00440100, 178 .cpu_name = "PPC970MP", 179 .cpu_features = CPU_FTRS_PPC970, 180 .cpu_user_features = COMMON_USER_POWER4 | 181 PPC_FEATURE_HAS_ALTIVEC_COMP, 182 .mmu_features = MMU_FTRS_PPC970, 183 .icache_bsize = 128, 184 .dcache_bsize = 128, 185 .num_pmcs = 8, 186 .pmc_type = PPC_PMC_IBM, 187 .cpu_setup = __setup_cpu_ppc970, 188 .cpu_restore = __restore_cpu_ppc970, 189 .oprofile_cpu_type = "ppc64/970MP", 190 .oprofile_type = PPC_OPROFILE_POWER4, 191 .platform = "ppc970", 192 }, 193 { /* PPC970MP */ 194 .pvr_mask = 0xffff0000, 195 .pvr_value = 0x00440000, 196 .cpu_name = "PPC970MP", 197 .cpu_features = CPU_FTRS_PPC970, 198 .cpu_user_features = COMMON_USER_POWER4 | 199 PPC_FEATURE_HAS_ALTIVEC_COMP, 200 .mmu_features = MMU_FTRS_PPC970, 201 .icache_bsize = 128, 202 .dcache_bsize = 128, 203 .num_pmcs = 8, 204 .pmc_type = PPC_PMC_IBM, 205 .cpu_setup = __setup_cpu_ppc970MP, 206 .cpu_restore = __restore_cpu_ppc970, 207 .oprofile_cpu_type = "ppc64/970MP", 208 .oprofile_type = PPC_OPROFILE_POWER4, 209 .platform = "ppc970", 210 }, 211 { /* PPC970GX */ 212 .pvr_mask = 0xffff0000, 213 .pvr_value = 0x00450000, 214 .cpu_name = "PPC970GX", 215 .cpu_features = CPU_FTRS_PPC970, 216 .cpu_user_features = COMMON_USER_POWER4 | 217 PPC_FEATURE_HAS_ALTIVEC_COMP, 218 .mmu_features = MMU_FTRS_PPC970, 219 .icache_bsize = 128, 220 .dcache_bsize = 128, 221 .num_pmcs = 8, 222 .pmc_type = PPC_PMC_IBM, 223 .cpu_setup = __setup_cpu_ppc970, 224 .oprofile_cpu_type = "ppc64/970", 225 .oprofile_type = PPC_OPROFILE_POWER4, 226 .platform = "ppc970", 227 }, 228 { /* Power5 GR */ 229 .pvr_mask = 0xffff0000, 230 .pvr_value = 0x003a0000, 231 .cpu_name = "POWER5 (gr)", 232 .cpu_features = CPU_FTRS_POWER5, 233 .cpu_user_features = COMMON_USER_POWER5, 234 .mmu_features = MMU_FTRS_POWER5, 235 .icache_bsize = 128, 236 .dcache_bsize = 128, 237 .num_pmcs = 6, 238 .pmc_type = PPC_PMC_IBM, 239 .oprofile_cpu_type = "ppc64/power5", 240 .oprofile_type = PPC_OPROFILE_POWER4, 241 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 242 * and above but only works on POWER5 and above 243 */ 244 .oprofile_mmcra_sihv = MMCRA_SIHV, 245 .oprofile_mmcra_sipr = MMCRA_SIPR, 246 .platform = "power5", 247 }, 248 { /* Power5++ */ 249 .pvr_mask = 0xffffff00, 250 .pvr_value = 0x003b0300, 251 .cpu_name = "POWER5+ (gs)", 252 .cpu_features = CPU_FTRS_POWER5, 253 .cpu_user_features = COMMON_USER_POWER5_PLUS, 254 .mmu_features = MMU_FTRS_POWER5, 255 .icache_bsize = 128, 256 .dcache_bsize = 128, 257 .num_pmcs = 6, 258 .oprofile_cpu_type = "ppc64/power5++", 259 .oprofile_type = PPC_OPROFILE_POWER4, 260 .oprofile_mmcra_sihv = MMCRA_SIHV, 261 .oprofile_mmcra_sipr = MMCRA_SIPR, 262 .platform = "power5+", 263 }, 264 { /* Power5 GS */ 265 .pvr_mask = 0xffff0000, 266 .pvr_value = 0x003b0000, 267 .cpu_name = "POWER5+ (gs)", 268 .cpu_features = CPU_FTRS_POWER5, 269 .cpu_user_features = COMMON_USER_POWER5_PLUS, 270 .mmu_features = MMU_FTRS_POWER5, 271 .icache_bsize = 128, 272 .dcache_bsize = 128, 273 .num_pmcs = 6, 274 .pmc_type = PPC_PMC_IBM, 275 .oprofile_cpu_type = "ppc64/power5+", 276 .oprofile_type = PPC_OPROFILE_POWER4, 277 .oprofile_mmcra_sihv = MMCRA_SIHV, 278 .oprofile_mmcra_sipr = MMCRA_SIPR, 279 .platform = "power5+", 280 }, 281 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 282 .pvr_mask = 0xffffffff, 283 .pvr_value = 0x0f000001, 284 .cpu_name = "POWER5+", 285 .cpu_features = CPU_FTRS_POWER5, 286 .cpu_user_features = COMMON_USER_POWER5_PLUS, 287 .mmu_features = MMU_FTRS_POWER5, 288 .icache_bsize = 128, 289 .dcache_bsize = 128, 290 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 291 .oprofile_type = PPC_OPROFILE_POWER4, 292 .platform = "power5+", 293 }, 294 { /* Power6 */ 295 .pvr_mask = 0xffff0000, 296 .pvr_value = 0x003e0000, 297 .cpu_name = "POWER6 (raw)", 298 .cpu_features = CPU_FTRS_POWER6, 299 .cpu_user_features = COMMON_USER_POWER6 | 300 PPC_FEATURE_POWER6_EXT, 301 .mmu_features = MMU_FTRS_POWER6, 302 .icache_bsize = 128, 303 .dcache_bsize = 128, 304 .num_pmcs = 6, 305 .pmc_type = PPC_PMC_IBM, 306 .oprofile_cpu_type = "ppc64/power6", 307 .oprofile_type = PPC_OPROFILE_POWER4, 308 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 309 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 310 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 311 POWER6_MMCRA_OTHER, 312 .platform = "power6x", 313 }, 314 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 315 .pvr_mask = 0xffffffff, 316 .pvr_value = 0x0f000002, 317 .cpu_name = "POWER6 (architected)", 318 .cpu_features = CPU_FTRS_POWER6, 319 .cpu_user_features = COMMON_USER_POWER6, 320 .mmu_features = MMU_FTRS_POWER6, 321 .icache_bsize = 128, 322 .dcache_bsize = 128, 323 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 324 .oprofile_type = PPC_OPROFILE_POWER4, 325 .platform = "power6", 326 }, 327 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 328 .pvr_mask = 0xffffffff, 329 .pvr_value = 0x0f000003, 330 .cpu_name = "POWER7 (architected)", 331 .cpu_features = CPU_FTRS_POWER7, 332 .cpu_user_features = COMMON_USER_POWER7, 333 .cpu_user_features2 = COMMON_USER2_POWER7, 334 .mmu_features = MMU_FTRS_POWER7, 335 .icache_bsize = 128, 336 .dcache_bsize = 128, 337 .oprofile_type = PPC_OPROFILE_POWER4, 338 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 339 .cpu_setup = __setup_cpu_power7, 340 .cpu_restore = __restore_cpu_power7, 341 .machine_check_early = __machine_check_early_realmode_p7, 342 .platform = "power7", 343 }, 344 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 345 .pvr_mask = 0xffffffff, 346 .pvr_value = 0x0f000004, 347 .cpu_name = "POWER8 (architected)", 348 .cpu_features = CPU_FTRS_POWER8, 349 .cpu_user_features = COMMON_USER_POWER8, 350 .cpu_user_features2 = COMMON_USER2_POWER8, 351 .mmu_features = MMU_FTRS_POWER8, 352 .icache_bsize = 128, 353 .dcache_bsize = 128, 354 .oprofile_type = PPC_OPROFILE_INVALID, 355 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 356 .cpu_setup = __setup_cpu_power8, 357 .cpu_restore = __restore_cpu_power8, 358 .machine_check_early = __machine_check_early_realmode_p8, 359 .platform = "power8", 360 }, 361 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 362 .pvr_mask = 0xffffffff, 363 .pvr_value = 0x0f000005, 364 .cpu_name = "POWER9 (architected)", 365 .cpu_features = CPU_FTRS_POWER9, 366 .cpu_user_features = COMMON_USER_POWER9, 367 .cpu_user_features2 = COMMON_USER2_POWER9, 368 .mmu_features = MMU_FTRS_POWER9, 369 .icache_bsize = 128, 370 .dcache_bsize = 128, 371 .oprofile_type = PPC_OPROFILE_INVALID, 372 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 373 .cpu_setup = __setup_cpu_power9, 374 .cpu_restore = __restore_cpu_power9, 375 .platform = "power9", 376 }, 377 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */ 378 .pvr_mask = 0xffffffff, 379 .pvr_value = 0x0f000006, 380 .cpu_name = "POWER10 (architected)", 381 .cpu_features = CPU_FTRS_POWER10, 382 .cpu_user_features = COMMON_USER_POWER10, 383 .cpu_user_features2 = COMMON_USER2_POWER10, 384 .mmu_features = MMU_FTRS_POWER10, 385 .icache_bsize = 128, 386 .dcache_bsize = 128, 387 .oprofile_type = PPC_OPROFILE_INVALID, 388 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 389 .cpu_setup = __setup_cpu_power10, 390 .cpu_restore = __restore_cpu_power10, 391 .platform = "power10", 392 }, 393 { /* Power7 */ 394 .pvr_mask = 0xffff0000, 395 .pvr_value = 0x003f0000, 396 .cpu_name = "POWER7 (raw)", 397 .cpu_features = CPU_FTRS_POWER7, 398 .cpu_user_features = COMMON_USER_POWER7, 399 .cpu_user_features2 = COMMON_USER2_POWER7, 400 .mmu_features = MMU_FTRS_POWER7, 401 .icache_bsize = 128, 402 .dcache_bsize = 128, 403 .num_pmcs = 6, 404 .pmc_type = PPC_PMC_IBM, 405 .oprofile_cpu_type = "ppc64/power7", 406 .oprofile_type = PPC_OPROFILE_POWER4, 407 .cpu_setup = __setup_cpu_power7, 408 .cpu_restore = __restore_cpu_power7, 409 .machine_check_early = __machine_check_early_realmode_p7, 410 .platform = "power7", 411 }, 412 { /* Power7+ */ 413 .pvr_mask = 0xffff0000, 414 .pvr_value = 0x004A0000, 415 .cpu_name = "POWER7+ (raw)", 416 .cpu_features = CPU_FTRS_POWER7, 417 .cpu_user_features = COMMON_USER_POWER7, 418 .cpu_user_features2 = COMMON_USER2_POWER7, 419 .mmu_features = MMU_FTRS_POWER7, 420 .icache_bsize = 128, 421 .dcache_bsize = 128, 422 .num_pmcs = 6, 423 .pmc_type = PPC_PMC_IBM, 424 .oprofile_cpu_type = "ppc64/power7", 425 .oprofile_type = PPC_OPROFILE_POWER4, 426 .cpu_setup = __setup_cpu_power7, 427 .cpu_restore = __restore_cpu_power7, 428 .machine_check_early = __machine_check_early_realmode_p7, 429 .platform = "power7+", 430 }, 431 { /* Power8E */ 432 .pvr_mask = 0xffff0000, 433 .pvr_value = 0x004b0000, 434 .cpu_name = "POWER8E (raw)", 435 .cpu_features = CPU_FTRS_POWER8E, 436 .cpu_user_features = COMMON_USER_POWER8, 437 .cpu_user_features2 = COMMON_USER2_POWER8, 438 .mmu_features = MMU_FTRS_POWER8, 439 .icache_bsize = 128, 440 .dcache_bsize = 128, 441 .num_pmcs = 6, 442 .pmc_type = PPC_PMC_IBM, 443 .oprofile_cpu_type = "ppc64/power8", 444 .oprofile_type = PPC_OPROFILE_INVALID, 445 .cpu_setup = __setup_cpu_power8, 446 .cpu_restore = __restore_cpu_power8, 447 .machine_check_early = __machine_check_early_realmode_p8, 448 .platform = "power8", 449 }, 450 { /* Power8NVL */ 451 .pvr_mask = 0xffff0000, 452 .pvr_value = 0x004c0000, 453 .cpu_name = "POWER8NVL (raw)", 454 .cpu_features = CPU_FTRS_POWER8, 455 .cpu_user_features = COMMON_USER_POWER8, 456 .cpu_user_features2 = COMMON_USER2_POWER8, 457 .mmu_features = MMU_FTRS_POWER8, 458 .icache_bsize = 128, 459 .dcache_bsize = 128, 460 .num_pmcs = 6, 461 .pmc_type = PPC_PMC_IBM, 462 .oprofile_cpu_type = "ppc64/power8", 463 .oprofile_type = PPC_OPROFILE_INVALID, 464 .cpu_setup = __setup_cpu_power8, 465 .cpu_restore = __restore_cpu_power8, 466 .machine_check_early = __machine_check_early_realmode_p8, 467 .platform = "power8", 468 }, 469 { /* Power8 */ 470 .pvr_mask = 0xffff0000, 471 .pvr_value = 0x004d0000, 472 .cpu_name = "POWER8 (raw)", 473 .cpu_features = CPU_FTRS_POWER8, 474 .cpu_user_features = COMMON_USER_POWER8, 475 .cpu_user_features2 = COMMON_USER2_POWER8, 476 .mmu_features = MMU_FTRS_POWER8, 477 .icache_bsize = 128, 478 .dcache_bsize = 128, 479 .num_pmcs = 6, 480 .pmc_type = PPC_PMC_IBM, 481 .oprofile_cpu_type = "ppc64/power8", 482 .oprofile_type = PPC_OPROFILE_INVALID, 483 .cpu_setup = __setup_cpu_power8, 484 .cpu_restore = __restore_cpu_power8, 485 .machine_check_early = __machine_check_early_realmode_p8, 486 .platform = "power8", 487 }, 488 { /* Power9 DD2.0 */ 489 .pvr_mask = 0xffffefff, 490 .pvr_value = 0x004e0200, 491 .cpu_name = "POWER9 (raw)", 492 .cpu_features = CPU_FTRS_POWER9_DD2_0, 493 .cpu_user_features = COMMON_USER_POWER9, 494 .cpu_user_features2 = COMMON_USER2_POWER9, 495 .mmu_features = MMU_FTRS_POWER9, 496 .icache_bsize = 128, 497 .dcache_bsize = 128, 498 .num_pmcs = 6, 499 .pmc_type = PPC_PMC_IBM, 500 .oprofile_cpu_type = "ppc64/power9", 501 .oprofile_type = PPC_OPROFILE_INVALID, 502 .cpu_setup = __setup_cpu_power9, 503 .cpu_restore = __restore_cpu_power9, 504 .machine_check_early = __machine_check_early_realmode_p9, 505 .platform = "power9", 506 }, 507 { /* Power9 DD 2.1 */ 508 .pvr_mask = 0xffffefff, 509 .pvr_value = 0x004e0201, 510 .cpu_name = "POWER9 (raw)", 511 .cpu_features = CPU_FTRS_POWER9_DD2_1, 512 .cpu_user_features = COMMON_USER_POWER9, 513 .cpu_user_features2 = COMMON_USER2_POWER9, 514 .mmu_features = MMU_FTRS_POWER9, 515 .icache_bsize = 128, 516 .dcache_bsize = 128, 517 .num_pmcs = 6, 518 .pmc_type = PPC_PMC_IBM, 519 .oprofile_cpu_type = "ppc64/power9", 520 .oprofile_type = PPC_OPROFILE_INVALID, 521 .cpu_setup = __setup_cpu_power9, 522 .cpu_restore = __restore_cpu_power9, 523 .machine_check_early = __machine_check_early_realmode_p9, 524 .platform = "power9", 525 }, 526 { /* Power9 DD2.2 or later */ 527 .pvr_mask = 0xffff0000, 528 .pvr_value = 0x004e0000, 529 .cpu_name = "POWER9 (raw)", 530 .cpu_features = CPU_FTRS_POWER9_DD2_2, 531 .cpu_user_features = COMMON_USER_POWER9, 532 .cpu_user_features2 = COMMON_USER2_POWER9, 533 .mmu_features = MMU_FTRS_POWER9, 534 .icache_bsize = 128, 535 .dcache_bsize = 128, 536 .num_pmcs = 6, 537 .pmc_type = PPC_PMC_IBM, 538 .oprofile_cpu_type = "ppc64/power9", 539 .oprofile_type = PPC_OPROFILE_INVALID, 540 .cpu_setup = __setup_cpu_power9, 541 .cpu_restore = __restore_cpu_power9, 542 .machine_check_early = __machine_check_early_realmode_p9, 543 .platform = "power9", 544 }, 545 { /* Cell Broadband Engine */ 546 .pvr_mask = 0xffff0000, 547 .pvr_value = 0x00700000, 548 .cpu_name = "Cell Broadband Engine", 549 .cpu_features = CPU_FTRS_CELL, 550 .cpu_user_features = COMMON_USER_PPC64 | 551 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 552 PPC_FEATURE_SMT, 553 .mmu_features = MMU_FTRS_CELL, 554 .icache_bsize = 128, 555 .dcache_bsize = 128, 556 .num_pmcs = 4, 557 .pmc_type = PPC_PMC_IBM, 558 .oprofile_cpu_type = "ppc64/cell-be", 559 .oprofile_type = PPC_OPROFILE_CELL, 560 .platform = "ppc-cell-be", 561 }, 562 { /* PA Semi PA6T */ 563 .pvr_mask = 0x7fff0000, 564 .pvr_value = 0x00900000, 565 .cpu_name = "PA6T", 566 .cpu_features = CPU_FTRS_PA6T, 567 .cpu_user_features = COMMON_USER_PA6T, 568 .mmu_features = MMU_FTRS_PA6T, 569 .icache_bsize = 64, 570 .dcache_bsize = 64, 571 .num_pmcs = 6, 572 .pmc_type = PPC_PMC_PA6T, 573 .cpu_setup = __setup_cpu_pa6t, 574 .cpu_restore = __restore_cpu_pa6t, 575 .oprofile_cpu_type = "ppc64/pa6t", 576 .oprofile_type = PPC_OPROFILE_PA6T, 577 .platform = "pa6t", 578 }, 579 { /* default match */ 580 .pvr_mask = 0x00000000, 581 .pvr_value = 0x00000000, 582 .cpu_name = "POWER5 (compatible)", 583 .cpu_features = CPU_FTRS_COMPATIBLE, 584 .cpu_user_features = COMMON_USER_PPC64, 585 .mmu_features = MMU_FTRS_POWER, 586 .icache_bsize = 128, 587 .dcache_bsize = 128, 588 .num_pmcs = 6, 589 .pmc_type = PPC_PMC_IBM, 590 .platform = "power5", 591 } 592 #endif /* CONFIG_PPC_BOOK3S_64 */ 593 594 #ifdef CONFIG_PPC32 595 #ifdef CONFIG_PPC_BOOK3S_601 596 { /* 601 */ 597 .pvr_mask = 0xffff0000, 598 .pvr_value = 0x00010000, 599 .cpu_name = "601", 600 .cpu_features = CPU_FTRS_PPC601, 601 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 602 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 603 .mmu_features = MMU_FTR_HPTE_TABLE, 604 .icache_bsize = 32, 605 .dcache_bsize = 32, 606 .machine_check = machine_check_generic, 607 .platform = "ppc601", 608 }, 609 #endif /* CONFIG_PPC_BOOK3S_601 */ 610 #ifdef CONFIG_PPC_BOOK3S_6xx 611 { /* 603 */ 612 .pvr_mask = 0xffff0000, 613 .pvr_value = 0x00030000, 614 .cpu_name = "603", 615 .cpu_features = CPU_FTRS_603, 616 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 617 .mmu_features = 0, 618 .icache_bsize = 32, 619 .dcache_bsize = 32, 620 .cpu_setup = __setup_cpu_603, 621 .machine_check = machine_check_generic, 622 .platform = "ppc603", 623 }, 624 { /* 603e */ 625 .pvr_mask = 0xffff0000, 626 .pvr_value = 0x00060000, 627 .cpu_name = "603e", 628 .cpu_features = CPU_FTRS_603, 629 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 630 .mmu_features = 0, 631 .icache_bsize = 32, 632 .dcache_bsize = 32, 633 .cpu_setup = __setup_cpu_603, 634 .machine_check = machine_check_generic, 635 .platform = "ppc603", 636 }, 637 { /* 603ev */ 638 .pvr_mask = 0xffff0000, 639 .pvr_value = 0x00070000, 640 .cpu_name = "603ev", 641 .cpu_features = CPU_FTRS_603, 642 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 643 .mmu_features = 0, 644 .icache_bsize = 32, 645 .dcache_bsize = 32, 646 .cpu_setup = __setup_cpu_603, 647 .machine_check = machine_check_generic, 648 .platform = "ppc603", 649 }, 650 { /* 604 */ 651 .pvr_mask = 0xffff0000, 652 .pvr_value = 0x00040000, 653 .cpu_name = "604", 654 .cpu_features = CPU_FTRS_604, 655 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 656 .mmu_features = MMU_FTR_HPTE_TABLE, 657 .icache_bsize = 32, 658 .dcache_bsize = 32, 659 .num_pmcs = 2, 660 .cpu_setup = __setup_cpu_604, 661 .machine_check = machine_check_generic, 662 .platform = "ppc604", 663 }, 664 { /* 604e */ 665 .pvr_mask = 0xfffff000, 666 .pvr_value = 0x00090000, 667 .cpu_name = "604e", 668 .cpu_features = CPU_FTRS_604, 669 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 670 .mmu_features = MMU_FTR_HPTE_TABLE, 671 .icache_bsize = 32, 672 .dcache_bsize = 32, 673 .num_pmcs = 4, 674 .cpu_setup = __setup_cpu_604, 675 .machine_check = machine_check_generic, 676 .platform = "ppc604", 677 }, 678 { /* 604r */ 679 .pvr_mask = 0xffff0000, 680 .pvr_value = 0x00090000, 681 .cpu_name = "604r", 682 .cpu_features = CPU_FTRS_604, 683 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 684 .mmu_features = MMU_FTR_HPTE_TABLE, 685 .icache_bsize = 32, 686 .dcache_bsize = 32, 687 .num_pmcs = 4, 688 .cpu_setup = __setup_cpu_604, 689 .machine_check = machine_check_generic, 690 .platform = "ppc604", 691 }, 692 { /* 604ev */ 693 .pvr_mask = 0xffff0000, 694 .pvr_value = 0x000a0000, 695 .cpu_name = "604ev", 696 .cpu_features = CPU_FTRS_604, 697 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 698 .mmu_features = MMU_FTR_HPTE_TABLE, 699 .icache_bsize = 32, 700 .dcache_bsize = 32, 701 .num_pmcs = 4, 702 .cpu_setup = __setup_cpu_604, 703 .machine_check = machine_check_generic, 704 .platform = "ppc604", 705 }, 706 { /* 740/750 (0x4202, don't support TAU ?) */ 707 .pvr_mask = 0xffffffff, 708 .pvr_value = 0x00084202, 709 .cpu_name = "740/750", 710 .cpu_features = CPU_FTRS_740_NOTAU, 711 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 712 .mmu_features = MMU_FTR_HPTE_TABLE, 713 .icache_bsize = 32, 714 .dcache_bsize = 32, 715 .num_pmcs = 4, 716 .cpu_setup = __setup_cpu_750, 717 .machine_check = machine_check_generic, 718 .platform = "ppc750", 719 }, 720 { /* 750CX (80100 and 8010x?) */ 721 .pvr_mask = 0xfffffff0, 722 .pvr_value = 0x00080100, 723 .cpu_name = "750CX", 724 .cpu_features = CPU_FTRS_750, 725 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 726 .mmu_features = MMU_FTR_HPTE_TABLE, 727 .icache_bsize = 32, 728 .dcache_bsize = 32, 729 .num_pmcs = 4, 730 .cpu_setup = __setup_cpu_750cx, 731 .machine_check = machine_check_generic, 732 .platform = "ppc750", 733 }, 734 { /* 750CX (82201 and 82202) */ 735 .pvr_mask = 0xfffffff0, 736 .pvr_value = 0x00082200, 737 .cpu_name = "750CX", 738 .cpu_features = CPU_FTRS_750, 739 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 740 .mmu_features = MMU_FTR_HPTE_TABLE, 741 .icache_bsize = 32, 742 .dcache_bsize = 32, 743 .num_pmcs = 4, 744 .pmc_type = PPC_PMC_IBM, 745 .cpu_setup = __setup_cpu_750cx, 746 .machine_check = machine_check_generic, 747 .platform = "ppc750", 748 }, 749 { /* 750CXe (82214) */ 750 .pvr_mask = 0xfffffff0, 751 .pvr_value = 0x00082210, 752 .cpu_name = "750CXe", 753 .cpu_features = CPU_FTRS_750, 754 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 755 .mmu_features = MMU_FTR_HPTE_TABLE, 756 .icache_bsize = 32, 757 .dcache_bsize = 32, 758 .num_pmcs = 4, 759 .pmc_type = PPC_PMC_IBM, 760 .cpu_setup = __setup_cpu_750cx, 761 .machine_check = machine_check_generic, 762 .platform = "ppc750", 763 }, 764 { /* 750CXe "Gekko" (83214) */ 765 .pvr_mask = 0xffffffff, 766 .pvr_value = 0x00083214, 767 .cpu_name = "750CXe", 768 .cpu_features = CPU_FTRS_750, 769 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 770 .mmu_features = MMU_FTR_HPTE_TABLE, 771 .icache_bsize = 32, 772 .dcache_bsize = 32, 773 .num_pmcs = 4, 774 .pmc_type = PPC_PMC_IBM, 775 .cpu_setup = __setup_cpu_750cx, 776 .machine_check = machine_check_generic, 777 .platform = "ppc750", 778 }, 779 { /* 750CL (and "Broadway") */ 780 .pvr_mask = 0xfffff0e0, 781 .pvr_value = 0x00087000, 782 .cpu_name = "750CL", 783 .cpu_features = CPU_FTRS_750CL, 784 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 785 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 786 .icache_bsize = 32, 787 .dcache_bsize = 32, 788 .num_pmcs = 4, 789 .pmc_type = PPC_PMC_IBM, 790 .cpu_setup = __setup_cpu_750, 791 .machine_check = machine_check_generic, 792 .platform = "ppc750", 793 .oprofile_cpu_type = "ppc/750", 794 .oprofile_type = PPC_OPROFILE_G4, 795 }, 796 { /* 745/755 */ 797 .pvr_mask = 0xfffff000, 798 .pvr_value = 0x00083000, 799 .cpu_name = "745/755", 800 .cpu_features = CPU_FTRS_750, 801 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 802 .mmu_features = MMU_FTR_HPTE_TABLE, 803 .icache_bsize = 32, 804 .dcache_bsize = 32, 805 .num_pmcs = 4, 806 .pmc_type = PPC_PMC_IBM, 807 .cpu_setup = __setup_cpu_750, 808 .machine_check = machine_check_generic, 809 .platform = "ppc750", 810 }, 811 { /* 750FX rev 1.x */ 812 .pvr_mask = 0xffffff00, 813 .pvr_value = 0x70000100, 814 .cpu_name = "750FX", 815 .cpu_features = CPU_FTRS_750FX1, 816 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 817 .mmu_features = MMU_FTR_HPTE_TABLE, 818 .icache_bsize = 32, 819 .dcache_bsize = 32, 820 .num_pmcs = 4, 821 .pmc_type = PPC_PMC_IBM, 822 .cpu_setup = __setup_cpu_750, 823 .machine_check = machine_check_generic, 824 .platform = "ppc750", 825 .oprofile_cpu_type = "ppc/750", 826 .oprofile_type = PPC_OPROFILE_G4, 827 }, 828 { /* 750FX rev 2.0 must disable HID0[DPM] */ 829 .pvr_mask = 0xffffffff, 830 .pvr_value = 0x70000200, 831 .cpu_name = "750FX", 832 .cpu_features = CPU_FTRS_750FX2, 833 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 834 .mmu_features = MMU_FTR_HPTE_TABLE, 835 .icache_bsize = 32, 836 .dcache_bsize = 32, 837 .num_pmcs = 4, 838 .pmc_type = PPC_PMC_IBM, 839 .cpu_setup = __setup_cpu_750, 840 .machine_check = machine_check_generic, 841 .platform = "ppc750", 842 .oprofile_cpu_type = "ppc/750", 843 .oprofile_type = PPC_OPROFILE_G4, 844 }, 845 { /* 750FX (All revs except 2.0) */ 846 .pvr_mask = 0xffff0000, 847 .pvr_value = 0x70000000, 848 .cpu_name = "750FX", 849 .cpu_features = CPU_FTRS_750FX, 850 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 851 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 852 .icache_bsize = 32, 853 .dcache_bsize = 32, 854 .num_pmcs = 4, 855 .pmc_type = PPC_PMC_IBM, 856 .cpu_setup = __setup_cpu_750fx, 857 .machine_check = machine_check_generic, 858 .platform = "ppc750", 859 .oprofile_cpu_type = "ppc/750", 860 .oprofile_type = PPC_OPROFILE_G4, 861 }, 862 { /* 750GX */ 863 .pvr_mask = 0xffff0000, 864 .pvr_value = 0x70020000, 865 .cpu_name = "750GX", 866 .cpu_features = CPU_FTRS_750GX, 867 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 868 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 869 .icache_bsize = 32, 870 .dcache_bsize = 32, 871 .num_pmcs = 4, 872 .pmc_type = PPC_PMC_IBM, 873 .cpu_setup = __setup_cpu_750fx, 874 .machine_check = machine_check_generic, 875 .platform = "ppc750", 876 .oprofile_cpu_type = "ppc/750", 877 .oprofile_type = PPC_OPROFILE_G4, 878 }, 879 { /* 740/750 (L2CR bit need fixup for 740) */ 880 .pvr_mask = 0xffff0000, 881 .pvr_value = 0x00080000, 882 .cpu_name = "740/750", 883 .cpu_features = CPU_FTRS_740, 884 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 885 .mmu_features = MMU_FTR_HPTE_TABLE, 886 .icache_bsize = 32, 887 .dcache_bsize = 32, 888 .num_pmcs = 4, 889 .pmc_type = PPC_PMC_IBM, 890 .cpu_setup = __setup_cpu_750, 891 .machine_check = machine_check_generic, 892 .platform = "ppc750", 893 }, 894 { /* 7400 rev 1.1 ? (no TAU) */ 895 .pvr_mask = 0xffffffff, 896 .pvr_value = 0x000c1101, 897 .cpu_name = "7400 (1.1)", 898 .cpu_features = CPU_FTRS_7400_NOTAU, 899 .cpu_user_features = COMMON_USER | 900 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 901 .mmu_features = MMU_FTR_HPTE_TABLE, 902 .icache_bsize = 32, 903 .dcache_bsize = 32, 904 .num_pmcs = 4, 905 .pmc_type = PPC_PMC_G4, 906 .cpu_setup = __setup_cpu_7400, 907 .machine_check = machine_check_generic, 908 .platform = "ppc7400", 909 }, 910 { /* 7400 */ 911 .pvr_mask = 0xffff0000, 912 .pvr_value = 0x000c0000, 913 .cpu_name = "7400", 914 .cpu_features = CPU_FTRS_7400, 915 .cpu_user_features = COMMON_USER | 916 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 917 .mmu_features = MMU_FTR_HPTE_TABLE, 918 .icache_bsize = 32, 919 .dcache_bsize = 32, 920 .num_pmcs = 4, 921 .pmc_type = PPC_PMC_G4, 922 .cpu_setup = __setup_cpu_7400, 923 .machine_check = machine_check_generic, 924 .platform = "ppc7400", 925 }, 926 { /* 7410 */ 927 .pvr_mask = 0xffff0000, 928 .pvr_value = 0x800c0000, 929 .cpu_name = "7410", 930 .cpu_features = CPU_FTRS_7400, 931 .cpu_user_features = COMMON_USER | 932 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 933 .mmu_features = MMU_FTR_HPTE_TABLE, 934 .icache_bsize = 32, 935 .dcache_bsize = 32, 936 .num_pmcs = 4, 937 .pmc_type = PPC_PMC_G4, 938 .cpu_setup = __setup_cpu_7410, 939 .machine_check = machine_check_generic, 940 .platform = "ppc7400", 941 }, 942 { /* 7450 2.0 - no doze/nap */ 943 .pvr_mask = 0xffffffff, 944 .pvr_value = 0x80000200, 945 .cpu_name = "7450", 946 .cpu_features = CPU_FTRS_7450_20, 947 .cpu_user_features = COMMON_USER | 948 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 949 .mmu_features = MMU_FTR_HPTE_TABLE, 950 .icache_bsize = 32, 951 .dcache_bsize = 32, 952 .num_pmcs = 6, 953 .pmc_type = PPC_PMC_G4, 954 .cpu_setup = __setup_cpu_745x, 955 .oprofile_cpu_type = "ppc/7450", 956 .oprofile_type = PPC_OPROFILE_G4, 957 .machine_check = machine_check_generic, 958 .platform = "ppc7450", 959 }, 960 { /* 7450 2.1 */ 961 .pvr_mask = 0xffffffff, 962 .pvr_value = 0x80000201, 963 .cpu_name = "7450", 964 .cpu_features = CPU_FTRS_7450_21, 965 .cpu_user_features = COMMON_USER | 966 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 967 .mmu_features = MMU_FTR_HPTE_TABLE, 968 .icache_bsize = 32, 969 .dcache_bsize = 32, 970 .num_pmcs = 6, 971 .pmc_type = PPC_PMC_G4, 972 .cpu_setup = __setup_cpu_745x, 973 .oprofile_cpu_type = "ppc/7450", 974 .oprofile_type = PPC_OPROFILE_G4, 975 .machine_check = machine_check_generic, 976 .platform = "ppc7450", 977 }, 978 { /* 7450 2.3 and newer */ 979 .pvr_mask = 0xffff0000, 980 .pvr_value = 0x80000000, 981 .cpu_name = "7450", 982 .cpu_features = CPU_FTRS_7450_23, 983 .cpu_user_features = COMMON_USER | 984 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 985 .mmu_features = MMU_FTR_HPTE_TABLE, 986 .icache_bsize = 32, 987 .dcache_bsize = 32, 988 .num_pmcs = 6, 989 .pmc_type = PPC_PMC_G4, 990 .cpu_setup = __setup_cpu_745x, 991 .oprofile_cpu_type = "ppc/7450", 992 .oprofile_type = PPC_OPROFILE_G4, 993 .machine_check = machine_check_generic, 994 .platform = "ppc7450", 995 }, 996 { /* 7455 rev 1.x */ 997 .pvr_mask = 0xffffff00, 998 .pvr_value = 0x80010100, 999 .cpu_name = "7455", 1000 .cpu_features = CPU_FTRS_7455_1, 1001 .cpu_user_features = COMMON_USER | 1002 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1003 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1004 .icache_bsize = 32, 1005 .dcache_bsize = 32, 1006 .num_pmcs = 6, 1007 .pmc_type = PPC_PMC_G4, 1008 .cpu_setup = __setup_cpu_745x, 1009 .oprofile_cpu_type = "ppc/7450", 1010 .oprofile_type = PPC_OPROFILE_G4, 1011 .machine_check = machine_check_generic, 1012 .platform = "ppc7450", 1013 }, 1014 { /* 7455 rev 2.0 */ 1015 .pvr_mask = 0xffffffff, 1016 .pvr_value = 0x80010200, 1017 .cpu_name = "7455", 1018 .cpu_features = CPU_FTRS_7455_20, 1019 .cpu_user_features = COMMON_USER | 1020 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1021 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1022 .icache_bsize = 32, 1023 .dcache_bsize = 32, 1024 .num_pmcs = 6, 1025 .pmc_type = PPC_PMC_G4, 1026 .cpu_setup = __setup_cpu_745x, 1027 .oprofile_cpu_type = "ppc/7450", 1028 .oprofile_type = PPC_OPROFILE_G4, 1029 .machine_check = machine_check_generic, 1030 .platform = "ppc7450", 1031 }, 1032 { /* 7455 others */ 1033 .pvr_mask = 0xffff0000, 1034 .pvr_value = 0x80010000, 1035 .cpu_name = "7455", 1036 .cpu_features = CPU_FTRS_7455, 1037 .cpu_user_features = COMMON_USER | 1038 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1039 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1040 .icache_bsize = 32, 1041 .dcache_bsize = 32, 1042 .num_pmcs = 6, 1043 .pmc_type = PPC_PMC_G4, 1044 .cpu_setup = __setup_cpu_745x, 1045 .oprofile_cpu_type = "ppc/7450", 1046 .oprofile_type = PPC_OPROFILE_G4, 1047 .machine_check = machine_check_generic, 1048 .platform = "ppc7450", 1049 }, 1050 { /* 7447/7457 Rev 1.0 */ 1051 .pvr_mask = 0xffffffff, 1052 .pvr_value = 0x80020100, 1053 .cpu_name = "7447/7457", 1054 .cpu_features = CPU_FTRS_7447_10, 1055 .cpu_user_features = COMMON_USER | 1056 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1057 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1058 .icache_bsize = 32, 1059 .dcache_bsize = 32, 1060 .num_pmcs = 6, 1061 .pmc_type = PPC_PMC_G4, 1062 .cpu_setup = __setup_cpu_745x, 1063 .oprofile_cpu_type = "ppc/7450", 1064 .oprofile_type = PPC_OPROFILE_G4, 1065 .machine_check = machine_check_generic, 1066 .platform = "ppc7450", 1067 }, 1068 { /* 7447/7457 Rev 1.1 */ 1069 .pvr_mask = 0xffffffff, 1070 .pvr_value = 0x80020101, 1071 .cpu_name = "7447/7457", 1072 .cpu_features = CPU_FTRS_7447_10, 1073 .cpu_user_features = COMMON_USER | 1074 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1075 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1076 .icache_bsize = 32, 1077 .dcache_bsize = 32, 1078 .num_pmcs = 6, 1079 .pmc_type = PPC_PMC_G4, 1080 .cpu_setup = __setup_cpu_745x, 1081 .oprofile_cpu_type = "ppc/7450", 1082 .oprofile_type = PPC_OPROFILE_G4, 1083 .machine_check = machine_check_generic, 1084 .platform = "ppc7450", 1085 }, 1086 { /* 7447/7457 Rev 1.2 and later */ 1087 .pvr_mask = 0xffff0000, 1088 .pvr_value = 0x80020000, 1089 .cpu_name = "7447/7457", 1090 .cpu_features = CPU_FTRS_7447, 1091 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1092 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1093 .icache_bsize = 32, 1094 .dcache_bsize = 32, 1095 .num_pmcs = 6, 1096 .pmc_type = PPC_PMC_G4, 1097 .cpu_setup = __setup_cpu_745x, 1098 .oprofile_cpu_type = "ppc/7450", 1099 .oprofile_type = PPC_OPROFILE_G4, 1100 .machine_check = machine_check_generic, 1101 .platform = "ppc7450", 1102 }, 1103 { /* 7447A */ 1104 .pvr_mask = 0xffff0000, 1105 .pvr_value = 0x80030000, 1106 .cpu_name = "7447A", 1107 .cpu_features = CPU_FTRS_7447A, 1108 .cpu_user_features = COMMON_USER | 1109 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1110 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1111 .icache_bsize = 32, 1112 .dcache_bsize = 32, 1113 .num_pmcs = 6, 1114 .pmc_type = PPC_PMC_G4, 1115 .cpu_setup = __setup_cpu_745x, 1116 .oprofile_cpu_type = "ppc/7450", 1117 .oprofile_type = PPC_OPROFILE_G4, 1118 .machine_check = machine_check_generic, 1119 .platform = "ppc7450", 1120 }, 1121 { /* 7448 */ 1122 .pvr_mask = 0xffff0000, 1123 .pvr_value = 0x80040000, 1124 .cpu_name = "7448", 1125 .cpu_features = CPU_FTRS_7448, 1126 .cpu_user_features = COMMON_USER | 1127 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1128 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1129 .icache_bsize = 32, 1130 .dcache_bsize = 32, 1131 .num_pmcs = 6, 1132 .pmc_type = PPC_PMC_G4, 1133 .cpu_setup = __setup_cpu_745x, 1134 .oprofile_cpu_type = "ppc/7450", 1135 .oprofile_type = PPC_OPROFILE_G4, 1136 .machine_check = machine_check_generic, 1137 .platform = "ppc7450", 1138 }, 1139 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1140 .pvr_mask = 0x7fff0000, 1141 .pvr_value = 0x00810000, 1142 .cpu_name = "82xx", 1143 .cpu_features = CPU_FTRS_82XX, 1144 .cpu_user_features = COMMON_USER, 1145 .mmu_features = 0, 1146 .icache_bsize = 32, 1147 .dcache_bsize = 32, 1148 .cpu_setup = __setup_cpu_603, 1149 .machine_check = machine_check_generic, 1150 .platform = "ppc603", 1151 }, 1152 { /* All G2_LE (603e core, plus some) have the same pvr */ 1153 .pvr_mask = 0x7fff0000, 1154 .pvr_value = 0x00820000, 1155 .cpu_name = "G2_LE", 1156 .cpu_features = CPU_FTRS_G2_LE, 1157 .cpu_user_features = COMMON_USER, 1158 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1159 .icache_bsize = 32, 1160 .dcache_bsize = 32, 1161 .cpu_setup = __setup_cpu_603, 1162 .machine_check = machine_check_generic, 1163 .platform = "ppc603", 1164 }, 1165 #ifdef CONFIG_PPC_83xx 1166 { /* e300c1 (a 603e core, plus some) on 83xx */ 1167 .pvr_mask = 0x7fff0000, 1168 .pvr_value = 0x00830000, 1169 .cpu_name = "e300c1", 1170 .cpu_features = CPU_FTRS_E300, 1171 .cpu_user_features = COMMON_USER, 1172 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1173 .icache_bsize = 32, 1174 .dcache_bsize = 32, 1175 .cpu_setup = __setup_cpu_603, 1176 .machine_check = machine_check_83xx, 1177 .platform = "ppc603", 1178 }, 1179 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1180 .pvr_mask = 0x7fff0000, 1181 .pvr_value = 0x00840000, 1182 .cpu_name = "e300c2", 1183 .cpu_features = CPU_FTRS_E300C2, 1184 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1185 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1186 MMU_FTR_NEED_DTLB_SW_LRU, 1187 .icache_bsize = 32, 1188 .dcache_bsize = 32, 1189 .cpu_setup = __setup_cpu_603, 1190 .machine_check = machine_check_83xx, 1191 .platform = "ppc603", 1192 }, 1193 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1194 .pvr_mask = 0x7fff0000, 1195 .pvr_value = 0x00850000, 1196 .cpu_name = "e300c3", 1197 .cpu_features = CPU_FTRS_E300, 1198 .cpu_user_features = COMMON_USER, 1199 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1200 MMU_FTR_NEED_DTLB_SW_LRU, 1201 .icache_bsize = 32, 1202 .dcache_bsize = 32, 1203 .cpu_setup = __setup_cpu_603, 1204 .machine_check = machine_check_83xx, 1205 .num_pmcs = 4, 1206 .oprofile_cpu_type = "ppc/e300", 1207 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1208 .platform = "ppc603", 1209 }, 1210 { /* e300c4 (e300c1, plus one IU) */ 1211 .pvr_mask = 0x7fff0000, 1212 .pvr_value = 0x00860000, 1213 .cpu_name = "e300c4", 1214 .cpu_features = CPU_FTRS_E300, 1215 .cpu_user_features = COMMON_USER, 1216 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1217 MMU_FTR_NEED_DTLB_SW_LRU, 1218 .icache_bsize = 32, 1219 .dcache_bsize = 32, 1220 .cpu_setup = __setup_cpu_603, 1221 .machine_check = machine_check_83xx, 1222 .num_pmcs = 4, 1223 .oprofile_cpu_type = "ppc/e300", 1224 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1225 .platform = "ppc603", 1226 }, 1227 #endif 1228 { /* default match, we assume split I/D cache & TB (non-601)... */ 1229 .pvr_mask = 0x00000000, 1230 .pvr_value = 0x00000000, 1231 .cpu_name = "(generic PPC)", 1232 .cpu_features = CPU_FTRS_CLASSIC32, 1233 .cpu_user_features = COMMON_USER, 1234 .mmu_features = MMU_FTR_HPTE_TABLE, 1235 .icache_bsize = 32, 1236 .dcache_bsize = 32, 1237 .machine_check = machine_check_generic, 1238 .platform = "ppc603", 1239 }, 1240 #endif /* CONFIG_PPC_BOOK3S_6xx */ 1241 #ifdef CONFIG_PPC_8xx 1242 { /* 8xx */ 1243 .pvr_mask = 0xffff0000, 1244 .pvr_value = PVR_8xx, 1245 .cpu_name = "8xx", 1246 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1247 * if the 8xx code is there.... */ 1248 .cpu_features = CPU_FTRS_8XX, 1249 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1250 .mmu_features = MMU_FTR_TYPE_8xx, 1251 .icache_bsize = 16, 1252 .dcache_bsize = 16, 1253 .machine_check = machine_check_8xx, 1254 .platform = "ppc823", 1255 }, 1256 #endif /* CONFIG_PPC_8xx */ 1257 #ifdef CONFIG_40x 1258 { /* STB 04xxx */ 1259 .pvr_mask = 0xffff0000, 1260 .pvr_value = 0x41810000, 1261 .cpu_name = "STB04xxx", 1262 .cpu_features = CPU_FTRS_40X, 1263 .cpu_user_features = PPC_FEATURE_32 | 1264 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1265 .mmu_features = MMU_FTR_TYPE_40x, 1266 .icache_bsize = 32, 1267 .dcache_bsize = 32, 1268 .machine_check = machine_check_4xx, 1269 .platform = "ppc405", 1270 }, 1271 { /* NP405L */ 1272 .pvr_mask = 0xffff0000, 1273 .pvr_value = 0x41610000, 1274 .cpu_name = "NP405L", 1275 .cpu_features = CPU_FTRS_40X, 1276 .cpu_user_features = PPC_FEATURE_32 | 1277 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1278 .mmu_features = MMU_FTR_TYPE_40x, 1279 .icache_bsize = 32, 1280 .dcache_bsize = 32, 1281 .machine_check = machine_check_4xx, 1282 .platform = "ppc405", 1283 }, 1284 { /* NP4GS3 */ 1285 .pvr_mask = 0xffff0000, 1286 .pvr_value = 0x40B10000, 1287 .cpu_name = "NP4GS3", 1288 .cpu_features = CPU_FTRS_40X, 1289 .cpu_user_features = PPC_FEATURE_32 | 1290 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1291 .mmu_features = MMU_FTR_TYPE_40x, 1292 .icache_bsize = 32, 1293 .dcache_bsize = 32, 1294 .machine_check = machine_check_4xx, 1295 .platform = "ppc405", 1296 }, 1297 { /* NP405H */ 1298 .pvr_mask = 0xffff0000, 1299 .pvr_value = 0x41410000, 1300 .cpu_name = "NP405H", 1301 .cpu_features = CPU_FTRS_40X, 1302 .cpu_user_features = PPC_FEATURE_32 | 1303 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1304 .mmu_features = MMU_FTR_TYPE_40x, 1305 .icache_bsize = 32, 1306 .dcache_bsize = 32, 1307 .machine_check = machine_check_4xx, 1308 .platform = "ppc405", 1309 }, 1310 { /* 405GPr */ 1311 .pvr_mask = 0xffff0000, 1312 .pvr_value = 0x50910000, 1313 .cpu_name = "405GPr", 1314 .cpu_features = CPU_FTRS_40X, 1315 .cpu_user_features = PPC_FEATURE_32 | 1316 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1317 .mmu_features = MMU_FTR_TYPE_40x, 1318 .icache_bsize = 32, 1319 .dcache_bsize = 32, 1320 .machine_check = machine_check_4xx, 1321 .platform = "ppc405", 1322 }, 1323 { /* STBx25xx */ 1324 .pvr_mask = 0xffff0000, 1325 .pvr_value = 0x51510000, 1326 .cpu_name = "STBx25xx", 1327 .cpu_features = CPU_FTRS_40X, 1328 .cpu_user_features = PPC_FEATURE_32 | 1329 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1330 .mmu_features = MMU_FTR_TYPE_40x, 1331 .icache_bsize = 32, 1332 .dcache_bsize = 32, 1333 .machine_check = machine_check_4xx, 1334 .platform = "ppc405", 1335 }, 1336 { /* 405LP */ 1337 .pvr_mask = 0xffff0000, 1338 .pvr_value = 0x41F10000, 1339 .cpu_name = "405LP", 1340 .cpu_features = CPU_FTRS_40X, 1341 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1342 .mmu_features = MMU_FTR_TYPE_40x, 1343 .icache_bsize = 32, 1344 .dcache_bsize = 32, 1345 .machine_check = machine_check_4xx, 1346 .platform = "ppc405", 1347 }, 1348 { /* 405EP */ 1349 .pvr_mask = 0xffff0000, 1350 .pvr_value = 0x51210000, 1351 .cpu_name = "405EP", 1352 .cpu_features = CPU_FTRS_40X, 1353 .cpu_user_features = PPC_FEATURE_32 | 1354 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1355 .mmu_features = MMU_FTR_TYPE_40x, 1356 .icache_bsize = 32, 1357 .dcache_bsize = 32, 1358 .machine_check = machine_check_4xx, 1359 .platform = "ppc405", 1360 }, 1361 { /* 405EX Rev. A/B with Security */ 1362 .pvr_mask = 0xffff000f, 1363 .pvr_value = 0x12910007, 1364 .cpu_name = "405EX Rev. A/B", 1365 .cpu_features = CPU_FTRS_40X, 1366 .cpu_user_features = PPC_FEATURE_32 | 1367 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1368 .mmu_features = MMU_FTR_TYPE_40x, 1369 .icache_bsize = 32, 1370 .dcache_bsize = 32, 1371 .machine_check = machine_check_4xx, 1372 .platform = "ppc405", 1373 }, 1374 { /* 405EX Rev. C without Security */ 1375 .pvr_mask = 0xffff000f, 1376 .pvr_value = 0x1291000d, 1377 .cpu_name = "405EX Rev. C", 1378 .cpu_features = CPU_FTRS_40X, 1379 .cpu_user_features = PPC_FEATURE_32 | 1380 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1381 .mmu_features = MMU_FTR_TYPE_40x, 1382 .icache_bsize = 32, 1383 .dcache_bsize = 32, 1384 .machine_check = machine_check_4xx, 1385 .platform = "ppc405", 1386 }, 1387 { /* 405EX Rev. C with Security */ 1388 .pvr_mask = 0xffff000f, 1389 .pvr_value = 0x1291000f, 1390 .cpu_name = "405EX Rev. C", 1391 .cpu_features = CPU_FTRS_40X, 1392 .cpu_user_features = PPC_FEATURE_32 | 1393 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1394 .mmu_features = MMU_FTR_TYPE_40x, 1395 .icache_bsize = 32, 1396 .dcache_bsize = 32, 1397 .machine_check = machine_check_4xx, 1398 .platform = "ppc405", 1399 }, 1400 { /* 405EX Rev. D without Security */ 1401 .pvr_mask = 0xffff000f, 1402 .pvr_value = 0x12910003, 1403 .cpu_name = "405EX Rev. D", 1404 .cpu_features = CPU_FTRS_40X, 1405 .cpu_user_features = PPC_FEATURE_32 | 1406 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1407 .mmu_features = MMU_FTR_TYPE_40x, 1408 .icache_bsize = 32, 1409 .dcache_bsize = 32, 1410 .machine_check = machine_check_4xx, 1411 .platform = "ppc405", 1412 }, 1413 { /* 405EX Rev. D with Security */ 1414 .pvr_mask = 0xffff000f, 1415 .pvr_value = 0x12910005, 1416 .cpu_name = "405EX Rev. D", 1417 .cpu_features = CPU_FTRS_40X, 1418 .cpu_user_features = PPC_FEATURE_32 | 1419 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1420 .mmu_features = MMU_FTR_TYPE_40x, 1421 .icache_bsize = 32, 1422 .dcache_bsize = 32, 1423 .machine_check = machine_check_4xx, 1424 .platform = "ppc405", 1425 }, 1426 { /* 405EXr Rev. A/B without Security */ 1427 .pvr_mask = 0xffff000f, 1428 .pvr_value = 0x12910001, 1429 .cpu_name = "405EXr Rev. A/B", 1430 .cpu_features = CPU_FTRS_40X, 1431 .cpu_user_features = PPC_FEATURE_32 | 1432 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1433 .mmu_features = MMU_FTR_TYPE_40x, 1434 .icache_bsize = 32, 1435 .dcache_bsize = 32, 1436 .machine_check = machine_check_4xx, 1437 .platform = "ppc405", 1438 }, 1439 { /* 405EXr Rev. C without Security */ 1440 .pvr_mask = 0xffff000f, 1441 .pvr_value = 0x12910009, 1442 .cpu_name = "405EXr Rev. C", 1443 .cpu_features = CPU_FTRS_40X, 1444 .cpu_user_features = PPC_FEATURE_32 | 1445 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1446 .mmu_features = MMU_FTR_TYPE_40x, 1447 .icache_bsize = 32, 1448 .dcache_bsize = 32, 1449 .machine_check = machine_check_4xx, 1450 .platform = "ppc405", 1451 }, 1452 { /* 405EXr Rev. C with Security */ 1453 .pvr_mask = 0xffff000f, 1454 .pvr_value = 0x1291000b, 1455 .cpu_name = "405EXr Rev. C", 1456 .cpu_features = CPU_FTRS_40X, 1457 .cpu_user_features = PPC_FEATURE_32 | 1458 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1459 .mmu_features = MMU_FTR_TYPE_40x, 1460 .icache_bsize = 32, 1461 .dcache_bsize = 32, 1462 .machine_check = machine_check_4xx, 1463 .platform = "ppc405", 1464 }, 1465 { /* 405EXr Rev. D without Security */ 1466 .pvr_mask = 0xffff000f, 1467 .pvr_value = 0x12910000, 1468 .cpu_name = "405EXr Rev. D", 1469 .cpu_features = CPU_FTRS_40X, 1470 .cpu_user_features = PPC_FEATURE_32 | 1471 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1472 .mmu_features = MMU_FTR_TYPE_40x, 1473 .icache_bsize = 32, 1474 .dcache_bsize = 32, 1475 .machine_check = machine_check_4xx, 1476 .platform = "ppc405", 1477 }, 1478 { /* 405EXr Rev. D with Security */ 1479 .pvr_mask = 0xffff000f, 1480 .pvr_value = 0x12910002, 1481 .cpu_name = "405EXr Rev. D", 1482 .cpu_features = CPU_FTRS_40X, 1483 .cpu_user_features = PPC_FEATURE_32 | 1484 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1485 .mmu_features = MMU_FTR_TYPE_40x, 1486 .icache_bsize = 32, 1487 .dcache_bsize = 32, 1488 .machine_check = machine_check_4xx, 1489 .platform = "ppc405", 1490 }, 1491 { 1492 /* 405EZ */ 1493 .pvr_mask = 0xffff0000, 1494 .pvr_value = 0x41510000, 1495 .cpu_name = "405EZ", 1496 .cpu_features = CPU_FTRS_40X, 1497 .cpu_user_features = PPC_FEATURE_32 | 1498 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1499 .mmu_features = MMU_FTR_TYPE_40x, 1500 .icache_bsize = 32, 1501 .dcache_bsize = 32, 1502 .machine_check = machine_check_4xx, 1503 .platform = "ppc405", 1504 }, 1505 { /* APM8018X */ 1506 .pvr_mask = 0xffff0000, 1507 .pvr_value = 0x7ff11432, 1508 .cpu_name = "APM8018X", 1509 .cpu_features = CPU_FTRS_40X, 1510 .cpu_user_features = PPC_FEATURE_32 | 1511 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1512 .mmu_features = MMU_FTR_TYPE_40x, 1513 .icache_bsize = 32, 1514 .dcache_bsize = 32, 1515 .machine_check = machine_check_4xx, 1516 .platform = "ppc405", 1517 }, 1518 { /* default match */ 1519 .pvr_mask = 0x00000000, 1520 .pvr_value = 0x00000000, 1521 .cpu_name = "(generic 40x PPC)", 1522 .cpu_features = CPU_FTRS_40X, 1523 .cpu_user_features = PPC_FEATURE_32 | 1524 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1525 .mmu_features = MMU_FTR_TYPE_40x, 1526 .icache_bsize = 32, 1527 .dcache_bsize = 32, 1528 .machine_check = machine_check_4xx, 1529 .platform = "ppc405", 1530 } 1531 1532 #endif /* CONFIG_40x */ 1533 #ifdef CONFIG_44x 1534 { 1535 .pvr_mask = 0xf0000fff, 1536 .pvr_value = 0x40000850, 1537 .cpu_name = "440GR Rev. A", 1538 .cpu_features = CPU_FTRS_44X, 1539 .cpu_user_features = COMMON_USER_BOOKE, 1540 .mmu_features = MMU_FTR_TYPE_44x, 1541 .icache_bsize = 32, 1542 .dcache_bsize = 32, 1543 .machine_check = machine_check_4xx, 1544 .platform = "ppc440", 1545 }, 1546 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1547 .pvr_mask = 0xf0000fff, 1548 .pvr_value = 0x40000858, 1549 .cpu_name = "440EP Rev. A", 1550 .cpu_features = CPU_FTRS_44X, 1551 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1552 .mmu_features = MMU_FTR_TYPE_44x, 1553 .icache_bsize = 32, 1554 .dcache_bsize = 32, 1555 .cpu_setup = __setup_cpu_440ep, 1556 .machine_check = machine_check_4xx, 1557 .platform = "ppc440", 1558 }, 1559 { 1560 .pvr_mask = 0xf0000fff, 1561 .pvr_value = 0x400008d3, 1562 .cpu_name = "440GR Rev. B", 1563 .cpu_features = CPU_FTRS_44X, 1564 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1565 .mmu_features = MMU_FTR_TYPE_44x, 1566 .icache_bsize = 32, 1567 .dcache_bsize = 32, 1568 .machine_check = machine_check_4xx, 1569 .platform = "ppc440", 1570 }, 1571 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1572 .pvr_mask = 0xf0000ff7, 1573 .pvr_value = 0x400008d4, 1574 .cpu_name = "440EP Rev. C", 1575 .cpu_features = CPU_FTRS_44X, 1576 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1577 .mmu_features = MMU_FTR_TYPE_44x, 1578 .icache_bsize = 32, 1579 .dcache_bsize = 32, 1580 .cpu_setup = __setup_cpu_440ep, 1581 .machine_check = machine_check_4xx, 1582 .platform = "ppc440", 1583 }, 1584 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1585 .pvr_mask = 0xf0000fff, 1586 .pvr_value = 0x400008db, 1587 .cpu_name = "440EP Rev. B", 1588 .cpu_features = CPU_FTRS_44X, 1589 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1590 .mmu_features = MMU_FTR_TYPE_44x, 1591 .icache_bsize = 32, 1592 .dcache_bsize = 32, 1593 .cpu_setup = __setup_cpu_440ep, 1594 .machine_check = machine_check_4xx, 1595 .platform = "ppc440", 1596 }, 1597 { /* 440GRX */ 1598 .pvr_mask = 0xf0000ffb, 1599 .pvr_value = 0x200008D0, 1600 .cpu_name = "440GRX", 1601 .cpu_features = CPU_FTRS_44X, 1602 .cpu_user_features = COMMON_USER_BOOKE, 1603 .mmu_features = MMU_FTR_TYPE_44x, 1604 .icache_bsize = 32, 1605 .dcache_bsize = 32, 1606 .cpu_setup = __setup_cpu_440grx, 1607 .machine_check = machine_check_440A, 1608 .platform = "ppc440", 1609 }, 1610 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1611 .pvr_mask = 0xf0000ffb, 1612 .pvr_value = 0x200008D8, 1613 .cpu_name = "440EPX", 1614 .cpu_features = CPU_FTRS_44X, 1615 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1616 .mmu_features = MMU_FTR_TYPE_44x, 1617 .icache_bsize = 32, 1618 .dcache_bsize = 32, 1619 .cpu_setup = __setup_cpu_440epx, 1620 .machine_check = machine_check_440A, 1621 .platform = "ppc440", 1622 }, 1623 { /* 440GP Rev. B */ 1624 .pvr_mask = 0xf0000fff, 1625 .pvr_value = 0x40000440, 1626 .cpu_name = "440GP Rev. B", 1627 .cpu_features = CPU_FTRS_44X, 1628 .cpu_user_features = COMMON_USER_BOOKE, 1629 .mmu_features = MMU_FTR_TYPE_44x, 1630 .icache_bsize = 32, 1631 .dcache_bsize = 32, 1632 .machine_check = machine_check_4xx, 1633 .platform = "ppc440gp", 1634 }, 1635 { /* 440GP Rev. C */ 1636 .pvr_mask = 0xf0000fff, 1637 .pvr_value = 0x40000481, 1638 .cpu_name = "440GP Rev. C", 1639 .cpu_features = CPU_FTRS_44X, 1640 .cpu_user_features = COMMON_USER_BOOKE, 1641 .mmu_features = MMU_FTR_TYPE_44x, 1642 .icache_bsize = 32, 1643 .dcache_bsize = 32, 1644 .machine_check = machine_check_4xx, 1645 .platform = "ppc440gp", 1646 }, 1647 { /* 440GX Rev. A */ 1648 .pvr_mask = 0xf0000fff, 1649 .pvr_value = 0x50000850, 1650 .cpu_name = "440GX Rev. A", 1651 .cpu_features = CPU_FTRS_44X, 1652 .cpu_user_features = COMMON_USER_BOOKE, 1653 .mmu_features = MMU_FTR_TYPE_44x, 1654 .icache_bsize = 32, 1655 .dcache_bsize = 32, 1656 .cpu_setup = __setup_cpu_440gx, 1657 .machine_check = machine_check_440A, 1658 .platform = "ppc440", 1659 }, 1660 { /* 440GX Rev. B */ 1661 .pvr_mask = 0xf0000fff, 1662 .pvr_value = 0x50000851, 1663 .cpu_name = "440GX Rev. B", 1664 .cpu_features = CPU_FTRS_44X, 1665 .cpu_user_features = COMMON_USER_BOOKE, 1666 .mmu_features = MMU_FTR_TYPE_44x, 1667 .icache_bsize = 32, 1668 .dcache_bsize = 32, 1669 .cpu_setup = __setup_cpu_440gx, 1670 .machine_check = machine_check_440A, 1671 .platform = "ppc440", 1672 }, 1673 { /* 440GX Rev. C */ 1674 .pvr_mask = 0xf0000fff, 1675 .pvr_value = 0x50000892, 1676 .cpu_name = "440GX Rev. C", 1677 .cpu_features = CPU_FTRS_44X, 1678 .cpu_user_features = COMMON_USER_BOOKE, 1679 .mmu_features = MMU_FTR_TYPE_44x, 1680 .icache_bsize = 32, 1681 .dcache_bsize = 32, 1682 .cpu_setup = __setup_cpu_440gx, 1683 .machine_check = machine_check_440A, 1684 .platform = "ppc440", 1685 }, 1686 { /* 440GX Rev. F */ 1687 .pvr_mask = 0xf0000fff, 1688 .pvr_value = 0x50000894, 1689 .cpu_name = "440GX Rev. F", 1690 .cpu_features = CPU_FTRS_44X, 1691 .cpu_user_features = COMMON_USER_BOOKE, 1692 .mmu_features = MMU_FTR_TYPE_44x, 1693 .icache_bsize = 32, 1694 .dcache_bsize = 32, 1695 .cpu_setup = __setup_cpu_440gx, 1696 .machine_check = machine_check_440A, 1697 .platform = "ppc440", 1698 }, 1699 { /* 440SP Rev. A */ 1700 .pvr_mask = 0xfff00fff, 1701 .pvr_value = 0x53200891, 1702 .cpu_name = "440SP Rev. A", 1703 .cpu_features = CPU_FTRS_44X, 1704 .cpu_user_features = COMMON_USER_BOOKE, 1705 .mmu_features = MMU_FTR_TYPE_44x, 1706 .icache_bsize = 32, 1707 .dcache_bsize = 32, 1708 .machine_check = machine_check_4xx, 1709 .platform = "ppc440", 1710 }, 1711 { /* 440SPe Rev. A */ 1712 .pvr_mask = 0xfff00fff, 1713 .pvr_value = 0x53400890, 1714 .cpu_name = "440SPe Rev. A", 1715 .cpu_features = CPU_FTRS_44X, 1716 .cpu_user_features = COMMON_USER_BOOKE, 1717 .mmu_features = MMU_FTR_TYPE_44x, 1718 .icache_bsize = 32, 1719 .dcache_bsize = 32, 1720 .cpu_setup = __setup_cpu_440spe, 1721 .machine_check = machine_check_440A, 1722 .platform = "ppc440", 1723 }, 1724 { /* 440SPe Rev. B */ 1725 .pvr_mask = 0xfff00fff, 1726 .pvr_value = 0x53400891, 1727 .cpu_name = "440SPe Rev. B", 1728 .cpu_features = CPU_FTRS_44X, 1729 .cpu_user_features = COMMON_USER_BOOKE, 1730 .mmu_features = MMU_FTR_TYPE_44x, 1731 .icache_bsize = 32, 1732 .dcache_bsize = 32, 1733 .cpu_setup = __setup_cpu_440spe, 1734 .machine_check = machine_check_440A, 1735 .platform = "ppc440", 1736 }, 1737 { /* 460EX */ 1738 .pvr_mask = 0xffff0006, 1739 .pvr_value = 0x13020002, 1740 .cpu_name = "460EX", 1741 .cpu_features = CPU_FTRS_440x6, 1742 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1743 .mmu_features = MMU_FTR_TYPE_44x, 1744 .icache_bsize = 32, 1745 .dcache_bsize = 32, 1746 .cpu_setup = __setup_cpu_460ex, 1747 .machine_check = machine_check_440A, 1748 .platform = "ppc440", 1749 }, 1750 { /* 460EX Rev B */ 1751 .pvr_mask = 0xffff0007, 1752 .pvr_value = 0x13020004, 1753 .cpu_name = "460EX Rev. B", 1754 .cpu_features = CPU_FTRS_440x6, 1755 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1756 .mmu_features = MMU_FTR_TYPE_44x, 1757 .icache_bsize = 32, 1758 .dcache_bsize = 32, 1759 .cpu_setup = __setup_cpu_460ex, 1760 .machine_check = machine_check_440A, 1761 .platform = "ppc440", 1762 }, 1763 { /* 460GT */ 1764 .pvr_mask = 0xffff0006, 1765 .pvr_value = 0x13020000, 1766 .cpu_name = "460GT", 1767 .cpu_features = CPU_FTRS_440x6, 1768 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1769 .mmu_features = MMU_FTR_TYPE_44x, 1770 .icache_bsize = 32, 1771 .dcache_bsize = 32, 1772 .cpu_setup = __setup_cpu_460gt, 1773 .machine_check = machine_check_440A, 1774 .platform = "ppc440", 1775 }, 1776 { /* 460GT Rev B */ 1777 .pvr_mask = 0xffff0007, 1778 .pvr_value = 0x13020005, 1779 .cpu_name = "460GT Rev. B", 1780 .cpu_features = CPU_FTRS_440x6, 1781 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1782 .mmu_features = MMU_FTR_TYPE_44x, 1783 .icache_bsize = 32, 1784 .dcache_bsize = 32, 1785 .cpu_setup = __setup_cpu_460gt, 1786 .machine_check = machine_check_440A, 1787 .platform = "ppc440", 1788 }, 1789 { /* 460SX */ 1790 .pvr_mask = 0xffffff00, 1791 .pvr_value = 0x13541800, 1792 .cpu_name = "460SX", 1793 .cpu_features = CPU_FTRS_44X, 1794 .cpu_user_features = COMMON_USER_BOOKE, 1795 .mmu_features = MMU_FTR_TYPE_44x, 1796 .icache_bsize = 32, 1797 .dcache_bsize = 32, 1798 .cpu_setup = __setup_cpu_460sx, 1799 .machine_check = machine_check_440A, 1800 .platform = "ppc440", 1801 }, 1802 { /* 464 in APM821xx */ 1803 .pvr_mask = 0xfffffff0, 1804 .pvr_value = 0x12C41C80, 1805 .cpu_name = "APM821XX", 1806 .cpu_features = CPU_FTRS_44X, 1807 .cpu_user_features = COMMON_USER_BOOKE | 1808 PPC_FEATURE_HAS_FPU, 1809 .mmu_features = MMU_FTR_TYPE_44x, 1810 .icache_bsize = 32, 1811 .dcache_bsize = 32, 1812 .cpu_setup = __setup_cpu_apm821xx, 1813 .machine_check = machine_check_440A, 1814 .platform = "ppc440", 1815 }, 1816 #ifdef CONFIG_PPC_47x 1817 { /* 476 DD2 core */ 1818 .pvr_mask = 0xffffffff, 1819 .pvr_value = 0x11a52080, 1820 .cpu_name = "476", 1821 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1822 .cpu_user_features = COMMON_USER_BOOKE | 1823 PPC_FEATURE_HAS_FPU, 1824 .mmu_features = MMU_FTR_TYPE_47x | 1825 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1826 .icache_bsize = 32, 1827 .dcache_bsize = 128, 1828 .machine_check = machine_check_47x, 1829 .platform = "ppc470", 1830 }, 1831 { /* 476fpe */ 1832 .pvr_mask = 0xffff0000, 1833 .pvr_value = 0x7ff50000, 1834 .cpu_name = "476fpe", 1835 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1836 .cpu_user_features = COMMON_USER_BOOKE | 1837 PPC_FEATURE_HAS_FPU, 1838 .mmu_features = MMU_FTR_TYPE_47x | 1839 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1840 .icache_bsize = 32, 1841 .dcache_bsize = 128, 1842 .machine_check = machine_check_47x, 1843 .platform = "ppc470", 1844 }, 1845 { /* 476 iss */ 1846 .pvr_mask = 0xffff0000, 1847 .pvr_value = 0x00050000, 1848 .cpu_name = "476", 1849 .cpu_features = CPU_FTRS_47X, 1850 .cpu_user_features = COMMON_USER_BOOKE | 1851 PPC_FEATURE_HAS_FPU, 1852 .mmu_features = MMU_FTR_TYPE_47x | 1853 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1854 .icache_bsize = 32, 1855 .dcache_bsize = 128, 1856 .machine_check = machine_check_47x, 1857 .platform = "ppc470", 1858 }, 1859 { /* 476 others */ 1860 .pvr_mask = 0xffff0000, 1861 .pvr_value = 0x11a50000, 1862 .cpu_name = "476", 1863 .cpu_features = CPU_FTRS_47X, 1864 .cpu_user_features = COMMON_USER_BOOKE | 1865 PPC_FEATURE_HAS_FPU, 1866 .mmu_features = MMU_FTR_TYPE_47x | 1867 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1868 .icache_bsize = 32, 1869 .dcache_bsize = 128, 1870 .machine_check = machine_check_47x, 1871 .platform = "ppc470", 1872 }, 1873 #endif /* CONFIG_PPC_47x */ 1874 { /* default match */ 1875 .pvr_mask = 0x00000000, 1876 .pvr_value = 0x00000000, 1877 .cpu_name = "(generic 44x PPC)", 1878 .cpu_features = CPU_FTRS_44X, 1879 .cpu_user_features = COMMON_USER_BOOKE, 1880 .mmu_features = MMU_FTR_TYPE_44x, 1881 .icache_bsize = 32, 1882 .dcache_bsize = 32, 1883 .machine_check = machine_check_4xx, 1884 .platform = "ppc440", 1885 } 1886 #endif /* CONFIG_44x */ 1887 #ifdef CONFIG_E200 1888 { /* e200z5 */ 1889 .pvr_mask = 0xfff00000, 1890 .pvr_value = 0x81000000, 1891 .cpu_name = "e200z5", 1892 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1893 .cpu_features = CPU_FTRS_E200, 1894 .cpu_user_features = COMMON_USER_BOOKE | 1895 PPC_FEATURE_HAS_EFP_SINGLE | 1896 PPC_FEATURE_UNIFIED_CACHE, 1897 .mmu_features = MMU_FTR_TYPE_FSL_E, 1898 .dcache_bsize = 32, 1899 .machine_check = machine_check_e200, 1900 .platform = "ppc5554", 1901 }, 1902 { /* e200z6 */ 1903 .pvr_mask = 0xfff00000, 1904 .pvr_value = 0x81100000, 1905 .cpu_name = "e200z6", 1906 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1907 .cpu_features = CPU_FTRS_E200, 1908 .cpu_user_features = COMMON_USER_BOOKE | 1909 PPC_FEATURE_HAS_SPE_COMP | 1910 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1911 PPC_FEATURE_UNIFIED_CACHE, 1912 .mmu_features = MMU_FTR_TYPE_FSL_E, 1913 .dcache_bsize = 32, 1914 .machine_check = machine_check_e200, 1915 .platform = "ppc5554", 1916 }, 1917 { /* default match */ 1918 .pvr_mask = 0x00000000, 1919 .pvr_value = 0x00000000, 1920 .cpu_name = "(generic E200 PPC)", 1921 .cpu_features = CPU_FTRS_E200, 1922 .cpu_user_features = COMMON_USER_BOOKE | 1923 PPC_FEATURE_HAS_EFP_SINGLE | 1924 PPC_FEATURE_UNIFIED_CACHE, 1925 .mmu_features = MMU_FTR_TYPE_FSL_E, 1926 .dcache_bsize = 32, 1927 .cpu_setup = __setup_cpu_e200, 1928 .machine_check = machine_check_e200, 1929 .platform = "ppc5554", 1930 } 1931 #endif /* CONFIG_E200 */ 1932 #endif /* CONFIG_PPC32 */ 1933 #ifdef CONFIG_E500 1934 #ifdef CONFIG_PPC32 1935 #ifndef CONFIG_PPC_E500MC 1936 { /* e500 */ 1937 .pvr_mask = 0xffff0000, 1938 .pvr_value = 0x80200000, 1939 .cpu_name = "e500", 1940 .cpu_features = CPU_FTRS_E500, 1941 .cpu_user_features = COMMON_USER_BOOKE | 1942 PPC_FEATURE_HAS_SPE_COMP | 1943 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1944 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1945 .mmu_features = MMU_FTR_TYPE_FSL_E, 1946 .icache_bsize = 32, 1947 .dcache_bsize = 32, 1948 .num_pmcs = 4, 1949 .oprofile_cpu_type = "ppc/e500", 1950 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1951 .cpu_setup = __setup_cpu_e500v1, 1952 .machine_check = machine_check_e500, 1953 .platform = "ppc8540", 1954 }, 1955 { /* e500v2 */ 1956 .pvr_mask = 0xffff0000, 1957 .pvr_value = 0x80210000, 1958 .cpu_name = "e500v2", 1959 .cpu_features = CPU_FTRS_E500_2, 1960 .cpu_user_features = COMMON_USER_BOOKE | 1961 PPC_FEATURE_HAS_SPE_COMP | 1962 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1963 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1964 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1965 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1966 .icache_bsize = 32, 1967 .dcache_bsize = 32, 1968 .num_pmcs = 4, 1969 .oprofile_cpu_type = "ppc/e500", 1970 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1971 .cpu_setup = __setup_cpu_e500v2, 1972 .machine_check = machine_check_e500, 1973 .platform = "ppc8548", 1974 .cpu_down_flush = cpu_down_flush_e500v2, 1975 }, 1976 #else 1977 { /* e500mc */ 1978 .pvr_mask = 0xffff0000, 1979 .pvr_value = 0x80230000, 1980 .cpu_name = "e500mc", 1981 .cpu_features = CPU_FTRS_E500MC, 1982 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1983 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1984 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1985 MMU_FTR_USE_TLBILX, 1986 .icache_bsize = 64, 1987 .dcache_bsize = 64, 1988 .num_pmcs = 4, 1989 .oprofile_cpu_type = "ppc/e500mc", 1990 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1991 .cpu_setup = __setup_cpu_e500mc, 1992 .machine_check = machine_check_e500mc, 1993 .platform = "ppce500mc", 1994 .cpu_down_flush = cpu_down_flush_e500mc, 1995 }, 1996 #endif /* CONFIG_PPC_E500MC */ 1997 #endif /* CONFIG_PPC32 */ 1998 #ifdef CONFIG_PPC_E500MC 1999 { /* e5500 */ 2000 .pvr_mask = 0xffff0000, 2001 .pvr_value = 0x80240000, 2002 .cpu_name = "e5500", 2003 .cpu_features = CPU_FTRS_E5500, 2004 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2005 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2006 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2007 MMU_FTR_USE_TLBILX, 2008 .icache_bsize = 64, 2009 .dcache_bsize = 64, 2010 .num_pmcs = 4, 2011 .oprofile_cpu_type = "ppc/e500mc", 2012 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2013 .cpu_setup = __setup_cpu_e5500, 2014 #ifndef CONFIG_PPC32 2015 .cpu_restore = __restore_cpu_e5500, 2016 #endif 2017 .machine_check = machine_check_e500mc, 2018 .platform = "ppce5500", 2019 .cpu_down_flush = cpu_down_flush_e5500, 2020 }, 2021 { /* e6500 */ 2022 .pvr_mask = 0xffff0000, 2023 .pvr_value = 0x80400000, 2024 .cpu_name = "e6500", 2025 .cpu_features = CPU_FTRS_E6500, 2026 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2027 PPC_FEATURE_HAS_ALTIVEC_COMP, 2028 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2029 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2030 MMU_FTR_USE_TLBILX, 2031 .icache_bsize = 64, 2032 .dcache_bsize = 64, 2033 .num_pmcs = 6, 2034 .oprofile_cpu_type = "ppc/e6500", 2035 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2036 .cpu_setup = __setup_cpu_e6500, 2037 #ifndef CONFIG_PPC32 2038 .cpu_restore = __restore_cpu_e6500, 2039 #endif 2040 .machine_check = machine_check_e500mc, 2041 .platform = "ppce6500", 2042 .cpu_down_flush = cpu_down_flush_e6500, 2043 }, 2044 #endif /* CONFIG_PPC_E500MC */ 2045 #ifdef CONFIG_PPC32 2046 { /* default match */ 2047 .pvr_mask = 0x00000000, 2048 .pvr_value = 0x00000000, 2049 .cpu_name = "(generic E500 PPC)", 2050 .cpu_features = CPU_FTRS_E500, 2051 .cpu_user_features = COMMON_USER_BOOKE | 2052 PPC_FEATURE_HAS_SPE_COMP | 2053 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2054 .mmu_features = MMU_FTR_TYPE_FSL_E, 2055 .icache_bsize = 32, 2056 .dcache_bsize = 32, 2057 .machine_check = machine_check_e500, 2058 .platform = "powerpc", 2059 } 2060 #endif /* CONFIG_PPC32 */ 2061 #endif /* CONFIG_E500 */ 2062 }; 2063 2064 void __init set_cur_cpu_spec(struct cpu_spec *s) 2065 { 2066 struct cpu_spec *t = &the_cpu_spec; 2067 2068 t = PTRRELOC(t); 2069 /* 2070 * use memcpy() instead of *t = *s so that GCC replaces it 2071 * by __memcpy() when KASAN is active 2072 */ 2073 memcpy(t, s, sizeof(*t)); 2074 2075 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2076 } 2077 2078 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2079 struct cpu_spec *s) 2080 { 2081 struct cpu_spec *t = &the_cpu_spec; 2082 struct cpu_spec old; 2083 2084 t = PTRRELOC(t); 2085 old = *t; 2086 2087 /* 2088 * Copy everything, then do fixups. Use memcpy() instead of *t = *s 2089 * so that GCC replaces it by __memcpy() when KASAN is active 2090 */ 2091 memcpy(t, s, sizeof(*t)); 2092 2093 /* 2094 * If we are overriding a previous value derived from the real 2095 * PVR with a new value obtained using a logical PVR value, 2096 * don't modify the performance monitor fields. 2097 */ 2098 if (old.num_pmcs && !s->num_pmcs) { 2099 t->num_pmcs = old.num_pmcs; 2100 t->pmc_type = old.pmc_type; 2101 t->oprofile_type = old.oprofile_type; 2102 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2103 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2104 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2105 2106 /* 2107 * If we have passed through this logic once before and 2108 * have pulled the default case because the real PVR was 2109 * not found inside cpu_specs[], then we are possibly 2110 * running in compatibility mode. In that case, let the 2111 * oprofiler know which set of compatibility counters to 2112 * pull from by making sure the oprofile_cpu_type string 2113 * is set to that of compatibility mode. If the 2114 * oprofile_cpu_type already has a value, then we are 2115 * possibly overriding a real PVR with a logical one, 2116 * and, in that case, keep the current value for 2117 * oprofile_cpu_type. Futhermore, let's ensure that the 2118 * fix for the PMAO bug is enabled on compatibility mode. 2119 */ 2120 if (old.oprofile_cpu_type != NULL) { 2121 t->oprofile_cpu_type = old.oprofile_cpu_type; 2122 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG; 2123 } 2124 } 2125 2126 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2127 2128 /* 2129 * Set the base platform string once; assumes 2130 * we're called with real pvr first. 2131 */ 2132 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2133 *PTRRELOC(&powerpc_base_platform) = t->platform; 2134 2135 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2136 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2137 * that processor. I will consolidate that at a later time, for now, 2138 * just use #ifdef. We also don't need to PTRRELOC the function 2139 * pointer on ppc64 and booke as we are running at 0 in real mode 2140 * on ppc64 and reloc_offset is always 0 on booke. 2141 */ 2142 if (t->cpu_setup) { 2143 t->cpu_setup(offset, t); 2144 } 2145 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2146 2147 return t; 2148 } 2149 2150 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2151 { 2152 struct cpu_spec *s = cpu_specs; 2153 int i; 2154 2155 s = PTRRELOC(s); 2156 2157 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2158 if ((pvr & s->pvr_mask) == s->pvr_value) 2159 return setup_cpu_spec(offset, s); 2160 } 2161 2162 BUG(); 2163 2164 return NULL; 2165 } 2166 2167 /* 2168 * Used by cpufeatures to get the name for CPUs with a PVR table. 2169 * If they don't hae a PVR table, cpufeatures gets the name from 2170 * cpu device-tree node. 2171 */ 2172 void __init identify_cpu_name(unsigned int pvr) 2173 { 2174 struct cpu_spec *s = cpu_specs; 2175 struct cpu_spec *t = &the_cpu_spec; 2176 int i; 2177 2178 s = PTRRELOC(s); 2179 t = PTRRELOC(t); 2180 2181 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2182 if ((pvr & s->pvr_mask) == s->pvr_value) { 2183 t->cpu_name = s->cpu_name; 2184 return; 2185 } 2186 } 2187 } 2188 2189 2190 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2191 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2192 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2193 }; 2194 EXPORT_SYMBOL_GPL(cpu_feature_keys); 2195 2196 void __init cpu_feature_keys_init(void) 2197 { 2198 int i; 2199 2200 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2201 unsigned long f = 1ul << i; 2202 2203 if (!(cur_cpu_spec->cpu_features & f)) 2204 static_branch_disable(&cpu_feature_keys[i]); 2205 } 2206 } 2207 2208 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2209 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2210 }; 2211 EXPORT_SYMBOL_GPL(mmu_feature_keys); 2212 2213 void __init mmu_feature_keys_init(void) 2214 { 2215 int i; 2216 2217 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2218 unsigned long f = 1ul << i; 2219 2220 if (!(cur_cpu_spec->mmu_features & f)) 2221 static_branch_disable(&mmu_feature_keys[i]); 2222 } 2223 } 2224 #endif 2225