1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/export.h> 18 19 #include <asm/oprofile_impl.h> 20 #include <asm/cputable.h> 21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22 #include <asm/mmu.h> 23 #include <asm/setup.h> 24 25 struct cpu_spec* cur_cpu_spec = NULL; 26 EXPORT_SYMBOL(cur_cpu_spec); 27 28 /* The platform string corresponding to the real PVR */ 29 const char *powerpc_base_platform; 30 31 /* NOTE: 32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 33 * the responsibility of the appropriate CPU save/restore functions to 34 * eventually copy these settings over. Those save/restore aren't yet 35 * part of the cputable though. That has to be fixed for both ppc32 36 * and ppc64 37 */ 38 #ifdef CONFIG_PPC32 39 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 51 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 52 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 53 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 60 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 61 #endif /* CONFIG_PPC32 */ 62 #ifdef CONFIG_PPC64 63 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 64 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 65 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 66 extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec); 67 extern void __restore_cpu_pa6t(void); 68 extern void __restore_cpu_ppc970(void); 69 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 70 extern void __restore_cpu_power7(void); 71 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 72 extern void __restore_cpu_power8(void); 73 extern void __restore_cpu_a2(void); 74 extern void __flush_tlb_power7(unsigned long inval_selector); 75 extern void __flush_tlb_power8(unsigned long inval_selector); 76 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 77 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 78 #endif /* CONFIG_PPC64 */ 79 #if defined(CONFIG_E500) 80 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 81 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 82 extern void __restore_cpu_e5500(void); 83 extern void __restore_cpu_e6500(void); 84 #endif /* CONFIG_E500 */ 85 86 /* This table only contains "desktop" CPUs, it need to be filled with embedded 87 * ones as well... 88 */ 89 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 90 PPC_FEATURE_HAS_MMU) 91 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 92 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 93 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 95 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 97 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 99 PPC_FEATURE_TRUE_LE | \ 100 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 101 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 102 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 103 PPC_FEATURE_TRUE_LE | \ 104 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 105 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 106 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 107 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 108 PPC_FEATURE_TRUE_LE | \ 109 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 110 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 111 PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_DSCR | \ 112 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 113 PPC_FEATURE2_VEC_CRYPTO) 114 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 115 PPC_FEATURE_TRUE_LE | \ 116 PPC_FEATURE_HAS_ALTIVEC_COMP) 117 #ifdef CONFIG_PPC_BOOK3E_64 118 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 119 #else 120 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 121 PPC_FEATURE_BOOKE) 122 #endif 123 124 static struct cpu_spec __initdata cpu_specs[] = { 125 #ifdef CONFIG_PPC_BOOK3S_64 126 { /* Power3 */ 127 .pvr_mask = 0xffff0000, 128 .pvr_value = 0x00400000, 129 .cpu_name = "POWER3 (630)", 130 .cpu_features = CPU_FTRS_POWER3, 131 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 132 .mmu_features = MMU_FTR_HPTE_TABLE, 133 .icache_bsize = 128, 134 .dcache_bsize = 128, 135 .num_pmcs = 8, 136 .pmc_type = PPC_PMC_IBM, 137 .oprofile_cpu_type = "ppc64/power3", 138 .oprofile_type = PPC_OPROFILE_RS64, 139 .platform = "power3", 140 }, 141 { /* Power3+ */ 142 .pvr_mask = 0xffff0000, 143 .pvr_value = 0x00410000, 144 .cpu_name = "POWER3 (630+)", 145 .cpu_features = CPU_FTRS_POWER3, 146 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 147 .mmu_features = MMU_FTR_HPTE_TABLE, 148 .icache_bsize = 128, 149 .dcache_bsize = 128, 150 .num_pmcs = 8, 151 .pmc_type = PPC_PMC_IBM, 152 .oprofile_cpu_type = "ppc64/power3", 153 .oprofile_type = PPC_OPROFILE_RS64, 154 .platform = "power3", 155 }, 156 { /* Northstar */ 157 .pvr_mask = 0xffff0000, 158 .pvr_value = 0x00330000, 159 .cpu_name = "RS64-II (northstar)", 160 .cpu_features = CPU_FTRS_RS64, 161 .cpu_user_features = COMMON_USER_PPC64, 162 .mmu_features = MMU_FTR_HPTE_TABLE, 163 .icache_bsize = 128, 164 .dcache_bsize = 128, 165 .num_pmcs = 8, 166 .pmc_type = PPC_PMC_IBM, 167 .oprofile_cpu_type = "ppc64/rs64", 168 .oprofile_type = PPC_OPROFILE_RS64, 169 .platform = "rs64", 170 }, 171 { /* Pulsar */ 172 .pvr_mask = 0xffff0000, 173 .pvr_value = 0x00340000, 174 .cpu_name = "RS64-III (pulsar)", 175 .cpu_features = CPU_FTRS_RS64, 176 .cpu_user_features = COMMON_USER_PPC64, 177 .mmu_features = MMU_FTR_HPTE_TABLE, 178 .icache_bsize = 128, 179 .dcache_bsize = 128, 180 .num_pmcs = 8, 181 .pmc_type = PPC_PMC_IBM, 182 .oprofile_cpu_type = "ppc64/rs64", 183 .oprofile_type = PPC_OPROFILE_RS64, 184 .platform = "rs64", 185 }, 186 { /* I-star */ 187 .pvr_mask = 0xffff0000, 188 .pvr_value = 0x00360000, 189 .cpu_name = "RS64-III (icestar)", 190 .cpu_features = CPU_FTRS_RS64, 191 .cpu_user_features = COMMON_USER_PPC64, 192 .mmu_features = MMU_FTR_HPTE_TABLE, 193 .icache_bsize = 128, 194 .dcache_bsize = 128, 195 .num_pmcs = 8, 196 .pmc_type = PPC_PMC_IBM, 197 .oprofile_cpu_type = "ppc64/rs64", 198 .oprofile_type = PPC_OPROFILE_RS64, 199 .platform = "rs64", 200 }, 201 { /* S-star */ 202 .pvr_mask = 0xffff0000, 203 .pvr_value = 0x00370000, 204 .cpu_name = "RS64-IV (sstar)", 205 .cpu_features = CPU_FTRS_RS64, 206 .cpu_user_features = COMMON_USER_PPC64, 207 .mmu_features = MMU_FTR_HPTE_TABLE, 208 .icache_bsize = 128, 209 .dcache_bsize = 128, 210 .num_pmcs = 8, 211 .pmc_type = PPC_PMC_IBM, 212 .oprofile_cpu_type = "ppc64/rs64", 213 .oprofile_type = PPC_OPROFILE_RS64, 214 .platform = "rs64", 215 }, 216 { /* Power4 */ 217 .pvr_mask = 0xffff0000, 218 .pvr_value = 0x00350000, 219 .cpu_name = "POWER4 (gp)", 220 .cpu_features = CPU_FTRS_POWER4, 221 .cpu_user_features = COMMON_USER_POWER4, 222 .mmu_features = MMU_FTRS_POWER4, 223 .icache_bsize = 128, 224 .dcache_bsize = 128, 225 .num_pmcs = 8, 226 .pmc_type = PPC_PMC_IBM, 227 .oprofile_cpu_type = "ppc64/power4", 228 .oprofile_type = PPC_OPROFILE_POWER4, 229 .platform = "power4", 230 }, 231 { /* Power4+ */ 232 .pvr_mask = 0xffff0000, 233 .pvr_value = 0x00380000, 234 .cpu_name = "POWER4+ (gq)", 235 .cpu_features = CPU_FTRS_POWER4, 236 .cpu_user_features = COMMON_USER_POWER4, 237 .mmu_features = MMU_FTRS_POWER4, 238 .icache_bsize = 128, 239 .dcache_bsize = 128, 240 .num_pmcs = 8, 241 .pmc_type = PPC_PMC_IBM, 242 .oprofile_cpu_type = "ppc64/power4", 243 .oprofile_type = PPC_OPROFILE_POWER4, 244 .platform = "power4", 245 }, 246 { /* PPC970 */ 247 .pvr_mask = 0xffff0000, 248 .pvr_value = 0x00390000, 249 .cpu_name = "PPC970", 250 .cpu_features = CPU_FTRS_PPC970, 251 .cpu_user_features = COMMON_USER_POWER4 | 252 PPC_FEATURE_HAS_ALTIVEC_COMP, 253 .mmu_features = MMU_FTRS_PPC970, 254 .icache_bsize = 128, 255 .dcache_bsize = 128, 256 .num_pmcs = 8, 257 .pmc_type = PPC_PMC_IBM, 258 .cpu_setup = __setup_cpu_ppc970, 259 .cpu_restore = __restore_cpu_ppc970, 260 .oprofile_cpu_type = "ppc64/970", 261 .oprofile_type = PPC_OPROFILE_POWER4, 262 .platform = "ppc970", 263 }, 264 { /* PPC970FX */ 265 .pvr_mask = 0xffff0000, 266 .pvr_value = 0x003c0000, 267 .cpu_name = "PPC970FX", 268 .cpu_features = CPU_FTRS_PPC970, 269 .cpu_user_features = COMMON_USER_POWER4 | 270 PPC_FEATURE_HAS_ALTIVEC_COMP, 271 .mmu_features = MMU_FTRS_PPC970, 272 .icache_bsize = 128, 273 .dcache_bsize = 128, 274 .num_pmcs = 8, 275 .pmc_type = PPC_PMC_IBM, 276 .cpu_setup = __setup_cpu_ppc970, 277 .cpu_restore = __restore_cpu_ppc970, 278 .oprofile_cpu_type = "ppc64/970", 279 .oprofile_type = PPC_OPROFILE_POWER4, 280 .platform = "ppc970", 281 }, 282 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 283 .pvr_mask = 0xffffffff, 284 .pvr_value = 0x00440100, 285 .cpu_name = "PPC970MP", 286 .cpu_features = CPU_FTRS_PPC970, 287 .cpu_user_features = COMMON_USER_POWER4 | 288 PPC_FEATURE_HAS_ALTIVEC_COMP, 289 .mmu_features = MMU_FTRS_PPC970, 290 .icache_bsize = 128, 291 .dcache_bsize = 128, 292 .num_pmcs = 8, 293 .pmc_type = PPC_PMC_IBM, 294 .cpu_setup = __setup_cpu_ppc970, 295 .cpu_restore = __restore_cpu_ppc970, 296 .oprofile_cpu_type = "ppc64/970MP", 297 .oprofile_type = PPC_OPROFILE_POWER4, 298 .platform = "ppc970", 299 }, 300 { /* PPC970MP */ 301 .pvr_mask = 0xffff0000, 302 .pvr_value = 0x00440000, 303 .cpu_name = "PPC970MP", 304 .cpu_features = CPU_FTRS_PPC970, 305 .cpu_user_features = COMMON_USER_POWER4 | 306 PPC_FEATURE_HAS_ALTIVEC_COMP, 307 .mmu_features = MMU_FTRS_PPC970, 308 .icache_bsize = 128, 309 .dcache_bsize = 128, 310 .num_pmcs = 8, 311 .pmc_type = PPC_PMC_IBM, 312 .cpu_setup = __setup_cpu_ppc970MP, 313 .cpu_restore = __restore_cpu_ppc970, 314 .oprofile_cpu_type = "ppc64/970MP", 315 .oprofile_type = PPC_OPROFILE_POWER4, 316 .platform = "ppc970", 317 }, 318 { /* PPC970GX */ 319 .pvr_mask = 0xffff0000, 320 .pvr_value = 0x00450000, 321 .cpu_name = "PPC970GX", 322 .cpu_features = CPU_FTRS_PPC970, 323 .cpu_user_features = COMMON_USER_POWER4 | 324 PPC_FEATURE_HAS_ALTIVEC_COMP, 325 .mmu_features = MMU_FTRS_PPC970, 326 .icache_bsize = 128, 327 .dcache_bsize = 128, 328 .num_pmcs = 8, 329 .pmc_type = PPC_PMC_IBM, 330 .cpu_setup = __setup_cpu_ppc970, 331 .oprofile_cpu_type = "ppc64/970", 332 .oprofile_type = PPC_OPROFILE_POWER4, 333 .platform = "ppc970", 334 }, 335 { /* Power5 GR */ 336 .pvr_mask = 0xffff0000, 337 .pvr_value = 0x003a0000, 338 .cpu_name = "POWER5 (gr)", 339 .cpu_features = CPU_FTRS_POWER5, 340 .cpu_user_features = COMMON_USER_POWER5, 341 .mmu_features = MMU_FTRS_POWER5, 342 .icache_bsize = 128, 343 .dcache_bsize = 128, 344 .num_pmcs = 6, 345 .pmc_type = PPC_PMC_IBM, 346 .oprofile_cpu_type = "ppc64/power5", 347 .oprofile_type = PPC_OPROFILE_POWER4, 348 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 349 * and above but only works on POWER5 and above 350 */ 351 .oprofile_mmcra_sihv = MMCRA_SIHV, 352 .oprofile_mmcra_sipr = MMCRA_SIPR, 353 .platform = "power5", 354 }, 355 { /* Power5++ */ 356 .pvr_mask = 0xffffff00, 357 .pvr_value = 0x003b0300, 358 .cpu_name = "POWER5+ (gs)", 359 .cpu_features = CPU_FTRS_POWER5, 360 .cpu_user_features = COMMON_USER_POWER5_PLUS, 361 .mmu_features = MMU_FTRS_POWER5, 362 .icache_bsize = 128, 363 .dcache_bsize = 128, 364 .num_pmcs = 6, 365 .oprofile_cpu_type = "ppc64/power5++", 366 .oprofile_type = PPC_OPROFILE_POWER4, 367 .oprofile_mmcra_sihv = MMCRA_SIHV, 368 .oprofile_mmcra_sipr = MMCRA_SIPR, 369 .platform = "power5+", 370 }, 371 { /* Power5 GS */ 372 .pvr_mask = 0xffff0000, 373 .pvr_value = 0x003b0000, 374 .cpu_name = "POWER5+ (gs)", 375 .cpu_features = CPU_FTRS_POWER5, 376 .cpu_user_features = COMMON_USER_POWER5_PLUS, 377 .mmu_features = MMU_FTRS_POWER5, 378 .icache_bsize = 128, 379 .dcache_bsize = 128, 380 .num_pmcs = 6, 381 .pmc_type = PPC_PMC_IBM, 382 .oprofile_cpu_type = "ppc64/power5+", 383 .oprofile_type = PPC_OPROFILE_POWER4, 384 .oprofile_mmcra_sihv = MMCRA_SIHV, 385 .oprofile_mmcra_sipr = MMCRA_SIPR, 386 .platform = "power5+", 387 }, 388 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 389 .pvr_mask = 0xffffffff, 390 .pvr_value = 0x0f000001, 391 .cpu_name = "POWER5+", 392 .cpu_features = CPU_FTRS_POWER5, 393 .cpu_user_features = COMMON_USER_POWER5_PLUS, 394 .mmu_features = MMU_FTRS_POWER5, 395 .icache_bsize = 128, 396 .dcache_bsize = 128, 397 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 398 .oprofile_type = PPC_OPROFILE_POWER4, 399 .platform = "power5+", 400 }, 401 { /* Power6 */ 402 .pvr_mask = 0xffff0000, 403 .pvr_value = 0x003e0000, 404 .cpu_name = "POWER6 (raw)", 405 .cpu_features = CPU_FTRS_POWER6, 406 .cpu_user_features = COMMON_USER_POWER6 | 407 PPC_FEATURE_POWER6_EXT, 408 .mmu_features = MMU_FTRS_POWER6, 409 .icache_bsize = 128, 410 .dcache_bsize = 128, 411 .num_pmcs = 6, 412 .pmc_type = PPC_PMC_IBM, 413 .oprofile_cpu_type = "ppc64/power6", 414 .oprofile_type = PPC_OPROFILE_POWER4, 415 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 416 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 417 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 418 POWER6_MMCRA_OTHER, 419 .platform = "power6x", 420 }, 421 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 422 .pvr_mask = 0xffffffff, 423 .pvr_value = 0x0f000002, 424 .cpu_name = "POWER6 (architected)", 425 .cpu_features = CPU_FTRS_POWER6, 426 .cpu_user_features = COMMON_USER_POWER6, 427 .mmu_features = MMU_FTRS_POWER6, 428 .icache_bsize = 128, 429 .dcache_bsize = 128, 430 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 431 .oprofile_type = PPC_OPROFILE_POWER4, 432 .platform = "power6", 433 }, 434 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 435 .pvr_mask = 0xffffffff, 436 .pvr_value = 0x0f000003, 437 .cpu_name = "POWER7 (architected)", 438 .cpu_features = CPU_FTRS_POWER7, 439 .cpu_user_features = COMMON_USER_POWER7, 440 .cpu_user_features2 = COMMON_USER2_POWER7, 441 .mmu_features = MMU_FTRS_POWER7, 442 .icache_bsize = 128, 443 .dcache_bsize = 128, 444 .oprofile_type = PPC_OPROFILE_POWER4, 445 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 446 .cpu_setup = __setup_cpu_power7, 447 .cpu_restore = __restore_cpu_power7, 448 .flush_tlb = __flush_tlb_power7, 449 .machine_check_early = __machine_check_early_realmode_p7, 450 .platform = "power7", 451 }, 452 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 453 .pvr_mask = 0xffffffff, 454 .pvr_value = 0x0f000004, 455 .cpu_name = "POWER8 (architected)", 456 .cpu_features = CPU_FTRS_POWER8, 457 .cpu_user_features = COMMON_USER_POWER8, 458 .cpu_user_features2 = COMMON_USER2_POWER8, 459 .mmu_features = MMU_FTRS_POWER8, 460 .icache_bsize = 128, 461 .dcache_bsize = 128, 462 .oprofile_type = PPC_OPROFILE_INVALID, 463 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 464 .cpu_setup = __setup_cpu_power8, 465 .cpu_restore = __restore_cpu_power8, 466 .flush_tlb = __flush_tlb_power8, 467 .machine_check_early = __machine_check_early_realmode_p8, 468 .platform = "power8", 469 }, 470 { /* Power7 */ 471 .pvr_mask = 0xffff0000, 472 .pvr_value = 0x003f0000, 473 .cpu_name = "POWER7 (raw)", 474 .cpu_features = CPU_FTRS_POWER7, 475 .cpu_user_features = COMMON_USER_POWER7, 476 .cpu_user_features2 = COMMON_USER2_POWER7, 477 .mmu_features = MMU_FTRS_POWER7, 478 .icache_bsize = 128, 479 .dcache_bsize = 128, 480 .num_pmcs = 6, 481 .pmc_type = PPC_PMC_IBM, 482 .oprofile_cpu_type = "ppc64/power7", 483 .oprofile_type = PPC_OPROFILE_POWER4, 484 .cpu_setup = __setup_cpu_power7, 485 .cpu_restore = __restore_cpu_power7, 486 .flush_tlb = __flush_tlb_power7, 487 .machine_check_early = __machine_check_early_realmode_p7, 488 .platform = "power7", 489 }, 490 { /* Power7+ */ 491 .pvr_mask = 0xffff0000, 492 .pvr_value = 0x004A0000, 493 .cpu_name = "POWER7+ (raw)", 494 .cpu_features = CPU_FTRS_POWER7, 495 .cpu_user_features = COMMON_USER_POWER7, 496 .cpu_user_features2 = COMMON_USER2_POWER7, 497 .mmu_features = MMU_FTRS_POWER7, 498 .icache_bsize = 128, 499 .dcache_bsize = 128, 500 .num_pmcs = 6, 501 .pmc_type = PPC_PMC_IBM, 502 .oprofile_cpu_type = "ppc64/power7", 503 .oprofile_type = PPC_OPROFILE_POWER4, 504 .cpu_setup = __setup_cpu_power7, 505 .cpu_restore = __restore_cpu_power7, 506 .flush_tlb = __flush_tlb_power7, 507 .machine_check_early = __machine_check_early_realmode_p7, 508 .platform = "power7+", 509 }, 510 { /* Power8E */ 511 .pvr_mask = 0xffff0000, 512 .pvr_value = 0x004b0000, 513 .cpu_name = "POWER8E (raw)", 514 .cpu_features = CPU_FTRS_POWER8E, 515 .cpu_user_features = COMMON_USER_POWER8, 516 .cpu_user_features2 = COMMON_USER2_POWER8, 517 .mmu_features = MMU_FTRS_POWER8, 518 .icache_bsize = 128, 519 .dcache_bsize = 128, 520 .num_pmcs = 6, 521 .pmc_type = PPC_PMC_IBM, 522 .oprofile_cpu_type = "ppc64/power8", 523 .oprofile_type = PPC_OPROFILE_INVALID, 524 .cpu_setup = __setup_cpu_power8, 525 .cpu_restore = __restore_cpu_power8, 526 .flush_tlb = __flush_tlb_power8, 527 .machine_check_early = __machine_check_early_realmode_p8, 528 .platform = "power8", 529 }, 530 { /* Power8 DD1: Does not support doorbell IPIs */ 531 .pvr_mask = 0xffffff00, 532 .pvr_value = 0x004d0100, 533 .cpu_name = "POWER8 (raw)", 534 .cpu_features = CPU_FTRS_POWER8_DD1, 535 .cpu_user_features = COMMON_USER_POWER8, 536 .cpu_user_features2 = COMMON_USER2_POWER8, 537 .mmu_features = MMU_FTRS_POWER8, 538 .icache_bsize = 128, 539 .dcache_bsize = 128, 540 .num_pmcs = 6, 541 .pmc_type = PPC_PMC_IBM, 542 .oprofile_cpu_type = "ppc64/power8", 543 .oprofile_type = PPC_OPROFILE_INVALID, 544 .cpu_setup = __setup_cpu_power8, 545 .cpu_restore = __restore_cpu_power8, 546 .flush_tlb = __flush_tlb_power8, 547 .machine_check_early = __machine_check_early_realmode_p8, 548 .platform = "power8", 549 }, 550 { /* Power8 */ 551 .pvr_mask = 0xffff0000, 552 .pvr_value = 0x004d0000, 553 .cpu_name = "POWER8 (raw)", 554 .cpu_features = CPU_FTRS_POWER8, 555 .cpu_user_features = COMMON_USER_POWER8, 556 .cpu_user_features2 = COMMON_USER2_POWER8, 557 .mmu_features = MMU_FTRS_POWER8, 558 .icache_bsize = 128, 559 .dcache_bsize = 128, 560 .num_pmcs = 6, 561 .pmc_type = PPC_PMC_IBM, 562 .oprofile_cpu_type = "ppc64/power8", 563 .oprofile_type = PPC_OPROFILE_INVALID, 564 .cpu_setup = __setup_cpu_power8, 565 .cpu_restore = __restore_cpu_power8, 566 .flush_tlb = __flush_tlb_power8, 567 .machine_check_early = __machine_check_early_realmode_p8, 568 .platform = "power8", 569 }, 570 { /* Cell Broadband Engine */ 571 .pvr_mask = 0xffff0000, 572 .pvr_value = 0x00700000, 573 .cpu_name = "Cell Broadband Engine", 574 .cpu_features = CPU_FTRS_CELL, 575 .cpu_user_features = COMMON_USER_PPC64 | 576 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 577 PPC_FEATURE_SMT, 578 .mmu_features = MMU_FTRS_CELL, 579 .icache_bsize = 128, 580 .dcache_bsize = 128, 581 .num_pmcs = 4, 582 .pmc_type = PPC_PMC_IBM, 583 .oprofile_cpu_type = "ppc64/cell-be", 584 .oprofile_type = PPC_OPROFILE_CELL, 585 .platform = "ppc-cell-be", 586 }, 587 { /* PA Semi PA6T */ 588 .pvr_mask = 0x7fff0000, 589 .pvr_value = 0x00900000, 590 .cpu_name = "PA6T", 591 .cpu_features = CPU_FTRS_PA6T, 592 .cpu_user_features = COMMON_USER_PA6T, 593 .mmu_features = MMU_FTRS_PA6T, 594 .icache_bsize = 64, 595 .dcache_bsize = 64, 596 .num_pmcs = 6, 597 .pmc_type = PPC_PMC_PA6T, 598 .cpu_setup = __setup_cpu_pa6t, 599 .cpu_restore = __restore_cpu_pa6t, 600 .oprofile_cpu_type = "ppc64/pa6t", 601 .oprofile_type = PPC_OPROFILE_PA6T, 602 .platform = "pa6t", 603 }, 604 { /* default match */ 605 .pvr_mask = 0x00000000, 606 .pvr_value = 0x00000000, 607 .cpu_name = "POWER4 (compatible)", 608 .cpu_features = CPU_FTRS_COMPATIBLE, 609 .cpu_user_features = COMMON_USER_PPC64, 610 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2, 611 .icache_bsize = 128, 612 .dcache_bsize = 128, 613 .num_pmcs = 6, 614 .pmc_type = PPC_PMC_IBM, 615 .platform = "power4", 616 } 617 #endif /* CONFIG_PPC_BOOK3S_64 */ 618 619 #ifdef CONFIG_PPC32 620 #if CLASSIC_PPC 621 { /* 601 */ 622 .pvr_mask = 0xffff0000, 623 .pvr_value = 0x00010000, 624 .cpu_name = "601", 625 .cpu_features = CPU_FTRS_PPC601, 626 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 627 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 628 .mmu_features = MMU_FTR_HPTE_TABLE, 629 .icache_bsize = 32, 630 .dcache_bsize = 32, 631 .machine_check = machine_check_generic, 632 .platform = "ppc601", 633 }, 634 { /* 603 */ 635 .pvr_mask = 0xffff0000, 636 .pvr_value = 0x00030000, 637 .cpu_name = "603", 638 .cpu_features = CPU_FTRS_603, 639 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 640 .mmu_features = 0, 641 .icache_bsize = 32, 642 .dcache_bsize = 32, 643 .cpu_setup = __setup_cpu_603, 644 .machine_check = machine_check_generic, 645 .platform = "ppc603", 646 }, 647 { /* 603e */ 648 .pvr_mask = 0xffff0000, 649 .pvr_value = 0x00060000, 650 .cpu_name = "603e", 651 .cpu_features = CPU_FTRS_603, 652 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 653 .mmu_features = 0, 654 .icache_bsize = 32, 655 .dcache_bsize = 32, 656 .cpu_setup = __setup_cpu_603, 657 .machine_check = machine_check_generic, 658 .platform = "ppc603", 659 }, 660 { /* 603ev */ 661 .pvr_mask = 0xffff0000, 662 .pvr_value = 0x00070000, 663 .cpu_name = "603ev", 664 .cpu_features = CPU_FTRS_603, 665 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 666 .mmu_features = 0, 667 .icache_bsize = 32, 668 .dcache_bsize = 32, 669 .cpu_setup = __setup_cpu_603, 670 .machine_check = machine_check_generic, 671 .platform = "ppc603", 672 }, 673 { /* 604 */ 674 .pvr_mask = 0xffff0000, 675 .pvr_value = 0x00040000, 676 .cpu_name = "604", 677 .cpu_features = CPU_FTRS_604, 678 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 679 .mmu_features = MMU_FTR_HPTE_TABLE, 680 .icache_bsize = 32, 681 .dcache_bsize = 32, 682 .num_pmcs = 2, 683 .cpu_setup = __setup_cpu_604, 684 .machine_check = machine_check_generic, 685 .platform = "ppc604", 686 }, 687 { /* 604e */ 688 .pvr_mask = 0xfffff000, 689 .pvr_value = 0x00090000, 690 .cpu_name = "604e", 691 .cpu_features = CPU_FTRS_604, 692 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 693 .mmu_features = MMU_FTR_HPTE_TABLE, 694 .icache_bsize = 32, 695 .dcache_bsize = 32, 696 .num_pmcs = 4, 697 .cpu_setup = __setup_cpu_604, 698 .machine_check = machine_check_generic, 699 .platform = "ppc604", 700 }, 701 { /* 604r */ 702 .pvr_mask = 0xffff0000, 703 .pvr_value = 0x00090000, 704 .cpu_name = "604r", 705 .cpu_features = CPU_FTRS_604, 706 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 707 .mmu_features = MMU_FTR_HPTE_TABLE, 708 .icache_bsize = 32, 709 .dcache_bsize = 32, 710 .num_pmcs = 4, 711 .cpu_setup = __setup_cpu_604, 712 .machine_check = machine_check_generic, 713 .platform = "ppc604", 714 }, 715 { /* 604ev */ 716 .pvr_mask = 0xffff0000, 717 .pvr_value = 0x000a0000, 718 .cpu_name = "604ev", 719 .cpu_features = CPU_FTRS_604, 720 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 721 .mmu_features = MMU_FTR_HPTE_TABLE, 722 .icache_bsize = 32, 723 .dcache_bsize = 32, 724 .num_pmcs = 4, 725 .cpu_setup = __setup_cpu_604, 726 .machine_check = machine_check_generic, 727 .platform = "ppc604", 728 }, 729 { /* 740/750 (0x4202, don't support TAU ?) */ 730 .pvr_mask = 0xffffffff, 731 .pvr_value = 0x00084202, 732 .cpu_name = "740/750", 733 .cpu_features = CPU_FTRS_740_NOTAU, 734 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 735 .mmu_features = MMU_FTR_HPTE_TABLE, 736 .icache_bsize = 32, 737 .dcache_bsize = 32, 738 .num_pmcs = 4, 739 .cpu_setup = __setup_cpu_750, 740 .machine_check = machine_check_generic, 741 .platform = "ppc750", 742 }, 743 { /* 750CX (80100 and 8010x?) */ 744 .pvr_mask = 0xfffffff0, 745 .pvr_value = 0x00080100, 746 .cpu_name = "750CX", 747 .cpu_features = CPU_FTRS_750, 748 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 749 .mmu_features = MMU_FTR_HPTE_TABLE, 750 .icache_bsize = 32, 751 .dcache_bsize = 32, 752 .num_pmcs = 4, 753 .cpu_setup = __setup_cpu_750cx, 754 .machine_check = machine_check_generic, 755 .platform = "ppc750", 756 }, 757 { /* 750CX (82201 and 82202) */ 758 .pvr_mask = 0xfffffff0, 759 .pvr_value = 0x00082200, 760 .cpu_name = "750CX", 761 .cpu_features = CPU_FTRS_750, 762 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 763 .mmu_features = MMU_FTR_HPTE_TABLE, 764 .icache_bsize = 32, 765 .dcache_bsize = 32, 766 .num_pmcs = 4, 767 .pmc_type = PPC_PMC_IBM, 768 .cpu_setup = __setup_cpu_750cx, 769 .machine_check = machine_check_generic, 770 .platform = "ppc750", 771 }, 772 { /* 750CXe (82214) */ 773 .pvr_mask = 0xfffffff0, 774 .pvr_value = 0x00082210, 775 .cpu_name = "750CXe", 776 .cpu_features = CPU_FTRS_750, 777 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 778 .mmu_features = MMU_FTR_HPTE_TABLE, 779 .icache_bsize = 32, 780 .dcache_bsize = 32, 781 .num_pmcs = 4, 782 .pmc_type = PPC_PMC_IBM, 783 .cpu_setup = __setup_cpu_750cx, 784 .machine_check = machine_check_generic, 785 .platform = "ppc750", 786 }, 787 { /* 750CXe "Gekko" (83214) */ 788 .pvr_mask = 0xffffffff, 789 .pvr_value = 0x00083214, 790 .cpu_name = "750CXe", 791 .cpu_features = CPU_FTRS_750, 792 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 793 .mmu_features = MMU_FTR_HPTE_TABLE, 794 .icache_bsize = 32, 795 .dcache_bsize = 32, 796 .num_pmcs = 4, 797 .pmc_type = PPC_PMC_IBM, 798 .cpu_setup = __setup_cpu_750cx, 799 .machine_check = machine_check_generic, 800 .platform = "ppc750", 801 }, 802 { /* 750CL (and "Broadway") */ 803 .pvr_mask = 0xfffff0e0, 804 .pvr_value = 0x00087000, 805 .cpu_name = "750CL", 806 .cpu_features = CPU_FTRS_750CL, 807 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 808 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 809 .icache_bsize = 32, 810 .dcache_bsize = 32, 811 .num_pmcs = 4, 812 .pmc_type = PPC_PMC_IBM, 813 .cpu_setup = __setup_cpu_750, 814 .machine_check = machine_check_generic, 815 .platform = "ppc750", 816 .oprofile_cpu_type = "ppc/750", 817 .oprofile_type = PPC_OPROFILE_G4, 818 }, 819 { /* 745/755 */ 820 .pvr_mask = 0xfffff000, 821 .pvr_value = 0x00083000, 822 .cpu_name = "745/755", 823 .cpu_features = CPU_FTRS_750, 824 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 825 .mmu_features = MMU_FTR_HPTE_TABLE, 826 .icache_bsize = 32, 827 .dcache_bsize = 32, 828 .num_pmcs = 4, 829 .pmc_type = PPC_PMC_IBM, 830 .cpu_setup = __setup_cpu_750, 831 .machine_check = machine_check_generic, 832 .platform = "ppc750", 833 }, 834 { /* 750FX rev 1.x */ 835 .pvr_mask = 0xffffff00, 836 .pvr_value = 0x70000100, 837 .cpu_name = "750FX", 838 .cpu_features = CPU_FTRS_750FX1, 839 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 840 .mmu_features = MMU_FTR_HPTE_TABLE, 841 .icache_bsize = 32, 842 .dcache_bsize = 32, 843 .num_pmcs = 4, 844 .pmc_type = PPC_PMC_IBM, 845 .cpu_setup = __setup_cpu_750, 846 .machine_check = machine_check_generic, 847 .platform = "ppc750", 848 .oprofile_cpu_type = "ppc/750", 849 .oprofile_type = PPC_OPROFILE_G4, 850 }, 851 { /* 750FX rev 2.0 must disable HID0[DPM] */ 852 .pvr_mask = 0xffffffff, 853 .pvr_value = 0x70000200, 854 .cpu_name = "750FX", 855 .cpu_features = CPU_FTRS_750FX2, 856 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 857 .mmu_features = MMU_FTR_HPTE_TABLE, 858 .icache_bsize = 32, 859 .dcache_bsize = 32, 860 .num_pmcs = 4, 861 .pmc_type = PPC_PMC_IBM, 862 .cpu_setup = __setup_cpu_750, 863 .machine_check = machine_check_generic, 864 .platform = "ppc750", 865 .oprofile_cpu_type = "ppc/750", 866 .oprofile_type = PPC_OPROFILE_G4, 867 }, 868 { /* 750FX (All revs except 2.0) */ 869 .pvr_mask = 0xffff0000, 870 .pvr_value = 0x70000000, 871 .cpu_name = "750FX", 872 .cpu_features = CPU_FTRS_750FX, 873 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 874 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 875 .icache_bsize = 32, 876 .dcache_bsize = 32, 877 .num_pmcs = 4, 878 .pmc_type = PPC_PMC_IBM, 879 .cpu_setup = __setup_cpu_750fx, 880 .machine_check = machine_check_generic, 881 .platform = "ppc750", 882 .oprofile_cpu_type = "ppc/750", 883 .oprofile_type = PPC_OPROFILE_G4, 884 }, 885 { /* 750GX */ 886 .pvr_mask = 0xffff0000, 887 .pvr_value = 0x70020000, 888 .cpu_name = "750GX", 889 .cpu_features = CPU_FTRS_750GX, 890 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 891 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 892 .icache_bsize = 32, 893 .dcache_bsize = 32, 894 .num_pmcs = 4, 895 .pmc_type = PPC_PMC_IBM, 896 .cpu_setup = __setup_cpu_750fx, 897 .machine_check = machine_check_generic, 898 .platform = "ppc750", 899 .oprofile_cpu_type = "ppc/750", 900 .oprofile_type = PPC_OPROFILE_G4, 901 }, 902 { /* 740/750 (L2CR bit need fixup for 740) */ 903 .pvr_mask = 0xffff0000, 904 .pvr_value = 0x00080000, 905 .cpu_name = "740/750", 906 .cpu_features = CPU_FTRS_740, 907 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 908 .mmu_features = MMU_FTR_HPTE_TABLE, 909 .icache_bsize = 32, 910 .dcache_bsize = 32, 911 .num_pmcs = 4, 912 .pmc_type = PPC_PMC_IBM, 913 .cpu_setup = __setup_cpu_750, 914 .machine_check = machine_check_generic, 915 .platform = "ppc750", 916 }, 917 { /* 7400 rev 1.1 ? (no TAU) */ 918 .pvr_mask = 0xffffffff, 919 .pvr_value = 0x000c1101, 920 .cpu_name = "7400 (1.1)", 921 .cpu_features = CPU_FTRS_7400_NOTAU, 922 .cpu_user_features = COMMON_USER | 923 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 924 .mmu_features = MMU_FTR_HPTE_TABLE, 925 .icache_bsize = 32, 926 .dcache_bsize = 32, 927 .num_pmcs = 4, 928 .pmc_type = PPC_PMC_G4, 929 .cpu_setup = __setup_cpu_7400, 930 .machine_check = machine_check_generic, 931 .platform = "ppc7400", 932 }, 933 { /* 7400 */ 934 .pvr_mask = 0xffff0000, 935 .pvr_value = 0x000c0000, 936 .cpu_name = "7400", 937 .cpu_features = CPU_FTRS_7400, 938 .cpu_user_features = COMMON_USER | 939 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 940 .mmu_features = MMU_FTR_HPTE_TABLE, 941 .icache_bsize = 32, 942 .dcache_bsize = 32, 943 .num_pmcs = 4, 944 .pmc_type = PPC_PMC_G4, 945 .cpu_setup = __setup_cpu_7400, 946 .machine_check = machine_check_generic, 947 .platform = "ppc7400", 948 }, 949 { /* 7410 */ 950 .pvr_mask = 0xffff0000, 951 .pvr_value = 0x800c0000, 952 .cpu_name = "7410", 953 .cpu_features = CPU_FTRS_7400, 954 .cpu_user_features = COMMON_USER | 955 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 956 .mmu_features = MMU_FTR_HPTE_TABLE, 957 .icache_bsize = 32, 958 .dcache_bsize = 32, 959 .num_pmcs = 4, 960 .pmc_type = PPC_PMC_G4, 961 .cpu_setup = __setup_cpu_7410, 962 .machine_check = machine_check_generic, 963 .platform = "ppc7400", 964 }, 965 { /* 7450 2.0 - no doze/nap */ 966 .pvr_mask = 0xffffffff, 967 .pvr_value = 0x80000200, 968 .cpu_name = "7450", 969 .cpu_features = CPU_FTRS_7450_20, 970 .cpu_user_features = COMMON_USER | 971 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 972 .mmu_features = MMU_FTR_HPTE_TABLE, 973 .icache_bsize = 32, 974 .dcache_bsize = 32, 975 .num_pmcs = 6, 976 .pmc_type = PPC_PMC_G4, 977 .cpu_setup = __setup_cpu_745x, 978 .oprofile_cpu_type = "ppc/7450", 979 .oprofile_type = PPC_OPROFILE_G4, 980 .machine_check = machine_check_generic, 981 .platform = "ppc7450", 982 }, 983 { /* 7450 2.1 */ 984 .pvr_mask = 0xffffffff, 985 .pvr_value = 0x80000201, 986 .cpu_name = "7450", 987 .cpu_features = CPU_FTRS_7450_21, 988 .cpu_user_features = COMMON_USER | 989 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 990 .mmu_features = MMU_FTR_HPTE_TABLE, 991 .icache_bsize = 32, 992 .dcache_bsize = 32, 993 .num_pmcs = 6, 994 .pmc_type = PPC_PMC_G4, 995 .cpu_setup = __setup_cpu_745x, 996 .oprofile_cpu_type = "ppc/7450", 997 .oprofile_type = PPC_OPROFILE_G4, 998 .machine_check = machine_check_generic, 999 .platform = "ppc7450", 1000 }, 1001 { /* 7450 2.3 and newer */ 1002 .pvr_mask = 0xffff0000, 1003 .pvr_value = 0x80000000, 1004 .cpu_name = "7450", 1005 .cpu_features = CPU_FTRS_7450_23, 1006 .cpu_user_features = COMMON_USER | 1007 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1008 .mmu_features = MMU_FTR_HPTE_TABLE, 1009 .icache_bsize = 32, 1010 .dcache_bsize = 32, 1011 .num_pmcs = 6, 1012 .pmc_type = PPC_PMC_G4, 1013 .cpu_setup = __setup_cpu_745x, 1014 .oprofile_cpu_type = "ppc/7450", 1015 .oprofile_type = PPC_OPROFILE_G4, 1016 .machine_check = machine_check_generic, 1017 .platform = "ppc7450", 1018 }, 1019 { /* 7455 rev 1.x */ 1020 .pvr_mask = 0xffffff00, 1021 .pvr_value = 0x80010100, 1022 .cpu_name = "7455", 1023 .cpu_features = CPU_FTRS_7455_1, 1024 .cpu_user_features = COMMON_USER | 1025 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1026 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1027 .icache_bsize = 32, 1028 .dcache_bsize = 32, 1029 .num_pmcs = 6, 1030 .pmc_type = PPC_PMC_G4, 1031 .cpu_setup = __setup_cpu_745x, 1032 .oprofile_cpu_type = "ppc/7450", 1033 .oprofile_type = PPC_OPROFILE_G4, 1034 .machine_check = machine_check_generic, 1035 .platform = "ppc7450", 1036 }, 1037 { /* 7455 rev 2.0 */ 1038 .pvr_mask = 0xffffffff, 1039 .pvr_value = 0x80010200, 1040 .cpu_name = "7455", 1041 .cpu_features = CPU_FTRS_7455_20, 1042 .cpu_user_features = COMMON_USER | 1043 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1044 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1045 .icache_bsize = 32, 1046 .dcache_bsize = 32, 1047 .num_pmcs = 6, 1048 .pmc_type = PPC_PMC_G4, 1049 .cpu_setup = __setup_cpu_745x, 1050 .oprofile_cpu_type = "ppc/7450", 1051 .oprofile_type = PPC_OPROFILE_G4, 1052 .machine_check = machine_check_generic, 1053 .platform = "ppc7450", 1054 }, 1055 { /* 7455 others */ 1056 .pvr_mask = 0xffff0000, 1057 .pvr_value = 0x80010000, 1058 .cpu_name = "7455", 1059 .cpu_features = CPU_FTRS_7455, 1060 .cpu_user_features = COMMON_USER | 1061 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1062 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1063 .icache_bsize = 32, 1064 .dcache_bsize = 32, 1065 .num_pmcs = 6, 1066 .pmc_type = PPC_PMC_G4, 1067 .cpu_setup = __setup_cpu_745x, 1068 .oprofile_cpu_type = "ppc/7450", 1069 .oprofile_type = PPC_OPROFILE_G4, 1070 .machine_check = machine_check_generic, 1071 .platform = "ppc7450", 1072 }, 1073 { /* 7447/7457 Rev 1.0 */ 1074 .pvr_mask = 0xffffffff, 1075 .pvr_value = 0x80020100, 1076 .cpu_name = "7447/7457", 1077 .cpu_features = CPU_FTRS_7447_10, 1078 .cpu_user_features = COMMON_USER | 1079 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1080 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1081 .icache_bsize = 32, 1082 .dcache_bsize = 32, 1083 .num_pmcs = 6, 1084 .pmc_type = PPC_PMC_G4, 1085 .cpu_setup = __setup_cpu_745x, 1086 .oprofile_cpu_type = "ppc/7450", 1087 .oprofile_type = PPC_OPROFILE_G4, 1088 .machine_check = machine_check_generic, 1089 .platform = "ppc7450", 1090 }, 1091 { /* 7447/7457 Rev 1.1 */ 1092 .pvr_mask = 0xffffffff, 1093 .pvr_value = 0x80020101, 1094 .cpu_name = "7447/7457", 1095 .cpu_features = CPU_FTRS_7447_10, 1096 .cpu_user_features = COMMON_USER | 1097 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1098 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1099 .icache_bsize = 32, 1100 .dcache_bsize = 32, 1101 .num_pmcs = 6, 1102 .pmc_type = PPC_PMC_G4, 1103 .cpu_setup = __setup_cpu_745x, 1104 .oprofile_cpu_type = "ppc/7450", 1105 .oprofile_type = PPC_OPROFILE_G4, 1106 .machine_check = machine_check_generic, 1107 .platform = "ppc7450", 1108 }, 1109 { /* 7447/7457 Rev 1.2 and later */ 1110 .pvr_mask = 0xffff0000, 1111 .pvr_value = 0x80020000, 1112 .cpu_name = "7447/7457", 1113 .cpu_features = CPU_FTRS_7447, 1114 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1115 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1116 .icache_bsize = 32, 1117 .dcache_bsize = 32, 1118 .num_pmcs = 6, 1119 .pmc_type = PPC_PMC_G4, 1120 .cpu_setup = __setup_cpu_745x, 1121 .oprofile_cpu_type = "ppc/7450", 1122 .oprofile_type = PPC_OPROFILE_G4, 1123 .machine_check = machine_check_generic, 1124 .platform = "ppc7450", 1125 }, 1126 { /* 7447A */ 1127 .pvr_mask = 0xffff0000, 1128 .pvr_value = 0x80030000, 1129 .cpu_name = "7447A", 1130 .cpu_features = CPU_FTRS_7447A, 1131 .cpu_user_features = COMMON_USER | 1132 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1133 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1134 .icache_bsize = 32, 1135 .dcache_bsize = 32, 1136 .num_pmcs = 6, 1137 .pmc_type = PPC_PMC_G4, 1138 .cpu_setup = __setup_cpu_745x, 1139 .oprofile_cpu_type = "ppc/7450", 1140 .oprofile_type = PPC_OPROFILE_G4, 1141 .machine_check = machine_check_generic, 1142 .platform = "ppc7450", 1143 }, 1144 { /* 7448 */ 1145 .pvr_mask = 0xffff0000, 1146 .pvr_value = 0x80040000, 1147 .cpu_name = "7448", 1148 .cpu_features = CPU_FTRS_7448, 1149 .cpu_user_features = COMMON_USER | 1150 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1151 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1152 .icache_bsize = 32, 1153 .dcache_bsize = 32, 1154 .num_pmcs = 6, 1155 .pmc_type = PPC_PMC_G4, 1156 .cpu_setup = __setup_cpu_745x, 1157 .oprofile_cpu_type = "ppc/7450", 1158 .oprofile_type = PPC_OPROFILE_G4, 1159 .machine_check = machine_check_generic, 1160 .platform = "ppc7450", 1161 }, 1162 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1163 .pvr_mask = 0x7fff0000, 1164 .pvr_value = 0x00810000, 1165 .cpu_name = "82xx", 1166 .cpu_features = CPU_FTRS_82XX, 1167 .cpu_user_features = COMMON_USER, 1168 .mmu_features = 0, 1169 .icache_bsize = 32, 1170 .dcache_bsize = 32, 1171 .cpu_setup = __setup_cpu_603, 1172 .machine_check = machine_check_generic, 1173 .platform = "ppc603", 1174 }, 1175 { /* All G2_LE (603e core, plus some) have the same pvr */ 1176 .pvr_mask = 0x7fff0000, 1177 .pvr_value = 0x00820000, 1178 .cpu_name = "G2_LE", 1179 .cpu_features = CPU_FTRS_G2_LE, 1180 .cpu_user_features = COMMON_USER, 1181 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1182 .icache_bsize = 32, 1183 .dcache_bsize = 32, 1184 .cpu_setup = __setup_cpu_603, 1185 .machine_check = machine_check_generic, 1186 .platform = "ppc603", 1187 }, 1188 { /* e300c1 (a 603e core, plus some) on 83xx */ 1189 .pvr_mask = 0x7fff0000, 1190 .pvr_value = 0x00830000, 1191 .cpu_name = "e300c1", 1192 .cpu_features = CPU_FTRS_E300, 1193 .cpu_user_features = COMMON_USER, 1194 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1195 .icache_bsize = 32, 1196 .dcache_bsize = 32, 1197 .cpu_setup = __setup_cpu_603, 1198 .machine_check = machine_check_generic, 1199 .platform = "ppc603", 1200 }, 1201 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1202 .pvr_mask = 0x7fff0000, 1203 .pvr_value = 0x00840000, 1204 .cpu_name = "e300c2", 1205 .cpu_features = CPU_FTRS_E300C2, 1206 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1207 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1208 MMU_FTR_NEED_DTLB_SW_LRU, 1209 .icache_bsize = 32, 1210 .dcache_bsize = 32, 1211 .cpu_setup = __setup_cpu_603, 1212 .machine_check = machine_check_generic, 1213 .platform = "ppc603", 1214 }, 1215 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1216 .pvr_mask = 0x7fff0000, 1217 .pvr_value = 0x00850000, 1218 .cpu_name = "e300c3", 1219 .cpu_features = CPU_FTRS_E300, 1220 .cpu_user_features = COMMON_USER, 1221 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1222 MMU_FTR_NEED_DTLB_SW_LRU, 1223 .icache_bsize = 32, 1224 .dcache_bsize = 32, 1225 .cpu_setup = __setup_cpu_603, 1226 .num_pmcs = 4, 1227 .oprofile_cpu_type = "ppc/e300", 1228 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1229 .platform = "ppc603", 1230 }, 1231 { /* e300c4 (e300c1, plus one IU) */ 1232 .pvr_mask = 0x7fff0000, 1233 .pvr_value = 0x00860000, 1234 .cpu_name = "e300c4", 1235 .cpu_features = CPU_FTRS_E300, 1236 .cpu_user_features = COMMON_USER, 1237 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1238 MMU_FTR_NEED_DTLB_SW_LRU, 1239 .icache_bsize = 32, 1240 .dcache_bsize = 32, 1241 .cpu_setup = __setup_cpu_603, 1242 .machine_check = machine_check_generic, 1243 .num_pmcs = 4, 1244 .oprofile_cpu_type = "ppc/e300", 1245 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1246 .platform = "ppc603", 1247 }, 1248 { /* default match, we assume split I/D cache & TB (non-601)... */ 1249 .pvr_mask = 0x00000000, 1250 .pvr_value = 0x00000000, 1251 .cpu_name = "(generic PPC)", 1252 .cpu_features = CPU_FTRS_CLASSIC32, 1253 .cpu_user_features = COMMON_USER, 1254 .mmu_features = MMU_FTR_HPTE_TABLE, 1255 .icache_bsize = 32, 1256 .dcache_bsize = 32, 1257 .machine_check = machine_check_generic, 1258 .platform = "ppc603", 1259 }, 1260 #endif /* CLASSIC_PPC */ 1261 #ifdef CONFIG_8xx 1262 { /* 8xx */ 1263 .pvr_mask = 0xffff0000, 1264 .pvr_value = 0x00500000, 1265 .cpu_name = "8xx", 1266 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1267 * if the 8xx code is there.... */ 1268 .cpu_features = CPU_FTRS_8XX, 1269 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1270 .mmu_features = MMU_FTR_TYPE_8xx, 1271 .icache_bsize = 16, 1272 .dcache_bsize = 16, 1273 .platform = "ppc823", 1274 }, 1275 #endif /* CONFIG_8xx */ 1276 #ifdef CONFIG_40x 1277 { /* 403GC */ 1278 .pvr_mask = 0xffffff00, 1279 .pvr_value = 0x00200200, 1280 .cpu_name = "403GC", 1281 .cpu_features = CPU_FTRS_40X, 1282 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1283 .mmu_features = MMU_FTR_TYPE_40x, 1284 .icache_bsize = 16, 1285 .dcache_bsize = 16, 1286 .machine_check = machine_check_4xx, 1287 .platform = "ppc403", 1288 }, 1289 { /* 403GCX */ 1290 .pvr_mask = 0xffffff00, 1291 .pvr_value = 0x00201400, 1292 .cpu_name = "403GCX", 1293 .cpu_features = CPU_FTRS_40X, 1294 .cpu_user_features = PPC_FEATURE_32 | 1295 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1296 .mmu_features = MMU_FTR_TYPE_40x, 1297 .icache_bsize = 16, 1298 .dcache_bsize = 16, 1299 .machine_check = machine_check_4xx, 1300 .platform = "ppc403", 1301 }, 1302 { /* 403G ?? */ 1303 .pvr_mask = 0xffff0000, 1304 .pvr_value = 0x00200000, 1305 .cpu_name = "403G ??", 1306 .cpu_features = CPU_FTRS_40X, 1307 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1308 .mmu_features = MMU_FTR_TYPE_40x, 1309 .icache_bsize = 16, 1310 .dcache_bsize = 16, 1311 .machine_check = machine_check_4xx, 1312 .platform = "ppc403", 1313 }, 1314 { /* 405GP */ 1315 .pvr_mask = 0xffff0000, 1316 .pvr_value = 0x40110000, 1317 .cpu_name = "405GP", 1318 .cpu_features = CPU_FTRS_40X, 1319 .cpu_user_features = PPC_FEATURE_32 | 1320 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1321 .mmu_features = MMU_FTR_TYPE_40x, 1322 .icache_bsize = 32, 1323 .dcache_bsize = 32, 1324 .machine_check = machine_check_4xx, 1325 .platform = "ppc405", 1326 }, 1327 { /* STB 03xxx */ 1328 .pvr_mask = 0xffff0000, 1329 .pvr_value = 0x40130000, 1330 .cpu_name = "STB03xxx", 1331 .cpu_features = CPU_FTRS_40X, 1332 .cpu_user_features = PPC_FEATURE_32 | 1333 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1334 .mmu_features = MMU_FTR_TYPE_40x, 1335 .icache_bsize = 32, 1336 .dcache_bsize = 32, 1337 .machine_check = machine_check_4xx, 1338 .platform = "ppc405", 1339 }, 1340 { /* STB 04xxx */ 1341 .pvr_mask = 0xffff0000, 1342 .pvr_value = 0x41810000, 1343 .cpu_name = "STB04xxx", 1344 .cpu_features = CPU_FTRS_40X, 1345 .cpu_user_features = PPC_FEATURE_32 | 1346 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1347 .mmu_features = MMU_FTR_TYPE_40x, 1348 .icache_bsize = 32, 1349 .dcache_bsize = 32, 1350 .machine_check = machine_check_4xx, 1351 .platform = "ppc405", 1352 }, 1353 { /* NP405L */ 1354 .pvr_mask = 0xffff0000, 1355 .pvr_value = 0x41610000, 1356 .cpu_name = "NP405L", 1357 .cpu_features = CPU_FTRS_40X, 1358 .cpu_user_features = PPC_FEATURE_32 | 1359 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1360 .mmu_features = MMU_FTR_TYPE_40x, 1361 .icache_bsize = 32, 1362 .dcache_bsize = 32, 1363 .machine_check = machine_check_4xx, 1364 .platform = "ppc405", 1365 }, 1366 { /* NP4GS3 */ 1367 .pvr_mask = 0xffff0000, 1368 .pvr_value = 0x40B10000, 1369 .cpu_name = "NP4GS3", 1370 .cpu_features = CPU_FTRS_40X, 1371 .cpu_user_features = PPC_FEATURE_32 | 1372 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1373 .mmu_features = MMU_FTR_TYPE_40x, 1374 .icache_bsize = 32, 1375 .dcache_bsize = 32, 1376 .machine_check = machine_check_4xx, 1377 .platform = "ppc405", 1378 }, 1379 { /* NP405H */ 1380 .pvr_mask = 0xffff0000, 1381 .pvr_value = 0x41410000, 1382 .cpu_name = "NP405H", 1383 .cpu_features = CPU_FTRS_40X, 1384 .cpu_user_features = PPC_FEATURE_32 | 1385 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1386 .mmu_features = MMU_FTR_TYPE_40x, 1387 .icache_bsize = 32, 1388 .dcache_bsize = 32, 1389 .machine_check = machine_check_4xx, 1390 .platform = "ppc405", 1391 }, 1392 { /* 405GPr */ 1393 .pvr_mask = 0xffff0000, 1394 .pvr_value = 0x50910000, 1395 .cpu_name = "405GPr", 1396 .cpu_features = CPU_FTRS_40X, 1397 .cpu_user_features = PPC_FEATURE_32 | 1398 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1399 .mmu_features = MMU_FTR_TYPE_40x, 1400 .icache_bsize = 32, 1401 .dcache_bsize = 32, 1402 .machine_check = machine_check_4xx, 1403 .platform = "ppc405", 1404 }, 1405 { /* STBx25xx */ 1406 .pvr_mask = 0xffff0000, 1407 .pvr_value = 0x51510000, 1408 .cpu_name = "STBx25xx", 1409 .cpu_features = CPU_FTRS_40X, 1410 .cpu_user_features = PPC_FEATURE_32 | 1411 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1412 .mmu_features = MMU_FTR_TYPE_40x, 1413 .icache_bsize = 32, 1414 .dcache_bsize = 32, 1415 .machine_check = machine_check_4xx, 1416 .platform = "ppc405", 1417 }, 1418 { /* 405LP */ 1419 .pvr_mask = 0xffff0000, 1420 .pvr_value = 0x41F10000, 1421 .cpu_name = "405LP", 1422 .cpu_features = CPU_FTRS_40X, 1423 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1424 .mmu_features = MMU_FTR_TYPE_40x, 1425 .icache_bsize = 32, 1426 .dcache_bsize = 32, 1427 .machine_check = machine_check_4xx, 1428 .platform = "ppc405", 1429 }, 1430 { /* Xilinx Virtex-II Pro */ 1431 .pvr_mask = 0xfffff000, 1432 .pvr_value = 0x20010000, 1433 .cpu_name = "Virtex-II Pro", 1434 .cpu_features = CPU_FTRS_40X, 1435 .cpu_user_features = PPC_FEATURE_32 | 1436 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1437 .mmu_features = MMU_FTR_TYPE_40x, 1438 .icache_bsize = 32, 1439 .dcache_bsize = 32, 1440 .machine_check = machine_check_4xx, 1441 .platform = "ppc405", 1442 }, 1443 { /* Xilinx Virtex-4 FX */ 1444 .pvr_mask = 0xfffff000, 1445 .pvr_value = 0x20011000, 1446 .cpu_name = "Virtex-4 FX", 1447 .cpu_features = CPU_FTRS_40X, 1448 .cpu_user_features = PPC_FEATURE_32 | 1449 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1450 .mmu_features = MMU_FTR_TYPE_40x, 1451 .icache_bsize = 32, 1452 .dcache_bsize = 32, 1453 .machine_check = machine_check_4xx, 1454 .platform = "ppc405", 1455 }, 1456 { /* 405EP */ 1457 .pvr_mask = 0xffff0000, 1458 .pvr_value = 0x51210000, 1459 .cpu_name = "405EP", 1460 .cpu_features = CPU_FTRS_40X, 1461 .cpu_user_features = PPC_FEATURE_32 | 1462 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1463 .mmu_features = MMU_FTR_TYPE_40x, 1464 .icache_bsize = 32, 1465 .dcache_bsize = 32, 1466 .machine_check = machine_check_4xx, 1467 .platform = "ppc405", 1468 }, 1469 { /* 405EX Rev. A/B with Security */ 1470 .pvr_mask = 0xffff000f, 1471 .pvr_value = 0x12910007, 1472 .cpu_name = "405EX Rev. A/B", 1473 .cpu_features = CPU_FTRS_40X, 1474 .cpu_user_features = PPC_FEATURE_32 | 1475 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1476 .mmu_features = MMU_FTR_TYPE_40x, 1477 .icache_bsize = 32, 1478 .dcache_bsize = 32, 1479 .machine_check = machine_check_4xx, 1480 .platform = "ppc405", 1481 }, 1482 { /* 405EX Rev. C without Security */ 1483 .pvr_mask = 0xffff000f, 1484 .pvr_value = 0x1291000d, 1485 .cpu_name = "405EX Rev. C", 1486 .cpu_features = CPU_FTRS_40X, 1487 .cpu_user_features = PPC_FEATURE_32 | 1488 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1489 .mmu_features = MMU_FTR_TYPE_40x, 1490 .icache_bsize = 32, 1491 .dcache_bsize = 32, 1492 .machine_check = machine_check_4xx, 1493 .platform = "ppc405", 1494 }, 1495 { /* 405EX Rev. C with Security */ 1496 .pvr_mask = 0xffff000f, 1497 .pvr_value = 0x1291000f, 1498 .cpu_name = "405EX Rev. C", 1499 .cpu_features = CPU_FTRS_40X, 1500 .cpu_user_features = PPC_FEATURE_32 | 1501 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1502 .mmu_features = MMU_FTR_TYPE_40x, 1503 .icache_bsize = 32, 1504 .dcache_bsize = 32, 1505 .machine_check = machine_check_4xx, 1506 .platform = "ppc405", 1507 }, 1508 { /* 405EX Rev. D without Security */ 1509 .pvr_mask = 0xffff000f, 1510 .pvr_value = 0x12910003, 1511 .cpu_name = "405EX Rev. D", 1512 .cpu_features = CPU_FTRS_40X, 1513 .cpu_user_features = PPC_FEATURE_32 | 1514 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1515 .mmu_features = MMU_FTR_TYPE_40x, 1516 .icache_bsize = 32, 1517 .dcache_bsize = 32, 1518 .machine_check = machine_check_4xx, 1519 .platform = "ppc405", 1520 }, 1521 { /* 405EX Rev. D with Security */ 1522 .pvr_mask = 0xffff000f, 1523 .pvr_value = 0x12910005, 1524 .cpu_name = "405EX Rev. D", 1525 .cpu_features = CPU_FTRS_40X, 1526 .cpu_user_features = PPC_FEATURE_32 | 1527 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1528 .mmu_features = MMU_FTR_TYPE_40x, 1529 .icache_bsize = 32, 1530 .dcache_bsize = 32, 1531 .machine_check = machine_check_4xx, 1532 .platform = "ppc405", 1533 }, 1534 { /* 405EXr Rev. A/B without Security */ 1535 .pvr_mask = 0xffff000f, 1536 .pvr_value = 0x12910001, 1537 .cpu_name = "405EXr Rev. A/B", 1538 .cpu_features = CPU_FTRS_40X, 1539 .cpu_user_features = PPC_FEATURE_32 | 1540 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1541 .mmu_features = MMU_FTR_TYPE_40x, 1542 .icache_bsize = 32, 1543 .dcache_bsize = 32, 1544 .machine_check = machine_check_4xx, 1545 .platform = "ppc405", 1546 }, 1547 { /* 405EXr Rev. C without Security */ 1548 .pvr_mask = 0xffff000f, 1549 .pvr_value = 0x12910009, 1550 .cpu_name = "405EXr Rev. C", 1551 .cpu_features = CPU_FTRS_40X, 1552 .cpu_user_features = PPC_FEATURE_32 | 1553 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1554 .mmu_features = MMU_FTR_TYPE_40x, 1555 .icache_bsize = 32, 1556 .dcache_bsize = 32, 1557 .machine_check = machine_check_4xx, 1558 .platform = "ppc405", 1559 }, 1560 { /* 405EXr Rev. C with Security */ 1561 .pvr_mask = 0xffff000f, 1562 .pvr_value = 0x1291000b, 1563 .cpu_name = "405EXr Rev. C", 1564 .cpu_features = CPU_FTRS_40X, 1565 .cpu_user_features = PPC_FEATURE_32 | 1566 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1567 .mmu_features = MMU_FTR_TYPE_40x, 1568 .icache_bsize = 32, 1569 .dcache_bsize = 32, 1570 .machine_check = machine_check_4xx, 1571 .platform = "ppc405", 1572 }, 1573 { /* 405EXr Rev. D without Security */ 1574 .pvr_mask = 0xffff000f, 1575 .pvr_value = 0x12910000, 1576 .cpu_name = "405EXr Rev. D", 1577 .cpu_features = CPU_FTRS_40X, 1578 .cpu_user_features = PPC_FEATURE_32 | 1579 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1580 .mmu_features = MMU_FTR_TYPE_40x, 1581 .icache_bsize = 32, 1582 .dcache_bsize = 32, 1583 .machine_check = machine_check_4xx, 1584 .platform = "ppc405", 1585 }, 1586 { /* 405EXr Rev. D with Security */ 1587 .pvr_mask = 0xffff000f, 1588 .pvr_value = 0x12910002, 1589 .cpu_name = "405EXr Rev. D", 1590 .cpu_features = CPU_FTRS_40X, 1591 .cpu_user_features = PPC_FEATURE_32 | 1592 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1593 .mmu_features = MMU_FTR_TYPE_40x, 1594 .icache_bsize = 32, 1595 .dcache_bsize = 32, 1596 .machine_check = machine_check_4xx, 1597 .platform = "ppc405", 1598 }, 1599 { 1600 /* 405EZ */ 1601 .pvr_mask = 0xffff0000, 1602 .pvr_value = 0x41510000, 1603 .cpu_name = "405EZ", 1604 .cpu_features = CPU_FTRS_40X, 1605 .cpu_user_features = PPC_FEATURE_32 | 1606 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1607 .mmu_features = MMU_FTR_TYPE_40x, 1608 .icache_bsize = 32, 1609 .dcache_bsize = 32, 1610 .machine_check = machine_check_4xx, 1611 .platform = "ppc405", 1612 }, 1613 { /* APM8018X */ 1614 .pvr_mask = 0xffff0000, 1615 .pvr_value = 0x7ff11432, 1616 .cpu_name = "APM8018X", 1617 .cpu_features = CPU_FTRS_40X, 1618 .cpu_user_features = PPC_FEATURE_32 | 1619 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1620 .mmu_features = MMU_FTR_TYPE_40x, 1621 .icache_bsize = 32, 1622 .dcache_bsize = 32, 1623 .machine_check = machine_check_4xx, 1624 .platform = "ppc405", 1625 }, 1626 { /* default match */ 1627 .pvr_mask = 0x00000000, 1628 .pvr_value = 0x00000000, 1629 .cpu_name = "(generic 40x PPC)", 1630 .cpu_features = CPU_FTRS_40X, 1631 .cpu_user_features = PPC_FEATURE_32 | 1632 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1633 .mmu_features = MMU_FTR_TYPE_40x, 1634 .icache_bsize = 32, 1635 .dcache_bsize = 32, 1636 .machine_check = machine_check_4xx, 1637 .platform = "ppc405", 1638 } 1639 1640 #endif /* CONFIG_40x */ 1641 #ifdef CONFIG_44x 1642 { 1643 .pvr_mask = 0xf0000fff, 1644 .pvr_value = 0x40000850, 1645 .cpu_name = "440GR Rev. A", 1646 .cpu_features = CPU_FTRS_44X, 1647 .cpu_user_features = COMMON_USER_BOOKE, 1648 .mmu_features = MMU_FTR_TYPE_44x, 1649 .icache_bsize = 32, 1650 .dcache_bsize = 32, 1651 .machine_check = machine_check_4xx, 1652 .platform = "ppc440", 1653 }, 1654 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1655 .pvr_mask = 0xf0000fff, 1656 .pvr_value = 0x40000858, 1657 .cpu_name = "440EP Rev. A", 1658 .cpu_features = CPU_FTRS_44X, 1659 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1660 .mmu_features = MMU_FTR_TYPE_44x, 1661 .icache_bsize = 32, 1662 .dcache_bsize = 32, 1663 .cpu_setup = __setup_cpu_440ep, 1664 .machine_check = machine_check_4xx, 1665 .platform = "ppc440", 1666 }, 1667 { 1668 .pvr_mask = 0xf0000fff, 1669 .pvr_value = 0x400008d3, 1670 .cpu_name = "440GR Rev. B", 1671 .cpu_features = CPU_FTRS_44X, 1672 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1673 .mmu_features = MMU_FTR_TYPE_44x, 1674 .icache_bsize = 32, 1675 .dcache_bsize = 32, 1676 .machine_check = machine_check_4xx, 1677 .platform = "ppc440", 1678 }, 1679 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1680 .pvr_mask = 0xf0000ff7, 1681 .pvr_value = 0x400008d4, 1682 .cpu_name = "440EP Rev. C", 1683 .cpu_features = CPU_FTRS_44X, 1684 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1685 .mmu_features = MMU_FTR_TYPE_44x, 1686 .icache_bsize = 32, 1687 .dcache_bsize = 32, 1688 .cpu_setup = __setup_cpu_440ep, 1689 .machine_check = machine_check_4xx, 1690 .platform = "ppc440", 1691 }, 1692 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1693 .pvr_mask = 0xf0000fff, 1694 .pvr_value = 0x400008db, 1695 .cpu_name = "440EP Rev. B", 1696 .cpu_features = CPU_FTRS_44X, 1697 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1698 .mmu_features = MMU_FTR_TYPE_44x, 1699 .icache_bsize = 32, 1700 .dcache_bsize = 32, 1701 .cpu_setup = __setup_cpu_440ep, 1702 .machine_check = machine_check_4xx, 1703 .platform = "ppc440", 1704 }, 1705 { /* 440GRX */ 1706 .pvr_mask = 0xf0000ffb, 1707 .pvr_value = 0x200008D0, 1708 .cpu_name = "440GRX", 1709 .cpu_features = CPU_FTRS_44X, 1710 .cpu_user_features = COMMON_USER_BOOKE, 1711 .mmu_features = MMU_FTR_TYPE_44x, 1712 .icache_bsize = 32, 1713 .dcache_bsize = 32, 1714 .cpu_setup = __setup_cpu_440grx, 1715 .machine_check = machine_check_440A, 1716 .platform = "ppc440", 1717 }, 1718 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1719 .pvr_mask = 0xf0000ffb, 1720 .pvr_value = 0x200008D8, 1721 .cpu_name = "440EPX", 1722 .cpu_features = CPU_FTRS_44X, 1723 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1724 .mmu_features = MMU_FTR_TYPE_44x, 1725 .icache_bsize = 32, 1726 .dcache_bsize = 32, 1727 .cpu_setup = __setup_cpu_440epx, 1728 .machine_check = machine_check_440A, 1729 .platform = "ppc440", 1730 }, 1731 { /* 440GP Rev. B */ 1732 .pvr_mask = 0xf0000fff, 1733 .pvr_value = 0x40000440, 1734 .cpu_name = "440GP Rev. B", 1735 .cpu_features = CPU_FTRS_44X, 1736 .cpu_user_features = COMMON_USER_BOOKE, 1737 .mmu_features = MMU_FTR_TYPE_44x, 1738 .icache_bsize = 32, 1739 .dcache_bsize = 32, 1740 .machine_check = machine_check_4xx, 1741 .platform = "ppc440gp", 1742 }, 1743 { /* 440GP Rev. C */ 1744 .pvr_mask = 0xf0000fff, 1745 .pvr_value = 0x40000481, 1746 .cpu_name = "440GP Rev. C", 1747 .cpu_features = CPU_FTRS_44X, 1748 .cpu_user_features = COMMON_USER_BOOKE, 1749 .mmu_features = MMU_FTR_TYPE_44x, 1750 .icache_bsize = 32, 1751 .dcache_bsize = 32, 1752 .machine_check = machine_check_4xx, 1753 .platform = "ppc440gp", 1754 }, 1755 { /* 440GX Rev. A */ 1756 .pvr_mask = 0xf0000fff, 1757 .pvr_value = 0x50000850, 1758 .cpu_name = "440GX Rev. A", 1759 .cpu_features = CPU_FTRS_44X, 1760 .cpu_user_features = COMMON_USER_BOOKE, 1761 .mmu_features = MMU_FTR_TYPE_44x, 1762 .icache_bsize = 32, 1763 .dcache_bsize = 32, 1764 .cpu_setup = __setup_cpu_440gx, 1765 .machine_check = machine_check_440A, 1766 .platform = "ppc440", 1767 }, 1768 { /* 440GX Rev. B */ 1769 .pvr_mask = 0xf0000fff, 1770 .pvr_value = 0x50000851, 1771 .cpu_name = "440GX Rev. B", 1772 .cpu_features = CPU_FTRS_44X, 1773 .cpu_user_features = COMMON_USER_BOOKE, 1774 .mmu_features = MMU_FTR_TYPE_44x, 1775 .icache_bsize = 32, 1776 .dcache_bsize = 32, 1777 .cpu_setup = __setup_cpu_440gx, 1778 .machine_check = machine_check_440A, 1779 .platform = "ppc440", 1780 }, 1781 { /* 440GX Rev. C */ 1782 .pvr_mask = 0xf0000fff, 1783 .pvr_value = 0x50000892, 1784 .cpu_name = "440GX Rev. C", 1785 .cpu_features = CPU_FTRS_44X, 1786 .cpu_user_features = COMMON_USER_BOOKE, 1787 .mmu_features = MMU_FTR_TYPE_44x, 1788 .icache_bsize = 32, 1789 .dcache_bsize = 32, 1790 .cpu_setup = __setup_cpu_440gx, 1791 .machine_check = machine_check_440A, 1792 .platform = "ppc440", 1793 }, 1794 { /* 440GX Rev. F */ 1795 .pvr_mask = 0xf0000fff, 1796 .pvr_value = 0x50000894, 1797 .cpu_name = "440GX Rev. F", 1798 .cpu_features = CPU_FTRS_44X, 1799 .cpu_user_features = COMMON_USER_BOOKE, 1800 .mmu_features = MMU_FTR_TYPE_44x, 1801 .icache_bsize = 32, 1802 .dcache_bsize = 32, 1803 .cpu_setup = __setup_cpu_440gx, 1804 .machine_check = machine_check_440A, 1805 .platform = "ppc440", 1806 }, 1807 { /* 440SP Rev. A */ 1808 .pvr_mask = 0xfff00fff, 1809 .pvr_value = 0x53200891, 1810 .cpu_name = "440SP Rev. A", 1811 .cpu_features = CPU_FTRS_44X, 1812 .cpu_user_features = COMMON_USER_BOOKE, 1813 .mmu_features = MMU_FTR_TYPE_44x, 1814 .icache_bsize = 32, 1815 .dcache_bsize = 32, 1816 .machine_check = machine_check_4xx, 1817 .platform = "ppc440", 1818 }, 1819 { /* 440SPe Rev. A */ 1820 .pvr_mask = 0xfff00fff, 1821 .pvr_value = 0x53400890, 1822 .cpu_name = "440SPe Rev. A", 1823 .cpu_features = CPU_FTRS_44X, 1824 .cpu_user_features = COMMON_USER_BOOKE, 1825 .mmu_features = MMU_FTR_TYPE_44x, 1826 .icache_bsize = 32, 1827 .dcache_bsize = 32, 1828 .cpu_setup = __setup_cpu_440spe, 1829 .machine_check = machine_check_440A, 1830 .platform = "ppc440", 1831 }, 1832 { /* 440SPe Rev. B */ 1833 .pvr_mask = 0xfff00fff, 1834 .pvr_value = 0x53400891, 1835 .cpu_name = "440SPe Rev. B", 1836 .cpu_features = CPU_FTRS_44X, 1837 .cpu_user_features = COMMON_USER_BOOKE, 1838 .mmu_features = MMU_FTR_TYPE_44x, 1839 .icache_bsize = 32, 1840 .dcache_bsize = 32, 1841 .cpu_setup = __setup_cpu_440spe, 1842 .machine_check = machine_check_440A, 1843 .platform = "ppc440", 1844 }, 1845 { /* 440 in Xilinx Virtex-5 FXT */ 1846 .pvr_mask = 0xfffffff0, 1847 .pvr_value = 0x7ff21910, 1848 .cpu_name = "440 in Virtex-5 FXT", 1849 .cpu_features = CPU_FTRS_44X, 1850 .cpu_user_features = COMMON_USER_BOOKE, 1851 .mmu_features = MMU_FTR_TYPE_44x, 1852 .icache_bsize = 32, 1853 .dcache_bsize = 32, 1854 .cpu_setup = __setup_cpu_440x5, 1855 .machine_check = machine_check_440A, 1856 .platform = "ppc440", 1857 }, 1858 { /* 460EX */ 1859 .pvr_mask = 0xffff0006, 1860 .pvr_value = 0x13020002, 1861 .cpu_name = "460EX", 1862 .cpu_features = CPU_FTRS_440x6, 1863 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1864 .mmu_features = MMU_FTR_TYPE_44x, 1865 .icache_bsize = 32, 1866 .dcache_bsize = 32, 1867 .cpu_setup = __setup_cpu_460ex, 1868 .machine_check = machine_check_440A, 1869 .platform = "ppc440", 1870 }, 1871 { /* 460EX Rev B */ 1872 .pvr_mask = 0xffff0007, 1873 .pvr_value = 0x13020004, 1874 .cpu_name = "460EX Rev. B", 1875 .cpu_features = CPU_FTRS_440x6, 1876 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1877 .mmu_features = MMU_FTR_TYPE_44x, 1878 .icache_bsize = 32, 1879 .dcache_bsize = 32, 1880 .cpu_setup = __setup_cpu_460ex, 1881 .machine_check = machine_check_440A, 1882 .platform = "ppc440", 1883 }, 1884 { /* 460GT */ 1885 .pvr_mask = 0xffff0006, 1886 .pvr_value = 0x13020000, 1887 .cpu_name = "460GT", 1888 .cpu_features = CPU_FTRS_440x6, 1889 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1890 .mmu_features = MMU_FTR_TYPE_44x, 1891 .icache_bsize = 32, 1892 .dcache_bsize = 32, 1893 .cpu_setup = __setup_cpu_460gt, 1894 .machine_check = machine_check_440A, 1895 .platform = "ppc440", 1896 }, 1897 { /* 460GT Rev B */ 1898 .pvr_mask = 0xffff0007, 1899 .pvr_value = 0x13020005, 1900 .cpu_name = "460GT Rev. B", 1901 .cpu_features = CPU_FTRS_440x6, 1902 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1903 .mmu_features = MMU_FTR_TYPE_44x, 1904 .icache_bsize = 32, 1905 .dcache_bsize = 32, 1906 .cpu_setup = __setup_cpu_460gt, 1907 .machine_check = machine_check_440A, 1908 .platform = "ppc440", 1909 }, 1910 { /* 460SX */ 1911 .pvr_mask = 0xffffff00, 1912 .pvr_value = 0x13541800, 1913 .cpu_name = "460SX", 1914 .cpu_features = CPU_FTRS_44X, 1915 .cpu_user_features = COMMON_USER_BOOKE, 1916 .mmu_features = MMU_FTR_TYPE_44x, 1917 .icache_bsize = 32, 1918 .dcache_bsize = 32, 1919 .cpu_setup = __setup_cpu_460sx, 1920 .machine_check = machine_check_440A, 1921 .platform = "ppc440", 1922 }, 1923 { /* 464 in APM821xx */ 1924 .pvr_mask = 0xfffffff0, 1925 .pvr_value = 0x12C41C80, 1926 .cpu_name = "APM821XX", 1927 .cpu_features = CPU_FTRS_44X, 1928 .cpu_user_features = COMMON_USER_BOOKE | 1929 PPC_FEATURE_HAS_FPU, 1930 .mmu_features = MMU_FTR_TYPE_44x, 1931 .icache_bsize = 32, 1932 .dcache_bsize = 32, 1933 .cpu_setup = __setup_cpu_apm821xx, 1934 .machine_check = machine_check_440A, 1935 .platform = "ppc440", 1936 }, 1937 { /* 476 DD2 core */ 1938 .pvr_mask = 0xffffffff, 1939 .pvr_value = 0x11a52080, 1940 .cpu_name = "476", 1941 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1942 .cpu_user_features = COMMON_USER_BOOKE | 1943 PPC_FEATURE_HAS_FPU, 1944 .mmu_features = MMU_FTR_TYPE_47x | 1945 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1946 .icache_bsize = 32, 1947 .dcache_bsize = 128, 1948 .machine_check = machine_check_47x, 1949 .platform = "ppc470", 1950 }, 1951 { /* 476fpe */ 1952 .pvr_mask = 0xffff0000, 1953 .pvr_value = 0x7ff50000, 1954 .cpu_name = "476fpe", 1955 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1956 .cpu_user_features = COMMON_USER_BOOKE | 1957 PPC_FEATURE_HAS_FPU, 1958 .mmu_features = MMU_FTR_TYPE_47x | 1959 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1960 .icache_bsize = 32, 1961 .dcache_bsize = 128, 1962 .machine_check = machine_check_47x, 1963 .platform = "ppc470", 1964 }, 1965 { /* 476 iss */ 1966 .pvr_mask = 0xffff0000, 1967 .pvr_value = 0x00050000, 1968 .cpu_name = "476", 1969 .cpu_features = CPU_FTRS_47X, 1970 .cpu_user_features = COMMON_USER_BOOKE | 1971 PPC_FEATURE_HAS_FPU, 1972 .mmu_features = MMU_FTR_TYPE_47x | 1973 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1974 .icache_bsize = 32, 1975 .dcache_bsize = 128, 1976 .machine_check = machine_check_47x, 1977 .platform = "ppc470", 1978 }, 1979 { /* 476 others */ 1980 .pvr_mask = 0xffff0000, 1981 .pvr_value = 0x11a50000, 1982 .cpu_name = "476", 1983 .cpu_features = CPU_FTRS_47X, 1984 .cpu_user_features = COMMON_USER_BOOKE | 1985 PPC_FEATURE_HAS_FPU, 1986 .mmu_features = MMU_FTR_TYPE_47x | 1987 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1988 .icache_bsize = 32, 1989 .dcache_bsize = 128, 1990 .machine_check = machine_check_47x, 1991 .platform = "ppc470", 1992 }, 1993 { /* default match */ 1994 .pvr_mask = 0x00000000, 1995 .pvr_value = 0x00000000, 1996 .cpu_name = "(generic 44x PPC)", 1997 .cpu_features = CPU_FTRS_44X, 1998 .cpu_user_features = COMMON_USER_BOOKE, 1999 .mmu_features = MMU_FTR_TYPE_44x, 2000 .icache_bsize = 32, 2001 .dcache_bsize = 32, 2002 .machine_check = machine_check_4xx, 2003 .platform = "ppc440", 2004 } 2005 #endif /* CONFIG_44x */ 2006 #ifdef CONFIG_E200 2007 { /* e200z5 */ 2008 .pvr_mask = 0xfff00000, 2009 .pvr_value = 0x81000000, 2010 .cpu_name = "e200z5", 2011 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 2012 .cpu_features = CPU_FTRS_E200, 2013 .cpu_user_features = COMMON_USER_BOOKE | 2014 PPC_FEATURE_HAS_EFP_SINGLE | 2015 PPC_FEATURE_UNIFIED_CACHE, 2016 .mmu_features = MMU_FTR_TYPE_FSL_E, 2017 .dcache_bsize = 32, 2018 .machine_check = machine_check_e200, 2019 .platform = "ppc5554", 2020 }, 2021 { /* e200z6 */ 2022 .pvr_mask = 0xfff00000, 2023 .pvr_value = 0x81100000, 2024 .cpu_name = "e200z6", 2025 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 2026 .cpu_features = CPU_FTRS_E200, 2027 .cpu_user_features = COMMON_USER_BOOKE | 2028 PPC_FEATURE_HAS_SPE_COMP | 2029 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2030 PPC_FEATURE_UNIFIED_CACHE, 2031 .mmu_features = MMU_FTR_TYPE_FSL_E, 2032 .dcache_bsize = 32, 2033 .machine_check = machine_check_e200, 2034 .platform = "ppc5554", 2035 }, 2036 { /* default match */ 2037 .pvr_mask = 0x00000000, 2038 .pvr_value = 0x00000000, 2039 .cpu_name = "(generic E200 PPC)", 2040 .cpu_features = CPU_FTRS_E200, 2041 .cpu_user_features = COMMON_USER_BOOKE | 2042 PPC_FEATURE_HAS_EFP_SINGLE | 2043 PPC_FEATURE_UNIFIED_CACHE, 2044 .mmu_features = MMU_FTR_TYPE_FSL_E, 2045 .dcache_bsize = 32, 2046 .cpu_setup = __setup_cpu_e200, 2047 .machine_check = machine_check_e200, 2048 .platform = "ppc5554", 2049 } 2050 #endif /* CONFIG_E200 */ 2051 #endif /* CONFIG_PPC32 */ 2052 #ifdef CONFIG_E500 2053 #ifdef CONFIG_PPC32 2054 { /* e500 */ 2055 .pvr_mask = 0xffff0000, 2056 .pvr_value = 0x80200000, 2057 .cpu_name = "e500", 2058 .cpu_features = CPU_FTRS_E500, 2059 .cpu_user_features = COMMON_USER_BOOKE | 2060 PPC_FEATURE_HAS_SPE_COMP | 2061 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2062 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2063 .mmu_features = MMU_FTR_TYPE_FSL_E, 2064 .icache_bsize = 32, 2065 .dcache_bsize = 32, 2066 .num_pmcs = 4, 2067 .oprofile_cpu_type = "ppc/e500", 2068 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2069 .cpu_setup = __setup_cpu_e500v1, 2070 .machine_check = machine_check_e500, 2071 .platform = "ppc8540", 2072 }, 2073 { /* e500v2 */ 2074 .pvr_mask = 0xffff0000, 2075 .pvr_value = 0x80210000, 2076 .cpu_name = "e500v2", 2077 .cpu_features = CPU_FTRS_E500_2, 2078 .cpu_user_features = COMMON_USER_BOOKE | 2079 PPC_FEATURE_HAS_SPE_COMP | 2080 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2081 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 2082 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2083 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 2084 .icache_bsize = 32, 2085 .dcache_bsize = 32, 2086 .num_pmcs = 4, 2087 .oprofile_cpu_type = "ppc/e500", 2088 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2089 .cpu_setup = __setup_cpu_e500v2, 2090 .machine_check = machine_check_e500, 2091 .platform = "ppc8548", 2092 }, 2093 { /* e500mc */ 2094 .pvr_mask = 0xffff0000, 2095 .pvr_value = 0x80230000, 2096 .cpu_name = "e500mc", 2097 .cpu_features = CPU_FTRS_E500MC, 2098 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2099 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2100 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2101 MMU_FTR_USE_TLBILX, 2102 .icache_bsize = 64, 2103 .dcache_bsize = 64, 2104 .num_pmcs = 4, 2105 .oprofile_cpu_type = "ppc/e500mc", 2106 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2107 .cpu_setup = __setup_cpu_e500mc, 2108 .machine_check = machine_check_e500mc, 2109 .platform = "ppce500mc", 2110 }, 2111 #endif /* CONFIG_PPC32 */ 2112 { /* e5500 */ 2113 .pvr_mask = 0xffff0000, 2114 .pvr_value = 0x80240000, 2115 .cpu_name = "e5500", 2116 .cpu_features = CPU_FTRS_E5500, 2117 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2118 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2119 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2120 MMU_FTR_USE_TLBILX, 2121 .icache_bsize = 64, 2122 .dcache_bsize = 64, 2123 .num_pmcs = 4, 2124 .oprofile_cpu_type = "ppc/e500mc", 2125 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2126 .cpu_setup = __setup_cpu_e5500, 2127 #ifndef CONFIG_PPC32 2128 .cpu_restore = __restore_cpu_e5500, 2129 #endif 2130 .machine_check = machine_check_e500mc, 2131 .platform = "ppce5500", 2132 }, 2133 { /* e6500 */ 2134 .pvr_mask = 0xffff0000, 2135 .pvr_value = 0x80400000, 2136 .cpu_name = "e6500", 2137 .cpu_features = CPU_FTRS_E6500, 2138 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2139 PPC_FEATURE_HAS_ALTIVEC_COMP, 2140 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2141 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2142 MMU_FTR_USE_TLBILX, 2143 .icache_bsize = 64, 2144 .dcache_bsize = 64, 2145 .num_pmcs = 6, 2146 .oprofile_cpu_type = "ppc/e6500", 2147 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2148 .cpu_setup = __setup_cpu_e6500, 2149 #ifndef CONFIG_PPC32 2150 .cpu_restore = __restore_cpu_e6500, 2151 #endif 2152 .machine_check = machine_check_e500mc, 2153 .platform = "ppce6500", 2154 }, 2155 #ifdef CONFIG_PPC32 2156 { /* default match */ 2157 .pvr_mask = 0x00000000, 2158 .pvr_value = 0x00000000, 2159 .cpu_name = "(generic E500 PPC)", 2160 .cpu_features = CPU_FTRS_E500, 2161 .cpu_user_features = COMMON_USER_BOOKE | 2162 PPC_FEATURE_HAS_SPE_COMP | 2163 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2164 .mmu_features = MMU_FTR_TYPE_FSL_E, 2165 .icache_bsize = 32, 2166 .dcache_bsize = 32, 2167 .machine_check = machine_check_e500, 2168 .platform = "powerpc", 2169 } 2170 #endif /* CONFIG_PPC32 */ 2171 #endif /* CONFIG_E500 */ 2172 }; 2173 2174 static struct cpu_spec the_cpu_spec; 2175 2176 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2177 struct cpu_spec *s) 2178 { 2179 struct cpu_spec *t = &the_cpu_spec; 2180 struct cpu_spec old; 2181 2182 t = PTRRELOC(t); 2183 old = *t; 2184 2185 /* Copy everything, then do fixups */ 2186 *t = *s; 2187 2188 /* 2189 * If we are overriding a previous value derived from the real 2190 * PVR with a new value obtained using a logical PVR value, 2191 * don't modify the performance monitor fields. 2192 */ 2193 if (old.num_pmcs && !s->num_pmcs) { 2194 t->num_pmcs = old.num_pmcs; 2195 t->pmc_type = old.pmc_type; 2196 t->oprofile_type = old.oprofile_type; 2197 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2198 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2199 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2200 2201 /* 2202 * If we have passed through this logic once before and 2203 * have pulled the default case because the real PVR was 2204 * not found inside cpu_specs[], then we are possibly 2205 * running in compatibility mode. In that case, let the 2206 * oprofiler know which set of compatibility counters to 2207 * pull from by making sure the oprofile_cpu_type string 2208 * is set to that of compatibility mode. If the 2209 * oprofile_cpu_type already has a value, then we are 2210 * possibly overriding a real PVR with a logical one, 2211 * and, in that case, keep the current value for 2212 * oprofile_cpu_type. 2213 */ 2214 if (old.oprofile_cpu_type != NULL) { 2215 t->oprofile_cpu_type = old.oprofile_cpu_type; 2216 t->oprofile_type = old.oprofile_type; 2217 } 2218 } 2219 2220 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2221 2222 /* 2223 * Set the base platform string once; assumes 2224 * we're called with real pvr first. 2225 */ 2226 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2227 *PTRRELOC(&powerpc_base_platform) = t->platform; 2228 2229 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2230 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2231 * that processor. I will consolidate that at a later time, for now, 2232 * just use #ifdef. We also don't need to PTRRELOC the function 2233 * pointer on ppc64 and booke as we are running at 0 in real mode 2234 * on ppc64 and reloc_offset is always 0 on booke. 2235 */ 2236 if (t->cpu_setup) { 2237 t->cpu_setup(offset, t); 2238 } 2239 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2240 2241 return t; 2242 } 2243 2244 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2245 { 2246 struct cpu_spec *s = cpu_specs; 2247 int i; 2248 2249 s = PTRRELOC(s); 2250 2251 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2252 if ((pvr & s->pvr_mask) == s->pvr_value) 2253 return setup_cpu_spec(offset, s); 2254 } 2255 2256 BUG(); 2257 2258 return NULL; 2259 } 2260