1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 4 * 5 * Modifications for ppc64: 6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 7 */ 8 9 #include <linux/string.h> 10 #include <linux/sched.h> 11 #include <linux/threads.h> 12 #include <linux/init.h> 13 #include <linux/export.h> 14 #include <linux/jump_label.h> 15 16 #include <asm/oprofile_impl.h> 17 #include <asm/cputable.h> 18 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 19 #include <asm/mmu.h> 20 #include <asm/setup.h> 21 22 static struct cpu_spec the_cpu_spec __read_mostly; 23 24 struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 25 EXPORT_SYMBOL(cur_cpu_spec); 26 27 /* The platform string corresponding to the real PVR */ 28 const char *powerpc_base_platform; 29 30 /* NOTE: 31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 32 * the responsibility of the appropriate CPU save/restore functions to 33 * eventually copy these settings over. Those save/restore aren't yet 34 * part of the cputable though. That has to be fixed for both ppc32 35 * and ppc64 36 */ 37 #ifdef CONFIG_PPC32 38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 51 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 52 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 60 #endif /* CONFIG_PPC32 */ 61 #ifdef CONFIG_PPC64 62 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 64 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 65 extern void __restore_cpu_pa6t(void); 66 extern void __restore_cpu_ppc970(void); 67 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 68 extern void __restore_cpu_power7(void); 69 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 70 extern void __restore_cpu_power8(void); 71 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); 72 extern void __restore_cpu_power9(void); 73 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 74 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 75 extern long __machine_check_early_realmode_p9(struct pt_regs *regs); 76 #endif /* CONFIG_PPC64 */ 77 #if defined(CONFIG_E500) 78 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 79 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 80 extern void __restore_cpu_e5500(void); 81 extern void __restore_cpu_e6500(void); 82 #endif /* CONFIG_E500 */ 83 84 /* This table only contains "desktop" CPUs, it need to be filled with embedded 85 * ones as well... 86 */ 87 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 88 PPC_FEATURE_HAS_MMU) 89 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 90 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 91 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 92 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 93 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 95 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 97 PPC_FEATURE_TRUE_LE | \ 98 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 99 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 100 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 101 PPC_FEATURE_TRUE_LE | \ 102 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 103 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 104 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 105 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 106 PPC_FEATURE_TRUE_LE | \ 107 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 108 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 109 PPC_FEATURE2_HTM_COMP | \ 110 PPC_FEATURE2_HTM_NOSC_COMP | \ 111 PPC_FEATURE2_DSCR | \ 112 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 113 PPC_FEATURE2_VEC_CRYPTO) 114 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 115 PPC_FEATURE_TRUE_LE | \ 116 PPC_FEATURE_HAS_ALTIVEC_COMP) 117 #define COMMON_USER_POWER9 COMMON_USER_POWER8 118 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 119 PPC_FEATURE2_ARCH_3_00 | \ 120 PPC_FEATURE2_HAS_IEEE128 | \ 121 PPC_FEATURE2_DARN ) 122 123 #ifdef CONFIG_PPC_BOOK3E_64 124 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 125 #else 126 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 127 PPC_FEATURE_BOOKE) 128 #endif 129 130 static struct cpu_spec __initdata cpu_specs[] = { 131 #ifdef CONFIG_PPC_BOOK3S_64 132 { /* PPC970 */ 133 .pvr_mask = 0xffff0000, 134 .pvr_value = 0x00390000, 135 .cpu_name = "PPC970", 136 .cpu_features = CPU_FTRS_PPC970, 137 .cpu_user_features = COMMON_USER_POWER4 | 138 PPC_FEATURE_HAS_ALTIVEC_COMP, 139 .mmu_features = MMU_FTRS_PPC970, 140 .icache_bsize = 128, 141 .dcache_bsize = 128, 142 .num_pmcs = 8, 143 .pmc_type = PPC_PMC_IBM, 144 .cpu_setup = __setup_cpu_ppc970, 145 .cpu_restore = __restore_cpu_ppc970, 146 .oprofile_cpu_type = "ppc64/970", 147 .oprofile_type = PPC_OPROFILE_POWER4, 148 .platform = "ppc970", 149 }, 150 { /* PPC970FX */ 151 .pvr_mask = 0xffff0000, 152 .pvr_value = 0x003c0000, 153 .cpu_name = "PPC970FX", 154 .cpu_features = CPU_FTRS_PPC970, 155 .cpu_user_features = COMMON_USER_POWER4 | 156 PPC_FEATURE_HAS_ALTIVEC_COMP, 157 .mmu_features = MMU_FTRS_PPC970, 158 .icache_bsize = 128, 159 .dcache_bsize = 128, 160 .num_pmcs = 8, 161 .pmc_type = PPC_PMC_IBM, 162 .cpu_setup = __setup_cpu_ppc970, 163 .cpu_restore = __restore_cpu_ppc970, 164 .oprofile_cpu_type = "ppc64/970", 165 .oprofile_type = PPC_OPROFILE_POWER4, 166 .platform = "ppc970", 167 }, 168 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 169 .pvr_mask = 0xffffffff, 170 .pvr_value = 0x00440100, 171 .cpu_name = "PPC970MP", 172 .cpu_features = CPU_FTRS_PPC970, 173 .cpu_user_features = COMMON_USER_POWER4 | 174 PPC_FEATURE_HAS_ALTIVEC_COMP, 175 .mmu_features = MMU_FTRS_PPC970, 176 .icache_bsize = 128, 177 .dcache_bsize = 128, 178 .num_pmcs = 8, 179 .pmc_type = PPC_PMC_IBM, 180 .cpu_setup = __setup_cpu_ppc970, 181 .cpu_restore = __restore_cpu_ppc970, 182 .oprofile_cpu_type = "ppc64/970MP", 183 .oprofile_type = PPC_OPROFILE_POWER4, 184 .platform = "ppc970", 185 }, 186 { /* PPC970MP */ 187 .pvr_mask = 0xffff0000, 188 .pvr_value = 0x00440000, 189 .cpu_name = "PPC970MP", 190 .cpu_features = CPU_FTRS_PPC970, 191 .cpu_user_features = COMMON_USER_POWER4 | 192 PPC_FEATURE_HAS_ALTIVEC_COMP, 193 .mmu_features = MMU_FTRS_PPC970, 194 .icache_bsize = 128, 195 .dcache_bsize = 128, 196 .num_pmcs = 8, 197 .pmc_type = PPC_PMC_IBM, 198 .cpu_setup = __setup_cpu_ppc970MP, 199 .cpu_restore = __restore_cpu_ppc970, 200 .oprofile_cpu_type = "ppc64/970MP", 201 .oprofile_type = PPC_OPROFILE_POWER4, 202 .platform = "ppc970", 203 }, 204 { /* PPC970GX */ 205 .pvr_mask = 0xffff0000, 206 .pvr_value = 0x00450000, 207 .cpu_name = "PPC970GX", 208 .cpu_features = CPU_FTRS_PPC970, 209 .cpu_user_features = COMMON_USER_POWER4 | 210 PPC_FEATURE_HAS_ALTIVEC_COMP, 211 .mmu_features = MMU_FTRS_PPC970, 212 .icache_bsize = 128, 213 .dcache_bsize = 128, 214 .num_pmcs = 8, 215 .pmc_type = PPC_PMC_IBM, 216 .cpu_setup = __setup_cpu_ppc970, 217 .oprofile_cpu_type = "ppc64/970", 218 .oprofile_type = PPC_OPROFILE_POWER4, 219 .platform = "ppc970", 220 }, 221 { /* Power5 GR */ 222 .pvr_mask = 0xffff0000, 223 .pvr_value = 0x003a0000, 224 .cpu_name = "POWER5 (gr)", 225 .cpu_features = CPU_FTRS_POWER5, 226 .cpu_user_features = COMMON_USER_POWER5, 227 .mmu_features = MMU_FTRS_POWER5, 228 .icache_bsize = 128, 229 .dcache_bsize = 128, 230 .num_pmcs = 6, 231 .pmc_type = PPC_PMC_IBM, 232 .oprofile_cpu_type = "ppc64/power5", 233 .oprofile_type = PPC_OPROFILE_POWER4, 234 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 235 * and above but only works on POWER5 and above 236 */ 237 .oprofile_mmcra_sihv = MMCRA_SIHV, 238 .oprofile_mmcra_sipr = MMCRA_SIPR, 239 .platform = "power5", 240 }, 241 { /* Power5++ */ 242 .pvr_mask = 0xffffff00, 243 .pvr_value = 0x003b0300, 244 .cpu_name = "POWER5+ (gs)", 245 .cpu_features = CPU_FTRS_POWER5, 246 .cpu_user_features = COMMON_USER_POWER5_PLUS, 247 .mmu_features = MMU_FTRS_POWER5, 248 .icache_bsize = 128, 249 .dcache_bsize = 128, 250 .num_pmcs = 6, 251 .oprofile_cpu_type = "ppc64/power5++", 252 .oprofile_type = PPC_OPROFILE_POWER4, 253 .oprofile_mmcra_sihv = MMCRA_SIHV, 254 .oprofile_mmcra_sipr = MMCRA_SIPR, 255 .platform = "power5+", 256 }, 257 { /* Power5 GS */ 258 .pvr_mask = 0xffff0000, 259 .pvr_value = 0x003b0000, 260 .cpu_name = "POWER5+ (gs)", 261 .cpu_features = CPU_FTRS_POWER5, 262 .cpu_user_features = COMMON_USER_POWER5_PLUS, 263 .mmu_features = MMU_FTRS_POWER5, 264 .icache_bsize = 128, 265 .dcache_bsize = 128, 266 .num_pmcs = 6, 267 .pmc_type = PPC_PMC_IBM, 268 .oprofile_cpu_type = "ppc64/power5+", 269 .oprofile_type = PPC_OPROFILE_POWER4, 270 .oprofile_mmcra_sihv = MMCRA_SIHV, 271 .oprofile_mmcra_sipr = MMCRA_SIPR, 272 .platform = "power5+", 273 }, 274 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 275 .pvr_mask = 0xffffffff, 276 .pvr_value = 0x0f000001, 277 .cpu_name = "POWER5+", 278 .cpu_features = CPU_FTRS_POWER5, 279 .cpu_user_features = COMMON_USER_POWER5_PLUS, 280 .mmu_features = MMU_FTRS_POWER5, 281 .icache_bsize = 128, 282 .dcache_bsize = 128, 283 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 284 .oprofile_type = PPC_OPROFILE_POWER4, 285 .platform = "power5+", 286 }, 287 { /* Power6 */ 288 .pvr_mask = 0xffff0000, 289 .pvr_value = 0x003e0000, 290 .cpu_name = "POWER6 (raw)", 291 .cpu_features = CPU_FTRS_POWER6, 292 .cpu_user_features = COMMON_USER_POWER6 | 293 PPC_FEATURE_POWER6_EXT, 294 .mmu_features = MMU_FTRS_POWER6, 295 .icache_bsize = 128, 296 .dcache_bsize = 128, 297 .num_pmcs = 6, 298 .pmc_type = PPC_PMC_IBM, 299 .oprofile_cpu_type = "ppc64/power6", 300 .oprofile_type = PPC_OPROFILE_POWER4, 301 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 302 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 303 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 304 POWER6_MMCRA_OTHER, 305 .platform = "power6x", 306 }, 307 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 308 .pvr_mask = 0xffffffff, 309 .pvr_value = 0x0f000002, 310 .cpu_name = "POWER6 (architected)", 311 .cpu_features = CPU_FTRS_POWER6, 312 .cpu_user_features = COMMON_USER_POWER6, 313 .mmu_features = MMU_FTRS_POWER6, 314 .icache_bsize = 128, 315 .dcache_bsize = 128, 316 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 317 .oprofile_type = PPC_OPROFILE_POWER4, 318 .platform = "power6", 319 }, 320 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 321 .pvr_mask = 0xffffffff, 322 .pvr_value = 0x0f000003, 323 .cpu_name = "POWER7 (architected)", 324 .cpu_features = CPU_FTRS_POWER7, 325 .cpu_user_features = COMMON_USER_POWER7, 326 .cpu_user_features2 = COMMON_USER2_POWER7, 327 .mmu_features = MMU_FTRS_POWER7, 328 .icache_bsize = 128, 329 .dcache_bsize = 128, 330 .oprofile_type = PPC_OPROFILE_POWER4, 331 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 332 .cpu_setup = __setup_cpu_power7, 333 .cpu_restore = __restore_cpu_power7, 334 .machine_check_early = __machine_check_early_realmode_p7, 335 .platform = "power7", 336 }, 337 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 338 .pvr_mask = 0xffffffff, 339 .pvr_value = 0x0f000004, 340 .cpu_name = "POWER8 (architected)", 341 .cpu_features = CPU_FTRS_POWER8, 342 .cpu_user_features = COMMON_USER_POWER8, 343 .cpu_user_features2 = COMMON_USER2_POWER8, 344 .mmu_features = MMU_FTRS_POWER8, 345 .icache_bsize = 128, 346 .dcache_bsize = 128, 347 .oprofile_type = PPC_OPROFILE_INVALID, 348 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 349 .cpu_setup = __setup_cpu_power8, 350 .cpu_restore = __restore_cpu_power8, 351 .machine_check_early = __machine_check_early_realmode_p8, 352 .platform = "power8", 353 }, 354 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 355 .pvr_mask = 0xffffffff, 356 .pvr_value = 0x0f000005, 357 .cpu_name = "POWER9 (architected)", 358 .cpu_features = CPU_FTRS_POWER9, 359 .cpu_user_features = COMMON_USER_POWER9, 360 .cpu_user_features2 = COMMON_USER2_POWER9, 361 .mmu_features = MMU_FTRS_POWER9, 362 .icache_bsize = 128, 363 .dcache_bsize = 128, 364 .oprofile_type = PPC_OPROFILE_INVALID, 365 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 366 .cpu_setup = __setup_cpu_power9, 367 .cpu_restore = __restore_cpu_power9, 368 .platform = "power9", 369 }, 370 { /* Power7 */ 371 .pvr_mask = 0xffff0000, 372 .pvr_value = 0x003f0000, 373 .cpu_name = "POWER7 (raw)", 374 .cpu_features = CPU_FTRS_POWER7, 375 .cpu_user_features = COMMON_USER_POWER7, 376 .cpu_user_features2 = COMMON_USER2_POWER7, 377 .mmu_features = MMU_FTRS_POWER7, 378 .icache_bsize = 128, 379 .dcache_bsize = 128, 380 .num_pmcs = 6, 381 .pmc_type = PPC_PMC_IBM, 382 .oprofile_cpu_type = "ppc64/power7", 383 .oprofile_type = PPC_OPROFILE_POWER4, 384 .cpu_setup = __setup_cpu_power7, 385 .cpu_restore = __restore_cpu_power7, 386 .machine_check_early = __machine_check_early_realmode_p7, 387 .platform = "power7", 388 }, 389 { /* Power7+ */ 390 .pvr_mask = 0xffff0000, 391 .pvr_value = 0x004A0000, 392 .cpu_name = "POWER7+ (raw)", 393 .cpu_features = CPU_FTRS_POWER7, 394 .cpu_user_features = COMMON_USER_POWER7, 395 .cpu_user_features2 = COMMON_USER2_POWER7, 396 .mmu_features = MMU_FTRS_POWER7, 397 .icache_bsize = 128, 398 .dcache_bsize = 128, 399 .num_pmcs = 6, 400 .pmc_type = PPC_PMC_IBM, 401 .oprofile_cpu_type = "ppc64/power7", 402 .oprofile_type = PPC_OPROFILE_POWER4, 403 .cpu_setup = __setup_cpu_power7, 404 .cpu_restore = __restore_cpu_power7, 405 .machine_check_early = __machine_check_early_realmode_p7, 406 .platform = "power7+", 407 }, 408 { /* Power8E */ 409 .pvr_mask = 0xffff0000, 410 .pvr_value = 0x004b0000, 411 .cpu_name = "POWER8E (raw)", 412 .cpu_features = CPU_FTRS_POWER8E, 413 .cpu_user_features = COMMON_USER_POWER8, 414 .cpu_user_features2 = COMMON_USER2_POWER8, 415 .mmu_features = MMU_FTRS_POWER8, 416 .icache_bsize = 128, 417 .dcache_bsize = 128, 418 .num_pmcs = 6, 419 .pmc_type = PPC_PMC_IBM, 420 .oprofile_cpu_type = "ppc64/power8", 421 .oprofile_type = PPC_OPROFILE_INVALID, 422 .cpu_setup = __setup_cpu_power8, 423 .cpu_restore = __restore_cpu_power8, 424 .machine_check_early = __machine_check_early_realmode_p8, 425 .platform = "power8", 426 }, 427 { /* Power8NVL */ 428 .pvr_mask = 0xffff0000, 429 .pvr_value = 0x004c0000, 430 .cpu_name = "POWER8NVL (raw)", 431 .cpu_features = CPU_FTRS_POWER8, 432 .cpu_user_features = COMMON_USER_POWER8, 433 .cpu_user_features2 = COMMON_USER2_POWER8, 434 .mmu_features = MMU_FTRS_POWER8, 435 .icache_bsize = 128, 436 .dcache_bsize = 128, 437 .num_pmcs = 6, 438 .pmc_type = PPC_PMC_IBM, 439 .oprofile_cpu_type = "ppc64/power8", 440 .oprofile_type = PPC_OPROFILE_INVALID, 441 .cpu_setup = __setup_cpu_power8, 442 .cpu_restore = __restore_cpu_power8, 443 .machine_check_early = __machine_check_early_realmode_p8, 444 .platform = "power8", 445 }, 446 { /* Power8 */ 447 .pvr_mask = 0xffff0000, 448 .pvr_value = 0x004d0000, 449 .cpu_name = "POWER8 (raw)", 450 .cpu_features = CPU_FTRS_POWER8, 451 .cpu_user_features = COMMON_USER_POWER8, 452 .cpu_user_features2 = COMMON_USER2_POWER8, 453 .mmu_features = MMU_FTRS_POWER8, 454 .icache_bsize = 128, 455 .dcache_bsize = 128, 456 .num_pmcs = 6, 457 .pmc_type = PPC_PMC_IBM, 458 .oprofile_cpu_type = "ppc64/power8", 459 .oprofile_type = PPC_OPROFILE_INVALID, 460 .cpu_setup = __setup_cpu_power8, 461 .cpu_restore = __restore_cpu_power8, 462 .machine_check_early = __machine_check_early_realmode_p8, 463 .platform = "power8", 464 }, 465 { /* Power9 DD2.0 */ 466 .pvr_mask = 0xffffefff, 467 .pvr_value = 0x004e0200, 468 .cpu_name = "POWER9 (raw)", 469 .cpu_features = CPU_FTRS_POWER9_DD2_0, 470 .cpu_user_features = COMMON_USER_POWER9, 471 .cpu_user_features2 = COMMON_USER2_POWER9, 472 .mmu_features = MMU_FTRS_POWER9, 473 .icache_bsize = 128, 474 .dcache_bsize = 128, 475 .num_pmcs = 6, 476 .pmc_type = PPC_PMC_IBM, 477 .oprofile_cpu_type = "ppc64/power9", 478 .oprofile_type = PPC_OPROFILE_INVALID, 479 .cpu_setup = __setup_cpu_power9, 480 .cpu_restore = __restore_cpu_power9, 481 .machine_check_early = __machine_check_early_realmode_p9, 482 .platform = "power9", 483 }, 484 { /* Power9 DD 2.1 */ 485 .pvr_mask = 0xffffefff, 486 .pvr_value = 0x004e0201, 487 .cpu_name = "POWER9 (raw)", 488 .cpu_features = CPU_FTRS_POWER9_DD2_1, 489 .cpu_user_features = COMMON_USER_POWER9, 490 .cpu_user_features2 = COMMON_USER2_POWER9, 491 .mmu_features = MMU_FTRS_POWER9, 492 .icache_bsize = 128, 493 .dcache_bsize = 128, 494 .num_pmcs = 6, 495 .pmc_type = PPC_PMC_IBM, 496 .oprofile_cpu_type = "ppc64/power9", 497 .oprofile_type = PPC_OPROFILE_INVALID, 498 .cpu_setup = __setup_cpu_power9, 499 .cpu_restore = __restore_cpu_power9, 500 .machine_check_early = __machine_check_early_realmode_p9, 501 .platform = "power9", 502 }, 503 { /* Power9 DD2.2 or later */ 504 .pvr_mask = 0xffff0000, 505 .pvr_value = 0x004e0000, 506 .cpu_name = "POWER9 (raw)", 507 .cpu_features = CPU_FTRS_POWER9_DD2_2, 508 .cpu_user_features = COMMON_USER_POWER9, 509 .cpu_user_features2 = COMMON_USER2_POWER9, 510 .mmu_features = MMU_FTRS_POWER9, 511 .icache_bsize = 128, 512 .dcache_bsize = 128, 513 .num_pmcs = 6, 514 .pmc_type = PPC_PMC_IBM, 515 .oprofile_cpu_type = "ppc64/power9", 516 .oprofile_type = PPC_OPROFILE_INVALID, 517 .cpu_setup = __setup_cpu_power9, 518 .cpu_restore = __restore_cpu_power9, 519 .machine_check_early = __machine_check_early_realmode_p9, 520 .platform = "power9", 521 }, 522 { /* Cell Broadband Engine */ 523 .pvr_mask = 0xffff0000, 524 .pvr_value = 0x00700000, 525 .cpu_name = "Cell Broadband Engine", 526 .cpu_features = CPU_FTRS_CELL, 527 .cpu_user_features = COMMON_USER_PPC64 | 528 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 529 PPC_FEATURE_SMT, 530 .mmu_features = MMU_FTRS_CELL, 531 .icache_bsize = 128, 532 .dcache_bsize = 128, 533 .num_pmcs = 4, 534 .pmc_type = PPC_PMC_IBM, 535 .oprofile_cpu_type = "ppc64/cell-be", 536 .oprofile_type = PPC_OPROFILE_CELL, 537 .platform = "ppc-cell-be", 538 }, 539 { /* PA Semi PA6T */ 540 .pvr_mask = 0x7fff0000, 541 .pvr_value = 0x00900000, 542 .cpu_name = "PA6T", 543 .cpu_features = CPU_FTRS_PA6T, 544 .cpu_user_features = COMMON_USER_PA6T, 545 .mmu_features = MMU_FTRS_PA6T, 546 .icache_bsize = 64, 547 .dcache_bsize = 64, 548 .num_pmcs = 6, 549 .pmc_type = PPC_PMC_PA6T, 550 .cpu_setup = __setup_cpu_pa6t, 551 .cpu_restore = __restore_cpu_pa6t, 552 .oprofile_cpu_type = "ppc64/pa6t", 553 .oprofile_type = PPC_OPROFILE_PA6T, 554 .platform = "pa6t", 555 }, 556 { /* default match */ 557 .pvr_mask = 0x00000000, 558 .pvr_value = 0x00000000, 559 .cpu_name = "POWER5 (compatible)", 560 .cpu_features = CPU_FTRS_COMPATIBLE, 561 .cpu_user_features = COMMON_USER_PPC64, 562 .mmu_features = MMU_FTRS_POWER, 563 .icache_bsize = 128, 564 .dcache_bsize = 128, 565 .num_pmcs = 6, 566 .pmc_type = PPC_PMC_IBM, 567 .platform = "power5", 568 } 569 #endif /* CONFIG_PPC_BOOK3S_64 */ 570 571 #ifdef CONFIG_PPC32 572 #ifdef CONFIG_PPC_BOOK3S_601 573 { /* 601 */ 574 .pvr_mask = 0xffff0000, 575 .pvr_value = 0x00010000, 576 .cpu_name = "601", 577 .cpu_features = CPU_FTRS_PPC601, 578 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 579 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 580 .mmu_features = MMU_FTR_HPTE_TABLE, 581 .icache_bsize = 32, 582 .dcache_bsize = 32, 583 .machine_check = machine_check_generic, 584 .platform = "ppc601", 585 }, 586 #endif /* CONFIG_PPC_BOOK3S_601 */ 587 #ifdef CONFIG_PPC_BOOK3S_6xx 588 { /* 603 */ 589 .pvr_mask = 0xffff0000, 590 .pvr_value = 0x00030000, 591 .cpu_name = "603", 592 .cpu_features = CPU_FTRS_603, 593 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 594 .mmu_features = 0, 595 .icache_bsize = 32, 596 .dcache_bsize = 32, 597 .cpu_setup = __setup_cpu_603, 598 .machine_check = machine_check_generic, 599 .platform = "ppc603", 600 }, 601 { /* 603e */ 602 .pvr_mask = 0xffff0000, 603 .pvr_value = 0x00060000, 604 .cpu_name = "603e", 605 .cpu_features = CPU_FTRS_603, 606 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 607 .mmu_features = 0, 608 .icache_bsize = 32, 609 .dcache_bsize = 32, 610 .cpu_setup = __setup_cpu_603, 611 .machine_check = machine_check_generic, 612 .platform = "ppc603", 613 }, 614 { /* 603ev */ 615 .pvr_mask = 0xffff0000, 616 .pvr_value = 0x00070000, 617 .cpu_name = "603ev", 618 .cpu_features = CPU_FTRS_603, 619 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 620 .mmu_features = 0, 621 .icache_bsize = 32, 622 .dcache_bsize = 32, 623 .cpu_setup = __setup_cpu_603, 624 .machine_check = machine_check_generic, 625 .platform = "ppc603", 626 }, 627 { /* 604 */ 628 .pvr_mask = 0xffff0000, 629 .pvr_value = 0x00040000, 630 .cpu_name = "604", 631 .cpu_features = CPU_FTRS_604, 632 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 633 .mmu_features = MMU_FTR_HPTE_TABLE, 634 .icache_bsize = 32, 635 .dcache_bsize = 32, 636 .num_pmcs = 2, 637 .cpu_setup = __setup_cpu_604, 638 .machine_check = machine_check_generic, 639 .platform = "ppc604", 640 }, 641 { /* 604e */ 642 .pvr_mask = 0xfffff000, 643 .pvr_value = 0x00090000, 644 .cpu_name = "604e", 645 .cpu_features = CPU_FTRS_604, 646 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 647 .mmu_features = MMU_FTR_HPTE_TABLE, 648 .icache_bsize = 32, 649 .dcache_bsize = 32, 650 .num_pmcs = 4, 651 .cpu_setup = __setup_cpu_604, 652 .machine_check = machine_check_generic, 653 .platform = "ppc604", 654 }, 655 { /* 604r */ 656 .pvr_mask = 0xffff0000, 657 .pvr_value = 0x00090000, 658 .cpu_name = "604r", 659 .cpu_features = CPU_FTRS_604, 660 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 661 .mmu_features = MMU_FTR_HPTE_TABLE, 662 .icache_bsize = 32, 663 .dcache_bsize = 32, 664 .num_pmcs = 4, 665 .cpu_setup = __setup_cpu_604, 666 .machine_check = machine_check_generic, 667 .platform = "ppc604", 668 }, 669 { /* 604ev */ 670 .pvr_mask = 0xffff0000, 671 .pvr_value = 0x000a0000, 672 .cpu_name = "604ev", 673 .cpu_features = CPU_FTRS_604, 674 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 675 .mmu_features = MMU_FTR_HPTE_TABLE, 676 .icache_bsize = 32, 677 .dcache_bsize = 32, 678 .num_pmcs = 4, 679 .cpu_setup = __setup_cpu_604, 680 .machine_check = machine_check_generic, 681 .platform = "ppc604", 682 }, 683 { /* 740/750 (0x4202, don't support TAU ?) */ 684 .pvr_mask = 0xffffffff, 685 .pvr_value = 0x00084202, 686 .cpu_name = "740/750", 687 .cpu_features = CPU_FTRS_740_NOTAU, 688 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 689 .mmu_features = MMU_FTR_HPTE_TABLE, 690 .icache_bsize = 32, 691 .dcache_bsize = 32, 692 .num_pmcs = 4, 693 .cpu_setup = __setup_cpu_750, 694 .machine_check = machine_check_generic, 695 .platform = "ppc750", 696 }, 697 { /* 750CX (80100 and 8010x?) */ 698 .pvr_mask = 0xfffffff0, 699 .pvr_value = 0x00080100, 700 .cpu_name = "750CX", 701 .cpu_features = CPU_FTRS_750, 702 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 703 .mmu_features = MMU_FTR_HPTE_TABLE, 704 .icache_bsize = 32, 705 .dcache_bsize = 32, 706 .num_pmcs = 4, 707 .cpu_setup = __setup_cpu_750cx, 708 .machine_check = machine_check_generic, 709 .platform = "ppc750", 710 }, 711 { /* 750CX (82201 and 82202) */ 712 .pvr_mask = 0xfffffff0, 713 .pvr_value = 0x00082200, 714 .cpu_name = "750CX", 715 .cpu_features = CPU_FTRS_750, 716 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 717 .mmu_features = MMU_FTR_HPTE_TABLE, 718 .icache_bsize = 32, 719 .dcache_bsize = 32, 720 .num_pmcs = 4, 721 .pmc_type = PPC_PMC_IBM, 722 .cpu_setup = __setup_cpu_750cx, 723 .machine_check = machine_check_generic, 724 .platform = "ppc750", 725 }, 726 { /* 750CXe (82214) */ 727 .pvr_mask = 0xfffffff0, 728 .pvr_value = 0x00082210, 729 .cpu_name = "750CXe", 730 .cpu_features = CPU_FTRS_750, 731 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 732 .mmu_features = MMU_FTR_HPTE_TABLE, 733 .icache_bsize = 32, 734 .dcache_bsize = 32, 735 .num_pmcs = 4, 736 .pmc_type = PPC_PMC_IBM, 737 .cpu_setup = __setup_cpu_750cx, 738 .machine_check = machine_check_generic, 739 .platform = "ppc750", 740 }, 741 { /* 750CXe "Gekko" (83214) */ 742 .pvr_mask = 0xffffffff, 743 .pvr_value = 0x00083214, 744 .cpu_name = "750CXe", 745 .cpu_features = CPU_FTRS_750, 746 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 747 .mmu_features = MMU_FTR_HPTE_TABLE, 748 .icache_bsize = 32, 749 .dcache_bsize = 32, 750 .num_pmcs = 4, 751 .pmc_type = PPC_PMC_IBM, 752 .cpu_setup = __setup_cpu_750cx, 753 .machine_check = machine_check_generic, 754 .platform = "ppc750", 755 }, 756 { /* 750CL (and "Broadway") */ 757 .pvr_mask = 0xfffff0e0, 758 .pvr_value = 0x00087000, 759 .cpu_name = "750CL", 760 .cpu_features = CPU_FTRS_750CL, 761 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 762 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 763 .icache_bsize = 32, 764 .dcache_bsize = 32, 765 .num_pmcs = 4, 766 .pmc_type = PPC_PMC_IBM, 767 .cpu_setup = __setup_cpu_750, 768 .machine_check = machine_check_generic, 769 .platform = "ppc750", 770 .oprofile_cpu_type = "ppc/750", 771 .oprofile_type = PPC_OPROFILE_G4, 772 }, 773 { /* 745/755 */ 774 .pvr_mask = 0xfffff000, 775 .pvr_value = 0x00083000, 776 .cpu_name = "745/755", 777 .cpu_features = CPU_FTRS_750, 778 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 779 .mmu_features = MMU_FTR_HPTE_TABLE, 780 .icache_bsize = 32, 781 .dcache_bsize = 32, 782 .num_pmcs = 4, 783 .pmc_type = PPC_PMC_IBM, 784 .cpu_setup = __setup_cpu_750, 785 .machine_check = machine_check_generic, 786 .platform = "ppc750", 787 }, 788 { /* 750FX rev 1.x */ 789 .pvr_mask = 0xffffff00, 790 .pvr_value = 0x70000100, 791 .cpu_name = "750FX", 792 .cpu_features = CPU_FTRS_750FX1, 793 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 794 .mmu_features = MMU_FTR_HPTE_TABLE, 795 .icache_bsize = 32, 796 .dcache_bsize = 32, 797 .num_pmcs = 4, 798 .pmc_type = PPC_PMC_IBM, 799 .cpu_setup = __setup_cpu_750, 800 .machine_check = machine_check_generic, 801 .platform = "ppc750", 802 .oprofile_cpu_type = "ppc/750", 803 .oprofile_type = PPC_OPROFILE_G4, 804 }, 805 { /* 750FX rev 2.0 must disable HID0[DPM] */ 806 .pvr_mask = 0xffffffff, 807 .pvr_value = 0x70000200, 808 .cpu_name = "750FX", 809 .cpu_features = CPU_FTRS_750FX2, 810 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 811 .mmu_features = MMU_FTR_HPTE_TABLE, 812 .icache_bsize = 32, 813 .dcache_bsize = 32, 814 .num_pmcs = 4, 815 .pmc_type = PPC_PMC_IBM, 816 .cpu_setup = __setup_cpu_750, 817 .machine_check = machine_check_generic, 818 .platform = "ppc750", 819 .oprofile_cpu_type = "ppc/750", 820 .oprofile_type = PPC_OPROFILE_G4, 821 }, 822 { /* 750FX (All revs except 2.0) */ 823 .pvr_mask = 0xffff0000, 824 .pvr_value = 0x70000000, 825 .cpu_name = "750FX", 826 .cpu_features = CPU_FTRS_750FX, 827 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 828 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 829 .icache_bsize = 32, 830 .dcache_bsize = 32, 831 .num_pmcs = 4, 832 .pmc_type = PPC_PMC_IBM, 833 .cpu_setup = __setup_cpu_750fx, 834 .machine_check = machine_check_generic, 835 .platform = "ppc750", 836 .oprofile_cpu_type = "ppc/750", 837 .oprofile_type = PPC_OPROFILE_G4, 838 }, 839 { /* 750GX */ 840 .pvr_mask = 0xffff0000, 841 .pvr_value = 0x70020000, 842 .cpu_name = "750GX", 843 .cpu_features = CPU_FTRS_750GX, 844 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 845 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 846 .icache_bsize = 32, 847 .dcache_bsize = 32, 848 .num_pmcs = 4, 849 .pmc_type = PPC_PMC_IBM, 850 .cpu_setup = __setup_cpu_750fx, 851 .machine_check = machine_check_generic, 852 .platform = "ppc750", 853 .oprofile_cpu_type = "ppc/750", 854 .oprofile_type = PPC_OPROFILE_G4, 855 }, 856 { /* 740/750 (L2CR bit need fixup for 740) */ 857 .pvr_mask = 0xffff0000, 858 .pvr_value = 0x00080000, 859 .cpu_name = "740/750", 860 .cpu_features = CPU_FTRS_740, 861 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 862 .mmu_features = MMU_FTR_HPTE_TABLE, 863 .icache_bsize = 32, 864 .dcache_bsize = 32, 865 .num_pmcs = 4, 866 .pmc_type = PPC_PMC_IBM, 867 .cpu_setup = __setup_cpu_750, 868 .machine_check = machine_check_generic, 869 .platform = "ppc750", 870 }, 871 { /* 7400 rev 1.1 ? (no TAU) */ 872 .pvr_mask = 0xffffffff, 873 .pvr_value = 0x000c1101, 874 .cpu_name = "7400 (1.1)", 875 .cpu_features = CPU_FTRS_7400_NOTAU, 876 .cpu_user_features = COMMON_USER | 877 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 878 .mmu_features = MMU_FTR_HPTE_TABLE, 879 .icache_bsize = 32, 880 .dcache_bsize = 32, 881 .num_pmcs = 4, 882 .pmc_type = PPC_PMC_G4, 883 .cpu_setup = __setup_cpu_7400, 884 .machine_check = machine_check_generic, 885 .platform = "ppc7400", 886 }, 887 { /* 7400 */ 888 .pvr_mask = 0xffff0000, 889 .pvr_value = 0x000c0000, 890 .cpu_name = "7400", 891 .cpu_features = CPU_FTRS_7400, 892 .cpu_user_features = COMMON_USER | 893 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 894 .mmu_features = MMU_FTR_HPTE_TABLE, 895 .icache_bsize = 32, 896 .dcache_bsize = 32, 897 .num_pmcs = 4, 898 .pmc_type = PPC_PMC_G4, 899 .cpu_setup = __setup_cpu_7400, 900 .machine_check = machine_check_generic, 901 .platform = "ppc7400", 902 }, 903 { /* 7410 */ 904 .pvr_mask = 0xffff0000, 905 .pvr_value = 0x800c0000, 906 .cpu_name = "7410", 907 .cpu_features = CPU_FTRS_7400, 908 .cpu_user_features = COMMON_USER | 909 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 910 .mmu_features = MMU_FTR_HPTE_TABLE, 911 .icache_bsize = 32, 912 .dcache_bsize = 32, 913 .num_pmcs = 4, 914 .pmc_type = PPC_PMC_G4, 915 .cpu_setup = __setup_cpu_7410, 916 .machine_check = machine_check_generic, 917 .platform = "ppc7400", 918 }, 919 { /* 7450 2.0 - no doze/nap */ 920 .pvr_mask = 0xffffffff, 921 .pvr_value = 0x80000200, 922 .cpu_name = "7450", 923 .cpu_features = CPU_FTRS_7450_20, 924 .cpu_user_features = COMMON_USER | 925 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 926 .mmu_features = MMU_FTR_HPTE_TABLE, 927 .icache_bsize = 32, 928 .dcache_bsize = 32, 929 .num_pmcs = 6, 930 .pmc_type = PPC_PMC_G4, 931 .cpu_setup = __setup_cpu_745x, 932 .oprofile_cpu_type = "ppc/7450", 933 .oprofile_type = PPC_OPROFILE_G4, 934 .machine_check = machine_check_generic, 935 .platform = "ppc7450", 936 }, 937 { /* 7450 2.1 */ 938 .pvr_mask = 0xffffffff, 939 .pvr_value = 0x80000201, 940 .cpu_name = "7450", 941 .cpu_features = CPU_FTRS_7450_21, 942 .cpu_user_features = COMMON_USER | 943 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 944 .mmu_features = MMU_FTR_HPTE_TABLE, 945 .icache_bsize = 32, 946 .dcache_bsize = 32, 947 .num_pmcs = 6, 948 .pmc_type = PPC_PMC_G4, 949 .cpu_setup = __setup_cpu_745x, 950 .oprofile_cpu_type = "ppc/7450", 951 .oprofile_type = PPC_OPROFILE_G4, 952 .machine_check = machine_check_generic, 953 .platform = "ppc7450", 954 }, 955 { /* 7450 2.3 and newer */ 956 .pvr_mask = 0xffff0000, 957 .pvr_value = 0x80000000, 958 .cpu_name = "7450", 959 .cpu_features = CPU_FTRS_7450_23, 960 .cpu_user_features = COMMON_USER | 961 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 962 .mmu_features = MMU_FTR_HPTE_TABLE, 963 .icache_bsize = 32, 964 .dcache_bsize = 32, 965 .num_pmcs = 6, 966 .pmc_type = PPC_PMC_G4, 967 .cpu_setup = __setup_cpu_745x, 968 .oprofile_cpu_type = "ppc/7450", 969 .oprofile_type = PPC_OPROFILE_G4, 970 .machine_check = machine_check_generic, 971 .platform = "ppc7450", 972 }, 973 { /* 7455 rev 1.x */ 974 .pvr_mask = 0xffffff00, 975 .pvr_value = 0x80010100, 976 .cpu_name = "7455", 977 .cpu_features = CPU_FTRS_7455_1, 978 .cpu_user_features = COMMON_USER | 979 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 980 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 981 .icache_bsize = 32, 982 .dcache_bsize = 32, 983 .num_pmcs = 6, 984 .pmc_type = PPC_PMC_G4, 985 .cpu_setup = __setup_cpu_745x, 986 .oprofile_cpu_type = "ppc/7450", 987 .oprofile_type = PPC_OPROFILE_G4, 988 .machine_check = machine_check_generic, 989 .platform = "ppc7450", 990 }, 991 { /* 7455 rev 2.0 */ 992 .pvr_mask = 0xffffffff, 993 .pvr_value = 0x80010200, 994 .cpu_name = "7455", 995 .cpu_features = CPU_FTRS_7455_20, 996 .cpu_user_features = COMMON_USER | 997 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 998 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 999 .icache_bsize = 32, 1000 .dcache_bsize = 32, 1001 .num_pmcs = 6, 1002 .pmc_type = PPC_PMC_G4, 1003 .cpu_setup = __setup_cpu_745x, 1004 .oprofile_cpu_type = "ppc/7450", 1005 .oprofile_type = PPC_OPROFILE_G4, 1006 .machine_check = machine_check_generic, 1007 .platform = "ppc7450", 1008 }, 1009 { /* 7455 others */ 1010 .pvr_mask = 0xffff0000, 1011 .pvr_value = 0x80010000, 1012 .cpu_name = "7455", 1013 .cpu_features = CPU_FTRS_7455, 1014 .cpu_user_features = COMMON_USER | 1015 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1016 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1017 .icache_bsize = 32, 1018 .dcache_bsize = 32, 1019 .num_pmcs = 6, 1020 .pmc_type = PPC_PMC_G4, 1021 .cpu_setup = __setup_cpu_745x, 1022 .oprofile_cpu_type = "ppc/7450", 1023 .oprofile_type = PPC_OPROFILE_G4, 1024 .machine_check = machine_check_generic, 1025 .platform = "ppc7450", 1026 }, 1027 { /* 7447/7457 Rev 1.0 */ 1028 .pvr_mask = 0xffffffff, 1029 .pvr_value = 0x80020100, 1030 .cpu_name = "7447/7457", 1031 .cpu_features = CPU_FTRS_7447_10, 1032 .cpu_user_features = COMMON_USER | 1033 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1034 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1035 .icache_bsize = 32, 1036 .dcache_bsize = 32, 1037 .num_pmcs = 6, 1038 .pmc_type = PPC_PMC_G4, 1039 .cpu_setup = __setup_cpu_745x, 1040 .oprofile_cpu_type = "ppc/7450", 1041 .oprofile_type = PPC_OPROFILE_G4, 1042 .machine_check = machine_check_generic, 1043 .platform = "ppc7450", 1044 }, 1045 { /* 7447/7457 Rev 1.1 */ 1046 .pvr_mask = 0xffffffff, 1047 .pvr_value = 0x80020101, 1048 .cpu_name = "7447/7457", 1049 .cpu_features = CPU_FTRS_7447_10, 1050 .cpu_user_features = COMMON_USER | 1051 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1052 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1053 .icache_bsize = 32, 1054 .dcache_bsize = 32, 1055 .num_pmcs = 6, 1056 .pmc_type = PPC_PMC_G4, 1057 .cpu_setup = __setup_cpu_745x, 1058 .oprofile_cpu_type = "ppc/7450", 1059 .oprofile_type = PPC_OPROFILE_G4, 1060 .machine_check = machine_check_generic, 1061 .platform = "ppc7450", 1062 }, 1063 { /* 7447/7457 Rev 1.2 and later */ 1064 .pvr_mask = 0xffff0000, 1065 .pvr_value = 0x80020000, 1066 .cpu_name = "7447/7457", 1067 .cpu_features = CPU_FTRS_7447, 1068 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1069 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1070 .icache_bsize = 32, 1071 .dcache_bsize = 32, 1072 .num_pmcs = 6, 1073 .pmc_type = PPC_PMC_G4, 1074 .cpu_setup = __setup_cpu_745x, 1075 .oprofile_cpu_type = "ppc/7450", 1076 .oprofile_type = PPC_OPROFILE_G4, 1077 .machine_check = machine_check_generic, 1078 .platform = "ppc7450", 1079 }, 1080 { /* 7447A */ 1081 .pvr_mask = 0xffff0000, 1082 .pvr_value = 0x80030000, 1083 .cpu_name = "7447A", 1084 .cpu_features = CPU_FTRS_7447A, 1085 .cpu_user_features = COMMON_USER | 1086 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1087 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1088 .icache_bsize = 32, 1089 .dcache_bsize = 32, 1090 .num_pmcs = 6, 1091 .pmc_type = PPC_PMC_G4, 1092 .cpu_setup = __setup_cpu_745x, 1093 .oprofile_cpu_type = "ppc/7450", 1094 .oprofile_type = PPC_OPROFILE_G4, 1095 .machine_check = machine_check_generic, 1096 .platform = "ppc7450", 1097 }, 1098 { /* 7448 */ 1099 .pvr_mask = 0xffff0000, 1100 .pvr_value = 0x80040000, 1101 .cpu_name = "7448", 1102 .cpu_features = CPU_FTRS_7448, 1103 .cpu_user_features = COMMON_USER | 1104 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1105 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1106 .icache_bsize = 32, 1107 .dcache_bsize = 32, 1108 .num_pmcs = 6, 1109 .pmc_type = PPC_PMC_G4, 1110 .cpu_setup = __setup_cpu_745x, 1111 .oprofile_cpu_type = "ppc/7450", 1112 .oprofile_type = PPC_OPROFILE_G4, 1113 .machine_check = machine_check_generic, 1114 .platform = "ppc7450", 1115 }, 1116 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1117 .pvr_mask = 0x7fff0000, 1118 .pvr_value = 0x00810000, 1119 .cpu_name = "82xx", 1120 .cpu_features = CPU_FTRS_82XX, 1121 .cpu_user_features = COMMON_USER, 1122 .mmu_features = 0, 1123 .icache_bsize = 32, 1124 .dcache_bsize = 32, 1125 .cpu_setup = __setup_cpu_603, 1126 .machine_check = machine_check_generic, 1127 .platform = "ppc603", 1128 }, 1129 { /* All G2_LE (603e core, plus some) have the same pvr */ 1130 .pvr_mask = 0x7fff0000, 1131 .pvr_value = 0x00820000, 1132 .cpu_name = "G2_LE", 1133 .cpu_features = CPU_FTRS_G2_LE, 1134 .cpu_user_features = COMMON_USER, 1135 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1136 .icache_bsize = 32, 1137 .dcache_bsize = 32, 1138 .cpu_setup = __setup_cpu_603, 1139 .machine_check = machine_check_generic, 1140 .platform = "ppc603", 1141 }, 1142 #ifdef CONFIG_PPC_83xx 1143 { /* e300c1 (a 603e core, plus some) on 83xx */ 1144 .pvr_mask = 0x7fff0000, 1145 .pvr_value = 0x00830000, 1146 .cpu_name = "e300c1", 1147 .cpu_features = CPU_FTRS_E300, 1148 .cpu_user_features = COMMON_USER, 1149 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1150 .icache_bsize = 32, 1151 .dcache_bsize = 32, 1152 .cpu_setup = __setup_cpu_603, 1153 .machine_check = machine_check_83xx, 1154 .platform = "ppc603", 1155 }, 1156 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1157 .pvr_mask = 0x7fff0000, 1158 .pvr_value = 0x00840000, 1159 .cpu_name = "e300c2", 1160 .cpu_features = CPU_FTRS_E300C2, 1161 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1162 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1163 MMU_FTR_NEED_DTLB_SW_LRU, 1164 .icache_bsize = 32, 1165 .dcache_bsize = 32, 1166 .cpu_setup = __setup_cpu_603, 1167 .machine_check = machine_check_83xx, 1168 .platform = "ppc603", 1169 }, 1170 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1171 .pvr_mask = 0x7fff0000, 1172 .pvr_value = 0x00850000, 1173 .cpu_name = "e300c3", 1174 .cpu_features = CPU_FTRS_E300, 1175 .cpu_user_features = COMMON_USER, 1176 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1177 MMU_FTR_NEED_DTLB_SW_LRU, 1178 .icache_bsize = 32, 1179 .dcache_bsize = 32, 1180 .cpu_setup = __setup_cpu_603, 1181 .machine_check = machine_check_83xx, 1182 .num_pmcs = 4, 1183 .oprofile_cpu_type = "ppc/e300", 1184 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1185 .platform = "ppc603", 1186 }, 1187 { /* e300c4 (e300c1, plus one IU) */ 1188 .pvr_mask = 0x7fff0000, 1189 .pvr_value = 0x00860000, 1190 .cpu_name = "e300c4", 1191 .cpu_features = CPU_FTRS_E300, 1192 .cpu_user_features = COMMON_USER, 1193 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1194 MMU_FTR_NEED_DTLB_SW_LRU, 1195 .icache_bsize = 32, 1196 .dcache_bsize = 32, 1197 .cpu_setup = __setup_cpu_603, 1198 .machine_check = machine_check_83xx, 1199 .num_pmcs = 4, 1200 .oprofile_cpu_type = "ppc/e300", 1201 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1202 .platform = "ppc603", 1203 }, 1204 #endif 1205 { /* default match, we assume split I/D cache & TB (non-601)... */ 1206 .pvr_mask = 0x00000000, 1207 .pvr_value = 0x00000000, 1208 .cpu_name = "(generic PPC)", 1209 .cpu_features = CPU_FTRS_CLASSIC32, 1210 .cpu_user_features = COMMON_USER, 1211 .mmu_features = MMU_FTR_HPTE_TABLE, 1212 .icache_bsize = 32, 1213 .dcache_bsize = 32, 1214 .machine_check = machine_check_generic, 1215 .platform = "ppc603", 1216 }, 1217 #endif /* CONFIG_PPC_BOOK3S_6xx */ 1218 #ifdef CONFIG_PPC_8xx 1219 { /* 8xx */ 1220 .pvr_mask = 0xffff0000, 1221 .pvr_value = PVR_8xx, 1222 .cpu_name = "8xx", 1223 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1224 * if the 8xx code is there.... */ 1225 .cpu_features = CPU_FTRS_8XX, 1226 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1227 .mmu_features = MMU_FTR_TYPE_8xx, 1228 .icache_bsize = 16, 1229 .dcache_bsize = 16, 1230 .machine_check = machine_check_8xx, 1231 .platform = "ppc823", 1232 }, 1233 #endif /* CONFIG_PPC_8xx */ 1234 #ifdef CONFIG_40x 1235 { /* 403GC */ 1236 .pvr_mask = 0xffffff00, 1237 .pvr_value = 0x00200200, 1238 .cpu_name = "403GC", 1239 .cpu_features = CPU_FTRS_40X, 1240 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1241 .mmu_features = MMU_FTR_TYPE_40x, 1242 .icache_bsize = 16, 1243 .dcache_bsize = 16, 1244 .machine_check = machine_check_4xx, 1245 .platform = "ppc403", 1246 }, 1247 { /* 403GCX */ 1248 .pvr_mask = 0xffffff00, 1249 .pvr_value = 0x00201400, 1250 .cpu_name = "403GCX", 1251 .cpu_features = CPU_FTRS_40X, 1252 .cpu_user_features = PPC_FEATURE_32 | 1253 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1254 .mmu_features = MMU_FTR_TYPE_40x, 1255 .icache_bsize = 16, 1256 .dcache_bsize = 16, 1257 .machine_check = machine_check_4xx, 1258 .platform = "ppc403", 1259 }, 1260 { /* 403G ?? */ 1261 .pvr_mask = 0xffff0000, 1262 .pvr_value = 0x00200000, 1263 .cpu_name = "403G ??", 1264 .cpu_features = CPU_FTRS_40X, 1265 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1266 .mmu_features = MMU_FTR_TYPE_40x, 1267 .icache_bsize = 16, 1268 .dcache_bsize = 16, 1269 .machine_check = machine_check_4xx, 1270 .platform = "ppc403", 1271 }, 1272 { /* 405GP */ 1273 .pvr_mask = 0xffff0000, 1274 .pvr_value = 0x40110000, 1275 .cpu_name = "405GP", 1276 .cpu_features = CPU_FTRS_40X, 1277 .cpu_user_features = PPC_FEATURE_32 | 1278 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1279 .mmu_features = MMU_FTR_TYPE_40x, 1280 .icache_bsize = 32, 1281 .dcache_bsize = 32, 1282 .machine_check = machine_check_4xx, 1283 .platform = "ppc405", 1284 }, 1285 { /* STB 03xxx */ 1286 .pvr_mask = 0xffff0000, 1287 .pvr_value = 0x40130000, 1288 .cpu_name = "STB03xxx", 1289 .cpu_features = CPU_FTRS_40X, 1290 .cpu_user_features = PPC_FEATURE_32 | 1291 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1292 .mmu_features = MMU_FTR_TYPE_40x, 1293 .icache_bsize = 32, 1294 .dcache_bsize = 32, 1295 .machine_check = machine_check_4xx, 1296 .platform = "ppc405", 1297 }, 1298 { /* STB 04xxx */ 1299 .pvr_mask = 0xffff0000, 1300 .pvr_value = 0x41810000, 1301 .cpu_name = "STB04xxx", 1302 .cpu_features = CPU_FTRS_40X, 1303 .cpu_user_features = PPC_FEATURE_32 | 1304 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1305 .mmu_features = MMU_FTR_TYPE_40x, 1306 .icache_bsize = 32, 1307 .dcache_bsize = 32, 1308 .machine_check = machine_check_4xx, 1309 .platform = "ppc405", 1310 }, 1311 { /* NP405L */ 1312 .pvr_mask = 0xffff0000, 1313 .pvr_value = 0x41610000, 1314 .cpu_name = "NP405L", 1315 .cpu_features = CPU_FTRS_40X, 1316 .cpu_user_features = PPC_FEATURE_32 | 1317 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1318 .mmu_features = MMU_FTR_TYPE_40x, 1319 .icache_bsize = 32, 1320 .dcache_bsize = 32, 1321 .machine_check = machine_check_4xx, 1322 .platform = "ppc405", 1323 }, 1324 { /* NP4GS3 */ 1325 .pvr_mask = 0xffff0000, 1326 .pvr_value = 0x40B10000, 1327 .cpu_name = "NP4GS3", 1328 .cpu_features = CPU_FTRS_40X, 1329 .cpu_user_features = PPC_FEATURE_32 | 1330 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1331 .mmu_features = MMU_FTR_TYPE_40x, 1332 .icache_bsize = 32, 1333 .dcache_bsize = 32, 1334 .machine_check = machine_check_4xx, 1335 .platform = "ppc405", 1336 }, 1337 { /* NP405H */ 1338 .pvr_mask = 0xffff0000, 1339 .pvr_value = 0x41410000, 1340 .cpu_name = "NP405H", 1341 .cpu_features = CPU_FTRS_40X, 1342 .cpu_user_features = PPC_FEATURE_32 | 1343 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1344 .mmu_features = MMU_FTR_TYPE_40x, 1345 .icache_bsize = 32, 1346 .dcache_bsize = 32, 1347 .machine_check = machine_check_4xx, 1348 .platform = "ppc405", 1349 }, 1350 { /* 405GPr */ 1351 .pvr_mask = 0xffff0000, 1352 .pvr_value = 0x50910000, 1353 .cpu_name = "405GPr", 1354 .cpu_features = CPU_FTRS_40X, 1355 .cpu_user_features = PPC_FEATURE_32 | 1356 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1357 .mmu_features = MMU_FTR_TYPE_40x, 1358 .icache_bsize = 32, 1359 .dcache_bsize = 32, 1360 .machine_check = machine_check_4xx, 1361 .platform = "ppc405", 1362 }, 1363 { /* STBx25xx */ 1364 .pvr_mask = 0xffff0000, 1365 .pvr_value = 0x51510000, 1366 .cpu_name = "STBx25xx", 1367 .cpu_features = CPU_FTRS_40X, 1368 .cpu_user_features = PPC_FEATURE_32 | 1369 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1370 .mmu_features = MMU_FTR_TYPE_40x, 1371 .icache_bsize = 32, 1372 .dcache_bsize = 32, 1373 .machine_check = machine_check_4xx, 1374 .platform = "ppc405", 1375 }, 1376 { /* 405LP */ 1377 .pvr_mask = 0xffff0000, 1378 .pvr_value = 0x41F10000, 1379 .cpu_name = "405LP", 1380 .cpu_features = CPU_FTRS_40X, 1381 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1382 .mmu_features = MMU_FTR_TYPE_40x, 1383 .icache_bsize = 32, 1384 .dcache_bsize = 32, 1385 .machine_check = machine_check_4xx, 1386 .platform = "ppc405", 1387 }, 1388 { /* Xilinx Virtex-II Pro */ 1389 .pvr_mask = 0xfffff000, 1390 .pvr_value = 0x20010000, 1391 .cpu_name = "Virtex-II Pro", 1392 .cpu_features = CPU_FTRS_40X, 1393 .cpu_user_features = PPC_FEATURE_32 | 1394 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1395 .mmu_features = MMU_FTR_TYPE_40x, 1396 .icache_bsize = 32, 1397 .dcache_bsize = 32, 1398 .machine_check = machine_check_4xx, 1399 .platform = "ppc405", 1400 }, 1401 { /* Xilinx Virtex-4 FX */ 1402 .pvr_mask = 0xfffff000, 1403 .pvr_value = 0x20011000, 1404 .cpu_name = "Virtex-4 FX", 1405 .cpu_features = CPU_FTRS_40X, 1406 .cpu_user_features = PPC_FEATURE_32 | 1407 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1408 .mmu_features = MMU_FTR_TYPE_40x, 1409 .icache_bsize = 32, 1410 .dcache_bsize = 32, 1411 .machine_check = machine_check_4xx, 1412 .platform = "ppc405", 1413 }, 1414 { /* 405EP */ 1415 .pvr_mask = 0xffff0000, 1416 .pvr_value = 0x51210000, 1417 .cpu_name = "405EP", 1418 .cpu_features = CPU_FTRS_40X, 1419 .cpu_user_features = PPC_FEATURE_32 | 1420 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1421 .mmu_features = MMU_FTR_TYPE_40x, 1422 .icache_bsize = 32, 1423 .dcache_bsize = 32, 1424 .machine_check = machine_check_4xx, 1425 .platform = "ppc405", 1426 }, 1427 { /* 405EX Rev. A/B with Security */ 1428 .pvr_mask = 0xffff000f, 1429 .pvr_value = 0x12910007, 1430 .cpu_name = "405EX Rev. A/B", 1431 .cpu_features = CPU_FTRS_40X, 1432 .cpu_user_features = PPC_FEATURE_32 | 1433 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1434 .mmu_features = MMU_FTR_TYPE_40x, 1435 .icache_bsize = 32, 1436 .dcache_bsize = 32, 1437 .machine_check = machine_check_4xx, 1438 .platform = "ppc405", 1439 }, 1440 { /* 405EX Rev. C without Security */ 1441 .pvr_mask = 0xffff000f, 1442 .pvr_value = 0x1291000d, 1443 .cpu_name = "405EX Rev. C", 1444 .cpu_features = CPU_FTRS_40X, 1445 .cpu_user_features = PPC_FEATURE_32 | 1446 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1447 .mmu_features = MMU_FTR_TYPE_40x, 1448 .icache_bsize = 32, 1449 .dcache_bsize = 32, 1450 .machine_check = machine_check_4xx, 1451 .platform = "ppc405", 1452 }, 1453 { /* 405EX Rev. C with Security */ 1454 .pvr_mask = 0xffff000f, 1455 .pvr_value = 0x1291000f, 1456 .cpu_name = "405EX Rev. C", 1457 .cpu_features = CPU_FTRS_40X, 1458 .cpu_user_features = PPC_FEATURE_32 | 1459 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1460 .mmu_features = MMU_FTR_TYPE_40x, 1461 .icache_bsize = 32, 1462 .dcache_bsize = 32, 1463 .machine_check = machine_check_4xx, 1464 .platform = "ppc405", 1465 }, 1466 { /* 405EX Rev. D without Security */ 1467 .pvr_mask = 0xffff000f, 1468 .pvr_value = 0x12910003, 1469 .cpu_name = "405EX Rev. D", 1470 .cpu_features = CPU_FTRS_40X, 1471 .cpu_user_features = PPC_FEATURE_32 | 1472 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1473 .mmu_features = MMU_FTR_TYPE_40x, 1474 .icache_bsize = 32, 1475 .dcache_bsize = 32, 1476 .machine_check = machine_check_4xx, 1477 .platform = "ppc405", 1478 }, 1479 { /* 405EX Rev. D with Security */ 1480 .pvr_mask = 0xffff000f, 1481 .pvr_value = 0x12910005, 1482 .cpu_name = "405EX Rev. D", 1483 .cpu_features = CPU_FTRS_40X, 1484 .cpu_user_features = PPC_FEATURE_32 | 1485 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1486 .mmu_features = MMU_FTR_TYPE_40x, 1487 .icache_bsize = 32, 1488 .dcache_bsize = 32, 1489 .machine_check = machine_check_4xx, 1490 .platform = "ppc405", 1491 }, 1492 { /* 405EXr Rev. A/B without Security */ 1493 .pvr_mask = 0xffff000f, 1494 .pvr_value = 0x12910001, 1495 .cpu_name = "405EXr Rev. A/B", 1496 .cpu_features = CPU_FTRS_40X, 1497 .cpu_user_features = PPC_FEATURE_32 | 1498 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1499 .mmu_features = MMU_FTR_TYPE_40x, 1500 .icache_bsize = 32, 1501 .dcache_bsize = 32, 1502 .machine_check = machine_check_4xx, 1503 .platform = "ppc405", 1504 }, 1505 { /* 405EXr Rev. C without Security */ 1506 .pvr_mask = 0xffff000f, 1507 .pvr_value = 0x12910009, 1508 .cpu_name = "405EXr Rev. C", 1509 .cpu_features = CPU_FTRS_40X, 1510 .cpu_user_features = PPC_FEATURE_32 | 1511 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1512 .mmu_features = MMU_FTR_TYPE_40x, 1513 .icache_bsize = 32, 1514 .dcache_bsize = 32, 1515 .machine_check = machine_check_4xx, 1516 .platform = "ppc405", 1517 }, 1518 { /* 405EXr Rev. C with Security */ 1519 .pvr_mask = 0xffff000f, 1520 .pvr_value = 0x1291000b, 1521 .cpu_name = "405EXr Rev. C", 1522 .cpu_features = CPU_FTRS_40X, 1523 .cpu_user_features = PPC_FEATURE_32 | 1524 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1525 .mmu_features = MMU_FTR_TYPE_40x, 1526 .icache_bsize = 32, 1527 .dcache_bsize = 32, 1528 .machine_check = machine_check_4xx, 1529 .platform = "ppc405", 1530 }, 1531 { /* 405EXr Rev. D without Security */ 1532 .pvr_mask = 0xffff000f, 1533 .pvr_value = 0x12910000, 1534 .cpu_name = "405EXr Rev. D", 1535 .cpu_features = CPU_FTRS_40X, 1536 .cpu_user_features = PPC_FEATURE_32 | 1537 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1538 .mmu_features = MMU_FTR_TYPE_40x, 1539 .icache_bsize = 32, 1540 .dcache_bsize = 32, 1541 .machine_check = machine_check_4xx, 1542 .platform = "ppc405", 1543 }, 1544 { /* 405EXr Rev. D with Security */ 1545 .pvr_mask = 0xffff000f, 1546 .pvr_value = 0x12910002, 1547 .cpu_name = "405EXr Rev. D", 1548 .cpu_features = CPU_FTRS_40X, 1549 .cpu_user_features = PPC_FEATURE_32 | 1550 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1551 .mmu_features = MMU_FTR_TYPE_40x, 1552 .icache_bsize = 32, 1553 .dcache_bsize = 32, 1554 .machine_check = machine_check_4xx, 1555 .platform = "ppc405", 1556 }, 1557 { 1558 /* 405EZ */ 1559 .pvr_mask = 0xffff0000, 1560 .pvr_value = 0x41510000, 1561 .cpu_name = "405EZ", 1562 .cpu_features = CPU_FTRS_40X, 1563 .cpu_user_features = PPC_FEATURE_32 | 1564 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1565 .mmu_features = MMU_FTR_TYPE_40x, 1566 .icache_bsize = 32, 1567 .dcache_bsize = 32, 1568 .machine_check = machine_check_4xx, 1569 .platform = "ppc405", 1570 }, 1571 { /* APM8018X */ 1572 .pvr_mask = 0xffff0000, 1573 .pvr_value = 0x7ff11432, 1574 .cpu_name = "APM8018X", 1575 .cpu_features = CPU_FTRS_40X, 1576 .cpu_user_features = PPC_FEATURE_32 | 1577 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1578 .mmu_features = MMU_FTR_TYPE_40x, 1579 .icache_bsize = 32, 1580 .dcache_bsize = 32, 1581 .machine_check = machine_check_4xx, 1582 .platform = "ppc405", 1583 }, 1584 { /* default match */ 1585 .pvr_mask = 0x00000000, 1586 .pvr_value = 0x00000000, 1587 .cpu_name = "(generic 40x PPC)", 1588 .cpu_features = CPU_FTRS_40X, 1589 .cpu_user_features = PPC_FEATURE_32 | 1590 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1591 .mmu_features = MMU_FTR_TYPE_40x, 1592 .icache_bsize = 32, 1593 .dcache_bsize = 32, 1594 .machine_check = machine_check_4xx, 1595 .platform = "ppc405", 1596 } 1597 1598 #endif /* CONFIG_40x */ 1599 #ifdef CONFIG_44x 1600 { 1601 .pvr_mask = 0xf0000fff, 1602 .pvr_value = 0x40000850, 1603 .cpu_name = "440GR Rev. A", 1604 .cpu_features = CPU_FTRS_44X, 1605 .cpu_user_features = COMMON_USER_BOOKE, 1606 .mmu_features = MMU_FTR_TYPE_44x, 1607 .icache_bsize = 32, 1608 .dcache_bsize = 32, 1609 .machine_check = machine_check_4xx, 1610 .platform = "ppc440", 1611 }, 1612 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1613 .pvr_mask = 0xf0000fff, 1614 .pvr_value = 0x40000858, 1615 .cpu_name = "440EP Rev. A", 1616 .cpu_features = CPU_FTRS_44X, 1617 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1618 .mmu_features = MMU_FTR_TYPE_44x, 1619 .icache_bsize = 32, 1620 .dcache_bsize = 32, 1621 .cpu_setup = __setup_cpu_440ep, 1622 .machine_check = machine_check_4xx, 1623 .platform = "ppc440", 1624 }, 1625 { 1626 .pvr_mask = 0xf0000fff, 1627 .pvr_value = 0x400008d3, 1628 .cpu_name = "440GR Rev. B", 1629 .cpu_features = CPU_FTRS_44X, 1630 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1631 .mmu_features = MMU_FTR_TYPE_44x, 1632 .icache_bsize = 32, 1633 .dcache_bsize = 32, 1634 .machine_check = machine_check_4xx, 1635 .platform = "ppc440", 1636 }, 1637 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1638 .pvr_mask = 0xf0000ff7, 1639 .pvr_value = 0x400008d4, 1640 .cpu_name = "440EP Rev. C", 1641 .cpu_features = CPU_FTRS_44X, 1642 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1643 .mmu_features = MMU_FTR_TYPE_44x, 1644 .icache_bsize = 32, 1645 .dcache_bsize = 32, 1646 .cpu_setup = __setup_cpu_440ep, 1647 .machine_check = machine_check_4xx, 1648 .platform = "ppc440", 1649 }, 1650 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1651 .pvr_mask = 0xf0000fff, 1652 .pvr_value = 0x400008db, 1653 .cpu_name = "440EP Rev. B", 1654 .cpu_features = CPU_FTRS_44X, 1655 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1656 .mmu_features = MMU_FTR_TYPE_44x, 1657 .icache_bsize = 32, 1658 .dcache_bsize = 32, 1659 .cpu_setup = __setup_cpu_440ep, 1660 .machine_check = machine_check_4xx, 1661 .platform = "ppc440", 1662 }, 1663 { /* 440GRX */ 1664 .pvr_mask = 0xf0000ffb, 1665 .pvr_value = 0x200008D0, 1666 .cpu_name = "440GRX", 1667 .cpu_features = CPU_FTRS_44X, 1668 .cpu_user_features = COMMON_USER_BOOKE, 1669 .mmu_features = MMU_FTR_TYPE_44x, 1670 .icache_bsize = 32, 1671 .dcache_bsize = 32, 1672 .cpu_setup = __setup_cpu_440grx, 1673 .machine_check = machine_check_440A, 1674 .platform = "ppc440", 1675 }, 1676 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1677 .pvr_mask = 0xf0000ffb, 1678 .pvr_value = 0x200008D8, 1679 .cpu_name = "440EPX", 1680 .cpu_features = CPU_FTRS_44X, 1681 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1682 .mmu_features = MMU_FTR_TYPE_44x, 1683 .icache_bsize = 32, 1684 .dcache_bsize = 32, 1685 .cpu_setup = __setup_cpu_440epx, 1686 .machine_check = machine_check_440A, 1687 .platform = "ppc440", 1688 }, 1689 { /* 440GP Rev. B */ 1690 .pvr_mask = 0xf0000fff, 1691 .pvr_value = 0x40000440, 1692 .cpu_name = "440GP Rev. B", 1693 .cpu_features = CPU_FTRS_44X, 1694 .cpu_user_features = COMMON_USER_BOOKE, 1695 .mmu_features = MMU_FTR_TYPE_44x, 1696 .icache_bsize = 32, 1697 .dcache_bsize = 32, 1698 .machine_check = machine_check_4xx, 1699 .platform = "ppc440gp", 1700 }, 1701 { /* 440GP Rev. C */ 1702 .pvr_mask = 0xf0000fff, 1703 .pvr_value = 0x40000481, 1704 .cpu_name = "440GP Rev. C", 1705 .cpu_features = CPU_FTRS_44X, 1706 .cpu_user_features = COMMON_USER_BOOKE, 1707 .mmu_features = MMU_FTR_TYPE_44x, 1708 .icache_bsize = 32, 1709 .dcache_bsize = 32, 1710 .machine_check = machine_check_4xx, 1711 .platform = "ppc440gp", 1712 }, 1713 { /* 440GX Rev. A */ 1714 .pvr_mask = 0xf0000fff, 1715 .pvr_value = 0x50000850, 1716 .cpu_name = "440GX Rev. A", 1717 .cpu_features = CPU_FTRS_44X, 1718 .cpu_user_features = COMMON_USER_BOOKE, 1719 .mmu_features = MMU_FTR_TYPE_44x, 1720 .icache_bsize = 32, 1721 .dcache_bsize = 32, 1722 .cpu_setup = __setup_cpu_440gx, 1723 .machine_check = machine_check_440A, 1724 .platform = "ppc440", 1725 }, 1726 { /* 440GX Rev. B */ 1727 .pvr_mask = 0xf0000fff, 1728 .pvr_value = 0x50000851, 1729 .cpu_name = "440GX Rev. B", 1730 .cpu_features = CPU_FTRS_44X, 1731 .cpu_user_features = COMMON_USER_BOOKE, 1732 .mmu_features = MMU_FTR_TYPE_44x, 1733 .icache_bsize = 32, 1734 .dcache_bsize = 32, 1735 .cpu_setup = __setup_cpu_440gx, 1736 .machine_check = machine_check_440A, 1737 .platform = "ppc440", 1738 }, 1739 { /* 440GX Rev. C */ 1740 .pvr_mask = 0xf0000fff, 1741 .pvr_value = 0x50000892, 1742 .cpu_name = "440GX Rev. C", 1743 .cpu_features = CPU_FTRS_44X, 1744 .cpu_user_features = COMMON_USER_BOOKE, 1745 .mmu_features = MMU_FTR_TYPE_44x, 1746 .icache_bsize = 32, 1747 .dcache_bsize = 32, 1748 .cpu_setup = __setup_cpu_440gx, 1749 .machine_check = machine_check_440A, 1750 .platform = "ppc440", 1751 }, 1752 { /* 440GX Rev. F */ 1753 .pvr_mask = 0xf0000fff, 1754 .pvr_value = 0x50000894, 1755 .cpu_name = "440GX Rev. F", 1756 .cpu_features = CPU_FTRS_44X, 1757 .cpu_user_features = COMMON_USER_BOOKE, 1758 .mmu_features = MMU_FTR_TYPE_44x, 1759 .icache_bsize = 32, 1760 .dcache_bsize = 32, 1761 .cpu_setup = __setup_cpu_440gx, 1762 .machine_check = machine_check_440A, 1763 .platform = "ppc440", 1764 }, 1765 { /* 440SP Rev. A */ 1766 .pvr_mask = 0xfff00fff, 1767 .pvr_value = 0x53200891, 1768 .cpu_name = "440SP Rev. A", 1769 .cpu_features = CPU_FTRS_44X, 1770 .cpu_user_features = COMMON_USER_BOOKE, 1771 .mmu_features = MMU_FTR_TYPE_44x, 1772 .icache_bsize = 32, 1773 .dcache_bsize = 32, 1774 .machine_check = machine_check_4xx, 1775 .platform = "ppc440", 1776 }, 1777 { /* 440SPe Rev. A */ 1778 .pvr_mask = 0xfff00fff, 1779 .pvr_value = 0x53400890, 1780 .cpu_name = "440SPe Rev. A", 1781 .cpu_features = CPU_FTRS_44X, 1782 .cpu_user_features = COMMON_USER_BOOKE, 1783 .mmu_features = MMU_FTR_TYPE_44x, 1784 .icache_bsize = 32, 1785 .dcache_bsize = 32, 1786 .cpu_setup = __setup_cpu_440spe, 1787 .machine_check = machine_check_440A, 1788 .platform = "ppc440", 1789 }, 1790 { /* 440SPe Rev. B */ 1791 .pvr_mask = 0xfff00fff, 1792 .pvr_value = 0x53400891, 1793 .cpu_name = "440SPe Rev. B", 1794 .cpu_features = CPU_FTRS_44X, 1795 .cpu_user_features = COMMON_USER_BOOKE, 1796 .mmu_features = MMU_FTR_TYPE_44x, 1797 .icache_bsize = 32, 1798 .dcache_bsize = 32, 1799 .cpu_setup = __setup_cpu_440spe, 1800 .machine_check = machine_check_440A, 1801 .platform = "ppc440", 1802 }, 1803 { /* 440 in Xilinx Virtex-5 FXT */ 1804 .pvr_mask = 0xfffffff0, 1805 .pvr_value = 0x7ff21910, 1806 .cpu_name = "440 in Virtex-5 FXT", 1807 .cpu_features = CPU_FTRS_44X, 1808 .cpu_user_features = COMMON_USER_BOOKE, 1809 .mmu_features = MMU_FTR_TYPE_44x, 1810 .icache_bsize = 32, 1811 .dcache_bsize = 32, 1812 .cpu_setup = __setup_cpu_440x5, 1813 .machine_check = machine_check_440A, 1814 .platform = "ppc440", 1815 }, 1816 { /* 460EX */ 1817 .pvr_mask = 0xffff0006, 1818 .pvr_value = 0x13020002, 1819 .cpu_name = "460EX", 1820 .cpu_features = CPU_FTRS_440x6, 1821 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1822 .mmu_features = MMU_FTR_TYPE_44x, 1823 .icache_bsize = 32, 1824 .dcache_bsize = 32, 1825 .cpu_setup = __setup_cpu_460ex, 1826 .machine_check = machine_check_440A, 1827 .platform = "ppc440", 1828 }, 1829 { /* 460EX Rev B */ 1830 .pvr_mask = 0xffff0007, 1831 .pvr_value = 0x13020004, 1832 .cpu_name = "460EX Rev. B", 1833 .cpu_features = CPU_FTRS_440x6, 1834 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1835 .mmu_features = MMU_FTR_TYPE_44x, 1836 .icache_bsize = 32, 1837 .dcache_bsize = 32, 1838 .cpu_setup = __setup_cpu_460ex, 1839 .machine_check = machine_check_440A, 1840 .platform = "ppc440", 1841 }, 1842 { /* 460GT */ 1843 .pvr_mask = 0xffff0006, 1844 .pvr_value = 0x13020000, 1845 .cpu_name = "460GT", 1846 .cpu_features = CPU_FTRS_440x6, 1847 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1848 .mmu_features = MMU_FTR_TYPE_44x, 1849 .icache_bsize = 32, 1850 .dcache_bsize = 32, 1851 .cpu_setup = __setup_cpu_460gt, 1852 .machine_check = machine_check_440A, 1853 .platform = "ppc440", 1854 }, 1855 { /* 460GT Rev B */ 1856 .pvr_mask = 0xffff0007, 1857 .pvr_value = 0x13020005, 1858 .cpu_name = "460GT Rev. B", 1859 .cpu_features = CPU_FTRS_440x6, 1860 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1861 .mmu_features = MMU_FTR_TYPE_44x, 1862 .icache_bsize = 32, 1863 .dcache_bsize = 32, 1864 .cpu_setup = __setup_cpu_460gt, 1865 .machine_check = machine_check_440A, 1866 .platform = "ppc440", 1867 }, 1868 { /* 460SX */ 1869 .pvr_mask = 0xffffff00, 1870 .pvr_value = 0x13541800, 1871 .cpu_name = "460SX", 1872 .cpu_features = CPU_FTRS_44X, 1873 .cpu_user_features = COMMON_USER_BOOKE, 1874 .mmu_features = MMU_FTR_TYPE_44x, 1875 .icache_bsize = 32, 1876 .dcache_bsize = 32, 1877 .cpu_setup = __setup_cpu_460sx, 1878 .machine_check = machine_check_440A, 1879 .platform = "ppc440", 1880 }, 1881 { /* 464 in APM821xx */ 1882 .pvr_mask = 0xfffffff0, 1883 .pvr_value = 0x12C41C80, 1884 .cpu_name = "APM821XX", 1885 .cpu_features = CPU_FTRS_44X, 1886 .cpu_user_features = COMMON_USER_BOOKE | 1887 PPC_FEATURE_HAS_FPU, 1888 .mmu_features = MMU_FTR_TYPE_44x, 1889 .icache_bsize = 32, 1890 .dcache_bsize = 32, 1891 .cpu_setup = __setup_cpu_apm821xx, 1892 .machine_check = machine_check_440A, 1893 .platform = "ppc440", 1894 }, 1895 #ifdef CONFIG_PPC_47x 1896 { /* 476 DD2 core */ 1897 .pvr_mask = 0xffffffff, 1898 .pvr_value = 0x11a52080, 1899 .cpu_name = "476", 1900 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1901 .cpu_user_features = COMMON_USER_BOOKE | 1902 PPC_FEATURE_HAS_FPU, 1903 .mmu_features = MMU_FTR_TYPE_47x | 1904 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1905 .icache_bsize = 32, 1906 .dcache_bsize = 128, 1907 .machine_check = machine_check_47x, 1908 .platform = "ppc470", 1909 }, 1910 { /* 476fpe */ 1911 .pvr_mask = 0xffff0000, 1912 .pvr_value = 0x7ff50000, 1913 .cpu_name = "476fpe", 1914 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1915 .cpu_user_features = COMMON_USER_BOOKE | 1916 PPC_FEATURE_HAS_FPU, 1917 .mmu_features = MMU_FTR_TYPE_47x | 1918 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1919 .icache_bsize = 32, 1920 .dcache_bsize = 128, 1921 .machine_check = machine_check_47x, 1922 .platform = "ppc470", 1923 }, 1924 { /* 476 iss */ 1925 .pvr_mask = 0xffff0000, 1926 .pvr_value = 0x00050000, 1927 .cpu_name = "476", 1928 .cpu_features = CPU_FTRS_47X, 1929 .cpu_user_features = COMMON_USER_BOOKE | 1930 PPC_FEATURE_HAS_FPU, 1931 .mmu_features = MMU_FTR_TYPE_47x | 1932 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1933 .icache_bsize = 32, 1934 .dcache_bsize = 128, 1935 .machine_check = machine_check_47x, 1936 .platform = "ppc470", 1937 }, 1938 { /* 476 others */ 1939 .pvr_mask = 0xffff0000, 1940 .pvr_value = 0x11a50000, 1941 .cpu_name = "476", 1942 .cpu_features = CPU_FTRS_47X, 1943 .cpu_user_features = COMMON_USER_BOOKE | 1944 PPC_FEATURE_HAS_FPU, 1945 .mmu_features = MMU_FTR_TYPE_47x | 1946 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1947 .icache_bsize = 32, 1948 .dcache_bsize = 128, 1949 .machine_check = machine_check_47x, 1950 .platform = "ppc470", 1951 }, 1952 #endif /* CONFIG_PPC_47x */ 1953 { /* default match */ 1954 .pvr_mask = 0x00000000, 1955 .pvr_value = 0x00000000, 1956 .cpu_name = "(generic 44x PPC)", 1957 .cpu_features = CPU_FTRS_44X, 1958 .cpu_user_features = COMMON_USER_BOOKE, 1959 .mmu_features = MMU_FTR_TYPE_44x, 1960 .icache_bsize = 32, 1961 .dcache_bsize = 32, 1962 .machine_check = machine_check_4xx, 1963 .platform = "ppc440", 1964 } 1965 #endif /* CONFIG_44x */ 1966 #ifdef CONFIG_E200 1967 { /* e200z5 */ 1968 .pvr_mask = 0xfff00000, 1969 .pvr_value = 0x81000000, 1970 .cpu_name = "e200z5", 1971 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1972 .cpu_features = CPU_FTRS_E200, 1973 .cpu_user_features = COMMON_USER_BOOKE | 1974 PPC_FEATURE_HAS_EFP_SINGLE | 1975 PPC_FEATURE_UNIFIED_CACHE, 1976 .mmu_features = MMU_FTR_TYPE_FSL_E, 1977 .dcache_bsize = 32, 1978 .machine_check = machine_check_e200, 1979 .platform = "ppc5554", 1980 }, 1981 { /* e200z6 */ 1982 .pvr_mask = 0xfff00000, 1983 .pvr_value = 0x81100000, 1984 .cpu_name = "e200z6", 1985 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1986 .cpu_features = CPU_FTRS_E200, 1987 .cpu_user_features = COMMON_USER_BOOKE | 1988 PPC_FEATURE_HAS_SPE_COMP | 1989 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1990 PPC_FEATURE_UNIFIED_CACHE, 1991 .mmu_features = MMU_FTR_TYPE_FSL_E, 1992 .dcache_bsize = 32, 1993 .machine_check = machine_check_e200, 1994 .platform = "ppc5554", 1995 }, 1996 { /* default match */ 1997 .pvr_mask = 0x00000000, 1998 .pvr_value = 0x00000000, 1999 .cpu_name = "(generic E200 PPC)", 2000 .cpu_features = CPU_FTRS_E200, 2001 .cpu_user_features = COMMON_USER_BOOKE | 2002 PPC_FEATURE_HAS_EFP_SINGLE | 2003 PPC_FEATURE_UNIFIED_CACHE, 2004 .mmu_features = MMU_FTR_TYPE_FSL_E, 2005 .dcache_bsize = 32, 2006 .cpu_setup = __setup_cpu_e200, 2007 .machine_check = machine_check_e200, 2008 .platform = "ppc5554", 2009 } 2010 #endif /* CONFIG_E200 */ 2011 #endif /* CONFIG_PPC32 */ 2012 #ifdef CONFIG_E500 2013 #ifdef CONFIG_PPC32 2014 #ifndef CONFIG_PPC_E500MC 2015 { /* e500 */ 2016 .pvr_mask = 0xffff0000, 2017 .pvr_value = 0x80200000, 2018 .cpu_name = "e500", 2019 .cpu_features = CPU_FTRS_E500, 2020 .cpu_user_features = COMMON_USER_BOOKE | 2021 PPC_FEATURE_HAS_SPE_COMP | 2022 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2023 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2024 .mmu_features = MMU_FTR_TYPE_FSL_E, 2025 .icache_bsize = 32, 2026 .dcache_bsize = 32, 2027 .num_pmcs = 4, 2028 .oprofile_cpu_type = "ppc/e500", 2029 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2030 .cpu_setup = __setup_cpu_e500v1, 2031 .machine_check = machine_check_e500, 2032 .platform = "ppc8540", 2033 }, 2034 { /* e500v2 */ 2035 .pvr_mask = 0xffff0000, 2036 .pvr_value = 0x80210000, 2037 .cpu_name = "e500v2", 2038 .cpu_features = CPU_FTRS_E500_2, 2039 .cpu_user_features = COMMON_USER_BOOKE | 2040 PPC_FEATURE_HAS_SPE_COMP | 2041 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2042 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 2043 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2044 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 2045 .icache_bsize = 32, 2046 .dcache_bsize = 32, 2047 .num_pmcs = 4, 2048 .oprofile_cpu_type = "ppc/e500", 2049 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2050 .cpu_setup = __setup_cpu_e500v2, 2051 .machine_check = machine_check_e500, 2052 .platform = "ppc8548", 2053 .cpu_down_flush = cpu_down_flush_e500v2, 2054 }, 2055 #else 2056 { /* e500mc */ 2057 .pvr_mask = 0xffff0000, 2058 .pvr_value = 0x80230000, 2059 .cpu_name = "e500mc", 2060 .cpu_features = CPU_FTRS_E500MC, 2061 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2062 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2063 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2064 MMU_FTR_USE_TLBILX, 2065 .icache_bsize = 64, 2066 .dcache_bsize = 64, 2067 .num_pmcs = 4, 2068 .oprofile_cpu_type = "ppc/e500mc", 2069 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2070 .cpu_setup = __setup_cpu_e500mc, 2071 .machine_check = machine_check_e500mc, 2072 .platform = "ppce500mc", 2073 .cpu_down_flush = cpu_down_flush_e500mc, 2074 }, 2075 #endif /* CONFIG_PPC_E500MC */ 2076 #endif /* CONFIG_PPC32 */ 2077 #ifdef CONFIG_PPC_E500MC 2078 { /* e5500 */ 2079 .pvr_mask = 0xffff0000, 2080 .pvr_value = 0x80240000, 2081 .cpu_name = "e5500", 2082 .cpu_features = CPU_FTRS_E5500, 2083 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2084 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2085 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2086 MMU_FTR_USE_TLBILX, 2087 .icache_bsize = 64, 2088 .dcache_bsize = 64, 2089 .num_pmcs = 4, 2090 .oprofile_cpu_type = "ppc/e500mc", 2091 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2092 .cpu_setup = __setup_cpu_e5500, 2093 #ifndef CONFIG_PPC32 2094 .cpu_restore = __restore_cpu_e5500, 2095 #endif 2096 .machine_check = machine_check_e500mc, 2097 .platform = "ppce5500", 2098 .cpu_down_flush = cpu_down_flush_e5500, 2099 }, 2100 { /* e6500 */ 2101 .pvr_mask = 0xffff0000, 2102 .pvr_value = 0x80400000, 2103 .cpu_name = "e6500", 2104 .cpu_features = CPU_FTRS_E6500, 2105 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2106 PPC_FEATURE_HAS_ALTIVEC_COMP, 2107 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2108 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2109 MMU_FTR_USE_TLBILX, 2110 .icache_bsize = 64, 2111 .dcache_bsize = 64, 2112 .num_pmcs = 6, 2113 .oprofile_cpu_type = "ppc/e6500", 2114 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2115 .cpu_setup = __setup_cpu_e6500, 2116 #ifndef CONFIG_PPC32 2117 .cpu_restore = __restore_cpu_e6500, 2118 #endif 2119 .machine_check = machine_check_e500mc, 2120 .platform = "ppce6500", 2121 .cpu_down_flush = cpu_down_flush_e6500, 2122 }, 2123 #endif /* CONFIG_PPC_E500MC */ 2124 #ifdef CONFIG_PPC32 2125 { /* default match */ 2126 .pvr_mask = 0x00000000, 2127 .pvr_value = 0x00000000, 2128 .cpu_name = "(generic E500 PPC)", 2129 .cpu_features = CPU_FTRS_E500, 2130 .cpu_user_features = COMMON_USER_BOOKE | 2131 PPC_FEATURE_HAS_SPE_COMP | 2132 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2133 .mmu_features = MMU_FTR_TYPE_FSL_E, 2134 .icache_bsize = 32, 2135 .dcache_bsize = 32, 2136 .machine_check = machine_check_e500, 2137 .platform = "powerpc", 2138 } 2139 #endif /* CONFIG_PPC32 */ 2140 #endif /* CONFIG_E500 */ 2141 }; 2142 2143 void __init set_cur_cpu_spec(struct cpu_spec *s) 2144 { 2145 struct cpu_spec *t = &the_cpu_spec; 2146 2147 t = PTRRELOC(t); 2148 /* 2149 * use memcpy() instead of *t = *s so that GCC replaces it 2150 * by __memcpy() when KASAN is active 2151 */ 2152 memcpy(t, s, sizeof(*t)); 2153 2154 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2155 } 2156 2157 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2158 struct cpu_spec *s) 2159 { 2160 struct cpu_spec *t = &the_cpu_spec; 2161 struct cpu_spec old; 2162 2163 t = PTRRELOC(t); 2164 old = *t; 2165 2166 /* 2167 * Copy everything, then do fixups. Use memcpy() instead of *t = *s 2168 * so that GCC replaces it by __memcpy() when KASAN is active 2169 */ 2170 memcpy(t, s, sizeof(*t)); 2171 2172 /* 2173 * If we are overriding a previous value derived from the real 2174 * PVR with a new value obtained using a logical PVR value, 2175 * don't modify the performance monitor fields. 2176 */ 2177 if (old.num_pmcs && !s->num_pmcs) { 2178 t->num_pmcs = old.num_pmcs; 2179 t->pmc_type = old.pmc_type; 2180 t->oprofile_type = old.oprofile_type; 2181 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2182 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2183 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2184 2185 /* 2186 * If we have passed through this logic once before and 2187 * have pulled the default case because the real PVR was 2188 * not found inside cpu_specs[], then we are possibly 2189 * running in compatibility mode. In that case, let the 2190 * oprofiler know which set of compatibility counters to 2191 * pull from by making sure the oprofile_cpu_type string 2192 * is set to that of compatibility mode. If the 2193 * oprofile_cpu_type already has a value, then we are 2194 * possibly overriding a real PVR with a logical one, 2195 * and, in that case, keep the current value for 2196 * oprofile_cpu_type. 2197 */ 2198 if (old.oprofile_cpu_type != NULL) { 2199 t->oprofile_cpu_type = old.oprofile_cpu_type; 2200 t->oprofile_type = old.oprofile_type; 2201 } 2202 } 2203 2204 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2205 2206 /* 2207 * Set the base platform string once; assumes 2208 * we're called with real pvr first. 2209 */ 2210 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2211 *PTRRELOC(&powerpc_base_platform) = t->platform; 2212 2213 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2214 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2215 * that processor. I will consolidate that at a later time, for now, 2216 * just use #ifdef. We also don't need to PTRRELOC the function 2217 * pointer on ppc64 and booke as we are running at 0 in real mode 2218 * on ppc64 and reloc_offset is always 0 on booke. 2219 */ 2220 if (t->cpu_setup) { 2221 t->cpu_setup(offset, t); 2222 } 2223 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2224 2225 return t; 2226 } 2227 2228 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2229 { 2230 struct cpu_spec *s = cpu_specs; 2231 int i; 2232 2233 s = PTRRELOC(s); 2234 2235 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2236 if ((pvr & s->pvr_mask) == s->pvr_value) 2237 return setup_cpu_spec(offset, s); 2238 } 2239 2240 BUG(); 2241 2242 return NULL; 2243 } 2244 2245 /* 2246 * Used by cpufeatures to get the name for CPUs with a PVR table. 2247 * If they don't hae a PVR table, cpufeatures gets the name from 2248 * cpu device-tree node. 2249 */ 2250 void __init identify_cpu_name(unsigned int pvr) 2251 { 2252 struct cpu_spec *s = cpu_specs; 2253 struct cpu_spec *t = &the_cpu_spec; 2254 int i; 2255 2256 s = PTRRELOC(s); 2257 t = PTRRELOC(t); 2258 2259 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2260 if ((pvr & s->pvr_mask) == s->pvr_value) { 2261 t->cpu_name = s->cpu_name; 2262 return; 2263 } 2264 } 2265 } 2266 2267 2268 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2269 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2270 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2271 }; 2272 EXPORT_SYMBOL_GPL(cpu_feature_keys); 2273 2274 void __init cpu_feature_keys_init(void) 2275 { 2276 int i; 2277 2278 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2279 unsigned long f = 1ul << i; 2280 2281 if (!(cur_cpu_spec->cpu_features & f)) 2282 static_branch_disable(&cpu_feature_keys[i]); 2283 } 2284 } 2285 2286 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2287 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2288 }; 2289 EXPORT_SYMBOL_GPL(mmu_feature_keys); 2290 2291 void __init mmu_feature_keys_init(void) 2292 { 2293 int i; 2294 2295 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2296 unsigned long f = 1ul << i; 2297 2298 if (!(cur_cpu_spec->mmu_features & f)) 2299 static_branch_disable(&mmu_feature_keys[i]); 2300 } 2301 } 2302 #endif 2303