1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/export.h> 18 19 #include <asm/oprofile_impl.h> 20 #include <asm/cputable.h> 21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22 #include <asm/mmu.h> 23 #include <asm/setup.h> 24 25 struct cpu_spec* cur_cpu_spec = NULL; 26 EXPORT_SYMBOL(cur_cpu_spec); 27 28 /* The platform string corresponding to the real PVR */ 29 const char *powerpc_base_platform; 30 31 /* NOTE: 32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 33 * the responsibility of the appropriate CPU save/restore functions to 34 * eventually copy these settings over. Those save/restore aren't yet 35 * part of the cputable though. That has to be fixed for both ppc32 36 * and ppc64 37 */ 38 #ifdef CONFIG_PPC32 39 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 51 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 52 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 53 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 60 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 61 #endif /* CONFIG_PPC32 */ 62 #ifdef CONFIG_PPC64 63 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 64 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 65 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 66 extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec); 67 extern void __restore_cpu_pa6t(void); 68 extern void __restore_cpu_ppc970(void); 69 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 70 extern void __restore_cpu_power7(void); 71 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 72 extern void __restore_cpu_power8(void); 73 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); 74 extern void __restore_cpu_power9(void); 75 extern void __restore_cpu_a2(void); 76 extern void __flush_tlb_power7(unsigned int action); 77 extern void __flush_tlb_power8(unsigned int action); 78 extern void __flush_tlb_power9(unsigned int action); 79 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 80 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 81 #endif /* CONFIG_PPC64 */ 82 #if defined(CONFIG_E500) 83 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 84 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 85 extern void __restore_cpu_e5500(void); 86 extern void __restore_cpu_e6500(void); 87 #endif /* CONFIG_E500 */ 88 89 /* This table only contains "desktop" CPUs, it need to be filled with embedded 90 * ones as well... 91 */ 92 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 93 PPC_FEATURE_HAS_MMU) 94 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 95 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 96 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 97 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 98 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 99 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 100 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 101 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 102 PPC_FEATURE_TRUE_LE | \ 103 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 104 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 105 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 106 PPC_FEATURE_TRUE_LE | \ 107 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 108 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 109 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 110 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 111 PPC_FEATURE_TRUE_LE | \ 112 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 113 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 114 PPC_FEATURE2_HTM_COMP | \ 115 PPC_FEATURE2_HTM_NOSC_COMP | \ 116 PPC_FEATURE2_DSCR | \ 117 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 118 PPC_FEATURE2_VEC_CRYPTO) 119 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 120 PPC_FEATURE_TRUE_LE | \ 121 PPC_FEATURE_HAS_ALTIVEC_COMP) 122 #define COMMON_USER_POWER9 COMMON_USER_POWER8 123 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 124 PPC_FEATURE2_ARCH_3_00 | \ 125 PPC_FEATURE2_HAS_IEEE128) 126 127 #ifdef CONFIG_PPC_BOOK3E_64 128 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 129 #else 130 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 131 PPC_FEATURE_BOOKE) 132 #endif 133 134 static struct cpu_spec __initdata cpu_specs[] = { 135 #ifdef CONFIG_PPC_BOOK3S_64 136 { /* Power4 */ 137 .pvr_mask = 0xffff0000, 138 .pvr_value = 0x00350000, 139 .cpu_name = "POWER4 (gp)", 140 .cpu_features = CPU_FTRS_POWER4, 141 .cpu_user_features = COMMON_USER_POWER4, 142 .mmu_features = MMU_FTRS_POWER4, 143 .icache_bsize = 128, 144 .dcache_bsize = 128, 145 .num_pmcs = 8, 146 .pmc_type = PPC_PMC_IBM, 147 .oprofile_cpu_type = "ppc64/power4", 148 .oprofile_type = PPC_OPROFILE_POWER4, 149 .platform = "power4", 150 }, 151 { /* Power4+ */ 152 .pvr_mask = 0xffff0000, 153 .pvr_value = 0x00380000, 154 .cpu_name = "POWER4+ (gq)", 155 .cpu_features = CPU_FTRS_POWER4, 156 .cpu_user_features = COMMON_USER_POWER4, 157 .mmu_features = MMU_FTRS_POWER4, 158 .icache_bsize = 128, 159 .dcache_bsize = 128, 160 .num_pmcs = 8, 161 .pmc_type = PPC_PMC_IBM, 162 .oprofile_cpu_type = "ppc64/power4", 163 .oprofile_type = PPC_OPROFILE_POWER4, 164 .platform = "power4", 165 }, 166 { /* PPC970 */ 167 .pvr_mask = 0xffff0000, 168 .pvr_value = 0x00390000, 169 .cpu_name = "PPC970", 170 .cpu_features = CPU_FTRS_PPC970, 171 .cpu_user_features = COMMON_USER_POWER4 | 172 PPC_FEATURE_HAS_ALTIVEC_COMP, 173 .mmu_features = MMU_FTRS_PPC970, 174 .icache_bsize = 128, 175 .dcache_bsize = 128, 176 .num_pmcs = 8, 177 .pmc_type = PPC_PMC_IBM, 178 .cpu_setup = __setup_cpu_ppc970, 179 .cpu_restore = __restore_cpu_ppc970, 180 .oprofile_cpu_type = "ppc64/970", 181 .oprofile_type = PPC_OPROFILE_POWER4, 182 .platform = "ppc970", 183 }, 184 { /* PPC970FX */ 185 .pvr_mask = 0xffff0000, 186 .pvr_value = 0x003c0000, 187 .cpu_name = "PPC970FX", 188 .cpu_features = CPU_FTRS_PPC970, 189 .cpu_user_features = COMMON_USER_POWER4 | 190 PPC_FEATURE_HAS_ALTIVEC_COMP, 191 .mmu_features = MMU_FTRS_PPC970, 192 .icache_bsize = 128, 193 .dcache_bsize = 128, 194 .num_pmcs = 8, 195 .pmc_type = PPC_PMC_IBM, 196 .cpu_setup = __setup_cpu_ppc970, 197 .cpu_restore = __restore_cpu_ppc970, 198 .oprofile_cpu_type = "ppc64/970", 199 .oprofile_type = PPC_OPROFILE_POWER4, 200 .platform = "ppc970", 201 }, 202 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 203 .pvr_mask = 0xffffffff, 204 .pvr_value = 0x00440100, 205 .cpu_name = "PPC970MP", 206 .cpu_features = CPU_FTRS_PPC970, 207 .cpu_user_features = COMMON_USER_POWER4 | 208 PPC_FEATURE_HAS_ALTIVEC_COMP, 209 .mmu_features = MMU_FTRS_PPC970, 210 .icache_bsize = 128, 211 .dcache_bsize = 128, 212 .num_pmcs = 8, 213 .pmc_type = PPC_PMC_IBM, 214 .cpu_setup = __setup_cpu_ppc970, 215 .cpu_restore = __restore_cpu_ppc970, 216 .oprofile_cpu_type = "ppc64/970MP", 217 .oprofile_type = PPC_OPROFILE_POWER4, 218 .platform = "ppc970", 219 }, 220 { /* PPC970MP */ 221 .pvr_mask = 0xffff0000, 222 .pvr_value = 0x00440000, 223 .cpu_name = "PPC970MP", 224 .cpu_features = CPU_FTRS_PPC970, 225 .cpu_user_features = COMMON_USER_POWER4 | 226 PPC_FEATURE_HAS_ALTIVEC_COMP, 227 .mmu_features = MMU_FTRS_PPC970, 228 .icache_bsize = 128, 229 .dcache_bsize = 128, 230 .num_pmcs = 8, 231 .pmc_type = PPC_PMC_IBM, 232 .cpu_setup = __setup_cpu_ppc970MP, 233 .cpu_restore = __restore_cpu_ppc970, 234 .oprofile_cpu_type = "ppc64/970MP", 235 .oprofile_type = PPC_OPROFILE_POWER4, 236 .platform = "ppc970", 237 }, 238 { /* PPC970GX */ 239 .pvr_mask = 0xffff0000, 240 .pvr_value = 0x00450000, 241 .cpu_name = "PPC970GX", 242 .cpu_features = CPU_FTRS_PPC970, 243 .cpu_user_features = COMMON_USER_POWER4 | 244 PPC_FEATURE_HAS_ALTIVEC_COMP, 245 .mmu_features = MMU_FTRS_PPC970, 246 .icache_bsize = 128, 247 .dcache_bsize = 128, 248 .num_pmcs = 8, 249 .pmc_type = PPC_PMC_IBM, 250 .cpu_setup = __setup_cpu_ppc970, 251 .oprofile_cpu_type = "ppc64/970", 252 .oprofile_type = PPC_OPROFILE_POWER4, 253 .platform = "ppc970", 254 }, 255 { /* Power5 GR */ 256 .pvr_mask = 0xffff0000, 257 .pvr_value = 0x003a0000, 258 .cpu_name = "POWER5 (gr)", 259 .cpu_features = CPU_FTRS_POWER5, 260 .cpu_user_features = COMMON_USER_POWER5, 261 .mmu_features = MMU_FTRS_POWER5, 262 .icache_bsize = 128, 263 .dcache_bsize = 128, 264 .num_pmcs = 6, 265 .pmc_type = PPC_PMC_IBM, 266 .oprofile_cpu_type = "ppc64/power5", 267 .oprofile_type = PPC_OPROFILE_POWER4, 268 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 269 * and above but only works on POWER5 and above 270 */ 271 .oprofile_mmcra_sihv = MMCRA_SIHV, 272 .oprofile_mmcra_sipr = MMCRA_SIPR, 273 .platform = "power5", 274 }, 275 { /* Power5++ */ 276 .pvr_mask = 0xffffff00, 277 .pvr_value = 0x003b0300, 278 .cpu_name = "POWER5+ (gs)", 279 .cpu_features = CPU_FTRS_POWER5, 280 .cpu_user_features = COMMON_USER_POWER5_PLUS, 281 .mmu_features = MMU_FTRS_POWER5, 282 .icache_bsize = 128, 283 .dcache_bsize = 128, 284 .num_pmcs = 6, 285 .oprofile_cpu_type = "ppc64/power5++", 286 .oprofile_type = PPC_OPROFILE_POWER4, 287 .oprofile_mmcra_sihv = MMCRA_SIHV, 288 .oprofile_mmcra_sipr = MMCRA_SIPR, 289 .platform = "power5+", 290 }, 291 { /* Power5 GS */ 292 .pvr_mask = 0xffff0000, 293 .pvr_value = 0x003b0000, 294 .cpu_name = "POWER5+ (gs)", 295 .cpu_features = CPU_FTRS_POWER5, 296 .cpu_user_features = COMMON_USER_POWER5_PLUS, 297 .mmu_features = MMU_FTRS_POWER5, 298 .icache_bsize = 128, 299 .dcache_bsize = 128, 300 .num_pmcs = 6, 301 .pmc_type = PPC_PMC_IBM, 302 .oprofile_cpu_type = "ppc64/power5+", 303 .oprofile_type = PPC_OPROFILE_POWER4, 304 .oprofile_mmcra_sihv = MMCRA_SIHV, 305 .oprofile_mmcra_sipr = MMCRA_SIPR, 306 .platform = "power5+", 307 }, 308 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 309 .pvr_mask = 0xffffffff, 310 .pvr_value = 0x0f000001, 311 .cpu_name = "POWER5+", 312 .cpu_features = CPU_FTRS_POWER5, 313 .cpu_user_features = COMMON_USER_POWER5_PLUS, 314 .mmu_features = MMU_FTRS_POWER5, 315 .icache_bsize = 128, 316 .dcache_bsize = 128, 317 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 318 .oprofile_type = PPC_OPROFILE_POWER4, 319 .platform = "power5+", 320 }, 321 { /* Power6 */ 322 .pvr_mask = 0xffff0000, 323 .pvr_value = 0x003e0000, 324 .cpu_name = "POWER6 (raw)", 325 .cpu_features = CPU_FTRS_POWER6, 326 .cpu_user_features = COMMON_USER_POWER6 | 327 PPC_FEATURE_POWER6_EXT, 328 .mmu_features = MMU_FTRS_POWER6, 329 .icache_bsize = 128, 330 .dcache_bsize = 128, 331 .num_pmcs = 6, 332 .pmc_type = PPC_PMC_IBM, 333 .oprofile_cpu_type = "ppc64/power6", 334 .oprofile_type = PPC_OPROFILE_POWER4, 335 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 336 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 337 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 338 POWER6_MMCRA_OTHER, 339 .platform = "power6x", 340 }, 341 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 342 .pvr_mask = 0xffffffff, 343 .pvr_value = 0x0f000002, 344 .cpu_name = "POWER6 (architected)", 345 .cpu_features = CPU_FTRS_POWER6, 346 .cpu_user_features = COMMON_USER_POWER6, 347 .mmu_features = MMU_FTRS_POWER6, 348 .icache_bsize = 128, 349 .dcache_bsize = 128, 350 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 351 .oprofile_type = PPC_OPROFILE_POWER4, 352 .platform = "power6", 353 }, 354 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 355 .pvr_mask = 0xffffffff, 356 .pvr_value = 0x0f000003, 357 .cpu_name = "POWER7 (architected)", 358 .cpu_features = CPU_FTRS_POWER7, 359 .cpu_user_features = COMMON_USER_POWER7, 360 .cpu_user_features2 = COMMON_USER2_POWER7, 361 .mmu_features = MMU_FTRS_POWER7, 362 .icache_bsize = 128, 363 .dcache_bsize = 128, 364 .oprofile_type = PPC_OPROFILE_POWER4, 365 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 366 .cpu_setup = __setup_cpu_power7, 367 .cpu_restore = __restore_cpu_power7, 368 .flush_tlb = __flush_tlb_power7, 369 .machine_check_early = __machine_check_early_realmode_p7, 370 .platform = "power7", 371 }, 372 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 373 .pvr_mask = 0xffffffff, 374 .pvr_value = 0x0f000004, 375 .cpu_name = "POWER8 (architected)", 376 .cpu_features = CPU_FTRS_POWER8, 377 .cpu_user_features = COMMON_USER_POWER8, 378 .cpu_user_features2 = COMMON_USER2_POWER8, 379 .mmu_features = MMU_FTRS_POWER8, 380 .icache_bsize = 128, 381 .dcache_bsize = 128, 382 .oprofile_type = PPC_OPROFILE_INVALID, 383 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 384 .cpu_setup = __setup_cpu_power8, 385 .cpu_restore = __restore_cpu_power8, 386 .flush_tlb = __flush_tlb_power8, 387 .machine_check_early = __machine_check_early_realmode_p8, 388 .platform = "power8", 389 }, 390 { /* Power7 */ 391 .pvr_mask = 0xffff0000, 392 .pvr_value = 0x003f0000, 393 .cpu_name = "POWER7 (raw)", 394 .cpu_features = CPU_FTRS_POWER7, 395 .cpu_user_features = COMMON_USER_POWER7, 396 .cpu_user_features2 = COMMON_USER2_POWER7, 397 .mmu_features = MMU_FTRS_POWER7, 398 .icache_bsize = 128, 399 .dcache_bsize = 128, 400 .num_pmcs = 6, 401 .pmc_type = PPC_PMC_IBM, 402 .oprofile_cpu_type = "ppc64/power7", 403 .oprofile_type = PPC_OPROFILE_POWER4, 404 .cpu_setup = __setup_cpu_power7, 405 .cpu_restore = __restore_cpu_power7, 406 .flush_tlb = __flush_tlb_power7, 407 .machine_check_early = __machine_check_early_realmode_p7, 408 .platform = "power7", 409 }, 410 { /* Power7+ */ 411 .pvr_mask = 0xffff0000, 412 .pvr_value = 0x004A0000, 413 .cpu_name = "POWER7+ (raw)", 414 .cpu_features = CPU_FTRS_POWER7, 415 .cpu_user_features = COMMON_USER_POWER7, 416 .cpu_user_features2 = COMMON_USER2_POWER7, 417 .mmu_features = MMU_FTRS_POWER7, 418 .icache_bsize = 128, 419 .dcache_bsize = 128, 420 .num_pmcs = 6, 421 .pmc_type = PPC_PMC_IBM, 422 .oprofile_cpu_type = "ppc64/power7", 423 .oprofile_type = PPC_OPROFILE_POWER4, 424 .cpu_setup = __setup_cpu_power7, 425 .cpu_restore = __restore_cpu_power7, 426 .flush_tlb = __flush_tlb_power7, 427 .machine_check_early = __machine_check_early_realmode_p7, 428 .platform = "power7+", 429 }, 430 { /* Power8E */ 431 .pvr_mask = 0xffff0000, 432 .pvr_value = 0x004b0000, 433 .cpu_name = "POWER8E (raw)", 434 .cpu_features = CPU_FTRS_POWER8E, 435 .cpu_user_features = COMMON_USER_POWER8, 436 .cpu_user_features2 = COMMON_USER2_POWER8, 437 .mmu_features = MMU_FTRS_POWER8, 438 .icache_bsize = 128, 439 .dcache_bsize = 128, 440 .num_pmcs = 6, 441 .pmc_type = PPC_PMC_IBM, 442 .oprofile_cpu_type = "ppc64/power8", 443 .oprofile_type = PPC_OPROFILE_INVALID, 444 .cpu_setup = __setup_cpu_power8, 445 .cpu_restore = __restore_cpu_power8, 446 .flush_tlb = __flush_tlb_power8, 447 .machine_check_early = __machine_check_early_realmode_p8, 448 .platform = "power8", 449 }, 450 { /* Power8NVL */ 451 .pvr_mask = 0xffff0000, 452 .pvr_value = 0x004c0000, 453 .cpu_name = "POWER8NVL (raw)", 454 .cpu_features = CPU_FTRS_POWER8, 455 .cpu_user_features = COMMON_USER_POWER8, 456 .cpu_user_features2 = COMMON_USER2_POWER8, 457 .mmu_features = MMU_FTRS_POWER8, 458 .icache_bsize = 128, 459 .dcache_bsize = 128, 460 .num_pmcs = 6, 461 .pmc_type = PPC_PMC_IBM, 462 .oprofile_cpu_type = "ppc64/power8", 463 .oprofile_type = PPC_OPROFILE_INVALID, 464 .cpu_setup = __setup_cpu_power8, 465 .cpu_restore = __restore_cpu_power8, 466 .flush_tlb = __flush_tlb_power8, 467 .machine_check_early = __machine_check_early_realmode_p8, 468 .platform = "power8", 469 }, 470 { /* Power8 DD1: Does not support doorbell IPIs */ 471 .pvr_mask = 0xffffff00, 472 .pvr_value = 0x004d0100, 473 .cpu_name = "POWER8 (raw)", 474 .cpu_features = CPU_FTRS_POWER8_DD1, 475 .cpu_user_features = COMMON_USER_POWER8, 476 .cpu_user_features2 = COMMON_USER2_POWER8, 477 .mmu_features = MMU_FTRS_POWER8, 478 .icache_bsize = 128, 479 .dcache_bsize = 128, 480 .num_pmcs = 6, 481 .pmc_type = PPC_PMC_IBM, 482 .oprofile_cpu_type = "ppc64/power8", 483 .oprofile_type = PPC_OPROFILE_INVALID, 484 .cpu_setup = __setup_cpu_power8, 485 .cpu_restore = __restore_cpu_power8, 486 .flush_tlb = __flush_tlb_power8, 487 .machine_check_early = __machine_check_early_realmode_p8, 488 .platform = "power8", 489 }, 490 { /* Power8 */ 491 .pvr_mask = 0xffff0000, 492 .pvr_value = 0x004d0000, 493 .cpu_name = "POWER8 (raw)", 494 .cpu_features = CPU_FTRS_POWER8, 495 .cpu_user_features = COMMON_USER_POWER8, 496 .cpu_user_features2 = COMMON_USER2_POWER8, 497 .mmu_features = MMU_FTRS_POWER8, 498 .icache_bsize = 128, 499 .dcache_bsize = 128, 500 .num_pmcs = 6, 501 .pmc_type = PPC_PMC_IBM, 502 .oprofile_cpu_type = "ppc64/power8", 503 .oprofile_type = PPC_OPROFILE_INVALID, 504 .cpu_setup = __setup_cpu_power8, 505 .cpu_restore = __restore_cpu_power8, 506 .flush_tlb = __flush_tlb_power8, 507 .machine_check_early = __machine_check_early_realmode_p8, 508 .platform = "power8", 509 }, 510 { /* Power9 */ 511 .pvr_mask = 0xffff0000, 512 .pvr_value = 0x004e0000, 513 .cpu_name = "POWER9 (raw)", 514 .cpu_features = CPU_FTRS_POWER9, 515 .cpu_user_features = COMMON_USER_POWER9, 516 .cpu_user_features2 = COMMON_USER2_POWER9, 517 .mmu_features = MMU_FTRS_POWER9, 518 .icache_bsize = 128, 519 .dcache_bsize = 128, 520 .num_pmcs = 6, 521 .pmc_type = PPC_PMC_IBM, 522 .oprofile_cpu_type = "ppc64/power9", 523 .oprofile_type = PPC_OPROFILE_INVALID, 524 .cpu_setup = __setup_cpu_power9, 525 .cpu_restore = __restore_cpu_power9, 526 .flush_tlb = __flush_tlb_power9, 527 .platform = "power9", 528 }, 529 { /* Cell Broadband Engine */ 530 .pvr_mask = 0xffff0000, 531 .pvr_value = 0x00700000, 532 .cpu_name = "Cell Broadband Engine", 533 .cpu_features = CPU_FTRS_CELL, 534 .cpu_user_features = COMMON_USER_PPC64 | 535 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 536 PPC_FEATURE_SMT, 537 .mmu_features = MMU_FTRS_CELL, 538 .icache_bsize = 128, 539 .dcache_bsize = 128, 540 .num_pmcs = 4, 541 .pmc_type = PPC_PMC_IBM, 542 .oprofile_cpu_type = "ppc64/cell-be", 543 .oprofile_type = PPC_OPROFILE_CELL, 544 .platform = "ppc-cell-be", 545 }, 546 { /* PA Semi PA6T */ 547 .pvr_mask = 0x7fff0000, 548 .pvr_value = 0x00900000, 549 .cpu_name = "PA6T", 550 .cpu_features = CPU_FTRS_PA6T, 551 .cpu_user_features = COMMON_USER_PA6T, 552 .mmu_features = MMU_FTRS_PA6T, 553 .icache_bsize = 64, 554 .dcache_bsize = 64, 555 .num_pmcs = 6, 556 .pmc_type = PPC_PMC_PA6T, 557 .cpu_setup = __setup_cpu_pa6t, 558 .cpu_restore = __restore_cpu_pa6t, 559 .oprofile_cpu_type = "ppc64/pa6t", 560 .oprofile_type = PPC_OPROFILE_PA6T, 561 .platform = "pa6t", 562 }, 563 { /* default match */ 564 .pvr_mask = 0x00000000, 565 .pvr_value = 0x00000000, 566 .cpu_name = "POWER4 (compatible)", 567 .cpu_features = CPU_FTRS_COMPATIBLE, 568 .cpu_user_features = COMMON_USER_PPC64, 569 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2, 570 .icache_bsize = 128, 571 .dcache_bsize = 128, 572 .num_pmcs = 6, 573 .pmc_type = PPC_PMC_IBM, 574 .platform = "power4", 575 } 576 #endif /* CONFIG_PPC_BOOK3S_64 */ 577 578 #ifdef CONFIG_PPC32 579 #ifdef CONFIG_PPC_BOOK3S_32 580 { /* 601 */ 581 .pvr_mask = 0xffff0000, 582 .pvr_value = 0x00010000, 583 .cpu_name = "601", 584 .cpu_features = CPU_FTRS_PPC601, 585 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 586 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 587 .mmu_features = MMU_FTR_HPTE_TABLE, 588 .icache_bsize = 32, 589 .dcache_bsize = 32, 590 .machine_check = machine_check_generic, 591 .platform = "ppc601", 592 }, 593 { /* 603 */ 594 .pvr_mask = 0xffff0000, 595 .pvr_value = 0x00030000, 596 .cpu_name = "603", 597 .cpu_features = CPU_FTRS_603, 598 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 599 .mmu_features = 0, 600 .icache_bsize = 32, 601 .dcache_bsize = 32, 602 .cpu_setup = __setup_cpu_603, 603 .machine_check = machine_check_generic, 604 .platform = "ppc603", 605 }, 606 { /* 603e */ 607 .pvr_mask = 0xffff0000, 608 .pvr_value = 0x00060000, 609 .cpu_name = "603e", 610 .cpu_features = CPU_FTRS_603, 611 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 612 .mmu_features = 0, 613 .icache_bsize = 32, 614 .dcache_bsize = 32, 615 .cpu_setup = __setup_cpu_603, 616 .machine_check = machine_check_generic, 617 .platform = "ppc603", 618 }, 619 { /* 603ev */ 620 .pvr_mask = 0xffff0000, 621 .pvr_value = 0x00070000, 622 .cpu_name = "603ev", 623 .cpu_features = CPU_FTRS_603, 624 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 625 .mmu_features = 0, 626 .icache_bsize = 32, 627 .dcache_bsize = 32, 628 .cpu_setup = __setup_cpu_603, 629 .machine_check = machine_check_generic, 630 .platform = "ppc603", 631 }, 632 { /* 604 */ 633 .pvr_mask = 0xffff0000, 634 .pvr_value = 0x00040000, 635 .cpu_name = "604", 636 .cpu_features = CPU_FTRS_604, 637 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 638 .mmu_features = MMU_FTR_HPTE_TABLE, 639 .icache_bsize = 32, 640 .dcache_bsize = 32, 641 .num_pmcs = 2, 642 .cpu_setup = __setup_cpu_604, 643 .machine_check = machine_check_generic, 644 .platform = "ppc604", 645 }, 646 { /* 604e */ 647 .pvr_mask = 0xfffff000, 648 .pvr_value = 0x00090000, 649 .cpu_name = "604e", 650 .cpu_features = CPU_FTRS_604, 651 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 652 .mmu_features = MMU_FTR_HPTE_TABLE, 653 .icache_bsize = 32, 654 .dcache_bsize = 32, 655 .num_pmcs = 4, 656 .cpu_setup = __setup_cpu_604, 657 .machine_check = machine_check_generic, 658 .platform = "ppc604", 659 }, 660 { /* 604r */ 661 .pvr_mask = 0xffff0000, 662 .pvr_value = 0x00090000, 663 .cpu_name = "604r", 664 .cpu_features = CPU_FTRS_604, 665 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 666 .mmu_features = MMU_FTR_HPTE_TABLE, 667 .icache_bsize = 32, 668 .dcache_bsize = 32, 669 .num_pmcs = 4, 670 .cpu_setup = __setup_cpu_604, 671 .machine_check = machine_check_generic, 672 .platform = "ppc604", 673 }, 674 { /* 604ev */ 675 .pvr_mask = 0xffff0000, 676 .pvr_value = 0x000a0000, 677 .cpu_name = "604ev", 678 .cpu_features = CPU_FTRS_604, 679 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 680 .mmu_features = MMU_FTR_HPTE_TABLE, 681 .icache_bsize = 32, 682 .dcache_bsize = 32, 683 .num_pmcs = 4, 684 .cpu_setup = __setup_cpu_604, 685 .machine_check = machine_check_generic, 686 .platform = "ppc604", 687 }, 688 { /* 740/750 (0x4202, don't support TAU ?) */ 689 .pvr_mask = 0xffffffff, 690 .pvr_value = 0x00084202, 691 .cpu_name = "740/750", 692 .cpu_features = CPU_FTRS_740_NOTAU, 693 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 694 .mmu_features = MMU_FTR_HPTE_TABLE, 695 .icache_bsize = 32, 696 .dcache_bsize = 32, 697 .num_pmcs = 4, 698 .cpu_setup = __setup_cpu_750, 699 .machine_check = machine_check_generic, 700 .platform = "ppc750", 701 }, 702 { /* 750CX (80100 and 8010x?) */ 703 .pvr_mask = 0xfffffff0, 704 .pvr_value = 0x00080100, 705 .cpu_name = "750CX", 706 .cpu_features = CPU_FTRS_750, 707 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 708 .mmu_features = MMU_FTR_HPTE_TABLE, 709 .icache_bsize = 32, 710 .dcache_bsize = 32, 711 .num_pmcs = 4, 712 .cpu_setup = __setup_cpu_750cx, 713 .machine_check = machine_check_generic, 714 .platform = "ppc750", 715 }, 716 { /* 750CX (82201 and 82202) */ 717 .pvr_mask = 0xfffffff0, 718 .pvr_value = 0x00082200, 719 .cpu_name = "750CX", 720 .cpu_features = CPU_FTRS_750, 721 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 722 .mmu_features = MMU_FTR_HPTE_TABLE, 723 .icache_bsize = 32, 724 .dcache_bsize = 32, 725 .num_pmcs = 4, 726 .pmc_type = PPC_PMC_IBM, 727 .cpu_setup = __setup_cpu_750cx, 728 .machine_check = machine_check_generic, 729 .platform = "ppc750", 730 }, 731 { /* 750CXe (82214) */ 732 .pvr_mask = 0xfffffff0, 733 .pvr_value = 0x00082210, 734 .cpu_name = "750CXe", 735 .cpu_features = CPU_FTRS_750, 736 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 737 .mmu_features = MMU_FTR_HPTE_TABLE, 738 .icache_bsize = 32, 739 .dcache_bsize = 32, 740 .num_pmcs = 4, 741 .pmc_type = PPC_PMC_IBM, 742 .cpu_setup = __setup_cpu_750cx, 743 .machine_check = machine_check_generic, 744 .platform = "ppc750", 745 }, 746 { /* 750CXe "Gekko" (83214) */ 747 .pvr_mask = 0xffffffff, 748 .pvr_value = 0x00083214, 749 .cpu_name = "750CXe", 750 .cpu_features = CPU_FTRS_750, 751 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 752 .mmu_features = MMU_FTR_HPTE_TABLE, 753 .icache_bsize = 32, 754 .dcache_bsize = 32, 755 .num_pmcs = 4, 756 .pmc_type = PPC_PMC_IBM, 757 .cpu_setup = __setup_cpu_750cx, 758 .machine_check = machine_check_generic, 759 .platform = "ppc750", 760 }, 761 { /* 750CL (and "Broadway") */ 762 .pvr_mask = 0xfffff0e0, 763 .pvr_value = 0x00087000, 764 .cpu_name = "750CL", 765 .cpu_features = CPU_FTRS_750CL, 766 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 767 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 768 .icache_bsize = 32, 769 .dcache_bsize = 32, 770 .num_pmcs = 4, 771 .pmc_type = PPC_PMC_IBM, 772 .cpu_setup = __setup_cpu_750, 773 .machine_check = machine_check_generic, 774 .platform = "ppc750", 775 .oprofile_cpu_type = "ppc/750", 776 .oprofile_type = PPC_OPROFILE_G4, 777 }, 778 { /* 745/755 */ 779 .pvr_mask = 0xfffff000, 780 .pvr_value = 0x00083000, 781 .cpu_name = "745/755", 782 .cpu_features = CPU_FTRS_750, 783 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 784 .mmu_features = MMU_FTR_HPTE_TABLE, 785 .icache_bsize = 32, 786 .dcache_bsize = 32, 787 .num_pmcs = 4, 788 .pmc_type = PPC_PMC_IBM, 789 .cpu_setup = __setup_cpu_750, 790 .machine_check = machine_check_generic, 791 .platform = "ppc750", 792 }, 793 { /* 750FX rev 1.x */ 794 .pvr_mask = 0xffffff00, 795 .pvr_value = 0x70000100, 796 .cpu_name = "750FX", 797 .cpu_features = CPU_FTRS_750FX1, 798 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 799 .mmu_features = MMU_FTR_HPTE_TABLE, 800 .icache_bsize = 32, 801 .dcache_bsize = 32, 802 .num_pmcs = 4, 803 .pmc_type = PPC_PMC_IBM, 804 .cpu_setup = __setup_cpu_750, 805 .machine_check = machine_check_generic, 806 .platform = "ppc750", 807 .oprofile_cpu_type = "ppc/750", 808 .oprofile_type = PPC_OPROFILE_G4, 809 }, 810 { /* 750FX rev 2.0 must disable HID0[DPM] */ 811 .pvr_mask = 0xffffffff, 812 .pvr_value = 0x70000200, 813 .cpu_name = "750FX", 814 .cpu_features = CPU_FTRS_750FX2, 815 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 816 .mmu_features = MMU_FTR_HPTE_TABLE, 817 .icache_bsize = 32, 818 .dcache_bsize = 32, 819 .num_pmcs = 4, 820 .pmc_type = PPC_PMC_IBM, 821 .cpu_setup = __setup_cpu_750, 822 .machine_check = machine_check_generic, 823 .platform = "ppc750", 824 .oprofile_cpu_type = "ppc/750", 825 .oprofile_type = PPC_OPROFILE_G4, 826 }, 827 { /* 750FX (All revs except 2.0) */ 828 .pvr_mask = 0xffff0000, 829 .pvr_value = 0x70000000, 830 .cpu_name = "750FX", 831 .cpu_features = CPU_FTRS_750FX, 832 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 833 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 834 .icache_bsize = 32, 835 .dcache_bsize = 32, 836 .num_pmcs = 4, 837 .pmc_type = PPC_PMC_IBM, 838 .cpu_setup = __setup_cpu_750fx, 839 .machine_check = machine_check_generic, 840 .platform = "ppc750", 841 .oprofile_cpu_type = "ppc/750", 842 .oprofile_type = PPC_OPROFILE_G4, 843 }, 844 { /* 750GX */ 845 .pvr_mask = 0xffff0000, 846 .pvr_value = 0x70020000, 847 .cpu_name = "750GX", 848 .cpu_features = CPU_FTRS_750GX, 849 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 850 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 851 .icache_bsize = 32, 852 .dcache_bsize = 32, 853 .num_pmcs = 4, 854 .pmc_type = PPC_PMC_IBM, 855 .cpu_setup = __setup_cpu_750fx, 856 .machine_check = machine_check_generic, 857 .platform = "ppc750", 858 .oprofile_cpu_type = "ppc/750", 859 .oprofile_type = PPC_OPROFILE_G4, 860 }, 861 { /* 740/750 (L2CR bit need fixup for 740) */ 862 .pvr_mask = 0xffff0000, 863 .pvr_value = 0x00080000, 864 .cpu_name = "740/750", 865 .cpu_features = CPU_FTRS_740, 866 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 867 .mmu_features = MMU_FTR_HPTE_TABLE, 868 .icache_bsize = 32, 869 .dcache_bsize = 32, 870 .num_pmcs = 4, 871 .pmc_type = PPC_PMC_IBM, 872 .cpu_setup = __setup_cpu_750, 873 .machine_check = machine_check_generic, 874 .platform = "ppc750", 875 }, 876 { /* 7400 rev 1.1 ? (no TAU) */ 877 .pvr_mask = 0xffffffff, 878 .pvr_value = 0x000c1101, 879 .cpu_name = "7400 (1.1)", 880 .cpu_features = CPU_FTRS_7400_NOTAU, 881 .cpu_user_features = COMMON_USER | 882 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 883 .mmu_features = MMU_FTR_HPTE_TABLE, 884 .icache_bsize = 32, 885 .dcache_bsize = 32, 886 .num_pmcs = 4, 887 .pmc_type = PPC_PMC_G4, 888 .cpu_setup = __setup_cpu_7400, 889 .machine_check = machine_check_generic, 890 .platform = "ppc7400", 891 }, 892 { /* 7400 */ 893 .pvr_mask = 0xffff0000, 894 .pvr_value = 0x000c0000, 895 .cpu_name = "7400", 896 .cpu_features = CPU_FTRS_7400, 897 .cpu_user_features = COMMON_USER | 898 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 899 .mmu_features = MMU_FTR_HPTE_TABLE, 900 .icache_bsize = 32, 901 .dcache_bsize = 32, 902 .num_pmcs = 4, 903 .pmc_type = PPC_PMC_G4, 904 .cpu_setup = __setup_cpu_7400, 905 .machine_check = machine_check_generic, 906 .platform = "ppc7400", 907 }, 908 { /* 7410 */ 909 .pvr_mask = 0xffff0000, 910 .pvr_value = 0x800c0000, 911 .cpu_name = "7410", 912 .cpu_features = CPU_FTRS_7400, 913 .cpu_user_features = COMMON_USER | 914 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 915 .mmu_features = MMU_FTR_HPTE_TABLE, 916 .icache_bsize = 32, 917 .dcache_bsize = 32, 918 .num_pmcs = 4, 919 .pmc_type = PPC_PMC_G4, 920 .cpu_setup = __setup_cpu_7410, 921 .machine_check = machine_check_generic, 922 .platform = "ppc7400", 923 }, 924 { /* 7450 2.0 - no doze/nap */ 925 .pvr_mask = 0xffffffff, 926 .pvr_value = 0x80000200, 927 .cpu_name = "7450", 928 .cpu_features = CPU_FTRS_7450_20, 929 .cpu_user_features = COMMON_USER | 930 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 931 .mmu_features = MMU_FTR_HPTE_TABLE, 932 .icache_bsize = 32, 933 .dcache_bsize = 32, 934 .num_pmcs = 6, 935 .pmc_type = PPC_PMC_G4, 936 .cpu_setup = __setup_cpu_745x, 937 .oprofile_cpu_type = "ppc/7450", 938 .oprofile_type = PPC_OPROFILE_G4, 939 .machine_check = machine_check_generic, 940 .platform = "ppc7450", 941 }, 942 { /* 7450 2.1 */ 943 .pvr_mask = 0xffffffff, 944 .pvr_value = 0x80000201, 945 .cpu_name = "7450", 946 .cpu_features = CPU_FTRS_7450_21, 947 .cpu_user_features = COMMON_USER | 948 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 949 .mmu_features = MMU_FTR_HPTE_TABLE, 950 .icache_bsize = 32, 951 .dcache_bsize = 32, 952 .num_pmcs = 6, 953 .pmc_type = PPC_PMC_G4, 954 .cpu_setup = __setup_cpu_745x, 955 .oprofile_cpu_type = "ppc/7450", 956 .oprofile_type = PPC_OPROFILE_G4, 957 .machine_check = machine_check_generic, 958 .platform = "ppc7450", 959 }, 960 { /* 7450 2.3 and newer */ 961 .pvr_mask = 0xffff0000, 962 .pvr_value = 0x80000000, 963 .cpu_name = "7450", 964 .cpu_features = CPU_FTRS_7450_23, 965 .cpu_user_features = COMMON_USER | 966 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 967 .mmu_features = MMU_FTR_HPTE_TABLE, 968 .icache_bsize = 32, 969 .dcache_bsize = 32, 970 .num_pmcs = 6, 971 .pmc_type = PPC_PMC_G4, 972 .cpu_setup = __setup_cpu_745x, 973 .oprofile_cpu_type = "ppc/7450", 974 .oprofile_type = PPC_OPROFILE_G4, 975 .machine_check = machine_check_generic, 976 .platform = "ppc7450", 977 }, 978 { /* 7455 rev 1.x */ 979 .pvr_mask = 0xffffff00, 980 .pvr_value = 0x80010100, 981 .cpu_name = "7455", 982 .cpu_features = CPU_FTRS_7455_1, 983 .cpu_user_features = COMMON_USER | 984 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 985 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 986 .icache_bsize = 32, 987 .dcache_bsize = 32, 988 .num_pmcs = 6, 989 .pmc_type = PPC_PMC_G4, 990 .cpu_setup = __setup_cpu_745x, 991 .oprofile_cpu_type = "ppc/7450", 992 .oprofile_type = PPC_OPROFILE_G4, 993 .machine_check = machine_check_generic, 994 .platform = "ppc7450", 995 }, 996 { /* 7455 rev 2.0 */ 997 .pvr_mask = 0xffffffff, 998 .pvr_value = 0x80010200, 999 .cpu_name = "7455", 1000 .cpu_features = CPU_FTRS_7455_20, 1001 .cpu_user_features = COMMON_USER | 1002 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1003 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1004 .icache_bsize = 32, 1005 .dcache_bsize = 32, 1006 .num_pmcs = 6, 1007 .pmc_type = PPC_PMC_G4, 1008 .cpu_setup = __setup_cpu_745x, 1009 .oprofile_cpu_type = "ppc/7450", 1010 .oprofile_type = PPC_OPROFILE_G4, 1011 .machine_check = machine_check_generic, 1012 .platform = "ppc7450", 1013 }, 1014 { /* 7455 others */ 1015 .pvr_mask = 0xffff0000, 1016 .pvr_value = 0x80010000, 1017 .cpu_name = "7455", 1018 .cpu_features = CPU_FTRS_7455, 1019 .cpu_user_features = COMMON_USER | 1020 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1021 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1022 .icache_bsize = 32, 1023 .dcache_bsize = 32, 1024 .num_pmcs = 6, 1025 .pmc_type = PPC_PMC_G4, 1026 .cpu_setup = __setup_cpu_745x, 1027 .oprofile_cpu_type = "ppc/7450", 1028 .oprofile_type = PPC_OPROFILE_G4, 1029 .machine_check = machine_check_generic, 1030 .platform = "ppc7450", 1031 }, 1032 { /* 7447/7457 Rev 1.0 */ 1033 .pvr_mask = 0xffffffff, 1034 .pvr_value = 0x80020100, 1035 .cpu_name = "7447/7457", 1036 .cpu_features = CPU_FTRS_7447_10, 1037 .cpu_user_features = COMMON_USER | 1038 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1039 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1040 .icache_bsize = 32, 1041 .dcache_bsize = 32, 1042 .num_pmcs = 6, 1043 .pmc_type = PPC_PMC_G4, 1044 .cpu_setup = __setup_cpu_745x, 1045 .oprofile_cpu_type = "ppc/7450", 1046 .oprofile_type = PPC_OPROFILE_G4, 1047 .machine_check = machine_check_generic, 1048 .platform = "ppc7450", 1049 }, 1050 { /* 7447/7457 Rev 1.1 */ 1051 .pvr_mask = 0xffffffff, 1052 .pvr_value = 0x80020101, 1053 .cpu_name = "7447/7457", 1054 .cpu_features = CPU_FTRS_7447_10, 1055 .cpu_user_features = COMMON_USER | 1056 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1057 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1058 .icache_bsize = 32, 1059 .dcache_bsize = 32, 1060 .num_pmcs = 6, 1061 .pmc_type = PPC_PMC_G4, 1062 .cpu_setup = __setup_cpu_745x, 1063 .oprofile_cpu_type = "ppc/7450", 1064 .oprofile_type = PPC_OPROFILE_G4, 1065 .machine_check = machine_check_generic, 1066 .platform = "ppc7450", 1067 }, 1068 { /* 7447/7457 Rev 1.2 and later */ 1069 .pvr_mask = 0xffff0000, 1070 .pvr_value = 0x80020000, 1071 .cpu_name = "7447/7457", 1072 .cpu_features = CPU_FTRS_7447, 1073 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1074 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1075 .icache_bsize = 32, 1076 .dcache_bsize = 32, 1077 .num_pmcs = 6, 1078 .pmc_type = PPC_PMC_G4, 1079 .cpu_setup = __setup_cpu_745x, 1080 .oprofile_cpu_type = "ppc/7450", 1081 .oprofile_type = PPC_OPROFILE_G4, 1082 .machine_check = machine_check_generic, 1083 .platform = "ppc7450", 1084 }, 1085 { /* 7447A */ 1086 .pvr_mask = 0xffff0000, 1087 .pvr_value = 0x80030000, 1088 .cpu_name = "7447A", 1089 .cpu_features = CPU_FTRS_7447A, 1090 .cpu_user_features = COMMON_USER | 1091 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1092 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1093 .icache_bsize = 32, 1094 .dcache_bsize = 32, 1095 .num_pmcs = 6, 1096 .pmc_type = PPC_PMC_G4, 1097 .cpu_setup = __setup_cpu_745x, 1098 .oprofile_cpu_type = "ppc/7450", 1099 .oprofile_type = PPC_OPROFILE_G4, 1100 .machine_check = machine_check_generic, 1101 .platform = "ppc7450", 1102 }, 1103 { /* 7448 */ 1104 .pvr_mask = 0xffff0000, 1105 .pvr_value = 0x80040000, 1106 .cpu_name = "7448", 1107 .cpu_features = CPU_FTRS_7448, 1108 .cpu_user_features = COMMON_USER | 1109 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1110 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1111 .icache_bsize = 32, 1112 .dcache_bsize = 32, 1113 .num_pmcs = 6, 1114 .pmc_type = PPC_PMC_G4, 1115 .cpu_setup = __setup_cpu_745x, 1116 .oprofile_cpu_type = "ppc/7450", 1117 .oprofile_type = PPC_OPROFILE_G4, 1118 .machine_check = machine_check_generic, 1119 .platform = "ppc7450", 1120 }, 1121 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1122 .pvr_mask = 0x7fff0000, 1123 .pvr_value = 0x00810000, 1124 .cpu_name = "82xx", 1125 .cpu_features = CPU_FTRS_82XX, 1126 .cpu_user_features = COMMON_USER, 1127 .mmu_features = 0, 1128 .icache_bsize = 32, 1129 .dcache_bsize = 32, 1130 .cpu_setup = __setup_cpu_603, 1131 .machine_check = machine_check_generic, 1132 .platform = "ppc603", 1133 }, 1134 { /* All G2_LE (603e core, plus some) have the same pvr */ 1135 .pvr_mask = 0x7fff0000, 1136 .pvr_value = 0x00820000, 1137 .cpu_name = "G2_LE", 1138 .cpu_features = CPU_FTRS_G2_LE, 1139 .cpu_user_features = COMMON_USER, 1140 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1141 .icache_bsize = 32, 1142 .dcache_bsize = 32, 1143 .cpu_setup = __setup_cpu_603, 1144 .machine_check = machine_check_generic, 1145 .platform = "ppc603", 1146 }, 1147 { /* e300c1 (a 603e core, plus some) on 83xx */ 1148 .pvr_mask = 0x7fff0000, 1149 .pvr_value = 0x00830000, 1150 .cpu_name = "e300c1", 1151 .cpu_features = CPU_FTRS_E300, 1152 .cpu_user_features = COMMON_USER, 1153 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1154 .icache_bsize = 32, 1155 .dcache_bsize = 32, 1156 .cpu_setup = __setup_cpu_603, 1157 .machine_check = machine_check_generic, 1158 .platform = "ppc603", 1159 }, 1160 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1161 .pvr_mask = 0x7fff0000, 1162 .pvr_value = 0x00840000, 1163 .cpu_name = "e300c2", 1164 .cpu_features = CPU_FTRS_E300C2, 1165 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1166 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1167 MMU_FTR_NEED_DTLB_SW_LRU, 1168 .icache_bsize = 32, 1169 .dcache_bsize = 32, 1170 .cpu_setup = __setup_cpu_603, 1171 .machine_check = machine_check_generic, 1172 .platform = "ppc603", 1173 }, 1174 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1175 .pvr_mask = 0x7fff0000, 1176 .pvr_value = 0x00850000, 1177 .cpu_name = "e300c3", 1178 .cpu_features = CPU_FTRS_E300, 1179 .cpu_user_features = COMMON_USER, 1180 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1181 MMU_FTR_NEED_DTLB_SW_LRU, 1182 .icache_bsize = 32, 1183 .dcache_bsize = 32, 1184 .cpu_setup = __setup_cpu_603, 1185 .machine_check = machine_check_generic, 1186 .num_pmcs = 4, 1187 .oprofile_cpu_type = "ppc/e300", 1188 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1189 .platform = "ppc603", 1190 }, 1191 { /* e300c4 (e300c1, plus one IU) */ 1192 .pvr_mask = 0x7fff0000, 1193 .pvr_value = 0x00860000, 1194 .cpu_name = "e300c4", 1195 .cpu_features = CPU_FTRS_E300, 1196 .cpu_user_features = COMMON_USER, 1197 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1198 MMU_FTR_NEED_DTLB_SW_LRU, 1199 .icache_bsize = 32, 1200 .dcache_bsize = 32, 1201 .cpu_setup = __setup_cpu_603, 1202 .machine_check = machine_check_generic, 1203 .num_pmcs = 4, 1204 .oprofile_cpu_type = "ppc/e300", 1205 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1206 .platform = "ppc603", 1207 }, 1208 { /* default match, we assume split I/D cache & TB (non-601)... */ 1209 .pvr_mask = 0x00000000, 1210 .pvr_value = 0x00000000, 1211 .cpu_name = "(generic PPC)", 1212 .cpu_features = CPU_FTRS_CLASSIC32, 1213 .cpu_user_features = COMMON_USER, 1214 .mmu_features = MMU_FTR_HPTE_TABLE, 1215 .icache_bsize = 32, 1216 .dcache_bsize = 32, 1217 .machine_check = machine_check_generic, 1218 .platform = "ppc603", 1219 }, 1220 #endif /* CONFIG_PPC_BOOK3S_32 */ 1221 #ifdef CONFIG_8xx 1222 { /* 8xx */ 1223 .pvr_mask = 0xffff0000, 1224 .pvr_value = 0x00500000, 1225 .cpu_name = "8xx", 1226 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1227 * if the 8xx code is there.... */ 1228 .cpu_features = CPU_FTRS_8XX, 1229 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1230 .mmu_features = MMU_FTR_TYPE_8xx, 1231 .icache_bsize = 16, 1232 .dcache_bsize = 16, 1233 .platform = "ppc823", 1234 }, 1235 #endif /* CONFIG_8xx */ 1236 #ifdef CONFIG_40x 1237 { /* 403GC */ 1238 .pvr_mask = 0xffffff00, 1239 .pvr_value = 0x00200200, 1240 .cpu_name = "403GC", 1241 .cpu_features = CPU_FTRS_40X, 1242 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1243 .mmu_features = MMU_FTR_TYPE_40x, 1244 .icache_bsize = 16, 1245 .dcache_bsize = 16, 1246 .machine_check = machine_check_4xx, 1247 .platform = "ppc403", 1248 }, 1249 { /* 403GCX */ 1250 .pvr_mask = 0xffffff00, 1251 .pvr_value = 0x00201400, 1252 .cpu_name = "403GCX", 1253 .cpu_features = CPU_FTRS_40X, 1254 .cpu_user_features = PPC_FEATURE_32 | 1255 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1256 .mmu_features = MMU_FTR_TYPE_40x, 1257 .icache_bsize = 16, 1258 .dcache_bsize = 16, 1259 .machine_check = machine_check_4xx, 1260 .platform = "ppc403", 1261 }, 1262 { /* 403G ?? */ 1263 .pvr_mask = 0xffff0000, 1264 .pvr_value = 0x00200000, 1265 .cpu_name = "403G ??", 1266 .cpu_features = CPU_FTRS_40X, 1267 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1268 .mmu_features = MMU_FTR_TYPE_40x, 1269 .icache_bsize = 16, 1270 .dcache_bsize = 16, 1271 .machine_check = machine_check_4xx, 1272 .platform = "ppc403", 1273 }, 1274 { /* 405GP */ 1275 .pvr_mask = 0xffff0000, 1276 .pvr_value = 0x40110000, 1277 .cpu_name = "405GP", 1278 .cpu_features = CPU_FTRS_40X, 1279 .cpu_user_features = PPC_FEATURE_32 | 1280 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1281 .mmu_features = MMU_FTR_TYPE_40x, 1282 .icache_bsize = 32, 1283 .dcache_bsize = 32, 1284 .machine_check = machine_check_4xx, 1285 .platform = "ppc405", 1286 }, 1287 { /* STB 03xxx */ 1288 .pvr_mask = 0xffff0000, 1289 .pvr_value = 0x40130000, 1290 .cpu_name = "STB03xxx", 1291 .cpu_features = CPU_FTRS_40X, 1292 .cpu_user_features = PPC_FEATURE_32 | 1293 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1294 .mmu_features = MMU_FTR_TYPE_40x, 1295 .icache_bsize = 32, 1296 .dcache_bsize = 32, 1297 .machine_check = machine_check_4xx, 1298 .platform = "ppc405", 1299 }, 1300 { /* STB 04xxx */ 1301 .pvr_mask = 0xffff0000, 1302 .pvr_value = 0x41810000, 1303 .cpu_name = "STB04xxx", 1304 .cpu_features = CPU_FTRS_40X, 1305 .cpu_user_features = PPC_FEATURE_32 | 1306 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1307 .mmu_features = MMU_FTR_TYPE_40x, 1308 .icache_bsize = 32, 1309 .dcache_bsize = 32, 1310 .machine_check = machine_check_4xx, 1311 .platform = "ppc405", 1312 }, 1313 { /* NP405L */ 1314 .pvr_mask = 0xffff0000, 1315 .pvr_value = 0x41610000, 1316 .cpu_name = "NP405L", 1317 .cpu_features = CPU_FTRS_40X, 1318 .cpu_user_features = PPC_FEATURE_32 | 1319 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1320 .mmu_features = MMU_FTR_TYPE_40x, 1321 .icache_bsize = 32, 1322 .dcache_bsize = 32, 1323 .machine_check = machine_check_4xx, 1324 .platform = "ppc405", 1325 }, 1326 { /* NP4GS3 */ 1327 .pvr_mask = 0xffff0000, 1328 .pvr_value = 0x40B10000, 1329 .cpu_name = "NP4GS3", 1330 .cpu_features = CPU_FTRS_40X, 1331 .cpu_user_features = PPC_FEATURE_32 | 1332 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1333 .mmu_features = MMU_FTR_TYPE_40x, 1334 .icache_bsize = 32, 1335 .dcache_bsize = 32, 1336 .machine_check = machine_check_4xx, 1337 .platform = "ppc405", 1338 }, 1339 { /* NP405H */ 1340 .pvr_mask = 0xffff0000, 1341 .pvr_value = 0x41410000, 1342 .cpu_name = "NP405H", 1343 .cpu_features = CPU_FTRS_40X, 1344 .cpu_user_features = PPC_FEATURE_32 | 1345 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1346 .mmu_features = MMU_FTR_TYPE_40x, 1347 .icache_bsize = 32, 1348 .dcache_bsize = 32, 1349 .machine_check = machine_check_4xx, 1350 .platform = "ppc405", 1351 }, 1352 { /* 405GPr */ 1353 .pvr_mask = 0xffff0000, 1354 .pvr_value = 0x50910000, 1355 .cpu_name = "405GPr", 1356 .cpu_features = CPU_FTRS_40X, 1357 .cpu_user_features = PPC_FEATURE_32 | 1358 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1359 .mmu_features = MMU_FTR_TYPE_40x, 1360 .icache_bsize = 32, 1361 .dcache_bsize = 32, 1362 .machine_check = machine_check_4xx, 1363 .platform = "ppc405", 1364 }, 1365 { /* STBx25xx */ 1366 .pvr_mask = 0xffff0000, 1367 .pvr_value = 0x51510000, 1368 .cpu_name = "STBx25xx", 1369 .cpu_features = CPU_FTRS_40X, 1370 .cpu_user_features = PPC_FEATURE_32 | 1371 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1372 .mmu_features = MMU_FTR_TYPE_40x, 1373 .icache_bsize = 32, 1374 .dcache_bsize = 32, 1375 .machine_check = machine_check_4xx, 1376 .platform = "ppc405", 1377 }, 1378 { /* 405LP */ 1379 .pvr_mask = 0xffff0000, 1380 .pvr_value = 0x41F10000, 1381 .cpu_name = "405LP", 1382 .cpu_features = CPU_FTRS_40X, 1383 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1384 .mmu_features = MMU_FTR_TYPE_40x, 1385 .icache_bsize = 32, 1386 .dcache_bsize = 32, 1387 .machine_check = machine_check_4xx, 1388 .platform = "ppc405", 1389 }, 1390 { /* Xilinx Virtex-II Pro */ 1391 .pvr_mask = 0xfffff000, 1392 .pvr_value = 0x20010000, 1393 .cpu_name = "Virtex-II Pro", 1394 .cpu_features = CPU_FTRS_40X, 1395 .cpu_user_features = PPC_FEATURE_32 | 1396 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1397 .mmu_features = MMU_FTR_TYPE_40x, 1398 .icache_bsize = 32, 1399 .dcache_bsize = 32, 1400 .machine_check = machine_check_4xx, 1401 .platform = "ppc405", 1402 }, 1403 { /* Xilinx Virtex-4 FX */ 1404 .pvr_mask = 0xfffff000, 1405 .pvr_value = 0x20011000, 1406 .cpu_name = "Virtex-4 FX", 1407 .cpu_features = CPU_FTRS_40X, 1408 .cpu_user_features = PPC_FEATURE_32 | 1409 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1410 .mmu_features = MMU_FTR_TYPE_40x, 1411 .icache_bsize = 32, 1412 .dcache_bsize = 32, 1413 .machine_check = machine_check_4xx, 1414 .platform = "ppc405", 1415 }, 1416 { /* 405EP */ 1417 .pvr_mask = 0xffff0000, 1418 .pvr_value = 0x51210000, 1419 .cpu_name = "405EP", 1420 .cpu_features = CPU_FTRS_40X, 1421 .cpu_user_features = PPC_FEATURE_32 | 1422 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1423 .mmu_features = MMU_FTR_TYPE_40x, 1424 .icache_bsize = 32, 1425 .dcache_bsize = 32, 1426 .machine_check = machine_check_4xx, 1427 .platform = "ppc405", 1428 }, 1429 { /* 405EX Rev. A/B with Security */ 1430 .pvr_mask = 0xffff000f, 1431 .pvr_value = 0x12910007, 1432 .cpu_name = "405EX Rev. A/B", 1433 .cpu_features = CPU_FTRS_40X, 1434 .cpu_user_features = PPC_FEATURE_32 | 1435 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1436 .mmu_features = MMU_FTR_TYPE_40x, 1437 .icache_bsize = 32, 1438 .dcache_bsize = 32, 1439 .machine_check = machine_check_4xx, 1440 .platform = "ppc405", 1441 }, 1442 { /* 405EX Rev. C without Security */ 1443 .pvr_mask = 0xffff000f, 1444 .pvr_value = 0x1291000d, 1445 .cpu_name = "405EX Rev. C", 1446 .cpu_features = CPU_FTRS_40X, 1447 .cpu_user_features = PPC_FEATURE_32 | 1448 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1449 .mmu_features = MMU_FTR_TYPE_40x, 1450 .icache_bsize = 32, 1451 .dcache_bsize = 32, 1452 .machine_check = machine_check_4xx, 1453 .platform = "ppc405", 1454 }, 1455 { /* 405EX Rev. C with Security */ 1456 .pvr_mask = 0xffff000f, 1457 .pvr_value = 0x1291000f, 1458 .cpu_name = "405EX Rev. C", 1459 .cpu_features = CPU_FTRS_40X, 1460 .cpu_user_features = PPC_FEATURE_32 | 1461 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1462 .mmu_features = MMU_FTR_TYPE_40x, 1463 .icache_bsize = 32, 1464 .dcache_bsize = 32, 1465 .machine_check = machine_check_4xx, 1466 .platform = "ppc405", 1467 }, 1468 { /* 405EX Rev. D without Security */ 1469 .pvr_mask = 0xffff000f, 1470 .pvr_value = 0x12910003, 1471 .cpu_name = "405EX Rev. D", 1472 .cpu_features = CPU_FTRS_40X, 1473 .cpu_user_features = PPC_FEATURE_32 | 1474 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1475 .mmu_features = MMU_FTR_TYPE_40x, 1476 .icache_bsize = 32, 1477 .dcache_bsize = 32, 1478 .machine_check = machine_check_4xx, 1479 .platform = "ppc405", 1480 }, 1481 { /* 405EX Rev. D with Security */ 1482 .pvr_mask = 0xffff000f, 1483 .pvr_value = 0x12910005, 1484 .cpu_name = "405EX Rev. D", 1485 .cpu_features = CPU_FTRS_40X, 1486 .cpu_user_features = PPC_FEATURE_32 | 1487 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1488 .mmu_features = MMU_FTR_TYPE_40x, 1489 .icache_bsize = 32, 1490 .dcache_bsize = 32, 1491 .machine_check = machine_check_4xx, 1492 .platform = "ppc405", 1493 }, 1494 { /* 405EXr Rev. A/B without Security */ 1495 .pvr_mask = 0xffff000f, 1496 .pvr_value = 0x12910001, 1497 .cpu_name = "405EXr Rev. A/B", 1498 .cpu_features = CPU_FTRS_40X, 1499 .cpu_user_features = PPC_FEATURE_32 | 1500 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1501 .mmu_features = MMU_FTR_TYPE_40x, 1502 .icache_bsize = 32, 1503 .dcache_bsize = 32, 1504 .machine_check = machine_check_4xx, 1505 .platform = "ppc405", 1506 }, 1507 { /* 405EXr Rev. C without Security */ 1508 .pvr_mask = 0xffff000f, 1509 .pvr_value = 0x12910009, 1510 .cpu_name = "405EXr Rev. C", 1511 .cpu_features = CPU_FTRS_40X, 1512 .cpu_user_features = PPC_FEATURE_32 | 1513 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1514 .mmu_features = MMU_FTR_TYPE_40x, 1515 .icache_bsize = 32, 1516 .dcache_bsize = 32, 1517 .machine_check = machine_check_4xx, 1518 .platform = "ppc405", 1519 }, 1520 { /* 405EXr Rev. C with Security */ 1521 .pvr_mask = 0xffff000f, 1522 .pvr_value = 0x1291000b, 1523 .cpu_name = "405EXr Rev. C", 1524 .cpu_features = CPU_FTRS_40X, 1525 .cpu_user_features = PPC_FEATURE_32 | 1526 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1527 .mmu_features = MMU_FTR_TYPE_40x, 1528 .icache_bsize = 32, 1529 .dcache_bsize = 32, 1530 .machine_check = machine_check_4xx, 1531 .platform = "ppc405", 1532 }, 1533 { /* 405EXr Rev. D without Security */ 1534 .pvr_mask = 0xffff000f, 1535 .pvr_value = 0x12910000, 1536 .cpu_name = "405EXr Rev. D", 1537 .cpu_features = CPU_FTRS_40X, 1538 .cpu_user_features = PPC_FEATURE_32 | 1539 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1540 .mmu_features = MMU_FTR_TYPE_40x, 1541 .icache_bsize = 32, 1542 .dcache_bsize = 32, 1543 .machine_check = machine_check_4xx, 1544 .platform = "ppc405", 1545 }, 1546 { /* 405EXr Rev. D with Security */ 1547 .pvr_mask = 0xffff000f, 1548 .pvr_value = 0x12910002, 1549 .cpu_name = "405EXr Rev. D", 1550 .cpu_features = CPU_FTRS_40X, 1551 .cpu_user_features = PPC_FEATURE_32 | 1552 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1553 .mmu_features = MMU_FTR_TYPE_40x, 1554 .icache_bsize = 32, 1555 .dcache_bsize = 32, 1556 .machine_check = machine_check_4xx, 1557 .platform = "ppc405", 1558 }, 1559 { 1560 /* 405EZ */ 1561 .pvr_mask = 0xffff0000, 1562 .pvr_value = 0x41510000, 1563 .cpu_name = "405EZ", 1564 .cpu_features = CPU_FTRS_40X, 1565 .cpu_user_features = PPC_FEATURE_32 | 1566 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1567 .mmu_features = MMU_FTR_TYPE_40x, 1568 .icache_bsize = 32, 1569 .dcache_bsize = 32, 1570 .machine_check = machine_check_4xx, 1571 .platform = "ppc405", 1572 }, 1573 { /* APM8018X */ 1574 .pvr_mask = 0xffff0000, 1575 .pvr_value = 0x7ff11432, 1576 .cpu_name = "APM8018X", 1577 .cpu_features = CPU_FTRS_40X, 1578 .cpu_user_features = PPC_FEATURE_32 | 1579 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1580 .mmu_features = MMU_FTR_TYPE_40x, 1581 .icache_bsize = 32, 1582 .dcache_bsize = 32, 1583 .machine_check = machine_check_4xx, 1584 .platform = "ppc405", 1585 }, 1586 { /* default match */ 1587 .pvr_mask = 0x00000000, 1588 .pvr_value = 0x00000000, 1589 .cpu_name = "(generic 40x PPC)", 1590 .cpu_features = CPU_FTRS_40X, 1591 .cpu_user_features = PPC_FEATURE_32 | 1592 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1593 .mmu_features = MMU_FTR_TYPE_40x, 1594 .icache_bsize = 32, 1595 .dcache_bsize = 32, 1596 .machine_check = machine_check_4xx, 1597 .platform = "ppc405", 1598 } 1599 1600 #endif /* CONFIG_40x */ 1601 #ifdef CONFIG_44x 1602 { 1603 .pvr_mask = 0xf0000fff, 1604 .pvr_value = 0x40000850, 1605 .cpu_name = "440GR Rev. A", 1606 .cpu_features = CPU_FTRS_44X, 1607 .cpu_user_features = COMMON_USER_BOOKE, 1608 .mmu_features = MMU_FTR_TYPE_44x, 1609 .icache_bsize = 32, 1610 .dcache_bsize = 32, 1611 .machine_check = machine_check_4xx, 1612 .platform = "ppc440", 1613 }, 1614 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1615 .pvr_mask = 0xf0000fff, 1616 .pvr_value = 0x40000858, 1617 .cpu_name = "440EP Rev. A", 1618 .cpu_features = CPU_FTRS_44X, 1619 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1620 .mmu_features = MMU_FTR_TYPE_44x, 1621 .icache_bsize = 32, 1622 .dcache_bsize = 32, 1623 .cpu_setup = __setup_cpu_440ep, 1624 .machine_check = machine_check_4xx, 1625 .platform = "ppc440", 1626 }, 1627 { 1628 .pvr_mask = 0xf0000fff, 1629 .pvr_value = 0x400008d3, 1630 .cpu_name = "440GR Rev. B", 1631 .cpu_features = CPU_FTRS_44X, 1632 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1633 .mmu_features = MMU_FTR_TYPE_44x, 1634 .icache_bsize = 32, 1635 .dcache_bsize = 32, 1636 .machine_check = machine_check_4xx, 1637 .platform = "ppc440", 1638 }, 1639 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1640 .pvr_mask = 0xf0000ff7, 1641 .pvr_value = 0x400008d4, 1642 .cpu_name = "440EP Rev. C", 1643 .cpu_features = CPU_FTRS_44X, 1644 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1645 .mmu_features = MMU_FTR_TYPE_44x, 1646 .icache_bsize = 32, 1647 .dcache_bsize = 32, 1648 .cpu_setup = __setup_cpu_440ep, 1649 .machine_check = machine_check_4xx, 1650 .platform = "ppc440", 1651 }, 1652 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1653 .pvr_mask = 0xf0000fff, 1654 .pvr_value = 0x400008db, 1655 .cpu_name = "440EP Rev. B", 1656 .cpu_features = CPU_FTRS_44X, 1657 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1658 .mmu_features = MMU_FTR_TYPE_44x, 1659 .icache_bsize = 32, 1660 .dcache_bsize = 32, 1661 .cpu_setup = __setup_cpu_440ep, 1662 .machine_check = machine_check_4xx, 1663 .platform = "ppc440", 1664 }, 1665 { /* 440GRX */ 1666 .pvr_mask = 0xf0000ffb, 1667 .pvr_value = 0x200008D0, 1668 .cpu_name = "440GRX", 1669 .cpu_features = CPU_FTRS_44X, 1670 .cpu_user_features = COMMON_USER_BOOKE, 1671 .mmu_features = MMU_FTR_TYPE_44x, 1672 .icache_bsize = 32, 1673 .dcache_bsize = 32, 1674 .cpu_setup = __setup_cpu_440grx, 1675 .machine_check = machine_check_440A, 1676 .platform = "ppc440", 1677 }, 1678 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1679 .pvr_mask = 0xf0000ffb, 1680 .pvr_value = 0x200008D8, 1681 .cpu_name = "440EPX", 1682 .cpu_features = CPU_FTRS_44X, 1683 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1684 .mmu_features = MMU_FTR_TYPE_44x, 1685 .icache_bsize = 32, 1686 .dcache_bsize = 32, 1687 .cpu_setup = __setup_cpu_440epx, 1688 .machine_check = machine_check_440A, 1689 .platform = "ppc440", 1690 }, 1691 { /* 440GP Rev. B */ 1692 .pvr_mask = 0xf0000fff, 1693 .pvr_value = 0x40000440, 1694 .cpu_name = "440GP Rev. B", 1695 .cpu_features = CPU_FTRS_44X, 1696 .cpu_user_features = COMMON_USER_BOOKE, 1697 .mmu_features = MMU_FTR_TYPE_44x, 1698 .icache_bsize = 32, 1699 .dcache_bsize = 32, 1700 .machine_check = machine_check_4xx, 1701 .platform = "ppc440gp", 1702 }, 1703 { /* 440GP Rev. C */ 1704 .pvr_mask = 0xf0000fff, 1705 .pvr_value = 0x40000481, 1706 .cpu_name = "440GP Rev. C", 1707 .cpu_features = CPU_FTRS_44X, 1708 .cpu_user_features = COMMON_USER_BOOKE, 1709 .mmu_features = MMU_FTR_TYPE_44x, 1710 .icache_bsize = 32, 1711 .dcache_bsize = 32, 1712 .machine_check = machine_check_4xx, 1713 .platform = "ppc440gp", 1714 }, 1715 { /* 440GX Rev. A */ 1716 .pvr_mask = 0xf0000fff, 1717 .pvr_value = 0x50000850, 1718 .cpu_name = "440GX Rev. A", 1719 .cpu_features = CPU_FTRS_44X, 1720 .cpu_user_features = COMMON_USER_BOOKE, 1721 .mmu_features = MMU_FTR_TYPE_44x, 1722 .icache_bsize = 32, 1723 .dcache_bsize = 32, 1724 .cpu_setup = __setup_cpu_440gx, 1725 .machine_check = machine_check_440A, 1726 .platform = "ppc440", 1727 }, 1728 { /* 440GX Rev. B */ 1729 .pvr_mask = 0xf0000fff, 1730 .pvr_value = 0x50000851, 1731 .cpu_name = "440GX Rev. B", 1732 .cpu_features = CPU_FTRS_44X, 1733 .cpu_user_features = COMMON_USER_BOOKE, 1734 .mmu_features = MMU_FTR_TYPE_44x, 1735 .icache_bsize = 32, 1736 .dcache_bsize = 32, 1737 .cpu_setup = __setup_cpu_440gx, 1738 .machine_check = machine_check_440A, 1739 .platform = "ppc440", 1740 }, 1741 { /* 440GX Rev. C */ 1742 .pvr_mask = 0xf0000fff, 1743 .pvr_value = 0x50000892, 1744 .cpu_name = "440GX Rev. C", 1745 .cpu_features = CPU_FTRS_44X, 1746 .cpu_user_features = COMMON_USER_BOOKE, 1747 .mmu_features = MMU_FTR_TYPE_44x, 1748 .icache_bsize = 32, 1749 .dcache_bsize = 32, 1750 .cpu_setup = __setup_cpu_440gx, 1751 .machine_check = machine_check_440A, 1752 .platform = "ppc440", 1753 }, 1754 { /* 440GX Rev. F */ 1755 .pvr_mask = 0xf0000fff, 1756 .pvr_value = 0x50000894, 1757 .cpu_name = "440GX Rev. F", 1758 .cpu_features = CPU_FTRS_44X, 1759 .cpu_user_features = COMMON_USER_BOOKE, 1760 .mmu_features = MMU_FTR_TYPE_44x, 1761 .icache_bsize = 32, 1762 .dcache_bsize = 32, 1763 .cpu_setup = __setup_cpu_440gx, 1764 .machine_check = machine_check_440A, 1765 .platform = "ppc440", 1766 }, 1767 { /* 440SP Rev. A */ 1768 .pvr_mask = 0xfff00fff, 1769 .pvr_value = 0x53200891, 1770 .cpu_name = "440SP Rev. A", 1771 .cpu_features = CPU_FTRS_44X, 1772 .cpu_user_features = COMMON_USER_BOOKE, 1773 .mmu_features = MMU_FTR_TYPE_44x, 1774 .icache_bsize = 32, 1775 .dcache_bsize = 32, 1776 .machine_check = machine_check_4xx, 1777 .platform = "ppc440", 1778 }, 1779 { /* 440SPe Rev. A */ 1780 .pvr_mask = 0xfff00fff, 1781 .pvr_value = 0x53400890, 1782 .cpu_name = "440SPe Rev. A", 1783 .cpu_features = CPU_FTRS_44X, 1784 .cpu_user_features = COMMON_USER_BOOKE, 1785 .mmu_features = MMU_FTR_TYPE_44x, 1786 .icache_bsize = 32, 1787 .dcache_bsize = 32, 1788 .cpu_setup = __setup_cpu_440spe, 1789 .machine_check = machine_check_440A, 1790 .platform = "ppc440", 1791 }, 1792 { /* 440SPe Rev. B */ 1793 .pvr_mask = 0xfff00fff, 1794 .pvr_value = 0x53400891, 1795 .cpu_name = "440SPe Rev. B", 1796 .cpu_features = CPU_FTRS_44X, 1797 .cpu_user_features = COMMON_USER_BOOKE, 1798 .mmu_features = MMU_FTR_TYPE_44x, 1799 .icache_bsize = 32, 1800 .dcache_bsize = 32, 1801 .cpu_setup = __setup_cpu_440spe, 1802 .machine_check = machine_check_440A, 1803 .platform = "ppc440", 1804 }, 1805 { /* 440 in Xilinx Virtex-5 FXT */ 1806 .pvr_mask = 0xfffffff0, 1807 .pvr_value = 0x7ff21910, 1808 .cpu_name = "440 in Virtex-5 FXT", 1809 .cpu_features = CPU_FTRS_44X, 1810 .cpu_user_features = COMMON_USER_BOOKE, 1811 .mmu_features = MMU_FTR_TYPE_44x, 1812 .icache_bsize = 32, 1813 .dcache_bsize = 32, 1814 .cpu_setup = __setup_cpu_440x5, 1815 .machine_check = machine_check_440A, 1816 .platform = "ppc440", 1817 }, 1818 { /* 460EX */ 1819 .pvr_mask = 0xffff0006, 1820 .pvr_value = 0x13020002, 1821 .cpu_name = "460EX", 1822 .cpu_features = CPU_FTRS_440x6, 1823 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1824 .mmu_features = MMU_FTR_TYPE_44x, 1825 .icache_bsize = 32, 1826 .dcache_bsize = 32, 1827 .cpu_setup = __setup_cpu_460ex, 1828 .machine_check = machine_check_440A, 1829 .platform = "ppc440", 1830 }, 1831 { /* 460EX Rev B */ 1832 .pvr_mask = 0xffff0007, 1833 .pvr_value = 0x13020004, 1834 .cpu_name = "460EX Rev. B", 1835 .cpu_features = CPU_FTRS_440x6, 1836 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1837 .mmu_features = MMU_FTR_TYPE_44x, 1838 .icache_bsize = 32, 1839 .dcache_bsize = 32, 1840 .cpu_setup = __setup_cpu_460ex, 1841 .machine_check = machine_check_440A, 1842 .platform = "ppc440", 1843 }, 1844 { /* 460GT */ 1845 .pvr_mask = 0xffff0006, 1846 .pvr_value = 0x13020000, 1847 .cpu_name = "460GT", 1848 .cpu_features = CPU_FTRS_440x6, 1849 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1850 .mmu_features = MMU_FTR_TYPE_44x, 1851 .icache_bsize = 32, 1852 .dcache_bsize = 32, 1853 .cpu_setup = __setup_cpu_460gt, 1854 .machine_check = machine_check_440A, 1855 .platform = "ppc440", 1856 }, 1857 { /* 460GT Rev B */ 1858 .pvr_mask = 0xffff0007, 1859 .pvr_value = 0x13020005, 1860 .cpu_name = "460GT Rev. B", 1861 .cpu_features = CPU_FTRS_440x6, 1862 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1863 .mmu_features = MMU_FTR_TYPE_44x, 1864 .icache_bsize = 32, 1865 .dcache_bsize = 32, 1866 .cpu_setup = __setup_cpu_460gt, 1867 .machine_check = machine_check_440A, 1868 .platform = "ppc440", 1869 }, 1870 { /* 460SX */ 1871 .pvr_mask = 0xffffff00, 1872 .pvr_value = 0x13541800, 1873 .cpu_name = "460SX", 1874 .cpu_features = CPU_FTRS_44X, 1875 .cpu_user_features = COMMON_USER_BOOKE, 1876 .mmu_features = MMU_FTR_TYPE_44x, 1877 .icache_bsize = 32, 1878 .dcache_bsize = 32, 1879 .cpu_setup = __setup_cpu_460sx, 1880 .machine_check = machine_check_440A, 1881 .platform = "ppc440", 1882 }, 1883 { /* 464 in APM821xx */ 1884 .pvr_mask = 0xfffffff0, 1885 .pvr_value = 0x12C41C80, 1886 .cpu_name = "APM821XX", 1887 .cpu_features = CPU_FTRS_44X, 1888 .cpu_user_features = COMMON_USER_BOOKE | 1889 PPC_FEATURE_HAS_FPU, 1890 .mmu_features = MMU_FTR_TYPE_44x, 1891 .icache_bsize = 32, 1892 .dcache_bsize = 32, 1893 .cpu_setup = __setup_cpu_apm821xx, 1894 .machine_check = machine_check_440A, 1895 .platform = "ppc440", 1896 }, 1897 { /* 476 DD2 core */ 1898 .pvr_mask = 0xffffffff, 1899 .pvr_value = 0x11a52080, 1900 .cpu_name = "476", 1901 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1902 .cpu_user_features = COMMON_USER_BOOKE | 1903 PPC_FEATURE_HAS_FPU, 1904 .mmu_features = MMU_FTR_TYPE_47x | 1905 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1906 .icache_bsize = 32, 1907 .dcache_bsize = 128, 1908 .machine_check = machine_check_47x, 1909 .platform = "ppc470", 1910 }, 1911 { /* 476fpe */ 1912 .pvr_mask = 0xffff0000, 1913 .pvr_value = 0x7ff50000, 1914 .cpu_name = "476fpe", 1915 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1916 .cpu_user_features = COMMON_USER_BOOKE | 1917 PPC_FEATURE_HAS_FPU, 1918 .mmu_features = MMU_FTR_TYPE_47x | 1919 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1920 .icache_bsize = 32, 1921 .dcache_bsize = 128, 1922 .machine_check = machine_check_47x, 1923 .platform = "ppc470", 1924 }, 1925 { /* 476 iss */ 1926 .pvr_mask = 0xffff0000, 1927 .pvr_value = 0x00050000, 1928 .cpu_name = "476", 1929 .cpu_features = CPU_FTRS_47X, 1930 .cpu_user_features = COMMON_USER_BOOKE | 1931 PPC_FEATURE_HAS_FPU, 1932 .mmu_features = MMU_FTR_TYPE_47x | 1933 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1934 .icache_bsize = 32, 1935 .dcache_bsize = 128, 1936 .machine_check = machine_check_47x, 1937 .platform = "ppc470", 1938 }, 1939 { /* 476 others */ 1940 .pvr_mask = 0xffff0000, 1941 .pvr_value = 0x11a50000, 1942 .cpu_name = "476", 1943 .cpu_features = CPU_FTRS_47X, 1944 .cpu_user_features = COMMON_USER_BOOKE | 1945 PPC_FEATURE_HAS_FPU, 1946 .mmu_features = MMU_FTR_TYPE_47x | 1947 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1948 .icache_bsize = 32, 1949 .dcache_bsize = 128, 1950 .machine_check = machine_check_47x, 1951 .platform = "ppc470", 1952 }, 1953 { /* default match */ 1954 .pvr_mask = 0x00000000, 1955 .pvr_value = 0x00000000, 1956 .cpu_name = "(generic 44x PPC)", 1957 .cpu_features = CPU_FTRS_44X, 1958 .cpu_user_features = COMMON_USER_BOOKE, 1959 .mmu_features = MMU_FTR_TYPE_44x, 1960 .icache_bsize = 32, 1961 .dcache_bsize = 32, 1962 .machine_check = machine_check_4xx, 1963 .platform = "ppc440", 1964 } 1965 #endif /* CONFIG_44x */ 1966 #ifdef CONFIG_E200 1967 { /* e200z5 */ 1968 .pvr_mask = 0xfff00000, 1969 .pvr_value = 0x81000000, 1970 .cpu_name = "e200z5", 1971 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1972 .cpu_features = CPU_FTRS_E200, 1973 .cpu_user_features = COMMON_USER_BOOKE | 1974 PPC_FEATURE_HAS_EFP_SINGLE | 1975 PPC_FEATURE_UNIFIED_CACHE, 1976 .mmu_features = MMU_FTR_TYPE_FSL_E, 1977 .dcache_bsize = 32, 1978 .machine_check = machine_check_e200, 1979 .platform = "ppc5554", 1980 }, 1981 { /* e200z6 */ 1982 .pvr_mask = 0xfff00000, 1983 .pvr_value = 0x81100000, 1984 .cpu_name = "e200z6", 1985 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1986 .cpu_features = CPU_FTRS_E200, 1987 .cpu_user_features = COMMON_USER_BOOKE | 1988 PPC_FEATURE_HAS_SPE_COMP | 1989 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1990 PPC_FEATURE_UNIFIED_CACHE, 1991 .mmu_features = MMU_FTR_TYPE_FSL_E, 1992 .dcache_bsize = 32, 1993 .machine_check = machine_check_e200, 1994 .platform = "ppc5554", 1995 }, 1996 { /* default match */ 1997 .pvr_mask = 0x00000000, 1998 .pvr_value = 0x00000000, 1999 .cpu_name = "(generic E200 PPC)", 2000 .cpu_features = CPU_FTRS_E200, 2001 .cpu_user_features = COMMON_USER_BOOKE | 2002 PPC_FEATURE_HAS_EFP_SINGLE | 2003 PPC_FEATURE_UNIFIED_CACHE, 2004 .mmu_features = MMU_FTR_TYPE_FSL_E, 2005 .dcache_bsize = 32, 2006 .cpu_setup = __setup_cpu_e200, 2007 .machine_check = machine_check_e200, 2008 .platform = "ppc5554", 2009 } 2010 #endif /* CONFIG_E200 */ 2011 #endif /* CONFIG_PPC32 */ 2012 #ifdef CONFIG_E500 2013 #ifdef CONFIG_PPC32 2014 #ifndef CONFIG_PPC_E500MC 2015 { /* e500 */ 2016 .pvr_mask = 0xffff0000, 2017 .pvr_value = 0x80200000, 2018 .cpu_name = "e500", 2019 .cpu_features = CPU_FTRS_E500, 2020 .cpu_user_features = COMMON_USER_BOOKE | 2021 PPC_FEATURE_HAS_SPE_COMP | 2022 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2023 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2024 .mmu_features = MMU_FTR_TYPE_FSL_E, 2025 .icache_bsize = 32, 2026 .dcache_bsize = 32, 2027 .num_pmcs = 4, 2028 .oprofile_cpu_type = "ppc/e500", 2029 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2030 .cpu_setup = __setup_cpu_e500v1, 2031 .machine_check = machine_check_e500, 2032 .platform = "ppc8540", 2033 }, 2034 { /* e500v2 */ 2035 .pvr_mask = 0xffff0000, 2036 .pvr_value = 0x80210000, 2037 .cpu_name = "e500v2", 2038 .cpu_features = CPU_FTRS_E500_2, 2039 .cpu_user_features = COMMON_USER_BOOKE | 2040 PPC_FEATURE_HAS_SPE_COMP | 2041 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2042 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 2043 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2044 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 2045 .icache_bsize = 32, 2046 .dcache_bsize = 32, 2047 .num_pmcs = 4, 2048 .oprofile_cpu_type = "ppc/e500", 2049 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2050 .cpu_setup = __setup_cpu_e500v2, 2051 .machine_check = machine_check_e500, 2052 .platform = "ppc8548", 2053 .cpu_down_flush = cpu_down_flush_e500v2, 2054 }, 2055 #else 2056 { /* e500mc */ 2057 .pvr_mask = 0xffff0000, 2058 .pvr_value = 0x80230000, 2059 .cpu_name = "e500mc", 2060 .cpu_features = CPU_FTRS_E500MC, 2061 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2062 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2063 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2064 MMU_FTR_USE_TLBILX, 2065 .icache_bsize = 64, 2066 .dcache_bsize = 64, 2067 .num_pmcs = 4, 2068 .oprofile_cpu_type = "ppc/e500mc", 2069 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2070 .cpu_setup = __setup_cpu_e500mc, 2071 .machine_check = machine_check_e500mc, 2072 .platform = "ppce500mc", 2073 .cpu_down_flush = cpu_down_flush_e500mc, 2074 }, 2075 #endif /* CONFIG_PPC_E500MC */ 2076 #endif /* CONFIG_PPC32 */ 2077 #ifdef CONFIG_PPC_E500MC 2078 { /* e5500 */ 2079 .pvr_mask = 0xffff0000, 2080 .pvr_value = 0x80240000, 2081 .cpu_name = "e5500", 2082 .cpu_features = CPU_FTRS_E5500, 2083 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2084 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2085 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2086 MMU_FTR_USE_TLBILX, 2087 .icache_bsize = 64, 2088 .dcache_bsize = 64, 2089 .num_pmcs = 4, 2090 .oprofile_cpu_type = "ppc/e500mc", 2091 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2092 .cpu_setup = __setup_cpu_e5500, 2093 #ifndef CONFIG_PPC32 2094 .cpu_restore = __restore_cpu_e5500, 2095 #endif 2096 .machine_check = machine_check_e500mc, 2097 .platform = "ppce5500", 2098 .cpu_down_flush = cpu_down_flush_e5500, 2099 }, 2100 { /* e6500 */ 2101 .pvr_mask = 0xffff0000, 2102 .pvr_value = 0x80400000, 2103 .cpu_name = "e6500", 2104 .cpu_features = CPU_FTRS_E6500, 2105 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2106 PPC_FEATURE_HAS_ALTIVEC_COMP, 2107 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2108 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2109 MMU_FTR_USE_TLBILX, 2110 .icache_bsize = 64, 2111 .dcache_bsize = 64, 2112 .num_pmcs = 6, 2113 .oprofile_cpu_type = "ppc/e6500", 2114 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2115 .cpu_setup = __setup_cpu_e6500, 2116 #ifndef CONFIG_PPC32 2117 .cpu_restore = __restore_cpu_e6500, 2118 #endif 2119 .machine_check = machine_check_e500mc, 2120 .platform = "ppce6500", 2121 .cpu_down_flush = cpu_down_flush_e6500, 2122 }, 2123 #endif /* CONFIG_PPC_E500MC */ 2124 #ifdef CONFIG_PPC32 2125 { /* default match */ 2126 .pvr_mask = 0x00000000, 2127 .pvr_value = 0x00000000, 2128 .cpu_name = "(generic E500 PPC)", 2129 .cpu_features = CPU_FTRS_E500, 2130 .cpu_user_features = COMMON_USER_BOOKE | 2131 PPC_FEATURE_HAS_SPE_COMP | 2132 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2133 .mmu_features = MMU_FTR_TYPE_FSL_E, 2134 .icache_bsize = 32, 2135 .dcache_bsize = 32, 2136 .machine_check = machine_check_e500, 2137 .platform = "powerpc", 2138 } 2139 #endif /* CONFIG_PPC32 */ 2140 #endif /* CONFIG_E500 */ 2141 }; 2142 2143 static struct cpu_spec the_cpu_spec; 2144 2145 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2146 struct cpu_spec *s) 2147 { 2148 struct cpu_spec *t = &the_cpu_spec; 2149 struct cpu_spec old; 2150 2151 t = PTRRELOC(t); 2152 old = *t; 2153 2154 /* Copy everything, then do fixups */ 2155 *t = *s; 2156 2157 /* 2158 * If we are overriding a previous value derived from the real 2159 * PVR with a new value obtained using a logical PVR value, 2160 * don't modify the performance monitor fields. 2161 */ 2162 if (old.num_pmcs && !s->num_pmcs) { 2163 t->num_pmcs = old.num_pmcs; 2164 t->pmc_type = old.pmc_type; 2165 t->oprofile_type = old.oprofile_type; 2166 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2167 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2168 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2169 2170 /* 2171 * If we have passed through this logic once before and 2172 * have pulled the default case because the real PVR was 2173 * not found inside cpu_specs[], then we are possibly 2174 * running in compatibility mode. In that case, let the 2175 * oprofiler know which set of compatibility counters to 2176 * pull from by making sure the oprofile_cpu_type string 2177 * is set to that of compatibility mode. If the 2178 * oprofile_cpu_type already has a value, then we are 2179 * possibly overriding a real PVR with a logical one, 2180 * and, in that case, keep the current value for 2181 * oprofile_cpu_type. 2182 */ 2183 if (old.oprofile_cpu_type != NULL) { 2184 t->oprofile_cpu_type = old.oprofile_cpu_type; 2185 t->oprofile_type = old.oprofile_type; 2186 } 2187 } 2188 2189 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2190 2191 /* 2192 * Set the base platform string once; assumes 2193 * we're called with real pvr first. 2194 */ 2195 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2196 *PTRRELOC(&powerpc_base_platform) = t->platform; 2197 2198 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2199 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2200 * that processor. I will consolidate that at a later time, for now, 2201 * just use #ifdef. We also don't need to PTRRELOC the function 2202 * pointer on ppc64 and booke as we are running at 0 in real mode 2203 * on ppc64 and reloc_offset is always 0 on booke. 2204 */ 2205 if (t->cpu_setup) { 2206 t->cpu_setup(offset, t); 2207 } 2208 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2209 2210 return t; 2211 } 2212 2213 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2214 { 2215 struct cpu_spec *s = cpu_specs; 2216 int i; 2217 2218 s = PTRRELOC(s); 2219 2220 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2221 if ((pvr & s->pvr_mask) == s->pvr_value) 2222 return setup_cpu_spec(offset, s); 2223 } 2224 2225 BUG(); 2226 2227 return NULL; 2228 } 2229