1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 4 * 5 * Modifications for ppc64: 6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 7 */ 8 9 #include <linux/string.h> 10 #include <linux/sched.h> 11 #include <linux/threads.h> 12 #include <linux/init.h> 13 #include <linux/export.h> 14 #include <linux/jump_label.h> 15 16 #include <asm/cputable.h> 17 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 18 #include <asm/mce.h> 19 #include <asm/mmu.h> 20 #include <asm/setup.h> 21 22 static struct cpu_spec the_cpu_spec __read_mostly; 23 24 struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 25 EXPORT_SYMBOL(cur_cpu_spec); 26 27 /* The platform string corresponding to the real PVR */ 28 const char *powerpc_base_platform; 29 30 /* NOTE: 31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 32 * the responsibility of the appropriate CPU save/restore functions to 33 * eventually copy these settings over. Those save/restore aren't yet 34 * part of the cputable though. That has to be fixed for both ppc32 35 * and ppc64 36 */ 37 #ifdef CONFIG_PPC32 38 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 50 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 51 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 52 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 59 #endif /* CONFIG_PPC32 */ 60 #ifdef CONFIG_PPC64 61 #include <asm/cpu_setup_power.h> 62 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 64 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 65 extern void __restore_cpu_pa6t(void); 66 extern void __restore_cpu_ppc970(void); 67 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 68 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 69 extern long __machine_check_early_realmode_p9(struct pt_regs *regs); 70 #endif /* CONFIG_PPC64 */ 71 #if defined(CONFIG_E500) 72 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 73 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 74 extern void __restore_cpu_e5500(void); 75 extern void __restore_cpu_e6500(void); 76 #endif /* CONFIG_E500 */ 77 78 /* This table only contains "desktop" CPUs, it need to be filled with embedded 79 * ones as well... 80 */ 81 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 82 PPC_FEATURE_HAS_MMU) 83 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 84 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 85 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 86 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 87 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 88 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 89 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 90 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 91 PPC_FEATURE_TRUE_LE | \ 92 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 93 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 95 PPC_FEATURE_TRUE_LE | \ 96 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 97 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 98 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 99 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 100 PPC_FEATURE_TRUE_LE | \ 101 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 102 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 103 PPC_FEATURE2_HTM_COMP | \ 104 PPC_FEATURE2_HTM_NOSC_COMP | \ 105 PPC_FEATURE2_DSCR | \ 106 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 107 PPC_FEATURE2_VEC_CRYPTO) 108 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 109 PPC_FEATURE_TRUE_LE | \ 110 PPC_FEATURE_HAS_ALTIVEC_COMP) 111 #define COMMON_USER_POWER9 COMMON_USER_POWER8 112 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 113 PPC_FEATURE2_ARCH_3_00 | \ 114 PPC_FEATURE2_HAS_IEEE128 | \ 115 PPC_FEATURE2_DARN | \ 116 PPC_FEATURE2_SCV) 117 #define COMMON_USER_POWER10 COMMON_USER_POWER9 118 #define COMMON_USER2_POWER10 (PPC_FEATURE2_ARCH_3_1 | \ 119 PPC_FEATURE2_MMA | \ 120 PPC_FEATURE2_ARCH_3_00 | \ 121 PPC_FEATURE2_HAS_IEEE128 | \ 122 PPC_FEATURE2_DARN | \ 123 PPC_FEATURE2_SCV | \ 124 PPC_FEATURE2_ARCH_2_07 | \ 125 PPC_FEATURE2_DSCR | \ 126 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 127 PPC_FEATURE2_VEC_CRYPTO) 128 129 #ifdef CONFIG_PPC_BOOK3E_64 130 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 131 #else 132 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 133 PPC_FEATURE_BOOKE) 134 #endif 135 136 static struct cpu_spec __initdata cpu_specs[] = { 137 #ifdef CONFIG_PPC_BOOK3S_64 138 { /* PPC970 */ 139 .pvr_mask = 0xffff0000, 140 .pvr_value = 0x00390000, 141 .cpu_name = "PPC970", 142 .cpu_features = CPU_FTRS_PPC970, 143 .cpu_user_features = COMMON_USER_POWER4 | 144 PPC_FEATURE_HAS_ALTIVEC_COMP, 145 .mmu_features = MMU_FTRS_PPC970, 146 .icache_bsize = 128, 147 .dcache_bsize = 128, 148 .num_pmcs = 8, 149 .pmc_type = PPC_PMC_IBM, 150 .cpu_setup = __setup_cpu_ppc970, 151 .cpu_restore = __restore_cpu_ppc970, 152 .oprofile_cpu_type = "ppc64/970", 153 .platform = "ppc970", 154 }, 155 { /* PPC970FX */ 156 .pvr_mask = 0xffff0000, 157 .pvr_value = 0x003c0000, 158 .cpu_name = "PPC970FX", 159 .cpu_features = CPU_FTRS_PPC970, 160 .cpu_user_features = COMMON_USER_POWER4 | 161 PPC_FEATURE_HAS_ALTIVEC_COMP, 162 .mmu_features = MMU_FTRS_PPC970, 163 .icache_bsize = 128, 164 .dcache_bsize = 128, 165 .num_pmcs = 8, 166 .pmc_type = PPC_PMC_IBM, 167 .cpu_setup = __setup_cpu_ppc970, 168 .cpu_restore = __restore_cpu_ppc970, 169 .oprofile_cpu_type = "ppc64/970", 170 .platform = "ppc970", 171 }, 172 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 173 .pvr_mask = 0xffffffff, 174 .pvr_value = 0x00440100, 175 .cpu_name = "PPC970MP", 176 .cpu_features = CPU_FTRS_PPC970, 177 .cpu_user_features = COMMON_USER_POWER4 | 178 PPC_FEATURE_HAS_ALTIVEC_COMP, 179 .mmu_features = MMU_FTRS_PPC970, 180 .icache_bsize = 128, 181 .dcache_bsize = 128, 182 .num_pmcs = 8, 183 .pmc_type = PPC_PMC_IBM, 184 .cpu_setup = __setup_cpu_ppc970, 185 .cpu_restore = __restore_cpu_ppc970, 186 .oprofile_cpu_type = "ppc64/970MP", 187 .platform = "ppc970", 188 }, 189 { /* PPC970MP */ 190 .pvr_mask = 0xffff0000, 191 .pvr_value = 0x00440000, 192 .cpu_name = "PPC970MP", 193 .cpu_features = CPU_FTRS_PPC970, 194 .cpu_user_features = COMMON_USER_POWER4 | 195 PPC_FEATURE_HAS_ALTIVEC_COMP, 196 .mmu_features = MMU_FTRS_PPC970, 197 .icache_bsize = 128, 198 .dcache_bsize = 128, 199 .num_pmcs = 8, 200 .pmc_type = PPC_PMC_IBM, 201 .cpu_setup = __setup_cpu_ppc970MP, 202 .cpu_restore = __restore_cpu_ppc970, 203 .oprofile_cpu_type = "ppc64/970MP", 204 .platform = "ppc970", 205 }, 206 { /* PPC970GX */ 207 .pvr_mask = 0xffff0000, 208 .pvr_value = 0x00450000, 209 .cpu_name = "PPC970GX", 210 .cpu_features = CPU_FTRS_PPC970, 211 .cpu_user_features = COMMON_USER_POWER4 | 212 PPC_FEATURE_HAS_ALTIVEC_COMP, 213 .mmu_features = MMU_FTRS_PPC970, 214 .icache_bsize = 128, 215 .dcache_bsize = 128, 216 .num_pmcs = 8, 217 .pmc_type = PPC_PMC_IBM, 218 .cpu_setup = __setup_cpu_ppc970, 219 .oprofile_cpu_type = "ppc64/970", 220 .platform = "ppc970", 221 }, 222 { /* Power5 GR */ 223 .pvr_mask = 0xffff0000, 224 .pvr_value = 0x003a0000, 225 .cpu_name = "POWER5 (gr)", 226 .cpu_features = CPU_FTRS_POWER5, 227 .cpu_user_features = COMMON_USER_POWER5, 228 .mmu_features = MMU_FTRS_POWER5, 229 .icache_bsize = 128, 230 .dcache_bsize = 128, 231 .num_pmcs = 6, 232 .pmc_type = PPC_PMC_IBM, 233 .oprofile_cpu_type = "ppc64/power5", 234 .platform = "power5", 235 }, 236 { /* Power5++ */ 237 .pvr_mask = 0xffffff00, 238 .pvr_value = 0x003b0300, 239 .cpu_name = "POWER5+ (gs)", 240 .cpu_features = CPU_FTRS_POWER5, 241 .cpu_user_features = COMMON_USER_POWER5_PLUS, 242 .mmu_features = MMU_FTRS_POWER5, 243 .icache_bsize = 128, 244 .dcache_bsize = 128, 245 .num_pmcs = 6, 246 .oprofile_cpu_type = "ppc64/power5++", 247 .platform = "power5+", 248 }, 249 { /* Power5 GS */ 250 .pvr_mask = 0xffff0000, 251 .pvr_value = 0x003b0000, 252 .cpu_name = "POWER5+ (gs)", 253 .cpu_features = CPU_FTRS_POWER5, 254 .cpu_user_features = COMMON_USER_POWER5_PLUS, 255 .mmu_features = MMU_FTRS_POWER5, 256 .icache_bsize = 128, 257 .dcache_bsize = 128, 258 .num_pmcs = 6, 259 .pmc_type = PPC_PMC_IBM, 260 .oprofile_cpu_type = "ppc64/power5+", 261 .platform = "power5+", 262 }, 263 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 264 .pvr_mask = 0xffffffff, 265 .pvr_value = 0x0f000001, 266 .cpu_name = "POWER5+", 267 .cpu_features = CPU_FTRS_POWER5, 268 .cpu_user_features = COMMON_USER_POWER5_PLUS, 269 .mmu_features = MMU_FTRS_POWER5, 270 .icache_bsize = 128, 271 .dcache_bsize = 128, 272 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 273 .platform = "power5+", 274 }, 275 { /* Power6 */ 276 .pvr_mask = 0xffff0000, 277 .pvr_value = 0x003e0000, 278 .cpu_name = "POWER6 (raw)", 279 .cpu_features = CPU_FTRS_POWER6, 280 .cpu_user_features = COMMON_USER_POWER6 | 281 PPC_FEATURE_POWER6_EXT, 282 .mmu_features = MMU_FTRS_POWER6, 283 .icache_bsize = 128, 284 .dcache_bsize = 128, 285 .num_pmcs = 6, 286 .pmc_type = PPC_PMC_IBM, 287 .oprofile_cpu_type = "ppc64/power6", 288 .platform = "power6x", 289 }, 290 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 291 .pvr_mask = 0xffffffff, 292 .pvr_value = 0x0f000002, 293 .cpu_name = "POWER6 (architected)", 294 .cpu_features = CPU_FTRS_POWER6, 295 .cpu_user_features = COMMON_USER_POWER6, 296 .mmu_features = MMU_FTRS_POWER6, 297 .icache_bsize = 128, 298 .dcache_bsize = 128, 299 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 300 .platform = "power6", 301 }, 302 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 303 .pvr_mask = 0xffffffff, 304 .pvr_value = 0x0f000003, 305 .cpu_name = "POWER7 (architected)", 306 .cpu_features = CPU_FTRS_POWER7, 307 .cpu_user_features = COMMON_USER_POWER7, 308 .cpu_user_features2 = COMMON_USER2_POWER7, 309 .mmu_features = MMU_FTRS_POWER7, 310 .icache_bsize = 128, 311 .dcache_bsize = 128, 312 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 313 .cpu_setup = __setup_cpu_power7, 314 .cpu_restore = __restore_cpu_power7, 315 .machine_check_early = __machine_check_early_realmode_p7, 316 .platform = "power7", 317 }, 318 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 319 .pvr_mask = 0xffffffff, 320 .pvr_value = 0x0f000004, 321 .cpu_name = "POWER8 (architected)", 322 .cpu_features = CPU_FTRS_POWER8, 323 .cpu_user_features = COMMON_USER_POWER8, 324 .cpu_user_features2 = COMMON_USER2_POWER8, 325 .mmu_features = MMU_FTRS_POWER8, 326 .icache_bsize = 128, 327 .dcache_bsize = 128, 328 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 329 .cpu_setup = __setup_cpu_power8, 330 .cpu_restore = __restore_cpu_power8, 331 .machine_check_early = __machine_check_early_realmode_p8, 332 .platform = "power8", 333 }, 334 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 335 .pvr_mask = 0xffffffff, 336 .pvr_value = 0x0f000005, 337 .cpu_name = "POWER9 (architected)", 338 .cpu_features = CPU_FTRS_POWER9, 339 .cpu_user_features = COMMON_USER_POWER9, 340 .cpu_user_features2 = COMMON_USER2_POWER9, 341 .mmu_features = MMU_FTRS_POWER9, 342 .icache_bsize = 128, 343 .dcache_bsize = 128, 344 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 345 .cpu_setup = __setup_cpu_power9, 346 .cpu_restore = __restore_cpu_power9, 347 .platform = "power9", 348 }, 349 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */ 350 .pvr_mask = 0xffffffff, 351 .pvr_value = 0x0f000006, 352 .cpu_name = "POWER10 (architected)", 353 .cpu_features = CPU_FTRS_POWER10, 354 .cpu_user_features = COMMON_USER_POWER10, 355 .cpu_user_features2 = COMMON_USER2_POWER10, 356 .mmu_features = MMU_FTRS_POWER10, 357 .icache_bsize = 128, 358 .dcache_bsize = 128, 359 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 360 .cpu_setup = __setup_cpu_power10, 361 .cpu_restore = __restore_cpu_power10, 362 .platform = "power10", 363 }, 364 { /* Power7 */ 365 .pvr_mask = 0xffff0000, 366 .pvr_value = 0x003f0000, 367 .cpu_name = "POWER7 (raw)", 368 .cpu_features = CPU_FTRS_POWER7, 369 .cpu_user_features = COMMON_USER_POWER7, 370 .cpu_user_features2 = COMMON_USER2_POWER7, 371 .mmu_features = MMU_FTRS_POWER7, 372 .icache_bsize = 128, 373 .dcache_bsize = 128, 374 .num_pmcs = 6, 375 .pmc_type = PPC_PMC_IBM, 376 .oprofile_cpu_type = "ppc64/power7", 377 .cpu_setup = __setup_cpu_power7, 378 .cpu_restore = __restore_cpu_power7, 379 .machine_check_early = __machine_check_early_realmode_p7, 380 .platform = "power7", 381 }, 382 { /* Power7+ */ 383 .pvr_mask = 0xffff0000, 384 .pvr_value = 0x004A0000, 385 .cpu_name = "POWER7+ (raw)", 386 .cpu_features = CPU_FTRS_POWER7, 387 .cpu_user_features = COMMON_USER_POWER7, 388 .cpu_user_features2 = COMMON_USER2_POWER7, 389 .mmu_features = MMU_FTRS_POWER7, 390 .icache_bsize = 128, 391 .dcache_bsize = 128, 392 .num_pmcs = 6, 393 .pmc_type = PPC_PMC_IBM, 394 .oprofile_cpu_type = "ppc64/power7", 395 .cpu_setup = __setup_cpu_power7, 396 .cpu_restore = __restore_cpu_power7, 397 .machine_check_early = __machine_check_early_realmode_p7, 398 .platform = "power7+", 399 }, 400 { /* Power8E */ 401 .pvr_mask = 0xffff0000, 402 .pvr_value = 0x004b0000, 403 .cpu_name = "POWER8E (raw)", 404 .cpu_features = CPU_FTRS_POWER8E, 405 .cpu_user_features = COMMON_USER_POWER8, 406 .cpu_user_features2 = COMMON_USER2_POWER8, 407 .mmu_features = MMU_FTRS_POWER8, 408 .icache_bsize = 128, 409 .dcache_bsize = 128, 410 .num_pmcs = 6, 411 .pmc_type = PPC_PMC_IBM, 412 .oprofile_cpu_type = "ppc64/power8", 413 .cpu_setup = __setup_cpu_power8, 414 .cpu_restore = __restore_cpu_power8, 415 .machine_check_early = __machine_check_early_realmode_p8, 416 .platform = "power8", 417 }, 418 { /* Power8NVL */ 419 .pvr_mask = 0xffff0000, 420 .pvr_value = 0x004c0000, 421 .cpu_name = "POWER8NVL (raw)", 422 .cpu_features = CPU_FTRS_POWER8, 423 .cpu_user_features = COMMON_USER_POWER8, 424 .cpu_user_features2 = COMMON_USER2_POWER8, 425 .mmu_features = MMU_FTRS_POWER8, 426 .icache_bsize = 128, 427 .dcache_bsize = 128, 428 .num_pmcs = 6, 429 .pmc_type = PPC_PMC_IBM, 430 .oprofile_cpu_type = "ppc64/power8", 431 .cpu_setup = __setup_cpu_power8, 432 .cpu_restore = __restore_cpu_power8, 433 .machine_check_early = __machine_check_early_realmode_p8, 434 .platform = "power8", 435 }, 436 { /* Power8 */ 437 .pvr_mask = 0xffff0000, 438 .pvr_value = 0x004d0000, 439 .cpu_name = "POWER8 (raw)", 440 .cpu_features = CPU_FTRS_POWER8, 441 .cpu_user_features = COMMON_USER_POWER8, 442 .cpu_user_features2 = COMMON_USER2_POWER8, 443 .mmu_features = MMU_FTRS_POWER8, 444 .icache_bsize = 128, 445 .dcache_bsize = 128, 446 .num_pmcs = 6, 447 .pmc_type = PPC_PMC_IBM, 448 .oprofile_cpu_type = "ppc64/power8", 449 .cpu_setup = __setup_cpu_power8, 450 .cpu_restore = __restore_cpu_power8, 451 .machine_check_early = __machine_check_early_realmode_p8, 452 .platform = "power8", 453 }, 454 { /* Power9 DD2.0 */ 455 .pvr_mask = 0xffffefff, 456 .pvr_value = 0x004e0200, 457 .cpu_name = "POWER9 (raw)", 458 .cpu_features = CPU_FTRS_POWER9_DD2_0, 459 .cpu_user_features = COMMON_USER_POWER9, 460 .cpu_user_features2 = COMMON_USER2_POWER9, 461 .mmu_features = MMU_FTRS_POWER9, 462 .icache_bsize = 128, 463 .dcache_bsize = 128, 464 .num_pmcs = 6, 465 .pmc_type = PPC_PMC_IBM, 466 .oprofile_cpu_type = "ppc64/power9", 467 .cpu_setup = __setup_cpu_power9, 468 .cpu_restore = __restore_cpu_power9, 469 .machine_check_early = __machine_check_early_realmode_p9, 470 .platform = "power9", 471 }, 472 { /* Power9 DD 2.1 */ 473 .pvr_mask = 0xffffefff, 474 .pvr_value = 0x004e0201, 475 .cpu_name = "POWER9 (raw)", 476 .cpu_features = CPU_FTRS_POWER9_DD2_1, 477 .cpu_user_features = COMMON_USER_POWER9, 478 .cpu_user_features2 = COMMON_USER2_POWER9, 479 .mmu_features = MMU_FTRS_POWER9, 480 .icache_bsize = 128, 481 .dcache_bsize = 128, 482 .num_pmcs = 6, 483 .pmc_type = PPC_PMC_IBM, 484 .oprofile_cpu_type = "ppc64/power9", 485 .cpu_setup = __setup_cpu_power9, 486 .cpu_restore = __restore_cpu_power9, 487 .machine_check_early = __machine_check_early_realmode_p9, 488 .platform = "power9", 489 }, 490 { /* Power9 DD2.2 or later */ 491 .pvr_mask = 0xffff0000, 492 .pvr_value = 0x004e0000, 493 .cpu_name = "POWER9 (raw)", 494 .cpu_features = CPU_FTRS_POWER9_DD2_2, 495 .cpu_user_features = COMMON_USER_POWER9, 496 .cpu_user_features2 = COMMON_USER2_POWER9, 497 .mmu_features = MMU_FTRS_POWER9, 498 .icache_bsize = 128, 499 .dcache_bsize = 128, 500 .num_pmcs = 6, 501 .pmc_type = PPC_PMC_IBM, 502 .oprofile_cpu_type = "ppc64/power9", 503 .cpu_setup = __setup_cpu_power9, 504 .cpu_restore = __restore_cpu_power9, 505 .machine_check_early = __machine_check_early_realmode_p9, 506 .platform = "power9", 507 }, 508 { /* Power10 */ 509 .pvr_mask = 0xffff0000, 510 .pvr_value = 0x00800000, 511 .cpu_name = "POWER10 (raw)", 512 .cpu_features = CPU_FTRS_POWER10, 513 .cpu_user_features = COMMON_USER_POWER10, 514 .cpu_user_features2 = COMMON_USER2_POWER10, 515 .mmu_features = MMU_FTRS_POWER10, 516 .icache_bsize = 128, 517 .dcache_bsize = 128, 518 .num_pmcs = 6, 519 .pmc_type = PPC_PMC_IBM, 520 .oprofile_cpu_type = "ppc64/power10", 521 .cpu_setup = __setup_cpu_power10, 522 .cpu_restore = __restore_cpu_power10, 523 .machine_check_early = __machine_check_early_realmode_p10, 524 .platform = "power10", 525 }, 526 { /* Cell Broadband Engine */ 527 .pvr_mask = 0xffff0000, 528 .pvr_value = 0x00700000, 529 .cpu_name = "Cell Broadband Engine", 530 .cpu_features = CPU_FTRS_CELL, 531 .cpu_user_features = COMMON_USER_PPC64 | 532 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 533 PPC_FEATURE_SMT, 534 .mmu_features = MMU_FTRS_CELL, 535 .icache_bsize = 128, 536 .dcache_bsize = 128, 537 .num_pmcs = 4, 538 .pmc_type = PPC_PMC_IBM, 539 .oprofile_cpu_type = "ppc64/cell-be", 540 .platform = "ppc-cell-be", 541 }, 542 { /* PA Semi PA6T */ 543 .pvr_mask = 0x7fff0000, 544 .pvr_value = 0x00900000, 545 .cpu_name = "PA6T", 546 .cpu_features = CPU_FTRS_PA6T, 547 .cpu_user_features = COMMON_USER_PA6T, 548 .mmu_features = MMU_FTRS_PA6T, 549 .icache_bsize = 64, 550 .dcache_bsize = 64, 551 .num_pmcs = 6, 552 .pmc_type = PPC_PMC_PA6T, 553 .cpu_setup = __setup_cpu_pa6t, 554 .cpu_restore = __restore_cpu_pa6t, 555 .oprofile_cpu_type = "ppc64/pa6t", 556 .platform = "pa6t", 557 }, 558 { /* default match */ 559 .pvr_mask = 0x00000000, 560 .pvr_value = 0x00000000, 561 .cpu_name = "POWER5 (compatible)", 562 .cpu_features = CPU_FTRS_COMPATIBLE, 563 .cpu_user_features = COMMON_USER_PPC64, 564 .mmu_features = MMU_FTRS_POWER, 565 .icache_bsize = 128, 566 .dcache_bsize = 128, 567 .num_pmcs = 6, 568 .pmc_type = PPC_PMC_IBM, 569 .platform = "power5", 570 } 571 #endif /* CONFIG_PPC_BOOK3S_64 */ 572 573 #ifdef CONFIG_PPC32 574 #ifdef CONFIG_PPC_BOOK3S_32 575 #ifdef CONFIG_PPC_BOOK3S_604 576 { /* 604 */ 577 .pvr_mask = 0xffff0000, 578 .pvr_value = 0x00040000, 579 .cpu_name = "604", 580 .cpu_features = CPU_FTRS_604, 581 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 582 .mmu_features = MMU_FTR_HPTE_TABLE, 583 .icache_bsize = 32, 584 .dcache_bsize = 32, 585 .num_pmcs = 2, 586 .cpu_setup = __setup_cpu_604, 587 .machine_check = machine_check_generic, 588 .platform = "ppc604", 589 }, 590 { /* 604e */ 591 .pvr_mask = 0xfffff000, 592 .pvr_value = 0x00090000, 593 .cpu_name = "604e", 594 .cpu_features = CPU_FTRS_604, 595 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 596 .mmu_features = MMU_FTR_HPTE_TABLE, 597 .icache_bsize = 32, 598 .dcache_bsize = 32, 599 .num_pmcs = 4, 600 .cpu_setup = __setup_cpu_604, 601 .machine_check = machine_check_generic, 602 .platform = "ppc604", 603 }, 604 { /* 604r */ 605 .pvr_mask = 0xffff0000, 606 .pvr_value = 0x00090000, 607 .cpu_name = "604r", 608 .cpu_features = CPU_FTRS_604, 609 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 610 .mmu_features = MMU_FTR_HPTE_TABLE, 611 .icache_bsize = 32, 612 .dcache_bsize = 32, 613 .num_pmcs = 4, 614 .cpu_setup = __setup_cpu_604, 615 .machine_check = machine_check_generic, 616 .platform = "ppc604", 617 }, 618 { /* 604ev */ 619 .pvr_mask = 0xffff0000, 620 .pvr_value = 0x000a0000, 621 .cpu_name = "604ev", 622 .cpu_features = CPU_FTRS_604, 623 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 624 .mmu_features = MMU_FTR_HPTE_TABLE, 625 .icache_bsize = 32, 626 .dcache_bsize = 32, 627 .num_pmcs = 4, 628 .cpu_setup = __setup_cpu_604, 629 .machine_check = machine_check_generic, 630 .platform = "ppc604", 631 }, 632 { /* 740/750 (0x4202, don't support TAU ?) */ 633 .pvr_mask = 0xffffffff, 634 .pvr_value = 0x00084202, 635 .cpu_name = "740/750", 636 .cpu_features = CPU_FTRS_740_NOTAU, 637 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 638 .mmu_features = MMU_FTR_HPTE_TABLE, 639 .icache_bsize = 32, 640 .dcache_bsize = 32, 641 .num_pmcs = 4, 642 .cpu_setup = __setup_cpu_750, 643 .machine_check = machine_check_generic, 644 .platform = "ppc750", 645 }, 646 { /* 750CX (80100 and 8010x?) */ 647 .pvr_mask = 0xfffffff0, 648 .pvr_value = 0x00080100, 649 .cpu_name = "750CX", 650 .cpu_features = CPU_FTRS_750, 651 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 652 .mmu_features = MMU_FTR_HPTE_TABLE, 653 .icache_bsize = 32, 654 .dcache_bsize = 32, 655 .num_pmcs = 4, 656 .cpu_setup = __setup_cpu_750cx, 657 .machine_check = machine_check_generic, 658 .platform = "ppc750", 659 }, 660 { /* 750CX (82201 and 82202) */ 661 .pvr_mask = 0xfffffff0, 662 .pvr_value = 0x00082200, 663 .cpu_name = "750CX", 664 .cpu_features = CPU_FTRS_750, 665 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 666 .mmu_features = MMU_FTR_HPTE_TABLE, 667 .icache_bsize = 32, 668 .dcache_bsize = 32, 669 .num_pmcs = 4, 670 .pmc_type = PPC_PMC_IBM, 671 .cpu_setup = __setup_cpu_750cx, 672 .machine_check = machine_check_generic, 673 .platform = "ppc750", 674 }, 675 { /* 750CXe (82214) */ 676 .pvr_mask = 0xfffffff0, 677 .pvr_value = 0x00082210, 678 .cpu_name = "750CXe", 679 .cpu_features = CPU_FTRS_750, 680 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 681 .mmu_features = MMU_FTR_HPTE_TABLE, 682 .icache_bsize = 32, 683 .dcache_bsize = 32, 684 .num_pmcs = 4, 685 .pmc_type = PPC_PMC_IBM, 686 .cpu_setup = __setup_cpu_750cx, 687 .machine_check = machine_check_generic, 688 .platform = "ppc750", 689 }, 690 { /* 750CXe "Gekko" (83214) */ 691 .pvr_mask = 0xffffffff, 692 .pvr_value = 0x00083214, 693 .cpu_name = "750CXe", 694 .cpu_features = CPU_FTRS_750, 695 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 696 .mmu_features = MMU_FTR_HPTE_TABLE, 697 .icache_bsize = 32, 698 .dcache_bsize = 32, 699 .num_pmcs = 4, 700 .pmc_type = PPC_PMC_IBM, 701 .cpu_setup = __setup_cpu_750cx, 702 .machine_check = machine_check_generic, 703 .platform = "ppc750", 704 }, 705 { /* 750CL (and "Broadway") */ 706 .pvr_mask = 0xfffff0e0, 707 .pvr_value = 0x00087000, 708 .cpu_name = "750CL", 709 .cpu_features = CPU_FTRS_750CL, 710 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 711 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 712 .icache_bsize = 32, 713 .dcache_bsize = 32, 714 .num_pmcs = 4, 715 .pmc_type = PPC_PMC_IBM, 716 .cpu_setup = __setup_cpu_750, 717 .machine_check = machine_check_generic, 718 .platform = "ppc750", 719 .oprofile_cpu_type = "ppc/750", 720 }, 721 { /* 745/755 */ 722 .pvr_mask = 0xfffff000, 723 .pvr_value = 0x00083000, 724 .cpu_name = "745/755", 725 .cpu_features = CPU_FTRS_750, 726 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 727 .mmu_features = MMU_FTR_HPTE_TABLE, 728 .icache_bsize = 32, 729 .dcache_bsize = 32, 730 .num_pmcs = 4, 731 .pmc_type = PPC_PMC_IBM, 732 .cpu_setup = __setup_cpu_750, 733 .machine_check = machine_check_generic, 734 .platform = "ppc750", 735 }, 736 { /* 750FX rev 1.x */ 737 .pvr_mask = 0xffffff00, 738 .pvr_value = 0x70000100, 739 .cpu_name = "750FX", 740 .cpu_features = CPU_FTRS_750FX1, 741 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 742 .mmu_features = MMU_FTR_HPTE_TABLE, 743 .icache_bsize = 32, 744 .dcache_bsize = 32, 745 .num_pmcs = 4, 746 .pmc_type = PPC_PMC_IBM, 747 .cpu_setup = __setup_cpu_750, 748 .machine_check = machine_check_generic, 749 .platform = "ppc750", 750 .oprofile_cpu_type = "ppc/750", 751 }, 752 { /* 750FX rev 2.0 must disable HID0[DPM] */ 753 .pvr_mask = 0xffffffff, 754 .pvr_value = 0x70000200, 755 .cpu_name = "750FX", 756 .cpu_features = CPU_FTRS_750FX2, 757 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 758 .mmu_features = MMU_FTR_HPTE_TABLE, 759 .icache_bsize = 32, 760 .dcache_bsize = 32, 761 .num_pmcs = 4, 762 .pmc_type = PPC_PMC_IBM, 763 .cpu_setup = __setup_cpu_750, 764 .machine_check = machine_check_generic, 765 .platform = "ppc750", 766 .oprofile_cpu_type = "ppc/750", 767 }, 768 { /* 750FX (All revs except 2.0) */ 769 .pvr_mask = 0xffff0000, 770 .pvr_value = 0x70000000, 771 .cpu_name = "750FX", 772 .cpu_features = CPU_FTRS_750FX, 773 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 774 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 775 .icache_bsize = 32, 776 .dcache_bsize = 32, 777 .num_pmcs = 4, 778 .pmc_type = PPC_PMC_IBM, 779 .cpu_setup = __setup_cpu_750fx, 780 .machine_check = machine_check_generic, 781 .platform = "ppc750", 782 .oprofile_cpu_type = "ppc/750", 783 }, 784 { /* 750GX */ 785 .pvr_mask = 0xffff0000, 786 .pvr_value = 0x70020000, 787 .cpu_name = "750GX", 788 .cpu_features = CPU_FTRS_750GX, 789 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 790 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 791 .icache_bsize = 32, 792 .dcache_bsize = 32, 793 .num_pmcs = 4, 794 .pmc_type = PPC_PMC_IBM, 795 .cpu_setup = __setup_cpu_750fx, 796 .machine_check = machine_check_generic, 797 .platform = "ppc750", 798 .oprofile_cpu_type = "ppc/750", 799 }, 800 { /* 740/750 (L2CR bit need fixup for 740) */ 801 .pvr_mask = 0xffff0000, 802 .pvr_value = 0x00080000, 803 .cpu_name = "740/750", 804 .cpu_features = CPU_FTRS_740, 805 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 806 .mmu_features = MMU_FTR_HPTE_TABLE, 807 .icache_bsize = 32, 808 .dcache_bsize = 32, 809 .num_pmcs = 4, 810 .pmc_type = PPC_PMC_IBM, 811 .cpu_setup = __setup_cpu_750, 812 .machine_check = machine_check_generic, 813 .platform = "ppc750", 814 }, 815 { /* 7400 rev 1.1 ? (no TAU) */ 816 .pvr_mask = 0xffffffff, 817 .pvr_value = 0x000c1101, 818 .cpu_name = "7400 (1.1)", 819 .cpu_features = CPU_FTRS_7400_NOTAU, 820 .cpu_user_features = COMMON_USER | 821 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 822 .mmu_features = MMU_FTR_HPTE_TABLE, 823 .icache_bsize = 32, 824 .dcache_bsize = 32, 825 .num_pmcs = 4, 826 .pmc_type = PPC_PMC_G4, 827 .cpu_setup = __setup_cpu_7400, 828 .machine_check = machine_check_generic, 829 .platform = "ppc7400", 830 }, 831 { /* 7400 */ 832 .pvr_mask = 0xffff0000, 833 .pvr_value = 0x000c0000, 834 .cpu_name = "7400", 835 .cpu_features = CPU_FTRS_7400, 836 .cpu_user_features = COMMON_USER | 837 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 838 .mmu_features = MMU_FTR_HPTE_TABLE, 839 .icache_bsize = 32, 840 .dcache_bsize = 32, 841 .num_pmcs = 4, 842 .pmc_type = PPC_PMC_G4, 843 .cpu_setup = __setup_cpu_7400, 844 .machine_check = machine_check_generic, 845 .platform = "ppc7400", 846 }, 847 { /* 7410 */ 848 .pvr_mask = 0xffff0000, 849 .pvr_value = 0x800c0000, 850 .cpu_name = "7410", 851 .cpu_features = CPU_FTRS_7400, 852 .cpu_user_features = COMMON_USER | 853 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 854 .mmu_features = MMU_FTR_HPTE_TABLE, 855 .icache_bsize = 32, 856 .dcache_bsize = 32, 857 .num_pmcs = 4, 858 .pmc_type = PPC_PMC_G4, 859 .cpu_setup = __setup_cpu_7410, 860 .machine_check = machine_check_generic, 861 .platform = "ppc7400", 862 }, 863 { /* 7450 2.0 - no doze/nap */ 864 .pvr_mask = 0xffffffff, 865 .pvr_value = 0x80000200, 866 .cpu_name = "7450", 867 .cpu_features = CPU_FTRS_7450_20, 868 .cpu_user_features = COMMON_USER | 869 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 870 .mmu_features = MMU_FTR_HPTE_TABLE, 871 .icache_bsize = 32, 872 .dcache_bsize = 32, 873 .num_pmcs = 6, 874 .pmc_type = PPC_PMC_G4, 875 .cpu_setup = __setup_cpu_745x, 876 .oprofile_cpu_type = "ppc/7450", 877 .machine_check = machine_check_generic, 878 .platform = "ppc7450", 879 }, 880 { /* 7450 2.1 */ 881 .pvr_mask = 0xffffffff, 882 .pvr_value = 0x80000201, 883 .cpu_name = "7450", 884 .cpu_features = CPU_FTRS_7450_21, 885 .cpu_user_features = COMMON_USER | 886 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 887 .mmu_features = MMU_FTR_HPTE_TABLE, 888 .icache_bsize = 32, 889 .dcache_bsize = 32, 890 .num_pmcs = 6, 891 .pmc_type = PPC_PMC_G4, 892 .cpu_setup = __setup_cpu_745x, 893 .oprofile_cpu_type = "ppc/7450", 894 .machine_check = machine_check_generic, 895 .platform = "ppc7450", 896 }, 897 { /* 7450 2.3 and newer */ 898 .pvr_mask = 0xffff0000, 899 .pvr_value = 0x80000000, 900 .cpu_name = "7450", 901 .cpu_features = CPU_FTRS_7450_23, 902 .cpu_user_features = COMMON_USER | 903 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 904 .mmu_features = MMU_FTR_HPTE_TABLE, 905 .icache_bsize = 32, 906 .dcache_bsize = 32, 907 .num_pmcs = 6, 908 .pmc_type = PPC_PMC_G4, 909 .cpu_setup = __setup_cpu_745x, 910 .oprofile_cpu_type = "ppc/7450", 911 .machine_check = machine_check_generic, 912 .platform = "ppc7450", 913 }, 914 { /* 7455 rev 1.x */ 915 .pvr_mask = 0xffffff00, 916 .pvr_value = 0x80010100, 917 .cpu_name = "7455", 918 .cpu_features = CPU_FTRS_7455_1, 919 .cpu_user_features = COMMON_USER | 920 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 921 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 922 .icache_bsize = 32, 923 .dcache_bsize = 32, 924 .num_pmcs = 6, 925 .pmc_type = PPC_PMC_G4, 926 .cpu_setup = __setup_cpu_745x, 927 .oprofile_cpu_type = "ppc/7450", 928 .machine_check = machine_check_generic, 929 .platform = "ppc7450", 930 }, 931 { /* 7455 rev 2.0 */ 932 .pvr_mask = 0xffffffff, 933 .pvr_value = 0x80010200, 934 .cpu_name = "7455", 935 .cpu_features = CPU_FTRS_7455_20, 936 .cpu_user_features = COMMON_USER | 937 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 938 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 939 .icache_bsize = 32, 940 .dcache_bsize = 32, 941 .num_pmcs = 6, 942 .pmc_type = PPC_PMC_G4, 943 .cpu_setup = __setup_cpu_745x, 944 .oprofile_cpu_type = "ppc/7450", 945 .machine_check = machine_check_generic, 946 .platform = "ppc7450", 947 }, 948 { /* 7455 others */ 949 .pvr_mask = 0xffff0000, 950 .pvr_value = 0x80010000, 951 .cpu_name = "7455", 952 .cpu_features = CPU_FTRS_7455, 953 .cpu_user_features = COMMON_USER | 954 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 955 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 956 .icache_bsize = 32, 957 .dcache_bsize = 32, 958 .num_pmcs = 6, 959 .pmc_type = PPC_PMC_G4, 960 .cpu_setup = __setup_cpu_745x, 961 .oprofile_cpu_type = "ppc/7450", 962 .machine_check = machine_check_generic, 963 .platform = "ppc7450", 964 }, 965 { /* 7447/7457 Rev 1.0 */ 966 .pvr_mask = 0xffffffff, 967 .pvr_value = 0x80020100, 968 .cpu_name = "7447/7457", 969 .cpu_features = CPU_FTRS_7447_10, 970 .cpu_user_features = COMMON_USER | 971 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 972 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 973 .icache_bsize = 32, 974 .dcache_bsize = 32, 975 .num_pmcs = 6, 976 .pmc_type = PPC_PMC_G4, 977 .cpu_setup = __setup_cpu_745x, 978 .oprofile_cpu_type = "ppc/7450", 979 .machine_check = machine_check_generic, 980 .platform = "ppc7450", 981 }, 982 { /* 7447/7457 Rev 1.1 */ 983 .pvr_mask = 0xffffffff, 984 .pvr_value = 0x80020101, 985 .cpu_name = "7447/7457", 986 .cpu_features = CPU_FTRS_7447_10, 987 .cpu_user_features = COMMON_USER | 988 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 989 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 990 .icache_bsize = 32, 991 .dcache_bsize = 32, 992 .num_pmcs = 6, 993 .pmc_type = PPC_PMC_G4, 994 .cpu_setup = __setup_cpu_745x, 995 .oprofile_cpu_type = "ppc/7450", 996 .machine_check = machine_check_generic, 997 .platform = "ppc7450", 998 }, 999 { /* 7447/7457 Rev 1.2 and later */ 1000 .pvr_mask = 0xffff0000, 1001 .pvr_value = 0x80020000, 1002 .cpu_name = "7447/7457", 1003 .cpu_features = CPU_FTRS_7447, 1004 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1005 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1006 .icache_bsize = 32, 1007 .dcache_bsize = 32, 1008 .num_pmcs = 6, 1009 .pmc_type = PPC_PMC_G4, 1010 .cpu_setup = __setup_cpu_745x, 1011 .oprofile_cpu_type = "ppc/7450", 1012 .machine_check = machine_check_generic, 1013 .platform = "ppc7450", 1014 }, 1015 { /* 7447A */ 1016 .pvr_mask = 0xffff0000, 1017 .pvr_value = 0x80030000, 1018 .cpu_name = "7447A", 1019 .cpu_features = CPU_FTRS_7447A, 1020 .cpu_user_features = COMMON_USER | 1021 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1022 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1023 .icache_bsize = 32, 1024 .dcache_bsize = 32, 1025 .num_pmcs = 6, 1026 .pmc_type = PPC_PMC_G4, 1027 .cpu_setup = __setup_cpu_745x, 1028 .oprofile_cpu_type = "ppc/7450", 1029 .machine_check = machine_check_generic, 1030 .platform = "ppc7450", 1031 }, 1032 { /* 7448 */ 1033 .pvr_mask = 0xffff0000, 1034 .pvr_value = 0x80040000, 1035 .cpu_name = "7448", 1036 .cpu_features = CPU_FTRS_7448, 1037 .cpu_user_features = COMMON_USER | 1038 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1039 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1040 .icache_bsize = 32, 1041 .dcache_bsize = 32, 1042 .num_pmcs = 6, 1043 .pmc_type = PPC_PMC_G4, 1044 .cpu_setup = __setup_cpu_745x, 1045 .oprofile_cpu_type = "ppc/7450", 1046 .machine_check = machine_check_generic, 1047 .platform = "ppc7450", 1048 }, 1049 #endif /* CONFIG_PPC_BOOK3S_604 */ 1050 #ifdef CONFIG_PPC_BOOK3S_603 1051 { /* 603 */ 1052 .pvr_mask = 0xffff0000, 1053 .pvr_value = 0x00030000, 1054 .cpu_name = "603", 1055 .cpu_features = CPU_FTRS_603, 1056 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 1057 .mmu_features = 0, 1058 .icache_bsize = 32, 1059 .dcache_bsize = 32, 1060 .cpu_setup = __setup_cpu_603, 1061 .machine_check = machine_check_generic, 1062 .platform = "ppc603", 1063 }, 1064 { /* 603e */ 1065 .pvr_mask = 0xffff0000, 1066 .pvr_value = 0x00060000, 1067 .cpu_name = "603e", 1068 .cpu_features = CPU_FTRS_603, 1069 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 1070 .mmu_features = 0, 1071 .icache_bsize = 32, 1072 .dcache_bsize = 32, 1073 .cpu_setup = __setup_cpu_603, 1074 .machine_check = machine_check_generic, 1075 .platform = "ppc603", 1076 }, 1077 { /* 603ev */ 1078 .pvr_mask = 0xffff0000, 1079 .pvr_value = 0x00070000, 1080 .cpu_name = "603ev", 1081 .cpu_features = CPU_FTRS_603, 1082 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 1083 .mmu_features = 0, 1084 .icache_bsize = 32, 1085 .dcache_bsize = 32, 1086 .cpu_setup = __setup_cpu_603, 1087 .machine_check = machine_check_generic, 1088 .platform = "ppc603", 1089 }, 1090 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1091 .pvr_mask = 0x7fff0000, 1092 .pvr_value = 0x00810000, 1093 .cpu_name = "82xx", 1094 .cpu_features = CPU_FTRS_82XX, 1095 .cpu_user_features = COMMON_USER, 1096 .mmu_features = 0, 1097 .icache_bsize = 32, 1098 .dcache_bsize = 32, 1099 .cpu_setup = __setup_cpu_603, 1100 .machine_check = machine_check_generic, 1101 .platform = "ppc603", 1102 }, 1103 { /* All G2_LE (603e core, plus some) have the same pvr */ 1104 .pvr_mask = 0x7fff0000, 1105 .pvr_value = 0x00820000, 1106 .cpu_name = "G2_LE", 1107 .cpu_features = CPU_FTRS_G2_LE, 1108 .cpu_user_features = COMMON_USER, 1109 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1110 .icache_bsize = 32, 1111 .dcache_bsize = 32, 1112 .cpu_setup = __setup_cpu_603, 1113 .machine_check = machine_check_generic, 1114 .platform = "ppc603", 1115 }, 1116 #ifdef CONFIG_PPC_83xx 1117 { /* e300c1 (a 603e core, plus some) on 83xx */ 1118 .pvr_mask = 0x7fff0000, 1119 .pvr_value = 0x00830000, 1120 .cpu_name = "e300c1", 1121 .cpu_features = CPU_FTRS_E300, 1122 .cpu_user_features = COMMON_USER, 1123 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1124 .icache_bsize = 32, 1125 .dcache_bsize = 32, 1126 .cpu_setup = __setup_cpu_603, 1127 .machine_check = machine_check_83xx, 1128 .platform = "ppc603", 1129 }, 1130 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1131 .pvr_mask = 0x7fff0000, 1132 .pvr_value = 0x00840000, 1133 .cpu_name = "e300c2", 1134 .cpu_features = CPU_FTRS_E300C2, 1135 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1136 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1137 MMU_FTR_NEED_DTLB_SW_LRU, 1138 .icache_bsize = 32, 1139 .dcache_bsize = 32, 1140 .cpu_setup = __setup_cpu_603, 1141 .machine_check = machine_check_83xx, 1142 .platform = "ppc603", 1143 }, 1144 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1145 .pvr_mask = 0x7fff0000, 1146 .pvr_value = 0x00850000, 1147 .cpu_name = "e300c3", 1148 .cpu_features = CPU_FTRS_E300, 1149 .cpu_user_features = COMMON_USER, 1150 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1151 MMU_FTR_NEED_DTLB_SW_LRU, 1152 .icache_bsize = 32, 1153 .dcache_bsize = 32, 1154 .cpu_setup = __setup_cpu_603, 1155 .machine_check = machine_check_83xx, 1156 .num_pmcs = 4, 1157 .oprofile_cpu_type = "ppc/e300", 1158 .platform = "ppc603", 1159 }, 1160 { /* e300c4 (e300c1, plus one IU) */ 1161 .pvr_mask = 0x7fff0000, 1162 .pvr_value = 0x00860000, 1163 .cpu_name = "e300c4", 1164 .cpu_features = CPU_FTRS_E300, 1165 .cpu_user_features = COMMON_USER, 1166 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1167 MMU_FTR_NEED_DTLB_SW_LRU, 1168 .icache_bsize = 32, 1169 .dcache_bsize = 32, 1170 .cpu_setup = __setup_cpu_603, 1171 .machine_check = machine_check_83xx, 1172 .num_pmcs = 4, 1173 .oprofile_cpu_type = "ppc/e300", 1174 .platform = "ppc603", 1175 }, 1176 #endif 1177 #endif /* CONFIG_PPC_BOOK3S_603 */ 1178 #ifdef CONFIG_PPC_BOOK3S_604 1179 { /* default match, we assume split I/D cache & TB (non-601)... */ 1180 .pvr_mask = 0x00000000, 1181 .pvr_value = 0x00000000, 1182 .cpu_name = "(generic PPC)", 1183 .cpu_features = CPU_FTRS_CLASSIC32, 1184 .cpu_user_features = COMMON_USER, 1185 .mmu_features = MMU_FTR_HPTE_TABLE, 1186 .icache_bsize = 32, 1187 .dcache_bsize = 32, 1188 .machine_check = machine_check_generic, 1189 .platform = "ppc603", 1190 }, 1191 #endif /* CONFIG_PPC_BOOK3S_604 */ 1192 #endif /* CONFIG_PPC_BOOK3S_32 */ 1193 #ifdef CONFIG_PPC_8xx 1194 { /* 8xx */ 1195 .pvr_mask = 0xffff0000, 1196 .pvr_value = PVR_8xx, 1197 .cpu_name = "8xx", 1198 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1199 * if the 8xx code is there.... */ 1200 .cpu_features = CPU_FTRS_8XX, 1201 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1202 .mmu_features = MMU_FTR_TYPE_8xx, 1203 .icache_bsize = 16, 1204 .dcache_bsize = 16, 1205 .machine_check = machine_check_8xx, 1206 .platform = "ppc823", 1207 }, 1208 #endif /* CONFIG_PPC_8xx */ 1209 #ifdef CONFIG_40x 1210 { /* STB 04xxx */ 1211 .pvr_mask = 0xffff0000, 1212 .pvr_value = 0x41810000, 1213 .cpu_name = "STB04xxx", 1214 .cpu_features = CPU_FTRS_40X, 1215 .cpu_user_features = PPC_FEATURE_32 | 1216 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1217 .mmu_features = MMU_FTR_TYPE_40x, 1218 .icache_bsize = 32, 1219 .dcache_bsize = 32, 1220 .machine_check = machine_check_4xx, 1221 .platform = "ppc405", 1222 }, 1223 { /* NP405L */ 1224 .pvr_mask = 0xffff0000, 1225 .pvr_value = 0x41610000, 1226 .cpu_name = "NP405L", 1227 .cpu_features = CPU_FTRS_40X, 1228 .cpu_user_features = PPC_FEATURE_32 | 1229 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1230 .mmu_features = MMU_FTR_TYPE_40x, 1231 .icache_bsize = 32, 1232 .dcache_bsize = 32, 1233 .machine_check = machine_check_4xx, 1234 .platform = "ppc405", 1235 }, 1236 { /* NP4GS3 */ 1237 .pvr_mask = 0xffff0000, 1238 .pvr_value = 0x40B10000, 1239 .cpu_name = "NP4GS3", 1240 .cpu_features = CPU_FTRS_40X, 1241 .cpu_user_features = PPC_FEATURE_32 | 1242 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1243 .mmu_features = MMU_FTR_TYPE_40x, 1244 .icache_bsize = 32, 1245 .dcache_bsize = 32, 1246 .machine_check = machine_check_4xx, 1247 .platform = "ppc405", 1248 }, 1249 { /* NP405H */ 1250 .pvr_mask = 0xffff0000, 1251 .pvr_value = 0x41410000, 1252 .cpu_name = "NP405H", 1253 .cpu_features = CPU_FTRS_40X, 1254 .cpu_user_features = PPC_FEATURE_32 | 1255 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1256 .mmu_features = MMU_FTR_TYPE_40x, 1257 .icache_bsize = 32, 1258 .dcache_bsize = 32, 1259 .machine_check = machine_check_4xx, 1260 .platform = "ppc405", 1261 }, 1262 { /* 405GPr */ 1263 .pvr_mask = 0xffff0000, 1264 .pvr_value = 0x50910000, 1265 .cpu_name = "405GPr", 1266 .cpu_features = CPU_FTRS_40X, 1267 .cpu_user_features = PPC_FEATURE_32 | 1268 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1269 .mmu_features = MMU_FTR_TYPE_40x, 1270 .icache_bsize = 32, 1271 .dcache_bsize = 32, 1272 .machine_check = machine_check_4xx, 1273 .platform = "ppc405", 1274 }, 1275 { /* STBx25xx */ 1276 .pvr_mask = 0xffff0000, 1277 .pvr_value = 0x51510000, 1278 .cpu_name = "STBx25xx", 1279 .cpu_features = CPU_FTRS_40X, 1280 .cpu_user_features = PPC_FEATURE_32 | 1281 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1282 .mmu_features = MMU_FTR_TYPE_40x, 1283 .icache_bsize = 32, 1284 .dcache_bsize = 32, 1285 .machine_check = machine_check_4xx, 1286 .platform = "ppc405", 1287 }, 1288 { /* 405LP */ 1289 .pvr_mask = 0xffff0000, 1290 .pvr_value = 0x41F10000, 1291 .cpu_name = "405LP", 1292 .cpu_features = CPU_FTRS_40X, 1293 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1294 .mmu_features = MMU_FTR_TYPE_40x, 1295 .icache_bsize = 32, 1296 .dcache_bsize = 32, 1297 .machine_check = machine_check_4xx, 1298 .platform = "ppc405", 1299 }, 1300 { /* 405EP */ 1301 .pvr_mask = 0xffff0000, 1302 .pvr_value = 0x51210000, 1303 .cpu_name = "405EP", 1304 .cpu_features = CPU_FTRS_40X, 1305 .cpu_user_features = PPC_FEATURE_32 | 1306 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1307 .mmu_features = MMU_FTR_TYPE_40x, 1308 .icache_bsize = 32, 1309 .dcache_bsize = 32, 1310 .machine_check = machine_check_4xx, 1311 .platform = "ppc405", 1312 }, 1313 { /* 405EX Rev. A/B with Security */ 1314 .pvr_mask = 0xffff000f, 1315 .pvr_value = 0x12910007, 1316 .cpu_name = "405EX Rev. A/B", 1317 .cpu_features = CPU_FTRS_40X, 1318 .cpu_user_features = PPC_FEATURE_32 | 1319 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1320 .mmu_features = MMU_FTR_TYPE_40x, 1321 .icache_bsize = 32, 1322 .dcache_bsize = 32, 1323 .machine_check = machine_check_4xx, 1324 .platform = "ppc405", 1325 }, 1326 { /* 405EX Rev. C without Security */ 1327 .pvr_mask = 0xffff000f, 1328 .pvr_value = 0x1291000d, 1329 .cpu_name = "405EX Rev. C", 1330 .cpu_features = CPU_FTRS_40X, 1331 .cpu_user_features = PPC_FEATURE_32 | 1332 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1333 .mmu_features = MMU_FTR_TYPE_40x, 1334 .icache_bsize = 32, 1335 .dcache_bsize = 32, 1336 .machine_check = machine_check_4xx, 1337 .platform = "ppc405", 1338 }, 1339 { /* 405EX Rev. C with Security */ 1340 .pvr_mask = 0xffff000f, 1341 .pvr_value = 0x1291000f, 1342 .cpu_name = "405EX Rev. C", 1343 .cpu_features = CPU_FTRS_40X, 1344 .cpu_user_features = PPC_FEATURE_32 | 1345 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1346 .mmu_features = MMU_FTR_TYPE_40x, 1347 .icache_bsize = 32, 1348 .dcache_bsize = 32, 1349 .machine_check = machine_check_4xx, 1350 .platform = "ppc405", 1351 }, 1352 { /* 405EX Rev. D without Security */ 1353 .pvr_mask = 0xffff000f, 1354 .pvr_value = 0x12910003, 1355 .cpu_name = "405EX Rev. D", 1356 .cpu_features = CPU_FTRS_40X, 1357 .cpu_user_features = PPC_FEATURE_32 | 1358 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1359 .mmu_features = MMU_FTR_TYPE_40x, 1360 .icache_bsize = 32, 1361 .dcache_bsize = 32, 1362 .machine_check = machine_check_4xx, 1363 .platform = "ppc405", 1364 }, 1365 { /* 405EX Rev. D with Security */ 1366 .pvr_mask = 0xffff000f, 1367 .pvr_value = 0x12910005, 1368 .cpu_name = "405EX Rev. D", 1369 .cpu_features = CPU_FTRS_40X, 1370 .cpu_user_features = PPC_FEATURE_32 | 1371 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1372 .mmu_features = MMU_FTR_TYPE_40x, 1373 .icache_bsize = 32, 1374 .dcache_bsize = 32, 1375 .machine_check = machine_check_4xx, 1376 .platform = "ppc405", 1377 }, 1378 { /* 405EXr Rev. A/B without Security */ 1379 .pvr_mask = 0xffff000f, 1380 .pvr_value = 0x12910001, 1381 .cpu_name = "405EXr Rev. A/B", 1382 .cpu_features = CPU_FTRS_40X, 1383 .cpu_user_features = PPC_FEATURE_32 | 1384 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1385 .mmu_features = MMU_FTR_TYPE_40x, 1386 .icache_bsize = 32, 1387 .dcache_bsize = 32, 1388 .machine_check = machine_check_4xx, 1389 .platform = "ppc405", 1390 }, 1391 { /* 405EXr Rev. C without Security */ 1392 .pvr_mask = 0xffff000f, 1393 .pvr_value = 0x12910009, 1394 .cpu_name = "405EXr Rev. C", 1395 .cpu_features = CPU_FTRS_40X, 1396 .cpu_user_features = PPC_FEATURE_32 | 1397 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1398 .mmu_features = MMU_FTR_TYPE_40x, 1399 .icache_bsize = 32, 1400 .dcache_bsize = 32, 1401 .machine_check = machine_check_4xx, 1402 .platform = "ppc405", 1403 }, 1404 { /* 405EXr Rev. C with Security */ 1405 .pvr_mask = 0xffff000f, 1406 .pvr_value = 0x1291000b, 1407 .cpu_name = "405EXr Rev. C", 1408 .cpu_features = CPU_FTRS_40X, 1409 .cpu_user_features = PPC_FEATURE_32 | 1410 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1411 .mmu_features = MMU_FTR_TYPE_40x, 1412 .icache_bsize = 32, 1413 .dcache_bsize = 32, 1414 .machine_check = machine_check_4xx, 1415 .platform = "ppc405", 1416 }, 1417 { /* 405EXr Rev. D without Security */ 1418 .pvr_mask = 0xffff000f, 1419 .pvr_value = 0x12910000, 1420 .cpu_name = "405EXr Rev. D", 1421 .cpu_features = CPU_FTRS_40X, 1422 .cpu_user_features = PPC_FEATURE_32 | 1423 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1424 .mmu_features = MMU_FTR_TYPE_40x, 1425 .icache_bsize = 32, 1426 .dcache_bsize = 32, 1427 .machine_check = machine_check_4xx, 1428 .platform = "ppc405", 1429 }, 1430 { /* 405EXr Rev. D with Security */ 1431 .pvr_mask = 0xffff000f, 1432 .pvr_value = 0x12910002, 1433 .cpu_name = "405EXr Rev. D", 1434 .cpu_features = CPU_FTRS_40X, 1435 .cpu_user_features = PPC_FEATURE_32 | 1436 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1437 .mmu_features = MMU_FTR_TYPE_40x, 1438 .icache_bsize = 32, 1439 .dcache_bsize = 32, 1440 .machine_check = machine_check_4xx, 1441 .platform = "ppc405", 1442 }, 1443 { 1444 /* 405EZ */ 1445 .pvr_mask = 0xffff0000, 1446 .pvr_value = 0x41510000, 1447 .cpu_name = "405EZ", 1448 .cpu_features = CPU_FTRS_40X, 1449 .cpu_user_features = PPC_FEATURE_32 | 1450 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1451 .mmu_features = MMU_FTR_TYPE_40x, 1452 .icache_bsize = 32, 1453 .dcache_bsize = 32, 1454 .machine_check = machine_check_4xx, 1455 .platform = "ppc405", 1456 }, 1457 { /* APM8018X */ 1458 .pvr_mask = 0xffff0000, 1459 .pvr_value = 0x7ff11432, 1460 .cpu_name = "APM8018X", 1461 .cpu_features = CPU_FTRS_40X, 1462 .cpu_user_features = PPC_FEATURE_32 | 1463 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1464 .mmu_features = MMU_FTR_TYPE_40x, 1465 .icache_bsize = 32, 1466 .dcache_bsize = 32, 1467 .machine_check = machine_check_4xx, 1468 .platform = "ppc405", 1469 }, 1470 { /* default match */ 1471 .pvr_mask = 0x00000000, 1472 .pvr_value = 0x00000000, 1473 .cpu_name = "(generic 40x PPC)", 1474 .cpu_features = CPU_FTRS_40X, 1475 .cpu_user_features = PPC_FEATURE_32 | 1476 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1477 .mmu_features = MMU_FTR_TYPE_40x, 1478 .icache_bsize = 32, 1479 .dcache_bsize = 32, 1480 .machine_check = machine_check_4xx, 1481 .platform = "ppc405", 1482 } 1483 1484 #endif /* CONFIG_40x */ 1485 #ifdef CONFIG_44x 1486 #ifndef CONFIG_PPC_47x 1487 { 1488 .pvr_mask = 0xf0000fff, 1489 .pvr_value = 0x40000850, 1490 .cpu_name = "440GR Rev. A", 1491 .cpu_features = CPU_FTRS_44X, 1492 .cpu_user_features = COMMON_USER_BOOKE, 1493 .mmu_features = MMU_FTR_TYPE_44x, 1494 .icache_bsize = 32, 1495 .dcache_bsize = 32, 1496 .machine_check = machine_check_4xx, 1497 .platform = "ppc440", 1498 }, 1499 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1500 .pvr_mask = 0xf0000fff, 1501 .pvr_value = 0x40000858, 1502 .cpu_name = "440EP Rev. A", 1503 .cpu_features = CPU_FTRS_44X, 1504 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1505 .mmu_features = MMU_FTR_TYPE_44x, 1506 .icache_bsize = 32, 1507 .dcache_bsize = 32, 1508 .cpu_setup = __setup_cpu_440ep, 1509 .machine_check = machine_check_4xx, 1510 .platform = "ppc440", 1511 }, 1512 { 1513 .pvr_mask = 0xf0000fff, 1514 .pvr_value = 0x400008d3, 1515 .cpu_name = "440GR Rev. B", 1516 .cpu_features = CPU_FTRS_44X, 1517 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1518 .mmu_features = MMU_FTR_TYPE_44x, 1519 .icache_bsize = 32, 1520 .dcache_bsize = 32, 1521 .machine_check = machine_check_4xx, 1522 .platform = "ppc440", 1523 }, 1524 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1525 .pvr_mask = 0xf0000ff7, 1526 .pvr_value = 0x400008d4, 1527 .cpu_name = "440EP Rev. C", 1528 .cpu_features = CPU_FTRS_44X, 1529 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1530 .mmu_features = MMU_FTR_TYPE_44x, 1531 .icache_bsize = 32, 1532 .dcache_bsize = 32, 1533 .cpu_setup = __setup_cpu_440ep, 1534 .machine_check = machine_check_4xx, 1535 .platform = "ppc440", 1536 }, 1537 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1538 .pvr_mask = 0xf0000fff, 1539 .pvr_value = 0x400008db, 1540 .cpu_name = "440EP Rev. B", 1541 .cpu_features = CPU_FTRS_44X, 1542 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1543 .mmu_features = MMU_FTR_TYPE_44x, 1544 .icache_bsize = 32, 1545 .dcache_bsize = 32, 1546 .cpu_setup = __setup_cpu_440ep, 1547 .machine_check = machine_check_4xx, 1548 .platform = "ppc440", 1549 }, 1550 { /* 440GRX */ 1551 .pvr_mask = 0xf0000ffb, 1552 .pvr_value = 0x200008D0, 1553 .cpu_name = "440GRX", 1554 .cpu_features = CPU_FTRS_44X, 1555 .cpu_user_features = COMMON_USER_BOOKE, 1556 .mmu_features = MMU_FTR_TYPE_44x, 1557 .icache_bsize = 32, 1558 .dcache_bsize = 32, 1559 .cpu_setup = __setup_cpu_440grx, 1560 .machine_check = machine_check_440A, 1561 .platform = "ppc440", 1562 }, 1563 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1564 .pvr_mask = 0xf0000ffb, 1565 .pvr_value = 0x200008D8, 1566 .cpu_name = "440EPX", 1567 .cpu_features = CPU_FTRS_44X, 1568 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1569 .mmu_features = MMU_FTR_TYPE_44x, 1570 .icache_bsize = 32, 1571 .dcache_bsize = 32, 1572 .cpu_setup = __setup_cpu_440epx, 1573 .machine_check = machine_check_440A, 1574 .platform = "ppc440", 1575 }, 1576 { /* 440GP Rev. B */ 1577 .pvr_mask = 0xf0000fff, 1578 .pvr_value = 0x40000440, 1579 .cpu_name = "440GP Rev. B", 1580 .cpu_features = CPU_FTRS_44X, 1581 .cpu_user_features = COMMON_USER_BOOKE, 1582 .mmu_features = MMU_FTR_TYPE_44x, 1583 .icache_bsize = 32, 1584 .dcache_bsize = 32, 1585 .machine_check = machine_check_4xx, 1586 .platform = "ppc440gp", 1587 }, 1588 { /* 440GP Rev. C */ 1589 .pvr_mask = 0xf0000fff, 1590 .pvr_value = 0x40000481, 1591 .cpu_name = "440GP Rev. C", 1592 .cpu_features = CPU_FTRS_44X, 1593 .cpu_user_features = COMMON_USER_BOOKE, 1594 .mmu_features = MMU_FTR_TYPE_44x, 1595 .icache_bsize = 32, 1596 .dcache_bsize = 32, 1597 .machine_check = machine_check_4xx, 1598 .platform = "ppc440gp", 1599 }, 1600 { /* 440GX Rev. A */ 1601 .pvr_mask = 0xf0000fff, 1602 .pvr_value = 0x50000850, 1603 .cpu_name = "440GX Rev. A", 1604 .cpu_features = CPU_FTRS_44X, 1605 .cpu_user_features = COMMON_USER_BOOKE, 1606 .mmu_features = MMU_FTR_TYPE_44x, 1607 .icache_bsize = 32, 1608 .dcache_bsize = 32, 1609 .cpu_setup = __setup_cpu_440gx, 1610 .machine_check = machine_check_440A, 1611 .platform = "ppc440", 1612 }, 1613 { /* 440GX Rev. B */ 1614 .pvr_mask = 0xf0000fff, 1615 .pvr_value = 0x50000851, 1616 .cpu_name = "440GX Rev. B", 1617 .cpu_features = CPU_FTRS_44X, 1618 .cpu_user_features = COMMON_USER_BOOKE, 1619 .mmu_features = MMU_FTR_TYPE_44x, 1620 .icache_bsize = 32, 1621 .dcache_bsize = 32, 1622 .cpu_setup = __setup_cpu_440gx, 1623 .machine_check = machine_check_440A, 1624 .platform = "ppc440", 1625 }, 1626 { /* 440GX Rev. C */ 1627 .pvr_mask = 0xf0000fff, 1628 .pvr_value = 0x50000892, 1629 .cpu_name = "440GX Rev. C", 1630 .cpu_features = CPU_FTRS_44X, 1631 .cpu_user_features = COMMON_USER_BOOKE, 1632 .mmu_features = MMU_FTR_TYPE_44x, 1633 .icache_bsize = 32, 1634 .dcache_bsize = 32, 1635 .cpu_setup = __setup_cpu_440gx, 1636 .machine_check = machine_check_440A, 1637 .platform = "ppc440", 1638 }, 1639 { /* 440GX Rev. F */ 1640 .pvr_mask = 0xf0000fff, 1641 .pvr_value = 0x50000894, 1642 .cpu_name = "440GX Rev. F", 1643 .cpu_features = CPU_FTRS_44X, 1644 .cpu_user_features = COMMON_USER_BOOKE, 1645 .mmu_features = MMU_FTR_TYPE_44x, 1646 .icache_bsize = 32, 1647 .dcache_bsize = 32, 1648 .cpu_setup = __setup_cpu_440gx, 1649 .machine_check = machine_check_440A, 1650 .platform = "ppc440", 1651 }, 1652 { /* 440SP Rev. A */ 1653 .pvr_mask = 0xfff00fff, 1654 .pvr_value = 0x53200891, 1655 .cpu_name = "440SP Rev. A", 1656 .cpu_features = CPU_FTRS_44X, 1657 .cpu_user_features = COMMON_USER_BOOKE, 1658 .mmu_features = MMU_FTR_TYPE_44x, 1659 .icache_bsize = 32, 1660 .dcache_bsize = 32, 1661 .machine_check = machine_check_4xx, 1662 .platform = "ppc440", 1663 }, 1664 { /* 440SPe Rev. A */ 1665 .pvr_mask = 0xfff00fff, 1666 .pvr_value = 0x53400890, 1667 .cpu_name = "440SPe Rev. A", 1668 .cpu_features = CPU_FTRS_44X, 1669 .cpu_user_features = COMMON_USER_BOOKE, 1670 .mmu_features = MMU_FTR_TYPE_44x, 1671 .icache_bsize = 32, 1672 .dcache_bsize = 32, 1673 .cpu_setup = __setup_cpu_440spe, 1674 .machine_check = machine_check_440A, 1675 .platform = "ppc440", 1676 }, 1677 { /* 440SPe Rev. B */ 1678 .pvr_mask = 0xfff00fff, 1679 .pvr_value = 0x53400891, 1680 .cpu_name = "440SPe Rev. B", 1681 .cpu_features = CPU_FTRS_44X, 1682 .cpu_user_features = COMMON_USER_BOOKE, 1683 .mmu_features = MMU_FTR_TYPE_44x, 1684 .icache_bsize = 32, 1685 .dcache_bsize = 32, 1686 .cpu_setup = __setup_cpu_440spe, 1687 .machine_check = machine_check_440A, 1688 .platform = "ppc440", 1689 }, 1690 { /* 460EX */ 1691 .pvr_mask = 0xffff0006, 1692 .pvr_value = 0x13020002, 1693 .cpu_name = "460EX", 1694 .cpu_features = CPU_FTRS_440x6, 1695 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1696 .mmu_features = MMU_FTR_TYPE_44x, 1697 .icache_bsize = 32, 1698 .dcache_bsize = 32, 1699 .cpu_setup = __setup_cpu_460ex, 1700 .machine_check = machine_check_440A, 1701 .platform = "ppc440", 1702 }, 1703 { /* 460EX Rev B */ 1704 .pvr_mask = 0xffff0007, 1705 .pvr_value = 0x13020004, 1706 .cpu_name = "460EX Rev. B", 1707 .cpu_features = CPU_FTRS_440x6, 1708 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1709 .mmu_features = MMU_FTR_TYPE_44x, 1710 .icache_bsize = 32, 1711 .dcache_bsize = 32, 1712 .cpu_setup = __setup_cpu_460ex, 1713 .machine_check = machine_check_440A, 1714 .platform = "ppc440", 1715 }, 1716 { /* 460GT */ 1717 .pvr_mask = 0xffff0006, 1718 .pvr_value = 0x13020000, 1719 .cpu_name = "460GT", 1720 .cpu_features = CPU_FTRS_440x6, 1721 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1722 .mmu_features = MMU_FTR_TYPE_44x, 1723 .icache_bsize = 32, 1724 .dcache_bsize = 32, 1725 .cpu_setup = __setup_cpu_460gt, 1726 .machine_check = machine_check_440A, 1727 .platform = "ppc440", 1728 }, 1729 { /* 460GT Rev B */ 1730 .pvr_mask = 0xffff0007, 1731 .pvr_value = 0x13020005, 1732 .cpu_name = "460GT Rev. B", 1733 .cpu_features = CPU_FTRS_440x6, 1734 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1735 .mmu_features = MMU_FTR_TYPE_44x, 1736 .icache_bsize = 32, 1737 .dcache_bsize = 32, 1738 .cpu_setup = __setup_cpu_460gt, 1739 .machine_check = machine_check_440A, 1740 .platform = "ppc440", 1741 }, 1742 { /* 460SX */ 1743 .pvr_mask = 0xffffff00, 1744 .pvr_value = 0x13541800, 1745 .cpu_name = "460SX", 1746 .cpu_features = CPU_FTRS_44X, 1747 .cpu_user_features = COMMON_USER_BOOKE, 1748 .mmu_features = MMU_FTR_TYPE_44x, 1749 .icache_bsize = 32, 1750 .dcache_bsize = 32, 1751 .cpu_setup = __setup_cpu_460sx, 1752 .machine_check = machine_check_440A, 1753 .platform = "ppc440", 1754 }, 1755 { /* 464 in APM821xx */ 1756 .pvr_mask = 0xfffffff0, 1757 .pvr_value = 0x12C41C80, 1758 .cpu_name = "APM821XX", 1759 .cpu_features = CPU_FTRS_44X, 1760 .cpu_user_features = COMMON_USER_BOOKE | 1761 PPC_FEATURE_HAS_FPU, 1762 .mmu_features = MMU_FTR_TYPE_44x, 1763 .icache_bsize = 32, 1764 .dcache_bsize = 32, 1765 .cpu_setup = __setup_cpu_apm821xx, 1766 .machine_check = machine_check_440A, 1767 .platform = "ppc440", 1768 }, 1769 { /* default match */ 1770 .pvr_mask = 0x00000000, 1771 .pvr_value = 0x00000000, 1772 .cpu_name = "(generic 44x PPC)", 1773 .cpu_features = CPU_FTRS_44X, 1774 .cpu_user_features = COMMON_USER_BOOKE, 1775 .mmu_features = MMU_FTR_TYPE_44x, 1776 .icache_bsize = 32, 1777 .dcache_bsize = 32, 1778 .machine_check = machine_check_4xx, 1779 .platform = "ppc440", 1780 } 1781 #else /* CONFIG_PPC_47x */ 1782 { /* 476 DD2 core */ 1783 .pvr_mask = 0xffffffff, 1784 .pvr_value = 0x11a52080, 1785 .cpu_name = "476", 1786 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1787 .cpu_user_features = COMMON_USER_BOOKE | 1788 PPC_FEATURE_HAS_FPU, 1789 .mmu_features = MMU_FTR_TYPE_47x | 1790 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1791 .icache_bsize = 32, 1792 .dcache_bsize = 128, 1793 .machine_check = machine_check_47x, 1794 .platform = "ppc470", 1795 }, 1796 { /* 476fpe */ 1797 .pvr_mask = 0xffff0000, 1798 .pvr_value = 0x7ff50000, 1799 .cpu_name = "476fpe", 1800 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1801 .cpu_user_features = COMMON_USER_BOOKE | 1802 PPC_FEATURE_HAS_FPU, 1803 .mmu_features = MMU_FTR_TYPE_47x | 1804 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1805 .icache_bsize = 32, 1806 .dcache_bsize = 128, 1807 .machine_check = machine_check_47x, 1808 .platform = "ppc470", 1809 }, 1810 { /* 476 iss */ 1811 .pvr_mask = 0xffff0000, 1812 .pvr_value = 0x00050000, 1813 .cpu_name = "476", 1814 .cpu_features = CPU_FTRS_47X, 1815 .cpu_user_features = COMMON_USER_BOOKE | 1816 PPC_FEATURE_HAS_FPU, 1817 .mmu_features = MMU_FTR_TYPE_47x | 1818 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1819 .icache_bsize = 32, 1820 .dcache_bsize = 128, 1821 .machine_check = machine_check_47x, 1822 .platform = "ppc470", 1823 }, 1824 { /* 476 others */ 1825 .pvr_mask = 0xffff0000, 1826 .pvr_value = 0x11a50000, 1827 .cpu_name = "476", 1828 .cpu_features = CPU_FTRS_47X, 1829 .cpu_user_features = COMMON_USER_BOOKE | 1830 PPC_FEATURE_HAS_FPU, 1831 .mmu_features = MMU_FTR_TYPE_47x | 1832 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1833 .icache_bsize = 32, 1834 .dcache_bsize = 128, 1835 .machine_check = machine_check_47x, 1836 .platform = "ppc470", 1837 }, 1838 { /* default match */ 1839 .pvr_mask = 0x00000000, 1840 .pvr_value = 0x00000000, 1841 .cpu_name = "(generic 47x PPC)", 1842 .cpu_features = CPU_FTRS_47X, 1843 .cpu_user_features = COMMON_USER_BOOKE, 1844 .mmu_features = MMU_FTR_TYPE_47x, 1845 .icache_bsize = 32, 1846 .dcache_bsize = 128, 1847 .machine_check = machine_check_47x, 1848 .platform = "ppc470", 1849 } 1850 #endif /* CONFIG_PPC_47x */ 1851 #endif /* CONFIG_44x */ 1852 #endif /* CONFIG_PPC32 */ 1853 #ifdef CONFIG_E500 1854 #ifdef CONFIG_PPC32 1855 #ifndef CONFIG_PPC_E500MC 1856 { /* e500 */ 1857 .pvr_mask = 0xffff0000, 1858 .pvr_value = 0x80200000, 1859 .cpu_name = "e500", 1860 .cpu_features = CPU_FTRS_E500, 1861 .cpu_user_features = COMMON_USER_BOOKE | 1862 PPC_FEATURE_HAS_SPE_COMP | 1863 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1864 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1865 .mmu_features = MMU_FTR_TYPE_FSL_E, 1866 .icache_bsize = 32, 1867 .dcache_bsize = 32, 1868 .num_pmcs = 4, 1869 .oprofile_cpu_type = "ppc/e500", 1870 .cpu_setup = __setup_cpu_e500v1, 1871 .machine_check = machine_check_e500, 1872 .platform = "ppc8540", 1873 }, 1874 { /* e500v2 */ 1875 .pvr_mask = 0xffff0000, 1876 .pvr_value = 0x80210000, 1877 .cpu_name = "e500v2", 1878 .cpu_features = CPU_FTRS_E500_2, 1879 .cpu_user_features = COMMON_USER_BOOKE | 1880 PPC_FEATURE_HAS_SPE_COMP | 1881 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1882 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1883 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1884 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1885 .icache_bsize = 32, 1886 .dcache_bsize = 32, 1887 .num_pmcs = 4, 1888 .oprofile_cpu_type = "ppc/e500", 1889 .cpu_setup = __setup_cpu_e500v2, 1890 .machine_check = machine_check_e500, 1891 .platform = "ppc8548", 1892 .cpu_down_flush = cpu_down_flush_e500v2, 1893 }, 1894 #else 1895 { /* e500mc */ 1896 .pvr_mask = 0xffff0000, 1897 .pvr_value = 0x80230000, 1898 .cpu_name = "e500mc", 1899 .cpu_features = CPU_FTRS_E500MC, 1900 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1901 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1902 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1903 MMU_FTR_USE_TLBILX, 1904 .icache_bsize = 64, 1905 .dcache_bsize = 64, 1906 .num_pmcs = 4, 1907 .oprofile_cpu_type = "ppc/e500mc", 1908 .cpu_setup = __setup_cpu_e500mc, 1909 .machine_check = machine_check_e500mc, 1910 .platform = "ppce500mc", 1911 .cpu_down_flush = cpu_down_flush_e500mc, 1912 }, 1913 #endif /* CONFIG_PPC_E500MC */ 1914 #endif /* CONFIG_PPC32 */ 1915 #ifdef CONFIG_PPC_E500MC 1916 { /* e5500 */ 1917 .pvr_mask = 0xffff0000, 1918 .pvr_value = 0x80240000, 1919 .cpu_name = "e5500", 1920 .cpu_features = CPU_FTRS_E5500, 1921 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1922 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1923 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1924 MMU_FTR_USE_TLBILX, 1925 .icache_bsize = 64, 1926 .dcache_bsize = 64, 1927 .num_pmcs = 4, 1928 .oprofile_cpu_type = "ppc/e500mc", 1929 .cpu_setup = __setup_cpu_e5500, 1930 #ifndef CONFIG_PPC32 1931 .cpu_restore = __restore_cpu_e5500, 1932 #endif 1933 .machine_check = machine_check_e500mc, 1934 .platform = "ppce5500", 1935 .cpu_down_flush = cpu_down_flush_e5500, 1936 }, 1937 { /* e6500 */ 1938 .pvr_mask = 0xffff0000, 1939 .pvr_value = 0x80400000, 1940 .cpu_name = "e6500", 1941 .cpu_features = CPU_FTRS_E6500, 1942 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 1943 PPC_FEATURE_HAS_ALTIVEC_COMP, 1944 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1945 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1946 MMU_FTR_USE_TLBILX, 1947 .icache_bsize = 64, 1948 .dcache_bsize = 64, 1949 .num_pmcs = 6, 1950 .oprofile_cpu_type = "ppc/e6500", 1951 .cpu_setup = __setup_cpu_e6500, 1952 #ifndef CONFIG_PPC32 1953 .cpu_restore = __restore_cpu_e6500, 1954 #endif 1955 .machine_check = machine_check_e500mc, 1956 .platform = "ppce6500", 1957 .cpu_down_flush = cpu_down_flush_e6500, 1958 }, 1959 #endif /* CONFIG_PPC_E500MC */ 1960 #ifdef CONFIG_PPC32 1961 { /* default match */ 1962 .pvr_mask = 0x00000000, 1963 .pvr_value = 0x00000000, 1964 .cpu_name = "(generic E500 PPC)", 1965 .cpu_features = CPU_FTRS_E500, 1966 .cpu_user_features = COMMON_USER_BOOKE | 1967 PPC_FEATURE_HAS_SPE_COMP | 1968 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1969 .mmu_features = MMU_FTR_TYPE_FSL_E, 1970 .icache_bsize = 32, 1971 .dcache_bsize = 32, 1972 .machine_check = machine_check_e500, 1973 .platform = "powerpc", 1974 } 1975 #endif /* CONFIG_PPC32 */ 1976 #endif /* CONFIG_E500 */ 1977 }; 1978 1979 void __init set_cur_cpu_spec(struct cpu_spec *s) 1980 { 1981 struct cpu_spec *t = &the_cpu_spec; 1982 1983 t = PTRRELOC(t); 1984 /* 1985 * use memcpy() instead of *t = *s so that GCC replaces it 1986 * by __memcpy() when KASAN is active 1987 */ 1988 memcpy(t, s, sizeof(*t)); 1989 1990 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 1991 } 1992 1993 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 1994 struct cpu_spec *s) 1995 { 1996 struct cpu_spec *t = &the_cpu_spec; 1997 struct cpu_spec old; 1998 1999 t = PTRRELOC(t); 2000 old = *t; 2001 2002 /* 2003 * Copy everything, then do fixups. Use memcpy() instead of *t = *s 2004 * so that GCC replaces it by __memcpy() when KASAN is active 2005 */ 2006 memcpy(t, s, sizeof(*t)); 2007 2008 /* 2009 * If we are overriding a previous value derived from the real 2010 * PVR with a new value obtained using a logical PVR value, 2011 * don't modify the performance monitor fields. 2012 */ 2013 if (old.num_pmcs && !s->num_pmcs) { 2014 t->num_pmcs = old.num_pmcs; 2015 t->pmc_type = old.pmc_type; 2016 2017 /* 2018 * If we have passed through this logic once before and 2019 * have pulled the default case because the real PVR was 2020 * not found inside cpu_specs[], then we are possibly 2021 * running in compatibility mode. In that case, let the 2022 * oprofiler know which set of compatibility counters to 2023 * pull from by making sure the oprofile_cpu_type string 2024 * is set to that of compatibility mode. If the 2025 * oprofile_cpu_type already has a value, then we are 2026 * possibly overriding a real PVR with a logical one, 2027 * and, in that case, keep the current value for 2028 * oprofile_cpu_type. Futhermore, let's ensure that the 2029 * fix for the PMAO bug is enabled on compatibility mode. 2030 */ 2031 if (old.oprofile_cpu_type != NULL) { 2032 t->oprofile_cpu_type = old.oprofile_cpu_type; 2033 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG; 2034 } 2035 } 2036 2037 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2038 2039 /* 2040 * Set the base platform string once; assumes 2041 * we're called with real pvr first. 2042 */ 2043 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2044 *PTRRELOC(&powerpc_base_platform) = t->platform; 2045 2046 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2047 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2048 * that processor. I will consolidate that at a later time, for now, 2049 * just use #ifdef. We also don't need to PTRRELOC the function 2050 * pointer on ppc64 and booke as we are running at 0 in real mode 2051 * on ppc64 and reloc_offset is always 0 on booke. 2052 */ 2053 if (t->cpu_setup) { 2054 t->cpu_setup(offset, t); 2055 } 2056 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2057 2058 return t; 2059 } 2060 2061 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2062 { 2063 struct cpu_spec *s = cpu_specs; 2064 int i; 2065 2066 s = PTRRELOC(s); 2067 2068 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2069 if ((pvr & s->pvr_mask) == s->pvr_value) 2070 return setup_cpu_spec(offset, s); 2071 } 2072 2073 BUG(); 2074 2075 return NULL; 2076 } 2077 2078 /* 2079 * Used by cpufeatures to get the name for CPUs with a PVR table. 2080 * If they don't hae a PVR table, cpufeatures gets the name from 2081 * cpu device-tree node. 2082 */ 2083 void __init identify_cpu_name(unsigned int pvr) 2084 { 2085 struct cpu_spec *s = cpu_specs; 2086 struct cpu_spec *t = &the_cpu_spec; 2087 int i; 2088 2089 s = PTRRELOC(s); 2090 t = PTRRELOC(t); 2091 2092 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2093 if ((pvr & s->pvr_mask) == s->pvr_value) { 2094 t->cpu_name = s->cpu_name; 2095 return; 2096 } 2097 } 2098 } 2099 2100 2101 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2102 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2103 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2104 }; 2105 EXPORT_SYMBOL_GPL(cpu_feature_keys); 2106 2107 void __init cpu_feature_keys_init(void) 2108 { 2109 int i; 2110 2111 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2112 unsigned long f = 1ul << i; 2113 2114 if (!(cur_cpu_spec->cpu_features & f)) 2115 static_branch_disable(&cpu_feature_keys[i]); 2116 } 2117 } 2118 2119 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2120 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2121 }; 2122 EXPORT_SYMBOL_GPL(mmu_feature_keys); 2123 2124 void __init mmu_feature_keys_init(void) 2125 { 2126 int i; 2127 2128 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2129 unsigned long f = 1ul << i; 2130 2131 if (!(cur_cpu_spec->mmu_features & f)) 2132 static_branch_disable(&mmu_feature_keys[i]); 2133 } 2134 } 2135 #endif 2136