1b75c100eSMichael Neuling #ifndef _ASM_POWERPC_TM_H 2b75c100eSMichael Neuling #define _ASM_POWERPC_TM_H 3b75c100eSMichael Neuling 4b75c100eSMichael Neuling /* Reason codes describing kernel causes for transaction aborts. By 5b75c100eSMichael Neuling * convention, bit0 is copied to TEXASR[56] (IBM bit 7) which is set if 6b75c100eSMichael Neuling * the failure is persistent. PAPR saves 0xff-0xe0 for the hypervisor. 7b75c100eSMichael Neuling */ 8b75c100eSMichael Neuling #define TM_CAUSE_PERSISTENT 0x01 9b17dfec0SMichael Neuling #define TM_CAUSE_KVM_RESCHED 0xe0 /* From PAPR */ 10b17dfec0SMichael Neuling #define TM_CAUSE_KVM_FAC_UNAV 0xe2 /* From PAPR */ 11b75c100eSMichael Neuling #define TM_CAUSE_RESCHED 0xde 12b75c100eSMichael Neuling #define TM_CAUSE_TLBI 0xdc 13b75c100eSMichael Neuling #define TM_CAUSE_FAC_UNAV 0xda 14b75c100eSMichael Neuling #define TM_CAUSE_SYSCALL 0xd8 /* future use */ 15b75c100eSMichael Neuling #define TM_CAUSE_MISC 0xd6 /* future use */ 16b75c100eSMichael Neuling #define TM_CAUSE_SIGNAL 0xd4 17b75c100eSMichael Neuling #define TM_CAUSE_ALIGNMENT 0xd2 18b75c100eSMichael Neuling #define TM_CAUSE_EMULATE 0xd0 19b75c100eSMichael Neuling 20b75c100eSMichael Neuling #endif 21