1 /* 2 * ePAPR hcall interface 3 * 4 * Copyright 2008-2011 Freescale Semiconductor, Inc. 5 * 6 * Author: Timur Tabi <timur@freescale.com> 7 * 8 * This file is provided under a dual BSD/GPL license. When using or 9 * redistributing this file, you may do so under either license. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions are met: 13 * * Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * * Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * * Neither the name of Freescale Semiconductor nor the 19 * names of its contributors may be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * 23 * ALTERNATIVELY, this software may be distributed under the terms of the 24 * GNU General Public License ("GPL") as published by the Free Software 25 * Foundation, either version 2 of that License or (at your option) any 26 * later version. 27 * 28 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 29 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 30 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 31 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 33 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 37 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* A "hypercall" is an "sc 1" instruction. This header file file provides C 41 * wrapper functions for the ePAPR hypervisor interface. It is inteded 42 * for use by Linux device drivers and other operating systems. 43 * 44 * The hypercalls are implemented as inline assembly, rather than assembly 45 * language functions in a .S file, for optimization. It allows 46 * the caller to issue the hypercall instruction directly, improving both 47 * performance and memory footprint. 48 */ 49 50 #ifndef _EPAPR_HCALLS_H 51 #define _EPAPR_HCALLS_H 52 53 #define EV_BYTE_CHANNEL_SEND 1 54 #define EV_BYTE_CHANNEL_RECEIVE 2 55 #define EV_BYTE_CHANNEL_POLL 3 56 #define EV_INT_SET_CONFIG 4 57 #define EV_INT_GET_CONFIG 5 58 #define EV_INT_SET_MASK 6 59 #define EV_INT_GET_MASK 7 60 #define EV_INT_IACK 9 61 #define EV_INT_EOI 10 62 #define EV_INT_SEND_IPI 11 63 #define EV_INT_SET_TASK_PRIORITY 12 64 #define EV_INT_GET_TASK_PRIORITY 13 65 #define EV_DOORBELL_SEND 14 66 #define EV_MSGSND 15 67 #define EV_IDLE 16 68 69 /* vendor ID: epapr */ 70 #define EV_LOCAL_VENDOR_ID 0 /* for private use */ 71 #define EV_EPAPR_VENDOR_ID 1 72 #define EV_FSL_VENDOR_ID 2 /* Freescale Semiconductor */ 73 #define EV_IBM_VENDOR_ID 3 /* IBM */ 74 #define EV_GHS_VENDOR_ID 4 /* Green Hills Software */ 75 #define EV_ENEA_VENDOR_ID 5 /* Enea */ 76 #define EV_WR_VENDOR_ID 6 /* Wind River Systems */ 77 #define EV_AMCC_VENDOR_ID 7 /* Applied Micro Circuits */ 78 #define EV_KVM_VENDOR_ID 42 /* KVM */ 79 80 /* The max number of bytes that a byte channel can send or receive per call */ 81 #define EV_BYTE_CHANNEL_MAX_BYTES 16 82 83 84 #define _EV_HCALL_TOKEN(id, num) (((id) << 16) | (num)) 85 #define EV_HCALL_TOKEN(hcall_num) _EV_HCALL_TOKEN(EV_EPAPR_VENDOR_ID, hcall_num) 86 87 /* epapr return codes */ 88 #define EV_SUCCESS 0 89 #define EV_EPERM 1 /* Operation not permitted */ 90 #define EV_ENOENT 2 /* Entry Not Found */ 91 #define EV_EIO 3 /* I/O error occured */ 92 #define EV_EAGAIN 4 /* The operation had insufficient 93 * resources to complete and should be 94 * retried 95 */ 96 #define EV_ENOMEM 5 /* There was insufficient memory to 97 * complete the operation */ 98 #define EV_EFAULT 6 /* Bad guest address */ 99 #define EV_ENODEV 7 /* No such device */ 100 #define EV_EINVAL 8 /* An argument supplied to the hcall 101 was out of range or invalid */ 102 #define EV_INTERNAL 9 /* An internal error occured */ 103 #define EV_CONFIG 10 /* A configuration error was detected */ 104 #define EV_INVALID_STATE 11 /* The object is in an invalid state */ 105 #define EV_UNIMPLEMENTED 12 /* Unimplemented hypercall */ 106 #define EV_BUFFER_OVERFLOW 13 /* Caller-supplied buffer too small */ 107 108 #ifndef __ASSEMBLY__ 109 #include <linux/types.h> 110 #include <linux/errno.h> 111 #include <asm/byteorder.h> 112 113 /* 114 * Hypercall register clobber list 115 * 116 * These macros are used to define the list of clobbered registers during a 117 * hypercall. Technically, registers r0 and r3-r12 are always clobbered, 118 * but the gcc inline assembly syntax does not allow us to specify registers 119 * on the clobber list that are also on the input/output list. Therefore, 120 * the lists of clobbered registers depends on the number of register 121 * parmeters ("+r" and "=r") passed to the hypercall. 122 * 123 * Each assembly block should use one of the HCALL_CLOBBERSx macros. As a 124 * general rule, 'x' is the number of parameters passed to the assembly 125 * block *except* for r11. 126 * 127 * If you're not sure, just use the smallest value of 'x' that does not 128 * generate a compilation error. Because these are static inline functions, 129 * the compiler will only check the clobber list for a function if you 130 * compile code that calls that function. 131 * 132 * r3 and r11 are not included in any clobbers list because they are always 133 * listed as output registers. 134 * 135 * XER, CTR, and LR are currently listed as clobbers because it's uncertain 136 * whether they will be clobbered. 137 * 138 * Note that r11 can be used as an output parameter. 139 * 140 * The "memory" clobber is only necessary for hcalls where the Hypervisor 141 * will read or write guest memory. However, we add it to all hcalls because 142 * the impact is minimal, and we want to ensure that it's present for the 143 * hcalls that need it. 144 */ 145 146 /* List of common clobbered registers. Do not use this macro. */ 147 #define EV_HCALL_CLOBBERS "r0", "r12", "xer", "ctr", "lr", "cc", "memory" 148 149 #define EV_HCALL_CLOBBERS8 EV_HCALL_CLOBBERS 150 #define EV_HCALL_CLOBBERS7 EV_HCALL_CLOBBERS8, "r10" 151 #define EV_HCALL_CLOBBERS6 EV_HCALL_CLOBBERS7, "r9" 152 #define EV_HCALL_CLOBBERS5 EV_HCALL_CLOBBERS6, "r8" 153 #define EV_HCALL_CLOBBERS4 EV_HCALL_CLOBBERS5, "r7" 154 #define EV_HCALL_CLOBBERS3 EV_HCALL_CLOBBERS4, "r6" 155 #define EV_HCALL_CLOBBERS2 EV_HCALL_CLOBBERS3, "r5" 156 #define EV_HCALL_CLOBBERS1 EV_HCALL_CLOBBERS2, "r4" 157 158 extern bool epapr_paravirt_enabled; 159 extern u32 epapr_hypercall_start[]; 160 161 /* 162 * We use "uintptr_t" to define a register because it's guaranteed to be a 163 * 32-bit integer on a 32-bit platform, and a 64-bit integer on a 64-bit 164 * platform. 165 * 166 * All registers are either input/output or output only. Registers that are 167 * initialized before making the hypercall are input/output. All 168 * input/output registers are represented with "+r". Output-only registers 169 * are represented with "=r". Do not specify any unused registers. The 170 * clobber list will tell the compiler that the hypercall modifies those 171 * registers, which is good enough. 172 */ 173 174 /** 175 * ev_int_set_config - configure the specified interrupt 176 * @interrupt: the interrupt number 177 * @config: configuration for this interrupt 178 * @priority: interrupt priority 179 * @destination: destination CPU number 180 * 181 * Returns 0 for success, or an error code. 182 */ 183 static inline unsigned int ev_int_set_config(unsigned int interrupt, 184 uint32_t config, unsigned int priority, uint32_t destination) 185 { 186 register uintptr_t r11 __asm__("r11"); 187 register uintptr_t r3 __asm__("r3"); 188 register uintptr_t r4 __asm__("r4"); 189 register uintptr_t r5 __asm__("r5"); 190 register uintptr_t r6 __asm__("r6"); 191 192 r11 = EV_HCALL_TOKEN(EV_INT_SET_CONFIG); 193 r3 = interrupt; 194 r4 = config; 195 r5 = priority; 196 r6 = destination; 197 198 asm volatile("bl epapr_hypercall_start" 199 : "+r" (r11), "+r" (r3), "+r" (r4), "+r" (r5), "+r" (r6) 200 : : EV_HCALL_CLOBBERS4 201 ); 202 203 return r3; 204 } 205 206 /** 207 * ev_int_get_config - return the config of the specified interrupt 208 * @interrupt: the interrupt number 209 * @config: returned configuration for this interrupt 210 * @priority: returned interrupt priority 211 * @destination: returned destination CPU number 212 * 213 * Returns 0 for success, or an error code. 214 */ 215 static inline unsigned int ev_int_get_config(unsigned int interrupt, 216 uint32_t *config, unsigned int *priority, uint32_t *destination) 217 { 218 register uintptr_t r11 __asm__("r11"); 219 register uintptr_t r3 __asm__("r3"); 220 register uintptr_t r4 __asm__("r4"); 221 register uintptr_t r5 __asm__("r5"); 222 register uintptr_t r6 __asm__("r6"); 223 224 r11 = EV_HCALL_TOKEN(EV_INT_GET_CONFIG); 225 r3 = interrupt; 226 227 asm volatile("bl epapr_hypercall_start" 228 : "+r" (r11), "+r" (r3), "=r" (r4), "=r" (r5), "=r" (r6) 229 : : EV_HCALL_CLOBBERS4 230 ); 231 232 *config = r4; 233 *priority = r5; 234 *destination = r6; 235 236 return r3; 237 } 238 239 /** 240 * ev_int_set_mask - sets the mask for the specified interrupt source 241 * @interrupt: the interrupt number 242 * @mask: 0=enable interrupts, 1=disable interrupts 243 * 244 * Returns 0 for success, or an error code. 245 */ 246 static inline unsigned int ev_int_set_mask(unsigned int interrupt, 247 unsigned int mask) 248 { 249 register uintptr_t r11 __asm__("r11"); 250 register uintptr_t r3 __asm__("r3"); 251 register uintptr_t r4 __asm__("r4"); 252 253 r11 = EV_HCALL_TOKEN(EV_INT_SET_MASK); 254 r3 = interrupt; 255 r4 = mask; 256 257 asm volatile("bl epapr_hypercall_start" 258 : "+r" (r11), "+r" (r3), "+r" (r4) 259 : : EV_HCALL_CLOBBERS2 260 ); 261 262 return r3; 263 } 264 265 /** 266 * ev_int_get_mask - returns the mask for the specified interrupt source 267 * @interrupt: the interrupt number 268 * @mask: returned mask for this interrupt (0=enabled, 1=disabled) 269 * 270 * Returns 0 for success, or an error code. 271 */ 272 static inline unsigned int ev_int_get_mask(unsigned int interrupt, 273 unsigned int *mask) 274 { 275 register uintptr_t r11 __asm__("r11"); 276 register uintptr_t r3 __asm__("r3"); 277 register uintptr_t r4 __asm__("r4"); 278 279 r11 = EV_HCALL_TOKEN(EV_INT_GET_MASK); 280 r3 = interrupt; 281 282 asm volatile("bl epapr_hypercall_start" 283 : "+r" (r11), "+r" (r3), "=r" (r4) 284 : : EV_HCALL_CLOBBERS2 285 ); 286 287 *mask = r4; 288 289 return r3; 290 } 291 292 /** 293 * ev_int_eoi - signal the end of interrupt processing 294 * @interrupt: the interrupt number 295 * 296 * This function signals the end of processing for the the specified 297 * interrupt, which must be the interrupt currently in service. By 298 * definition, this is also the highest-priority interrupt. 299 * 300 * Returns 0 for success, or an error code. 301 */ 302 static inline unsigned int ev_int_eoi(unsigned int interrupt) 303 { 304 register uintptr_t r11 __asm__("r11"); 305 register uintptr_t r3 __asm__("r3"); 306 307 r11 = EV_HCALL_TOKEN(EV_INT_EOI); 308 r3 = interrupt; 309 310 asm volatile("bl epapr_hypercall_start" 311 : "+r" (r11), "+r" (r3) 312 : : EV_HCALL_CLOBBERS1 313 ); 314 315 return r3; 316 } 317 318 /** 319 * ev_byte_channel_send - send characters to a byte stream 320 * @handle: byte stream handle 321 * @count: (input) num of chars to send, (output) num chars sent 322 * @buffer: pointer to a 16-byte buffer 323 * 324 * @buffer must be at least 16 bytes long, because all 16 bytes will be 325 * read from memory into registers, even if count < 16. 326 * 327 * Returns 0 for success, or an error code. 328 */ 329 static inline unsigned int ev_byte_channel_send(unsigned int handle, 330 unsigned int *count, const char buffer[EV_BYTE_CHANNEL_MAX_BYTES]) 331 { 332 register uintptr_t r11 __asm__("r11"); 333 register uintptr_t r3 __asm__("r3"); 334 register uintptr_t r4 __asm__("r4"); 335 register uintptr_t r5 __asm__("r5"); 336 register uintptr_t r6 __asm__("r6"); 337 register uintptr_t r7 __asm__("r7"); 338 register uintptr_t r8 __asm__("r8"); 339 const uint32_t *p = (const uint32_t *) buffer; 340 341 r11 = EV_HCALL_TOKEN(EV_BYTE_CHANNEL_SEND); 342 r3 = handle; 343 r4 = *count; 344 r5 = be32_to_cpu(p[0]); 345 r6 = be32_to_cpu(p[1]); 346 r7 = be32_to_cpu(p[2]); 347 r8 = be32_to_cpu(p[3]); 348 349 asm volatile("bl epapr_hypercall_start" 350 : "+r" (r11), "+r" (r3), 351 "+r" (r4), "+r" (r5), "+r" (r6), "+r" (r7), "+r" (r8) 352 : : EV_HCALL_CLOBBERS6 353 ); 354 355 *count = r4; 356 357 return r3; 358 } 359 360 /** 361 * ev_byte_channel_receive - fetch characters from a byte channel 362 * @handle: byte channel handle 363 * @count: (input) max num of chars to receive, (output) num chars received 364 * @buffer: pointer to a 16-byte buffer 365 * 366 * The size of @buffer must be at least 16 bytes, even if you request fewer 367 * than 16 characters, because we always write 16 bytes to @buffer. This is 368 * for performance reasons. 369 * 370 * Returns 0 for success, or an error code. 371 */ 372 static inline unsigned int ev_byte_channel_receive(unsigned int handle, 373 unsigned int *count, char buffer[EV_BYTE_CHANNEL_MAX_BYTES]) 374 { 375 register uintptr_t r11 __asm__("r11"); 376 register uintptr_t r3 __asm__("r3"); 377 register uintptr_t r4 __asm__("r4"); 378 register uintptr_t r5 __asm__("r5"); 379 register uintptr_t r6 __asm__("r6"); 380 register uintptr_t r7 __asm__("r7"); 381 register uintptr_t r8 __asm__("r8"); 382 uint32_t *p = (uint32_t *) buffer; 383 384 r11 = EV_HCALL_TOKEN(EV_BYTE_CHANNEL_RECEIVE); 385 r3 = handle; 386 r4 = *count; 387 388 asm volatile("bl epapr_hypercall_start" 389 : "+r" (r11), "+r" (r3), "+r" (r4), 390 "=r" (r5), "=r" (r6), "=r" (r7), "=r" (r8) 391 : : EV_HCALL_CLOBBERS6 392 ); 393 394 *count = r4; 395 p[0] = cpu_to_be32(r5); 396 p[1] = cpu_to_be32(r6); 397 p[2] = cpu_to_be32(r7); 398 p[3] = cpu_to_be32(r8); 399 400 return r3; 401 } 402 403 /** 404 * ev_byte_channel_poll - returns the status of the byte channel buffers 405 * @handle: byte channel handle 406 * @rx_count: returned count of bytes in receive queue 407 * @tx_count: returned count of free space in transmit queue 408 * 409 * This function reports the amount of data in the receive queue (i.e. the 410 * number of bytes you can read), and the amount of free space in the transmit 411 * queue (i.e. the number of bytes you can write). 412 * 413 * Returns 0 for success, or an error code. 414 */ 415 static inline unsigned int ev_byte_channel_poll(unsigned int handle, 416 unsigned int *rx_count, unsigned int *tx_count) 417 { 418 register uintptr_t r11 __asm__("r11"); 419 register uintptr_t r3 __asm__("r3"); 420 register uintptr_t r4 __asm__("r4"); 421 register uintptr_t r5 __asm__("r5"); 422 423 r11 = EV_HCALL_TOKEN(EV_BYTE_CHANNEL_POLL); 424 r3 = handle; 425 426 asm volatile("bl epapr_hypercall_start" 427 : "+r" (r11), "+r" (r3), "=r" (r4), "=r" (r5) 428 : : EV_HCALL_CLOBBERS3 429 ); 430 431 *rx_count = r4; 432 *tx_count = r5; 433 434 return r3; 435 } 436 437 /** 438 * ev_int_iack - acknowledge an interrupt 439 * @handle: handle to the target interrupt controller 440 * @vector: returned interrupt vector 441 * 442 * If handle is zero, the function returns the next interrupt source 443 * number to be handled irrespective of the hierarchy or cascading 444 * of interrupt controllers. If non-zero, specifies a handle to the 445 * interrupt controller that is the target of the acknowledge. 446 * 447 * Returns 0 for success, or an error code. 448 */ 449 static inline unsigned int ev_int_iack(unsigned int handle, 450 unsigned int *vector) 451 { 452 register uintptr_t r11 __asm__("r11"); 453 register uintptr_t r3 __asm__("r3"); 454 register uintptr_t r4 __asm__("r4"); 455 456 r11 = EV_HCALL_TOKEN(EV_INT_IACK); 457 r3 = handle; 458 459 asm volatile("bl epapr_hypercall_start" 460 : "+r" (r11), "+r" (r3), "=r" (r4) 461 : : EV_HCALL_CLOBBERS2 462 ); 463 464 *vector = r4; 465 466 return r3; 467 } 468 469 /** 470 * ev_doorbell_send - send a doorbell to another partition 471 * @handle: doorbell send handle 472 * 473 * Returns 0 for success, or an error code. 474 */ 475 static inline unsigned int ev_doorbell_send(unsigned int handle) 476 { 477 register uintptr_t r11 __asm__("r11"); 478 register uintptr_t r3 __asm__("r3"); 479 480 r11 = EV_HCALL_TOKEN(EV_DOORBELL_SEND); 481 r3 = handle; 482 483 asm volatile("bl epapr_hypercall_start" 484 : "+r" (r11), "+r" (r3) 485 : : EV_HCALL_CLOBBERS1 486 ); 487 488 return r3; 489 } 490 491 /** 492 * ev_idle -- wait for next interrupt on this core 493 * 494 * Returns 0 for success, or an error code. 495 */ 496 static inline unsigned int ev_idle(void) 497 { 498 register uintptr_t r11 __asm__("r11"); 499 register uintptr_t r3 __asm__("r3"); 500 501 r11 = EV_HCALL_TOKEN(EV_IDLE); 502 503 asm volatile("bl epapr_hypercall_start" 504 : "+r" (r11), "=r" (r3) 505 : : EV_HCALL_CLOBBERS1 506 ); 507 508 return r3; 509 } 510 #endif /* !__ASSEMBLY__ */ 511 #endif 512