1c3617f72SDavid Howells /* 2c3617f72SDavid Howells * ELF register definitions.. 3c3617f72SDavid Howells * 4c3617f72SDavid Howells * This program is free software; you can redistribute it and/or 5c3617f72SDavid Howells * modify it under the terms of the GNU General Public License 6c3617f72SDavid Howells * as published by the Free Software Foundation; either version 7c3617f72SDavid Howells * 2 of the License, or (at your option) any later version. 8c3617f72SDavid Howells */ 9c3617f72SDavid Howells #ifndef _UAPI_ASM_POWERPC_ELF_H 10c3617f72SDavid Howells #define _UAPI_ASM_POWERPC_ELF_H 11c3617f72SDavid Howells 12c3617f72SDavid Howells 13c3617f72SDavid Howells #include <linux/types.h> 14c3617f72SDavid Howells 15c3617f72SDavid Howells #include <asm/ptrace.h> 16c3617f72SDavid Howells #include <asm/cputable.h> 17c3617f72SDavid Howells #include <asm/auxvec.h> 18c3617f72SDavid Howells 19c3617f72SDavid Howells /* PowerPC relocations defined by the ABIs */ 20c3617f72SDavid Howells #define R_PPC_NONE 0 21c3617f72SDavid Howells #define R_PPC_ADDR32 1 /* 32bit absolute address */ 22c3617f72SDavid Howells #define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */ 23c3617f72SDavid Howells #define R_PPC_ADDR16 3 /* 16bit absolute address */ 24c3617f72SDavid Howells #define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */ 25c3617f72SDavid Howells #define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */ 26c3617f72SDavid Howells #define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */ 27c3617f72SDavid Howells #define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */ 28c3617f72SDavid Howells #define R_PPC_ADDR14_BRTAKEN 8 29c3617f72SDavid Howells #define R_PPC_ADDR14_BRNTAKEN 9 30c3617f72SDavid Howells #define R_PPC_REL24 10 /* PC relative 26 bit */ 31c3617f72SDavid Howells #define R_PPC_REL14 11 /* PC relative 16 bit */ 32c3617f72SDavid Howells #define R_PPC_REL14_BRTAKEN 12 33c3617f72SDavid Howells #define R_PPC_REL14_BRNTAKEN 13 34c3617f72SDavid Howells #define R_PPC_GOT16 14 35c3617f72SDavid Howells #define R_PPC_GOT16_LO 15 36c3617f72SDavid Howells #define R_PPC_GOT16_HI 16 37c3617f72SDavid Howells #define R_PPC_GOT16_HA 17 38c3617f72SDavid Howells #define R_PPC_PLTREL24 18 39c3617f72SDavid Howells #define R_PPC_COPY 19 40c3617f72SDavid Howells #define R_PPC_GLOB_DAT 20 41c3617f72SDavid Howells #define R_PPC_JMP_SLOT 21 42c3617f72SDavid Howells #define R_PPC_RELATIVE 22 43c3617f72SDavid Howells #define R_PPC_LOCAL24PC 23 44c3617f72SDavid Howells #define R_PPC_UADDR32 24 45c3617f72SDavid Howells #define R_PPC_UADDR16 25 46c3617f72SDavid Howells #define R_PPC_REL32 26 47c3617f72SDavid Howells #define R_PPC_PLT32 27 48c3617f72SDavid Howells #define R_PPC_PLTREL32 28 49c3617f72SDavid Howells #define R_PPC_PLT16_LO 29 50c3617f72SDavid Howells #define R_PPC_PLT16_HI 30 51c3617f72SDavid Howells #define R_PPC_PLT16_HA 31 52c3617f72SDavid Howells #define R_PPC_SDAREL16 32 53c3617f72SDavid Howells #define R_PPC_SECTOFF 33 54c3617f72SDavid Howells #define R_PPC_SECTOFF_LO 34 55c3617f72SDavid Howells #define R_PPC_SECTOFF_HI 35 56c3617f72SDavid Howells #define R_PPC_SECTOFF_HA 36 57c3617f72SDavid Howells 58c3617f72SDavid Howells /* PowerPC relocations defined for the TLS access ABI. */ 59c3617f72SDavid Howells #define R_PPC_TLS 67 /* none (sym+add)@tls */ 60c3617f72SDavid Howells #define R_PPC_DTPMOD32 68 /* word32 (sym+add)@dtpmod */ 61c3617f72SDavid Howells #define R_PPC_TPREL16 69 /* half16* (sym+add)@tprel */ 62c3617f72SDavid Howells #define R_PPC_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */ 63c3617f72SDavid Howells #define R_PPC_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */ 64c3617f72SDavid Howells #define R_PPC_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */ 65c3617f72SDavid Howells #define R_PPC_TPREL32 73 /* word32 (sym+add)@tprel */ 66c3617f72SDavid Howells #define R_PPC_DTPREL16 74 /* half16* (sym+add)@dtprel */ 67c3617f72SDavid Howells #define R_PPC_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */ 68c3617f72SDavid Howells #define R_PPC_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */ 69c3617f72SDavid Howells #define R_PPC_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */ 70c3617f72SDavid Howells #define R_PPC_DTPREL32 78 /* word32 (sym+add)@dtprel */ 71c3617f72SDavid Howells #define R_PPC_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */ 72c3617f72SDavid Howells #define R_PPC_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */ 73c3617f72SDavid Howells #define R_PPC_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */ 74c3617f72SDavid Howells #define R_PPC_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */ 75c3617f72SDavid Howells #define R_PPC_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */ 76c3617f72SDavid Howells #define R_PPC_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */ 77c3617f72SDavid Howells #define R_PPC_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */ 78c3617f72SDavid Howells #define R_PPC_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */ 79c3617f72SDavid Howells #define R_PPC_GOT_TPREL16 87 /* half16* (sym+add)@got@tprel */ 80c3617f72SDavid Howells #define R_PPC_GOT_TPREL16_LO 88 /* half16 (sym+add)@got@tprel@l */ 81c3617f72SDavid Howells #define R_PPC_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */ 82c3617f72SDavid Howells #define R_PPC_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */ 83c3617f72SDavid Howells #define R_PPC_GOT_DTPREL16 91 /* half16* (sym+add)@got@dtprel */ 84c3617f72SDavid Howells #define R_PPC_GOT_DTPREL16_LO 92 /* half16* (sym+add)@got@dtprel@l */ 85c3617f72SDavid Howells #define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */ 86c3617f72SDavid Howells #define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */ 87c3617f72SDavid Howells 88c3617f72SDavid Howells /* keep this the last entry. */ 89c3617f72SDavid Howells #define R_PPC_NUM 95 90c3617f72SDavid Howells 91c3617f72SDavid Howells 92c3617f72SDavid Howells #define ELF_NGREG 48 /* includes nip, msr, lr, etc. */ 93c3617f72SDavid Howells #define ELF_NFPREG 33 /* includes fpscr */ 948c13f599SAnshuman Khandual #define ELF_NVMX 34 /* includes all vector registers */ 959d3918f7SAnshuman Khandual #define ELF_NVSX 32 /* includes all VSX registers */ 9608e1c01dSAnshuman Khandual #define ELF_NTMSPRREG 3 /* include tfhar, tfiar, texasr */ 97cf89d4e1SAnshuman Khandual #define ELF_NEBB 3 /* includes ebbrr, ebbhr, bescr */ 98c3617f72SDavid Howells 99c3617f72SDavid Howells typedef unsigned long elf_greg_t64; 100c3617f72SDavid Howells typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG]; 101c3617f72SDavid Howells 102c3617f72SDavid Howells typedef unsigned int elf_greg_t32; 103c3617f72SDavid Howells typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG]; 104c3617f72SDavid Howells typedef elf_gregset_t32 compat_elf_gregset_t; 105c3617f72SDavid Howells 106c3617f72SDavid Howells /* 107c3617f72SDavid Howells * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps. 108c3617f72SDavid Howells */ 109c3617f72SDavid Howells #ifdef __powerpc64__ 110c3617f72SDavid Howells # define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */ 111c3617f72SDavid Howells # define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */ 112c3617f72SDavid Howells # define ELF_NVSRHALFREG 32 /* Half the vsx registers */ 113c3617f72SDavid Howells # define ELF_GREG_TYPE elf_greg_t64 11401b0e07eSAnton Blanchard # define ELF_ARCH EM_PPC64 11501b0e07eSAnton Blanchard # define ELF_CLASS ELFCLASS64 11601b0e07eSAnton Blanchard typedef elf_greg_t64 elf_greg_t; 11701b0e07eSAnton Blanchard typedef elf_gregset_t64 elf_gregset_t; 118c3617f72SDavid Howells #else 119c3617f72SDavid Howells # define ELF_NEVRREG 34 /* includes acc (as 2) */ 120c3617f72SDavid Howells # define ELF_NVRREG 33 /* includes vscr */ 121c3617f72SDavid Howells # define ELF_GREG_TYPE elf_greg_t32 122c3617f72SDavid Howells # define ELF_ARCH EM_PPC 123c3617f72SDavid Howells # define ELF_CLASS ELFCLASS32 124c3617f72SDavid Howells typedef elf_greg_t32 elf_greg_t; 125c3617f72SDavid Howells typedef elf_gregset_t32 elf_gregset_t; 12601b0e07eSAnton Blanchard #endif /* __powerpc64__ */ 127c3617f72SDavid Howells 1288bd0b119SAnton Blanchard #ifdef __BIG_ENDIAN__ 1298bd0b119SAnton Blanchard #define ELF_DATA ELFDATA2MSB 1308bd0b119SAnton Blanchard #else 1318bd0b119SAnton Blanchard #define ELF_DATA ELFDATA2LSB 1328bd0b119SAnton Blanchard #endif 1338bd0b119SAnton Blanchard 134c3617f72SDavid Howells /* Floating point registers */ 135c3617f72SDavid Howells typedef double elf_fpreg_t; 136c3617f72SDavid Howells typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; 137c3617f72SDavid Howells 138c3617f72SDavid Howells /* Altivec registers */ 139c3617f72SDavid Howells /* 140c3617f72SDavid Howells * The entries with indexes 0-31 contain the corresponding vector registers. 141c3617f72SDavid Howells * The entry with index 32 contains the vscr as the last word (offset 12) 142c3617f72SDavid Howells * within the quadword. This allows the vscr to be stored as either a 143c3617f72SDavid Howells * quadword (since it must be copied via a vector register to/from storage) 144c3617f72SDavid Howells * or as a word. 145c3617f72SDavid Howells * 146c3617f72SDavid Howells * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first 147c3617f72SDavid Howells * word (offset 0) within the quadword. 148c3617f72SDavid Howells * 149c3617f72SDavid Howells * This definition of the VMX state is compatible with the current PPC32 150c3617f72SDavid Howells * ptrace interface. This allows signal handling and ptrace to use the same 151c3617f72SDavid Howells * structures. This also simplifies the implementation of a bi-arch 152c3617f72SDavid Howells * (combined (32- and 64-bit) gdb. 153c3617f72SDavid Howells * 154c3617f72SDavid Howells * Note that it's _not_ compatible with 32 bits ucontext which stuffs the 155c3617f72SDavid Howells * vrsave along with vscr and so only uses 33 vectors for the register set 156c3617f72SDavid Howells */ 157c3617f72SDavid Howells typedef __vector128 elf_vrreg_t; 158c3617f72SDavid Howells typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG]; 159c3617f72SDavid Howells #ifdef __powerpc64__ 160c3617f72SDavid Howells typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32]; 161c3617f72SDavid Howells typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG]; 162c3617f72SDavid Howells #endif 163c3617f72SDavid Howells 164c3617f72SDavid Howells 165c3617f72SDavid Howells /* 166c3617f72SDavid Howells * The requirements here are: 167c3617f72SDavid Howells * - keep the final alignment of sp (sp & 0xf) 168c3617f72SDavid Howells * - make sure the 32-bit value at the first 16 byte aligned position of 169c3617f72SDavid Howells * AUXV is greater than 16 for glibc compatibility. 170c3617f72SDavid Howells * AT_IGNOREPPC is used for that. 171c3617f72SDavid Howells * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC, 172c3617f72SDavid Howells * even if DLINFO_ARCH_ITEMS goes to zero or is undefined. 173c3617f72SDavid Howells * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes 174c3617f72SDavid Howells */ 175c3617f72SDavid Howells #define ARCH_DLINFO \ 176c3617f72SDavid Howells do { \ 177c3617f72SDavid Howells /* Handle glibc compatibility. */ \ 178c3617f72SDavid Howells NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \ 179c3617f72SDavid Howells NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \ 180c3617f72SDavid Howells /* Cache size items */ \ 181c3617f72SDavid Howells NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \ 182c3617f72SDavid Howells NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \ 183c3617f72SDavid Howells NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \ 184c3617f72SDavid Howells VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base); \ 185c3617f72SDavid Howells } while (0) 186c3617f72SDavid Howells 187c3617f72SDavid Howells /* PowerPC64 relocations defined by the ABIs */ 188c3617f72SDavid Howells #define R_PPC64_NONE R_PPC_NONE 189c3617f72SDavid Howells #define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address. */ 190c3617f72SDavid Howells #define R_PPC64_ADDR24 R_PPC_ADDR24 /* 26bit address, word aligned. */ 191c3617f72SDavid Howells #define R_PPC64_ADDR16 R_PPC_ADDR16 /* 16bit absolute address. */ 192c3617f72SDavid Howells #define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of abs. address. */ 193c3617f72SDavid Howells #define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of abs. address. */ 194c3617f72SDavid Howells #define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits. */ 195c3617f72SDavid Howells #define R_PPC64_ADDR14 R_PPC_ADDR14 /* 16bit address, word aligned. */ 196c3617f72SDavid Howells #define R_PPC64_ADDR14_BRTAKEN R_PPC_ADDR14_BRTAKEN 197c3617f72SDavid Howells #define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN 198c3617f72SDavid Howells #define R_PPC64_REL24 R_PPC_REL24 /* PC relative 26 bit, word aligned. */ 199c3617f72SDavid Howells #define R_PPC64_REL14 R_PPC_REL14 /* PC relative 16 bit. */ 200c3617f72SDavid Howells #define R_PPC64_REL14_BRTAKEN R_PPC_REL14_BRTAKEN 201c3617f72SDavid Howells #define R_PPC64_REL14_BRNTAKEN R_PPC_REL14_BRNTAKEN 202c3617f72SDavid Howells #define R_PPC64_GOT16 R_PPC_GOT16 203c3617f72SDavid Howells #define R_PPC64_GOT16_LO R_PPC_GOT16_LO 204c3617f72SDavid Howells #define R_PPC64_GOT16_HI R_PPC_GOT16_HI 205c3617f72SDavid Howells #define R_PPC64_GOT16_HA R_PPC_GOT16_HA 206c3617f72SDavid Howells 207c3617f72SDavid Howells #define R_PPC64_COPY R_PPC_COPY 208c3617f72SDavid Howells #define R_PPC64_GLOB_DAT R_PPC_GLOB_DAT 209c3617f72SDavid Howells #define R_PPC64_JMP_SLOT R_PPC_JMP_SLOT 210c3617f72SDavid Howells #define R_PPC64_RELATIVE R_PPC_RELATIVE 211c3617f72SDavid Howells 212c3617f72SDavid Howells #define R_PPC64_UADDR32 R_PPC_UADDR32 213c3617f72SDavid Howells #define R_PPC64_UADDR16 R_PPC_UADDR16 214c3617f72SDavid Howells #define R_PPC64_REL32 R_PPC_REL32 215c3617f72SDavid Howells #define R_PPC64_PLT32 R_PPC_PLT32 216c3617f72SDavid Howells #define R_PPC64_PLTREL32 R_PPC_PLTREL32 217c3617f72SDavid Howells #define R_PPC64_PLT16_LO R_PPC_PLT16_LO 218c3617f72SDavid Howells #define R_PPC64_PLT16_HI R_PPC_PLT16_HI 219c3617f72SDavid Howells #define R_PPC64_PLT16_HA R_PPC_PLT16_HA 220c3617f72SDavid Howells 221c3617f72SDavid Howells #define R_PPC64_SECTOFF R_PPC_SECTOFF 222c3617f72SDavid Howells #define R_PPC64_SECTOFF_LO R_PPC_SECTOFF_LO 223c3617f72SDavid Howells #define R_PPC64_SECTOFF_HI R_PPC_SECTOFF_HI 224c3617f72SDavid Howells #define R_PPC64_SECTOFF_HA R_PPC_SECTOFF_HA 225c3617f72SDavid Howells #define R_PPC64_ADDR30 37 /* word30 (S + A - P) >> 2. */ 226c3617f72SDavid Howells #define R_PPC64_ADDR64 38 /* doubleword64 S + A. */ 227c3617f72SDavid Howells #define R_PPC64_ADDR16_HIGHER 39 /* half16 #higher(S + A). */ 228c3617f72SDavid Howells #define R_PPC64_ADDR16_HIGHERA 40 /* half16 #highera(S + A). */ 229c3617f72SDavid Howells #define R_PPC64_ADDR16_HIGHEST 41 /* half16 #highest(S + A). */ 230c3617f72SDavid Howells #define R_PPC64_ADDR16_HIGHESTA 42 /* half16 #highesta(S + A). */ 231c3617f72SDavid Howells #define R_PPC64_UADDR64 43 /* doubleword64 S + A. */ 232c3617f72SDavid Howells #define R_PPC64_REL64 44 /* doubleword64 S + A - P. */ 233c3617f72SDavid Howells #define R_PPC64_PLT64 45 /* doubleword64 L + A. */ 234c3617f72SDavid Howells #define R_PPC64_PLTREL64 46 /* doubleword64 L + A - P. */ 235c3617f72SDavid Howells #define R_PPC64_TOC16 47 /* half16* S + A - .TOC. */ 236c3617f72SDavid Howells #define R_PPC64_TOC16_LO 48 /* half16 #lo(S + A - .TOC.). */ 237c3617f72SDavid Howells #define R_PPC64_TOC16_HI 49 /* half16 #hi(S + A - .TOC.). */ 238c3617f72SDavid Howells #define R_PPC64_TOC16_HA 50 /* half16 #ha(S + A - .TOC.). */ 239c3617f72SDavid Howells #define R_PPC64_TOC 51 /* doubleword64 .TOC. */ 240c3617f72SDavid Howells #define R_PPC64_PLTGOT16 52 /* half16* M + A. */ 241c3617f72SDavid Howells #define R_PPC64_PLTGOT16_LO 53 /* half16 #lo(M + A). */ 242c3617f72SDavid Howells #define R_PPC64_PLTGOT16_HI 54 /* half16 #hi(M + A). */ 243c3617f72SDavid Howells #define R_PPC64_PLTGOT16_HA 55 /* half16 #ha(M + A). */ 244c3617f72SDavid Howells 245c3617f72SDavid Howells #define R_PPC64_ADDR16_DS 56 /* half16ds* (S + A) >> 2. */ 246c3617f72SDavid Howells #define R_PPC64_ADDR16_LO_DS 57 /* half16ds #lo(S + A) >> 2. */ 247c3617f72SDavid Howells #define R_PPC64_GOT16_DS 58 /* half16ds* (G + A) >> 2. */ 248c3617f72SDavid Howells #define R_PPC64_GOT16_LO_DS 59 /* half16ds #lo(G + A) >> 2. */ 249c3617f72SDavid Howells #define R_PPC64_PLT16_LO_DS 60 /* half16ds #lo(L + A) >> 2. */ 250c3617f72SDavid Howells #define R_PPC64_SECTOFF_DS 61 /* half16ds* (R + A) >> 2. */ 251c3617f72SDavid Howells #define R_PPC64_SECTOFF_LO_DS 62 /* half16ds #lo(R + A) >> 2. */ 252c3617f72SDavid Howells #define R_PPC64_TOC16_DS 63 /* half16ds* (S + A - .TOC.) >> 2. */ 253c3617f72SDavid Howells #define R_PPC64_TOC16_LO_DS 64 /* half16ds #lo(S + A - .TOC.) >> 2. */ 254c3617f72SDavid Howells #define R_PPC64_PLTGOT16_DS 65 /* half16ds* (M + A) >> 2. */ 255c3617f72SDavid Howells #define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds #lo(M + A) >> 2. */ 256c3617f72SDavid Howells 257c3617f72SDavid Howells /* PowerPC64 relocations defined for the TLS access ABI. */ 258c3617f72SDavid Howells #define R_PPC64_TLS 67 /* none (sym+add)@tls */ 259c3617f72SDavid Howells #define R_PPC64_DTPMOD64 68 /* doubleword64 (sym+add)@dtpmod */ 260c3617f72SDavid Howells #define R_PPC64_TPREL16 69 /* half16* (sym+add)@tprel */ 261c3617f72SDavid Howells #define R_PPC64_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */ 262c3617f72SDavid Howells #define R_PPC64_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */ 263c3617f72SDavid Howells #define R_PPC64_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */ 264c3617f72SDavid Howells #define R_PPC64_TPREL64 73 /* doubleword64 (sym+add)@tprel */ 265c3617f72SDavid Howells #define R_PPC64_DTPREL16 74 /* half16* (sym+add)@dtprel */ 266c3617f72SDavid Howells #define R_PPC64_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */ 267c3617f72SDavid Howells #define R_PPC64_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */ 268c3617f72SDavid Howells #define R_PPC64_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */ 269c3617f72SDavid Howells #define R_PPC64_DTPREL64 78 /* doubleword64 (sym+add)@dtprel */ 270c3617f72SDavid Howells #define R_PPC64_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */ 271c3617f72SDavid Howells #define R_PPC64_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */ 272c3617f72SDavid Howells #define R_PPC64_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */ 273c3617f72SDavid Howells #define R_PPC64_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */ 274c3617f72SDavid Howells #define R_PPC64_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */ 275c3617f72SDavid Howells #define R_PPC64_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */ 276c3617f72SDavid Howells #define R_PPC64_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */ 277c3617f72SDavid Howells #define R_PPC64_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */ 278c3617f72SDavid Howells #define R_PPC64_GOT_TPREL16_DS 87 /* half16ds* (sym+add)@got@tprel */ 279c3617f72SDavid Howells #define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */ 280c3617f72SDavid Howells #define R_PPC64_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */ 281c3617f72SDavid Howells #define R_PPC64_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */ 282c3617f72SDavid Howells #define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */ 283c3617f72SDavid Howells #define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */ 284c3617f72SDavid Howells #define R_PPC64_GOT_DTPREL16_HI 93 /* half16 (sym+add)@got@dtprel@h */ 285c3617f72SDavid Howells #define R_PPC64_GOT_DTPREL16_HA 94 /* half16 (sym+add)@got@dtprel@ha */ 286c3617f72SDavid Howells #define R_PPC64_TPREL16_DS 95 /* half16ds* (sym+add)@tprel */ 287c3617f72SDavid Howells #define R_PPC64_TPREL16_LO_DS 96 /* half16ds (sym+add)@tprel@l */ 288c3617f72SDavid Howells #define R_PPC64_TPREL16_HIGHER 97 /* half16 (sym+add)@tprel@higher */ 289c3617f72SDavid Howells #define R_PPC64_TPREL16_HIGHERA 98 /* half16 (sym+add)@tprel@highera */ 290c3617f72SDavid Howells #define R_PPC64_TPREL16_HIGHEST 99 /* half16 (sym+add)@tprel@highest */ 291c3617f72SDavid Howells #define R_PPC64_TPREL16_HIGHESTA 100 /* half16 (sym+add)@tprel@highesta */ 292c3617f72SDavid Howells #define R_PPC64_DTPREL16_DS 101 /* half16ds* (sym+add)@dtprel */ 293c3617f72SDavid Howells #define R_PPC64_DTPREL16_LO_DS 102 /* half16ds (sym+add)@dtprel@l */ 294c3617f72SDavid Howells #define R_PPC64_DTPREL16_HIGHER 103 /* half16 (sym+add)@dtprel@higher */ 295c3617f72SDavid Howells #define R_PPC64_DTPREL16_HIGHERA 104 /* half16 (sym+add)@dtprel@highera */ 296c3617f72SDavid Howells #define R_PPC64_DTPREL16_HIGHEST 105 /* half16 (sym+add)@dtprel@highest */ 297c3617f72SDavid Howells #define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */ 298d247da0aSRusty Russell #define R_PPC64_TLSGD 107 299d247da0aSRusty Russell #define R_PPC64_TLSLD 108 300d247da0aSRusty Russell #define R_PPC64_TOCSAVE 109 301c3617f72SDavid Howells 302a61674bdSUlrich Weigand #define R_PPC64_ENTRY 118 303a61674bdSUlrich Weigand 3040906584aSRusty Russell #define R_PPC64_REL16 249 3050906584aSRusty Russell #define R_PPC64_REL16_LO 250 3060906584aSRusty Russell #define R_PPC64_REL16_HI 251 3070906584aSRusty Russell #define R_PPC64_REL16_HA 252 3080906584aSRusty Russell 309c3617f72SDavid Howells /* Keep this the last entry. */ 3100906584aSRusty Russell #define R_PPC64_NUM 253 311c3617f72SDavid Howells 312c3617f72SDavid Howells /* There's actually a third entry here, but it's unused */ 313c3617f72SDavid Howells struct ppc64_opd_entry 314c3617f72SDavid Howells { 315c3617f72SDavid Howells unsigned long funcaddr; 316c3617f72SDavid Howells unsigned long r2; 317c3617f72SDavid Howells }; 318c3617f72SDavid Howells 319c3617f72SDavid Howells 320c3617f72SDavid Howells #endif /* _UAPI_ASM_POWERPC_ELF_H */ 321