1243e2511SBenjamin Herrenschmidt /* 2243e2511SBenjamin Herrenschmidt * Copyright 2016,2017 IBM Corporation. 3243e2511SBenjamin Herrenschmidt * 4243e2511SBenjamin Herrenschmidt * This program is free software; you can redistribute it and/or 5243e2511SBenjamin Herrenschmidt * modify it under the terms of the GNU General Public License 6243e2511SBenjamin Herrenschmidt * as published by the Free Software Foundation; either version 7243e2511SBenjamin Herrenschmidt * 2 of the License, or (at your option) any later version. 8243e2511SBenjamin Herrenschmidt */ 9243e2511SBenjamin Herrenschmidt #ifndef _ASM_POWERPC_XIVE_H 10243e2511SBenjamin Herrenschmidt #define _ASM_POWERPC_XIVE_H 11243e2511SBenjamin Herrenschmidt 12243e2511SBenjamin Herrenschmidt #define XIVE_INVALID_VP 0xffffffff 13243e2511SBenjamin Herrenschmidt 14243e2511SBenjamin Herrenschmidt #ifdef CONFIG_PPC_XIVE 15243e2511SBenjamin Herrenschmidt 16243e2511SBenjamin Herrenschmidt /* 17243e2511SBenjamin Herrenschmidt * Thread Interrupt Management Area (TIMA) 18243e2511SBenjamin Herrenschmidt * 19243e2511SBenjamin Herrenschmidt * This is a global MMIO region divided in 4 pages of varying access 20243e2511SBenjamin Herrenschmidt * permissions, providing access to per-cpu interrupt management 21243e2511SBenjamin Herrenschmidt * functions. It always identifies the CPU doing the access based 22243e2511SBenjamin Herrenschmidt * on the PowerBus initiator ID, thus we always access via the 23243e2511SBenjamin Herrenschmidt * same offset regardless of where the code is executing 24243e2511SBenjamin Herrenschmidt */ 25243e2511SBenjamin Herrenschmidt extern void __iomem *xive_tima; 26243e2511SBenjamin Herrenschmidt 27243e2511SBenjamin Herrenschmidt /* 28243e2511SBenjamin Herrenschmidt * Offset in the TM area of our current execution level (provided by 29243e2511SBenjamin Herrenschmidt * the backend) 30243e2511SBenjamin Herrenschmidt */ 31243e2511SBenjamin Herrenschmidt extern u32 xive_tima_offset; 32243e2511SBenjamin Herrenschmidt 33243e2511SBenjamin Herrenschmidt /* 34243e2511SBenjamin Herrenschmidt * Per-irq data (irq_get_handler_data for normal IRQs), IPIs 35243e2511SBenjamin Herrenschmidt * have it stored in the xive_cpu structure. We also cache 36243e2511SBenjamin Herrenschmidt * for normal interrupts the current target CPU. 37243e2511SBenjamin Herrenschmidt * 38243e2511SBenjamin Herrenschmidt * This structure is setup by the backend for each interrupt. 39243e2511SBenjamin Herrenschmidt */ 40243e2511SBenjamin Herrenschmidt struct xive_irq_data { 41243e2511SBenjamin Herrenschmidt u64 flags; 42243e2511SBenjamin Herrenschmidt u64 eoi_page; 43243e2511SBenjamin Herrenschmidt void __iomem *eoi_mmio; 44243e2511SBenjamin Herrenschmidt u64 trig_page; 45243e2511SBenjamin Herrenschmidt void __iomem *trig_mmio; 46243e2511SBenjamin Herrenschmidt u32 esb_shift; 47243e2511SBenjamin Herrenschmidt int src_chip; 48c58a14a9SCédric Le Goater u32 hw_irq; 49243e2511SBenjamin Herrenschmidt 50243e2511SBenjamin Herrenschmidt /* Setup/used by frontend */ 51243e2511SBenjamin Herrenschmidt int target; 52243e2511SBenjamin Herrenschmidt bool saved_p; 53243e2511SBenjamin Herrenschmidt }; 54243e2511SBenjamin Herrenschmidt #define XIVE_IRQ_FLAG_STORE_EOI 0x01 55243e2511SBenjamin Herrenschmidt #define XIVE_IRQ_FLAG_LSI 0x02 56243e2511SBenjamin Herrenschmidt #define XIVE_IRQ_FLAG_SHIFT_BUG 0x04 57243e2511SBenjamin Herrenschmidt #define XIVE_IRQ_FLAG_MASK_FW 0x08 58243e2511SBenjamin Herrenschmidt #define XIVE_IRQ_FLAG_EOI_FW 0x10 59bed81ee1SCédric Le Goater #define XIVE_IRQ_FLAG_H_INT_ESB 0x20 60243e2511SBenjamin Herrenschmidt 617f1c410dSBenjamin Herrenschmidt /* Special flag set by KVM for excalation interrupts */ 627f1c410dSBenjamin Herrenschmidt #define XIVE_IRQ_NO_EOI 0x80 637f1c410dSBenjamin Herrenschmidt 64243e2511SBenjamin Herrenschmidt #define XIVE_INVALID_CHIP_ID -1 65243e2511SBenjamin Herrenschmidt 66243e2511SBenjamin Herrenschmidt /* A queue tracking structure in a CPU */ 67243e2511SBenjamin Herrenschmidt struct xive_q { 68243e2511SBenjamin Herrenschmidt __be32 *qpage; 69243e2511SBenjamin Herrenschmidt u32 msk; 70243e2511SBenjamin Herrenschmidt u32 idx; 71243e2511SBenjamin Herrenschmidt u32 toggle; 72243e2511SBenjamin Herrenschmidt u64 eoi_phys; 73243e2511SBenjamin Herrenschmidt u32 esc_irq; 74243e2511SBenjamin Herrenschmidt atomic_t count; 75243e2511SBenjamin Herrenschmidt atomic_t pending_count; 7613ce3297SCédric Le Goater u64 guest_qaddr; 7713ce3297SCédric Le Goater u32 guest_qshift; 78243e2511SBenjamin Herrenschmidt }; 79243e2511SBenjamin Herrenschmidt 80243e2511SBenjamin Herrenschmidt /* Global enable flags for the XIVE support */ 81243e2511SBenjamin Herrenschmidt extern bool __xive_enabled; 82243e2511SBenjamin Herrenschmidt 83243e2511SBenjamin Herrenschmidt static inline bool xive_enabled(void) { return __xive_enabled; } 84243e2511SBenjamin Herrenschmidt 85eac1e731SCédric Le Goater extern bool xive_spapr_init(void); 86243e2511SBenjamin Herrenschmidt extern bool xive_native_init(void); 87243e2511SBenjamin Herrenschmidt extern void xive_smp_probe(void); 88243e2511SBenjamin Herrenschmidt extern int xive_smp_prepare_cpu(unsigned int cpu); 89243e2511SBenjamin Herrenschmidt extern void xive_smp_setup_cpu(void); 90243e2511SBenjamin Herrenschmidt extern void xive_smp_disable_cpu(void); 91eac1e731SCédric Le Goater extern void xive_teardown_cpu(void); 92243e2511SBenjamin Herrenschmidt extern void xive_shutdown(void); 93243e2511SBenjamin Herrenschmidt extern void xive_flush_interrupt(void); 94243e2511SBenjamin Herrenschmidt 95243e2511SBenjamin Herrenschmidt /* xmon hook */ 96243e2511SBenjamin Herrenschmidt extern void xmon_xive_do_dump(int cpu); 97243e2511SBenjamin Herrenschmidt 98243e2511SBenjamin Herrenschmidt /* APIs used by KVM */ 99243e2511SBenjamin Herrenschmidt extern u32 xive_native_default_eq_shift(void); 100243e2511SBenjamin Herrenschmidt extern u32 xive_native_alloc_vp_block(u32 max_vcpus); 101243e2511SBenjamin Herrenschmidt extern void xive_native_free_vp_block(u32 vp_base); 102243e2511SBenjamin Herrenschmidt extern int xive_native_populate_irq_data(u32 hw_irq, 103243e2511SBenjamin Herrenschmidt struct xive_irq_data *data); 104243e2511SBenjamin Herrenschmidt extern void xive_cleanup_irq_data(struct xive_irq_data *xd); 105243e2511SBenjamin Herrenschmidt extern u32 xive_native_alloc_irq(void); 106243e2511SBenjamin Herrenschmidt extern void xive_native_free_irq(u32 irq); 107243e2511SBenjamin Herrenschmidt extern int xive_native_configure_irq(u32 hw_irq, u32 target, u8 prio, u32 sw_irq); 108243e2511SBenjamin Herrenschmidt 109243e2511SBenjamin Herrenschmidt extern int xive_native_configure_queue(u32 vp_id, struct xive_q *q, u8 prio, 110243e2511SBenjamin Herrenschmidt __be32 *qpage, u32 order, bool can_escalate); 111243e2511SBenjamin Herrenschmidt extern void xive_native_disable_queue(u32 vp_id, struct xive_q *q, u8 prio); 112243e2511SBenjamin Herrenschmidt 1135af50993SBenjamin Herrenschmidt extern void xive_native_sync_source(u32 hw_irq); 11488ec6b93SCédric Le Goater extern void xive_native_sync_queue(u32 hw_irq); 115243e2511SBenjamin Herrenschmidt extern bool is_xive_irq(struct irq_chip *chip); 116bf4159daSBenjamin Herrenschmidt extern int xive_native_enable_vp(u32 vp_id, bool single_escalation); 1175af50993SBenjamin Herrenschmidt extern int xive_native_disable_vp(u32 vp_id); 1185af50993SBenjamin Herrenschmidt extern int xive_native_get_vp_info(u32 vp_id, u32 *out_cam_id, u32 *out_chip_id); 119bf4159daSBenjamin Herrenschmidt extern bool xive_native_has_single_escalation(void); 120243e2511SBenjamin Herrenschmidt 12188ec6b93SCédric Le Goater extern int xive_native_get_queue_info(u32 vp_id, uint32_t prio, 12288ec6b93SCédric Le Goater u64 *out_qpage, 12388ec6b93SCédric Le Goater u64 *out_qsize, 12488ec6b93SCédric Le Goater u64 *out_qeoi_page, 12588ec6b93SCédric Le Goater u32 *out_escalate_irq, 12688ec6b93SCédric Le Goater u64 *out_qflags); 12788ec6b93SCédric Le Goater 12888ec6b93SCédric Le Goater extern int xive_native_get_queue_state(u32 vp_id, uint32_t prio, u32 *qtoggle, 12988ec6b93SCédric Le Goater u32 *qindex); 13088ec6b93SCédric Le Goater extern int xive_native_set_queue_state(u32 vp_id, uint32_t prio, u32 qtoggle, 13188ec6b93SCédric Le Goater u32 qindex); 13288ec6b93SCédric Le Goater extern int xive_native_get_vp_state(u32 vp_id, u64 *out_state); 13388ec6b93SCédric Le Goater 134243e2511SBenjamin Herrenschmidt #else 135243e2511SBenjamin Herrenschmidt 136243e2511SBenjamin Herrenschmidt static inline bool xive_enabled(void) { return false; } 137243e2511SBenjamin Herrenschmidt 138eac1e731SCédric Le Goater static inline bool xive_spapr_init(void) { return false; } 139243e2511SBenjamin Herrenschmidt static inline bool xive_native_init(void) { return false; } 140243e2511SBenjamin Herrenschmidt static inline void xive_smp_probe(void) { } 14138833faaSMathieu Malaterre static inline int xive_smp_prepare_cpu(unsigned int cpu) { return -EINVAL; } 142243e2511SBenjamin Herrenschmidt static inline void xive_smp_setup_cpu(void) { } 143243e2511SBenjamin Herrenschmidt static inline void xive_smp_disable_cpu(void) { } 144243e2511SBenjamin Herrenschmidt static inline void xive_kexec_teardown_cpu(int secondary) { } 145243e2511SBenjamin Herrenschmidt static inline void xive_shutdown(void) { } 146243e2511SBenjamin Herrenschmidt static inline void xive_flush_interrupt(void) { } 147243e2511SBenjamin Herrenschmidt 148243e2511SBenjamin Herrenschmidt static inline u32 xive_native_alloc_vp_block(u32 max_vcpus) { return XIVE_INVALID_VP; } 149243e2511SBenjamin Herrenschmidt static inline void xive_native_free_vp_block(u32 vp_base) { } 150243e2511SBenjamin Herrenschmidt 151243e2511SBenjamin Herrenschmidt #endif 152243e2511SBenjamin Herrenschmidt 153243e2511SBenjamin Herrenschmidt #endif /* _ASM_POWERPC_XIVE_H */ 154