xref: /openbmc/linux/arch/powerpc/include/asm/xics.h (revision 4f6cce39)
1 /*
2  * Common definitions across all variants of ICP and ICS interrupt
3  * controllers.
4  */
5 
6 #ifndef _XICS_H
7 #define _XICS_H
8 
9 #include <linux/interrupt.h>
10 
11 #define XICS_IPI		2
12 #define XICS_IRQ_SPURIOUS	0
13 
14 /* Want a priority other than 0.  Various HW issues require this. */
15 #define	DEFAULT_PRIORITY	5
16 
17 /*
18  * Mark IPIs as higher priority so we can take them inside interrupts
19  * FIXME: still true now?
20  */
21 #define IPI_PRIORITY		4
22 
23 /* The least favored priority */
24 #define LOWEST_PRIORITY		0xFF
25 
26 /* The number of priorities defined above */
27 #define MAX_NUM_PRIORITIES	3
28 
29 /* Native ICP */
30 #ifdef CONFIG_PPC_ICP_NATIVE
31 extern int icp_native_init(void);
32 extern void icp_native_flush_interrupt(void);
33 extern void icp_native_cause_ipi_rm(int cpu);
34 #else
35 static inline int icp_native_init(void) { return -ENODEV; }
36 #endif
37 
38 /* PAPR ICP */
39 #ifdef CONFIG_PPC_ICP_HV
40 extern int icp_hv_init(void);
41 #else
42 static inline int icp_hv_init(void) { return -ENODEV; }
43 #endif
44 
45 #ifdef CONFIG_PPC_POWERNV
46 extern int icp_opal_init(void);
47 extern void icp_opal_flush_interrupt(void);
48 #else
49 static inline int icp_opal_init(void) { return -ENODEV; }
50 #endif
51 
52 /* ICP ops */
53 struct icp_ops {
54 	unsigned int (*get_irq)(void);
55 	void (*eoi)(struct irq_data *d);
56 	void (*set_priority)(unsigned char prio);
57 	void (*teardown_cpu)(void);
58 	void (*flush_ipi)(void);
59 #ifdef CONFIG_SMP
60 	void (*cause_ipi)(int cpu, unsigned long data);
61 	irq_handler_t ipi_action;
62 #endif
63 };
64 
65 extern const struct icp_ops *icp_ops;
66 
67 /* Native ICS */
68 extern int ics_native_init(void);
69 
70 /* RTAS ICS */
71 #ifdef CONFIG_PPC_ICS_RTAS
72 extern int ics_rtas_init(void);
73 #else
74 static inline int ics_rtas_init(void) { return -ENODEV; }
75 #endif
76 
77 /* HAL ICS */
78 #ifdef CONFIG_PPC_POWERNV
79 extern int ics_opal_init(void);
80 #else
81 static inline int ics_opal_init(void) { return -ENODEV; }
82 #endif
83 
84 /* ICS instance, hooked up to chip_data of an irq */
85 struct ics {
86 	struct list_head link;
87 	int (*map)(struct ics *ics, unsigned int virq);
88 	void (*mask_unknown)(struct ics *ics, unsigned long vec);
89 	long (*get_server)(struct ics *ics, unsigned long vec);
90 	int (*host_match)(struct ics *ics, struct device_node *node);
91 	char data[];
92 };
93 
94 /* Commons */
95 extern unsigned int xics_default_server;
96 extern unsigned int xics_default_distrib_server;
97 extern unsigned int xics_interrupt_server_size;
98 extern struct irq_domain *xics_host;
99 
100 struct xics_cppr {
101 	unsigned char stack[MAX_NUM_PRIORITIES];
102 	int index;
103 };
104 
105 DECLARE_PER_CPU(struct xics_cppr, xics_cppr);
106 
107 static inline void xics_push_cppr(unsigned int vec)
108 {
109 	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
110 
111 	if (WARN_ON(os_cppr->index >= MAX_NUM_PRIORITIES - 1))
112 		return;
113 
114 	if (vec == XICS_IPI)
115 		os_cppr->stack[++os_cppr->index] = IPI_PRIORITY;
116 	else
117 		os_cppr->stack[++os_cppr->index] = DEFAULT_PRIORITY;
118 }
119 
120 static inline unsigned char xics_pop_cppr(void)
121 {
122 	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
123 
124 	if (WARN_ON(os_cppr->index < 1))
125 		return LOWEST_PRIORITY;
126 
127 	return os_cppr->stack[--os_cppr->index];
128 }
129 
130 static inline void xics_set_base_cppr(unsigned char cppr)
131 {
132 	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
133 
134 	/* we only really want to set the priority when there's
135 	 * just one cppr value on the stack
136 	 */
137 	WARN_ON(os_cppr->index != 0);
138 
139 	os_cppr->stack[0] = cppr;
140 }
141 
142 static inline unsigned char xics_cppr_top(void)
143 {
144 	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
145 
146 	return os_cppr->stack[os_cppr->index];
147 }
148 
149 DECLARE_PER_CPU_SHARED_ALIGNED(unsigned long, xics_ipi_message);
150 
151 extern void xics_init(void);
152 extern void xics_setup_cpu(void);
153 extern void xics_update_irq_servers(void);
154 extern void xics_set_cpu_giq(unsigned int gserver, unsigned int join);
155 extern void xics_mask_unknown_vec(unsigned int vec);
156 extern irqreturn_t xics_ipi_dispatch(int cpu);
157 extern void xics_smp_probe(void);
158 extern void xics_register_ics(struct ics *ics);
159 extern void xics_teardown_cpu(void);
160 extern void xics_kexec_teardown_cpu(int secondary);
161 extern void xics_migrate_irqs_away(void);
162 extern void icp_native_eoi(struct irq_data *d);
163 extern int xics_set_irq_type(struct irq_data *d, unsigned int flow_type);
164 extern int xics_retrigger(struct irq_data *data);
165 #ifdef CONFIG_SMP
166 extern int xics_get_irq_server(unsigned int virq, const struct cpumask *cpumask,
167 			       unsigned int strict_check);
168 #else
169 #define xics_get_irq_server(virq, cpumask, strict_check) (xics_default_server)
170 #endif
171 
172 
173 #endif /* _XICS_H */
174