11a59d1b8SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 2b8b572e1SStephen Rothwell /* 3b8b572e1SStephen Rothwell * Copyright 2007 IBM Corp 4b8b572e1SStephen Rothwell */ 5b8b572e1SStephen Rothwell 6b8b572e1SStephen Rothwell #ifndef _ASM_POWERPC_TSI108_PCI_H 7b8b572e1SStephen Rothwell #define _ASM_POWERPC_TSI108_PCI_H 8b8b572e1SStephen Rothwell 9b8b572e1SStephen Rothwell #include <asm/tsi108.h> 10b8b572e1SStephen Rothwell 11b8b572e1SStephen Rothwell /* Register definitions */ 12b8b572e1SStephen Rothwell #define TSI108_PCI_P2O_BAR0 (TSI108_PCI_OFFSET + 0x10) 13b8b572e1SStephen Rothwell #define TSI108_PCI_P2O_BAR0_UPPER (TSI108_PCI_OFFSET + 0x14) 14b8b572e1SStephen Rothwell #define TSI108_PCI_P2O_BAR2 (TSI108_PCI_OFFSET + 0x18) 15b8b572e1SStephen Rothwell #define TSI108_PCI_P2O_BAR2_UPPER (TSI108_PCI_OFFSET + 0x1c) 16b8b572e1SStephen Rothwell #define TSI108_PCI_P2O_PAGE_SIZES (TSI108_PCI_OFFSET + 0x4c) 17b8b572e1SStephen Rothwell #define TSI108_PCI_PFAB_BAR0 (TSI108_PCI_OFFSET + 0x204) 18b8b572e1SStephen Rothwell #define TSI108_PCI_PFAB_BAR0_UPPER (TSI108_PCI_OFFSET + 0x208) 19b8b572e1SStephen Rothwell #define TSI108_PCI_PFAB_IO (TSI108_PCI_OFFSET + 0x20c) 20b8b572e1SStephen Rothwell #define TSI108_PCI_PFAB_IO_UPPER (TSI108_PCI_OFFSET + 0x210) 21b8b572e1SStephen Rothwell #define TSI108_PCI_PFAB_MEM32 (TSI108_PCI_OFFSET + 0x214) 22b8b572e1SStephen Rothwell #define TSI108_PCI_PFAB_PFM3 (TSI108_PCI_OFFSET + 0x220) 23b8b572e1SStephen Rothwell #define TSI108_PCI_PFAB_PFM4 (TSI108_PCI_OFFSET + 0x230) 24b8b572e1SStephen Rothwell 25b8b572e1SStephen Rothwell extern int tsi108_setup_pci(struct device_node *dev, u32 cfg_phys, int primary); 26b8b572e1SStephen Rothwell extern void tsi108_pci_int_init(struct device_node *node); 27bd0b9ac4SThomas Gleixner extern void tsi108_irq_cascade(struct irq_desc *desc); 28b8b572e1SStephen Rothwell extern void tsi108_clear_pci_cfg_error(void); 29b8b572e1SStephen Rothwell 30b8b572e1SStephen Rothwell #endif /* _ASM_POWERPC_TSI108_PCI_H */ 31