xref: /openbmc/linux/arch/powerpc/include/asm/time.h (revision 64d85cc9)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Common time prototypes and such for all ppc machines.
4  *
5  * Written by Cort Dougan (cort@cs.nmt.edu) to merge
6  * Paul Mackerras' version and mine for PReP and Pmac.
7  */
8 
9 #ifndef __POWERPC_TIME_H
10 #define __POWERPC_TIME_H
11 
12 #ifdef __KERNEL__
13 #include <linux/types.h>
14 #include <linux/percpu.h>
15 
16 #include <asm/processor.h>
17 #include <asm/cpu_has_feature.h>
18 
19 /* time.c */
20 extern unsigned long tb_ticks_per_jiffy;
21 extern unsigned long tb_ticks_per_usec;
22 extern unsigned long tb_ticks_per_sec;
23 extern struct clock_event_device decrementer_clockevent;
24 
25 
26 extern void generic_calibrate_decr(void);
27 extern void hdec_interrupt(struct pt_regs *regs);
28 
29 /* Some sane defaults: 125 MHz timebase, 1GHz processor */
30 extern unsigned long ppc_proc_freq;
31 #define DEFAULT_PROC_FREQ	(DEFAULT_TB_FREQ * 8)
32 extern unsigned long ppc_tb_freq;
33 #define DEFAULT_TB_FREQ		125000000UL
34 
35 extern bool tb_invalid;
36 
37 struct div_result {
38 	u64 result_high;
39 	u64 result_low;
40 };
41 
42 /* Accessor functions for the timebase (RTC on 601) registers. */
43 /* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
44 #ifdef CONFIG_PPC_BOOK3S_32
45 #define __USE_RTC()	(cpu_has_feature(CPU_FTR_USE_RTC))
46 #else
47 #define __USE_RTC()	0
48 #endif
49 
50 #ifdef CONFIG_PPC64
51 
52 /* For compatibility, get_tbl() is defined as get_tb() on ppc64 */
53 #define get_tbl		get_tb
54 
55 #else
56 
57 static inline unsigned long get_tbl(void)
58 {
59 #if defined(CONFIG_403GCX)
60 	unsigned long tbl;
61 	asm volatile("mfspr %0, 0x3dd" : "=r" (tbl));
62 	return tbl;
63 #else
64 	return mftbl();
65 #endif
66 }
67 
68 static inline unsigned int get_tbu(void)
69 {
70 #ifdef CONFIG_403GCX
71 	unsigned int tbu;
72 	asm volatile("mfspr %0, 0x3dc" : "=r" (tbu));
73 	return tbu;
74 #else
75 	return mftbu();
76 #endif
77 }
78 #endif /* !CONFIG_PPC64 */
79 
80 static inline unsigned int get_rtcl(void)
81 {
82 	unsigned int rtcl;
83 
84 	asm volatile("mfrtcl %0" : "=r" (rtcl));
85 	return rtcl;
86 }
87 
88 static inline u64 get_rtc(void)
89 {
90 	unsigned int hi, lo, hi2;
91 
92 	do {
93 		asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2"
94 			     : "=r" (hi), "=r" (lo), "=r" (hi2));
95 	} while (hi2 != hi);
96 	return (u64)hi * 1000000000 + lo;
97 }
98 
99 static inline u64 get_vtb(void)
100 {
101 #ifdef CONFIG_PPC_BOOK3S_64
102 	if (cpu_has_feature(CPU_FTR_ARCH_207S))
103 		return mfspr(SPRN_VTB);
104 #endif
105 	return 0;
106 }
107 
108 #ifdef CONFIG_PPC64
109 static inline u64 get_tb(void)
110 {
111 	return mftb();
112 }
113 #else /* CONFIG_PPC64 */
114 static inline u64 get_tb(void)
115 {
116 	unsigned int tbhi, tblo, tbhi2;
117 
118 	do {
119 		tbhi = get_tbu();
120 		tblo = get_tbl();
121 		tbhi2 = get_tbu();
122 	} while (tbhi != tbhi2);
123 
124 	return ((u64)tbhi << 32) | tblo;
125 }
126 #endif /* !CONFIG_PPC64 */
127 
128 static inline u64 get_tb_or_rtc(void)
129 {
130 	return __USE_RTC() ? get_rtc() : get_tb();
131 }
132 
133 static inline void set_tb(unsigned int upper, unsigned int lower)
134 {
135 	mtspr(SPRN_TBWL, 0);
136 	mtspr(SPRN_TBWU, upper);
137 	mtspr(SPRN_TBWL, lower);
138 }
139 
140 /* Accessor functions for the decrementer register.
141  * The 4xx doesn't even have a decrementer.  I tried to use the
142  * generic timer interrupt code, which seems OK, with the 4xx PIT
143  * in auto-reload mode.  The problem is PIT stops counting when it
144  * hits zero.  If it would wrap, we could use it just like a decrementer.
145  */
146 static inline u64 get_dec(void)
147 {
148 #if defined(CONFIG_40x)
149 	return (mfspr(SPRN_PIT));
150 #else
151 	return (mfspr(SPRN_DEC));
152 #endif
153 }
154 
155 /*
156  * Note: Book E and 4xx processors differ from other PowerPC processors
157  * in when the decrementer generates its interrupt: on the 1 to 0
158  * transition for Book E/4xx, but on the 0 to -1 transition for others.
159  */
160 static inline void set_dec(u64 val)
161 {
162 #if defined(CONFIG_40x)
163 	mtspr(SPRN_PIT, (u32) val);
164 #else
165 #ifndef CONFIG_BOOKE
166 	--val;
167 #endif
168 	mtspr(SPRN_DEC, val);
169 #endif /* not 40x */
170 }
171 
172 static inline unsigned long tb_ticks_since(unsigned long tstamp)
173 {
174 	if (__USE_RTC()) {
175 		int delta = get_rtcl() - (unsigned int) tstamp;
176 		return delta < 0 ? delta + 1000000000 : delta;
177 	}
178 	return get_tbl() - tstamp;
179 }
180 
181 #define mulhwu(x,y) \
182 ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
183 
184 #ifdef CONFIG_PPC64
185 #define mulhdu(x,y) \
186 ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
187 #else
188 extern u64 mulhdu(u64, u64);
189 #endif
190 
191 extern void div128_by_32(u64 dividend_high, u64 dividend_low,
192 			 unsigned divisor, struct div_result *dr);
193 
194 extern void secondary_cpu_time_init(void);
195 extern void __init time_init(void);
196 
197 DECLARE_PER_CPU(u64, decrementers_next_tb);
198 
199 /* Convert timebase ticks to nanoseconds */
200 unsigned long long tb_to_ns(unsigned long long tb_ticks);
201 
202 #endif /* __KERNEL__ */
203 #endif /* __POWERPC_TIME_H */
204