1 /* 2 * Common time prototypes and such for all ppc machines. 3 * 4 * Written by Cort Dougan (cort@cs.nmt.edu) to merge 5 * Paul Mackerras' version and mine for PReP and Pmac. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #ifndef __POWERPC_TIME_H 14 #define __POWERPC_TIME_H 15 16 #ifdef __KERNEL__ 17 #include <linux/types.h> 18 #include <linux/percpu.h> 19 20 #include <asm/processor.h> 21 #include <asm/cpu_has_feature.h> 22 23 /* time.c */ 24 extern unsigned long tb_ticks_per_jiffy; 25 extern unsigned long tb_ticks_per_usec; 26 extern unsigned long tb_ticks_per_sec; 27 extern struct clock_event_device decrementer_clockevent; 28 29 30 extern void generic_calibrate_decr(void); 31 extern void hdec_interrupt(struct pt_regs *regs); 32 33 /* Some sane defaults: 125 MHz timebase, 1GHz processor */ 34 extern unsigned long ppc_proc_freq; 35 #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) 36 extern unsigned long ppc_tb_freq; 37 #define DEFAULT_TB_FREQ 125000000UL 38 39 struct div_result { 40 u64 result_high; 41 u64 result_low; 42 }; 43 44 /* Accessor functions for the timebase (RTC on 601) registers. */ 45 /* If one day CONFIG_POWER is added just define __USE_RTC as 1 */ 46 #ifdef CONFIG_6xx 47 #define __USE_RTC() (cpu_has_feature(CPU_FTR_USE_RTC)) 48 #else 49 #define __USE_RTC() 0 50 #endif 51 52 #ifdef CONFIG_PPC64 53 54 /* For compatibility, get_tbl() is defined as get_tb() on ppc64 */ 55 #define get_tbl get_tb 56 57 #else 58 59 static inline unsigned long get_tbl(void) 60 { 61 #if defined(CONFIG_403GCX) 62 unsigned long tbl; 63 asm volatile("mfspr %0, 0x3dd" : "=r" (tbl)); 64 return tbl; 65 #else 66 return mftbl(); 67 #endif 68 } 69 70 static inline unsigned int get_tbu(void) 71 { 72 #ifdef CONFIG_403GCX 73 unsigned int tbu; 74 asm volatile("mfspr %0, 0x3dc" : "=r" (tbu)); 75 return tbu; 76 #else 77 return mftbu(); 78 #endif 79 } 80 #endif /* !CONFIG_PPC64 */ 81 82 static inline unsigned int get_rtcl(void) 83 { 84 unsigned int rtcl; 85 86 asm volatile("mfrtcl %0" : "=r" (rtcl)); 87 return rtcl; 88 } 89 90 static inline u64 get_rtc(void) 91 { 92 unsigned int hi, lo, hi2; 93 94 do { 95 asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2" 96 : "=r" (hi), "=r" (lo), "=r" (hi2)); 97 } while (hi2 != hi); 98 return (u64)hi * 1000000000 + lo; 99 } 100 101 static inline u64 get_vtb(void) 102 { 103 #ifdef CONFIG_PPC_BOOK3S_64 104 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 105 return mfspr(SPRN_VTB); 106 #endif 107 return 0; 108 } 109 110 #ifdef CONFIG_PPC64 111 static inline u64 get_tb(void) 112 { 113 return mftb(); 114 } 115 #else /* CONFIG_PPC64 */ 116 static inline u64 get_tb(void) 117 { 118 unsigned int tbhi, tblo, tbhi2; 119 120 do { 121 tbhi = get_tbu(); 122 tblo = get_tbl(); 123 tbhi2 = get_tbu(); 124 } while (tbhi != tbhi2); 125 126 return ((u64)tbhi << 32) | tblo; 127 } 128 #endif /* !CONFIG_PPC64 */ 129 130 static inline u64 get_tb_or_rtc(void) 131 { 132 return __USE_RTC() ? get_rtc() : get_tb(); 133 } 134 135 static inline void set_tb(unsigned int upper, unsigned int lower) 136 { 137 mtspr(SPRN_TBWL, 0); 138 mtspr(SPRN_TBWU, upper); 139 mtspr(SPRN_TBWL, lower); 140 } 141 142 /* Accessor functions for the decrementer register. 143 * The 4xx doesn't even have a decrementer. I tried to use the 144 * generic timer interrupt code, which seems OK, with the 4xx PIT 145 * in auto-reload mode. The problem is PIT stops counting when it 146 * hits zero. If it would wrap, we could use it just like a decrementer. 147 */ 148 static inline u64 get_dec(void) 149 { 150 #if defined(CONFIG_40x) 151 return (mfspr(SPRN_PIT)); 152 #else 153 return (mfspr(SPRN_DEC)); 154 #endif 155 } 156 157 /* 158 * Note: Book E and 4xx processors differ from other PowerPC processors 159 * in when the decrementer generates its interrupt: on the 1 to 0 160 * transition for Book E/4xx, but on the 0 to -1 transition for others. 161 */ 162 static inline void set_dec(u64 val) 163 { 164 #if defined(CONFIG_40x) 165 mtspr(SPRN_PIT, (u32) val); 166 #else 167 #ifndef CONFIG_BOOKE 168 --val; 169 #endif 170 mtspr(SPRN_DEC, val); 171 #endif /* not 40x */ 172 } 173 174 static inline unsigned long tb_ticks_since(unsigned long tstamp) 175 { 176 if (__USE_RTC()) { 177 int delta = get_rtcl() - (unsigned int) tstamp; 178 return delta < 0 ? delta + 1000000000 : delta; 179 } 180 return get_tbl() - tstamp; 181 } 182 183 #define mulhwu(x,y) \ 184 ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) 185 186 #ifdef CONFIG_PPC64 187 #define mulhdu(x,y) \ 188 ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) 189 #else 190 extern u64 mulhdu(u64, u64); 191 #endif 192 193 extern void div128_by_32(u64 dividend_high, u64 dividend_low, 194 unsigned divisor, struct div_result *dr); 195 196 extern void secondary_cpu_time_init(void); 197 extern void __init time_init(void); 198 199 DECLARE_PER_CPU(u64, decrementers_next_tb); 200 201 /* Convert timebase ticks to nanoseconds */ 202 unsigned long long tb_to_ns(unsigned long long tb_ticks); 203 204 #endif /* __KERNEL__ */ 205 #endif /* __POWERPC_TIME_H */ 206