12874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 2b8b572e1SStephen Rothwell /* 3b8b572e1SStephen Rothwell * Common time prototypes and such for all ppc machines. 4b8b572e1SStephen Rothwell * 5b8b572e1SStephen Rothwell * Written by Cort Dougan (cort@cs.nmt.edu) to merge 6b8b572e1SStephen Rothwell * Paul Mackerras' version and mine for PReP and Pmac. 7b8b572e1SStephen Rothwell */ 8b8b572e1SStephen Rothwell 9b8b572e1SStephen Rothwell #ifndef __POWERPC_TIME_H 10b8b572e1SStephen Rothwell #define __POWERPC_TIME_H 11b8b572e1SStephen Rothwell 12b8b572e1SStephen Rothwell #ifdef __KERNEL__ 13b8b572e1SStephen Rothwell #include <linux/types.h> 14b8b572e1SStephen Rothwell #include <linux/percpu.h> 15b8b572e1SStephen Rothwell 16b8b572e1SStephen Rothwell #include <asm/processor.h> 17b92a226eSKevin Hao #include <asm/cpu_has_feature.h> 18b8b572e1SStephen Rothwell 19b8b572e1SStephen Rothwell /* time.c */ 20b8b572e1SStephen Rothwell extern unsigned long tb_ticks_per_jiffy; 21b8b572e1SStephen Rothwell extern unsigned long tb_ticks_per_usec; 22b8b572e1SStephen Rothwell extern unsigned long tb_ticks_per_sec; 236e35994dSBharat Bhushan extern struct clock_event_device decrementer_clockevent; 24b8b572e1SStephen Rothwell 25b8b572e1SStephen Rothwell 26b8b572e1SStephen Rothwell extern void generic_calibrate_decr(void); 27b8b572e1SStephen Rothwell 28b8b572e1SStephen Rothwell /* Some sane defaults: 125 MHz timebase, 1GHz processor */ 29b8b572e1SStephen Rothwell extern unsigned long ppc_proc_freq; 30b8b572e1SStephen Rothwell #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) 31b8b572e1SStephen Rothwell extern unsigned long ppc_tb_freq; 32b8b572e1SStephen Rothwell #define DEFAULT_TB_FREQ 125000000UL 33b8b572e1SStephen Rothwell 34de269129SMahesh Salgaonkar extern bool tb_invalid; 35de269129SMahesh Salgaonkar 36b8b572e1SStephen Rothwell struct div_result { 37b8b572e1SStephen Rothwell u64 result_high; 38b8b572e1SStephen Rothwell u64 result_low; 39b8b572e1SStephen Rothwell }; 40b8b572e1SStephen Rothwell 41b8b572e1SStephen Rothwell #ifdef CONFIG_PPC64 42b8b572e1SStephen Rothwell 43b8b572e1SStephen Rothwell /* For compatibility, get_tbl() is defined as get_tb() on ppc64 */ 44b8b572e1SStephen Rothwell #define get_tbl get_tb 45b8b572e1SStephen Rothwell 46b8b572e1SStephen Rothwell #else 47b8b572e1SStephen Rothwell 48b8b572e1SStephen Rothwell static inline unsigned long get_tbl(void) 49b8b572e1SStephen Rothwell { 5015c10215SChristophe Leroy return mftb(); 51b8b572e1SStephen Rothwell } 52b8b572e1SStephen Rothwell 53b8b572e1SStephen Rothwell static inline unsigned int get_tbu(void) 54b8b572e1SStephen Rothwell { 55b8b572e1SStephen Rothwell return mftbu(); 56b8b572e1SStephen Rothwell } 57b8b572e1SStephen Rothwell #endif /* !CONFIG_PPC64 */ 58b8b572e1SStephen Rothwell 598f42ab27SAneesh Kumar K.V static inline u64 get_vtb(void) 608f42ab27SAneesh Kumar K.V { 618f42ab27SAneesh Kumar K.V #ifdef CONFIG_PPC_BOOK3S_64 628f42ab27SAneesh Kumar K.V if (cpu_has_feature(CPU_FTR_ARCH_207S)) 63905259e3SKevin Hao return mfspr(SPRN_VTB); 648f42ab27SAneesh Kumar K.V #endif 658f42ab27SAneesh Kumar K.V return 0; 668f42ab27SAneesh Kumar K.V } 678f42ab27SAneesh Kumar K.V 68b8b572e1SStephen Rothwell #ifdef CONFIG_PPC64 69b8b572e1SStephen Rothwell static inline u64 get_tb(void) 70b8b572e1SStephen Rothwell { 71b8b572e1SStephen Rothwell return mftb(); 72b8b572e1SStephen Rothwell } 73b8b572e1SStephen Rothwell #else /* CONFIG_PPC64 */ 74b8b572e1SStephen Rothwell static inline u64 get_tb(void) 75b8b572e1SStephen Rothwell { 76b8b572e1SStephen Rothwell unsigned int tbhi, tblo, tbhi2; 77b8b572e1SStephen Rothwell 78b8b572e1SStephen Rothwell do { 79942e8911SChristophe Leroy tbhi = mftbu(); 80942e8911SChristophe Leroy tblo = mftb(); 81942e8911SChristophe Leroy tbhi2 = mftbu(); 82b8b572e1SStephen Rothwell } while (tbhi != tbhi2); 83b8b572e1SStephen Rothwell 84b8b572e1SStephen Rothwell return ((u64)tbhi << 32) | tblo; 85b8b572e1SStephen Rothwell } 86b8b572e1SStephen Rothwell #endif /* !CONFIG_PPC64 */ 87b8b572e1SStephen Rothwell 88b8b572e1SStephen Rothwell static inline void set_tb(unsigned int upper, unsigned int lower) 89b8b572e1SStephen Rothwell { 90b8b572e1SStephen Rothwell mtspr(SPRN_TBWL, 0); 91b8b572e1SStephen Rothwell mtspr(SPRN_TBWU, upper); 92b8b572e1SStephen Rothwell mtspr(SPRN_TBWL, lower); 93b8b572e1SStephen Rothwell } 94b8b572e1SStephen Rothwell 95b8b572e1SStephen Rothwell /* Accessor functions for the decrementer register. 96b8b572e1SStephen Rothwell * The 4xx doesn't even have a decrementer. I tried to use the 97b8b572e1SStephen Rothwell * generic timer interrupt code, which seems OK, with the 4xx PIT 98b8b572e1SStephen Rothwell * in auto-reload mode. The problem is PIT stops counting when it 99b8b572e1SStephen Rothwell * hits zero. If it would wrap, we could use it just like a decrementer. 100b8b572e1SStephen Rothwell */ 10179901024SOliver O'Halloran static inline u64 get_dec(void) 102b8b572e1SStephen Rothwell { 10363f9d9dfSChristophe Leroy if (IS_ENABLED(CONFIG_40x)) 10463f9d9dfSChristophe Leroy return mfspr(SPRN_PIT); 10563f9d9dfSChristophe Leroy 10663f9d9dfSChristophe Leroy return mfspr(SPRN_DEC); 107b8b572e1SStephen Rothwell } 108b8b572e1SStephen Rothwell 109b8b572e1SStephen Rothwell /* 110b8b572e1SStephen Rothwell * Note: Book E and 4xx processors differ from other PowerPC processors 111b8b572e1SStephen Rothwell * in when the decrementer generates its interrupt: on the 1 to 0 112b8b572e1SStephen Rothwell * transition for Book E/4xx, but on the 0 to -1 transition for others. 113b8b572e1SStephen Rothwell */ 11479901024SOliver O'Halloran static inline void set_dec(u64 val) 115b8b572e1SStephen Rothwell { 11663f9d9dfSChristophe Leroy if (IS_ENABLED(CONFIG_40x)) 11779901024SOliver O'Halloran mtspr(SPRN_PIT, (u32)val); 11863f9d9dfSChristophe Leroy else if (IS_ENABLED(CONFIG_BOOKE)) 119b8b572e1SStephen Rothwell mtspr(SPRN_DEC, val); 12063f9d9dfSChristophe Leroy else 12163f9d9dfSChristophe Leroy mtspr(SPRN_DEC, val - 1); 122b8b572e1SStephen Rothwell } 123b8b572e1SStephen Rothwell 124b8b572e1SStephen Rothwell static inline unsigned long tb_ticks_since(unsigned long tstamp) 125b8b572e1SStephen Rothwell { 126942e8911SChristophe Leroy return mftb() - tstamp; 127b8b572e1SStephen Rothwell } 128b8b572e1SStephen Rothwell 129b8b572e1SStephen Rothwell #define mulhwu(x,y) \ 130b8b572e1SStephen Rothwell ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) 131b8b572e1SStephen Rothwell 132b8b572e1SStephen Rothwell #ifdef CONFIG_PPC64 133b8b572e1SStephen Rothwell #define mulhdu(x,y) \ 134b8b572e1SStephen Rothwell ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) 135b8b572e1SStephen Rothwell #else 136b8b572e1SStephen Rothwell extern u64 mulhdu(u64, u64); 137b8b572e1SStephen Rothwell #endif 138b8b572e1SStephen Rothwell 139b8b572e1SStephen Rothwell extern void div128_by_32(u64 dividend_high, u64 dividend_low, 140b8b572e1SStephen Rothwell unsigned divisor, struct div_result *dr); 141b8b572e1SStephen Rothwell 142b8b572e1SStephen Rothwell extern void secondary_cpu_time_init(void); 143848092faSMathieu Malaterre extern void __init time_init(void); 144b8b572e1SStephen Rothwell 1457df10275SAnton Blanchard DECLARE_PER_CPU(u64, decrementers_next_tb); 14637fb9a02SAnton Blanchard 147b6c295dfSPaul Mackerras /* Convert timebase ticks to nanoseconds */ 148b6c295dfSPaul Mackerras unsigned long long tb_to_ns(unsigned long long tb_ticks); 149b6c295dfSPaul Mackerras 15068b34588SNicholas Piggin /* SPLPAR */ 15168b34588SNicholas Piggin void accumulate_stolen_time(void); 15268b34588SNicholas Piggin 153b8b572e1SStephen Rothwell #endif /* __KERNEL__ */ 154b8b572e1SStephen Rothwell #endif /* __POWERPC_TIME_H */ 155