1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * spu_csa.h: Definitions for SPU context save area (CSA). 4 * 5 * (C) Copyright IBM 2005 6 * 7 * Author: Mark Nutter <mnutter@us.ibm.com> 8 */ 9 10 #ifndef _SPU_CSA_H_ 11 #define _SPU_CSA_H_ 12 #ifdef __KERNEL__ 13 14 /* 15 * Total number of 128-bit registers. 16 */ 17 #define NR_SPU_GPRS 128 18 #define NR_SPU_SPRS 9 19 #define NR_SPU_REGS_PAD 7 20 #define NR_SPU_SPILL_REGS 144 /* GPRS + SPRS + PAD */ 21 #define SIZEOF_SPU_SPILL_REGS NR_SPU_SPILL_REGS * 16 22 23 #define SPU_SAVE_COMPLETE 0x3FFB 24 #define SPU_RESTORE_COMPLETE 0x3FFC 25 26 /* 27 * Definitions for various 'stopped' status conditions, 28 * to be recreated during context restore. 29 */ 30 #define SPU_STOPPED_STATUS_P 1 31 #define SPU_STOPPED_STATUS_I 2 32 #define SPU_STOPPED_STATUS_H 3 33 #define SPU_STOPPED_STATUS_S 4 34 #define SPU_STOPPED_STATUS_S_I 5 35 #define SPU_STOPPED_STATUS_S_P 6 36 #define SPU_STOPPED_STATUS_P_H 7 37 #define SPU_STOPPED_STATUS_P_I 8 38 #define SPU_STOPPED_STATUS_R 9 39 40 /* 41 * Definitions for software decrementer status flag. 42 */ 43 #define SPU_DECR_STATUS_RUNNING 0x1 44 #define SPU_DECR_STATUS_WRAPPED 0x2 45 46 #ifndef __ASSEMBLY__ 47 /** 48 * spu_reg128 - generic 128-bit register definition. 49 */ 50 struct spu_reg128 { 51 u32 slot[4]; 52 }; 53 54 /** 55 * struct spu_lscsa - Local Store Context Save Area. 56 * @gprs: Array of saved registers. 57 * @fpcr: Saved floating point status control register. 58 * @decr: Saved decrementer value. 59 * @decr_status: Indicates software decrementer status flags. 60 * @ppu_mb: Saved PPU mailbox data. 61 * @ppuint_mb: Saved PPU interrupting mailbox data. 62 * @tag_mask: Saved tag group mask. 63 * @event_mask: Saved event mask. 64 * @srr0: Saved SRR0. 65 * @stopped_status: Conditions to be recreated by restore. 66 * @ls: Saved contents of Local Storage Area. 67 * 68 * The LSCSA represents state that is primarily saved and 69 * restored by SPU-side code. 70 */ 71 struct spu_lscsa { 72 struct spu_reg128 gprs[128]; 73 struct spu_reg128 fpcr; 74 struct spu_reg128 decr; 75 struct spu_reg128 decr_status; 76 struct spu_reg128 ppu_mb; 77 struct spu_reg128 ppuint_mb; 78 struct spu_reg128 tag_mask; 79 struct spu_reg128 event_mask; 80 struct spu_reg128 srr0; 81 struct spu_reg128 stopped_status; 82 83 /* 84 * 'ls' must be page-aligned on all configurations. 85 * Since we don't want to rely on having the spu-gcc 86 * installed to build the kernel and this structure 87 * is used in the SPU-side code, make it 64k-page 88 * aligned for now. 89 */ 90 unsigned char ls[LS_SIZE] __attribute__((aligned(65536))); 91 }; 92 93 #ifndef __SPU__ 94 /* 95 * struct spu_problem_collapsed - condensed problem state area, w/o pads. 96 */ 97 struct spu_problem_collapsed { 98 u64 spc_mssync_RW; 99 u32 mfc_lsa_W; 100 u32 unused_pad0; 101 u64 mfc_ea_W; 102 union mfc_tag_size_class_cmd mfc_union_W; 103 u32 dma_qstatus_R; 104 u32 dma_querytype_RW; 105 u32 dma_querymask_RW; 106 u32 dma_tagstatus_R; 107 u32 pu_mb_R; 108 u32 spu_mb_W; 109 u32 mb_stat_R; 110 u32 spu_runcntl_RW; 111 u32 spu_status_R; 112 u32 spu_spc_R; 113 u32 spu_npc_RW; 114 u32 signal_notify1; 115 u32 signal_notify2; 116 u32 unused_pad1; 117 }; 118 119 /* 120 * struct spu_priv1_collapsed - condensed privileged 1 area, w/o pads. 121 */ 122 struct spu_priv1_collapsed { 123 u64 mfc_sr1_RW; 124 u64 mfc_lpid_RW; 125 u64 spu_idr_RW; 126 u64 mfc_vr_RO; 127 u64 spu_vr_RO; 128 u64 int_mask_class0_RW; 129 u64 int_mask_class1_RW; 130 u64 int_mask_class2_RW; 131 u64 int_stat_class0_RW; 132 u64 int_stat_class1_RW; 133 u64 int_stat_class2_RW; 134 u64 int_route_RW; 135 u64 mfc_atomic_flush_RW; 136 u64 resource_allocation_groupID_RW; 137 u64 resource_allocation_enable_RW; 138 u64 mfc_fir_R; 139 u64 mfc_fir_status_or_W; 140 u64 mfc_fir_status_and_W; 141 u64 mfc_fir_mask_R; 142 u64 mfc_fir_mask_or_W; 143 u64 mfc_fir_mask_and_W; 144 u64 mfc_fir_chkstp_enable_RW; 145 u64 smf_sbi_signal_sel; 146 u64 smf_ato_signal_sel; 147 u64 tlb_index_hint_RO; 148 u64 tlb_index_W; 149 u64 tlb_vpn_RW; 150 u64 tlb_rpn_RW; 151 u64 tlb_invalidate_entry_W; 152 u64 tlb_invalidate_all_W; 153 u64 smm_hid; 154 u64 mfc_accr_RW; 155 u64 mfc_dsisr_RW; 156 u64 mfc_dar_RW; 157 u64 rmt_index_RW; 158 u64 rmt_data1_RW; 159 u64 mfc_dsir_R; 160 u64 mfc_lsacr_RW; 161 u64 mfc_lscrr_R; 162 u64 mfc_tclass_id_RW; 163 u64 mfc_rm_boundary; 164 u64 smf_dma_signal_sel; 165 u64 smm_signal_sel; 166 u64 mfc_cer_R; 167 u64 pu_ecc_cntl_RW; 168 u64 pu_ecc_stat_RW; 169 u64 spu_ecc_addr_RW; 170 u64 spu_err_mask_RW; 171 u64 spu_trig0_sel; 172 u64 spu_trig1_sel; 173 u64 spu_trig2_sel; 174 u64 spu_trig3_sel; 175 u64 spu_trace_sel; 176 u64 spu_event0_sel; 177 u64 spu_event1_sel; 178 u64 spu_event2_sel; 179 u64 spu_event3_sel; 180 u64 spu_trace_cntl; 181 }; 182 183 /* 184 * struct spu_priv2_collapsed - condensed privileged 2 area, w/o pads. 185 */ 186 struct spu_priv2_collapsed { 187 u64 slb_index_W; 188 u64 slb_esid_RW; 189 u64 slb_vsid_RW; 190 u64 slb_invalidate_entry_W; 191 u64 slb_invalidate_all_W; 192 struct mfc_cq_sr spuq[16]; 193 struct mfc_cq_sr puq[8]; 194 u64 mfc_control_RW; 195 u64 puint_mb_R; 196 u64 spu_privcntl_RW; 197 u64 spu_lslr_RW; 198 u64 spu_chnlcntptr_RW; 199 u64 spu_chnlcnt_RW; 200 u64 spu_chnldata_RW; 201 u64 spu_cfg_RW; 202 u64 spu_tag_status_query_RW; 203 u64 spu_cmd_buf1_RW; 204 u64 spu_cmd_buf2_RW; 205 u64 spu_atomic_status_RW; 206 }; 207 208 /** 209 * struct spu_state 210 * @lscsa: Local Store Context Save Area. 211 * @prob: Collapsed Problem State Area, w/o pads. 212 * @priv1: Collapsed Privileged 1 Area, w/o pads. 213 * @priv2: Collapsed Privileged 2 Area, w/o pads. 214 * @spu_chnlcnt_RW: Array of saved channel counts. 215 * @spu_chnldata_RW: Array of saved channel data. 216 * @suspend_time: Time stamp when decrementer disabled. 217 * 218 * Structure representing the whole of the SPU 219 * context save area (CSA). This struct contains 220 * all of the state necessary to suspend and then 221 * later optionally resume execution of an SPU 222 * context. 223 * 224 * The @lscsa region is by far the largest, and is 225 * allocated separately so that it may either be 226 * pinned or mapped to/from application memory, as 227 * appropriate for the OS environment. 228 */ 229 struct spu_state { 230 struct spu_lscsa *lscsa; 231 struct spu_problem_collapsed prob; 232 struct spu_priv1_collapsed priv1; 233 struct spu_priv2_collapsed priv2; 234 u64 spu_chnlcnt_RW[32]; 235 u64 spu_chnldata_RW[32]; 236 u32 spu_mailbox_data[4]; 237 u32 pu_mailbox_data[1]; 238 u64 class_0_dar, class_0_pending; 239 u64 class_1_dar, class_1_dsisr; 240 unsigned long suspend_time; 241 spinlock_t register_lock; 242 }; 243 244 #endif /* !__SPU__ */ 245 #endif /* __KERNEL__ */ 246 #endif /* !__ASSEMBLY__ */ 247 #endif /* _SPU_CSA_H_ */ 248