1 /* 2 * smp.h: PowerPC-specific SMP code. 3 * 4 * Original was a copy of sparc smp.h. Now heavily modified 5 * for PPC. 6 * 7 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) 8 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com> 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * as published by the Free Software Foundation; either version 13 * 2 of the License, or (at your option) any later version. 14 */ 15 16 #ifndef _ASM_POWERPC_SMP_H 17 #define _ASM_POWERPC_SMP_H 18 #ifdef __KERNEL__ 19 20 #include <linux/threads.h> 21 #include <linux/cpumask.h> 22 #include <linux/kernel.h> 23 #include <linux/irqreturn.h> 24 25 #ifndef __ASSEMBLY__ 26 27 #ifdef CONFIG_PPC64 28 #include <asm/paca.h> 29 #endif 30 #include <asm/percpu.h> 31 32 extern int boot_cpuid; 33 extern int spinning_secondaries; 34 35 extern void cpu_die(void); 36 extern int cpu_to_chip_id(int cpu); 37 38 #ifdef CONFIG_SMP 39 40 struct smp_ops_t { 41 void (*message_pass)(int cpu, int msg); 42 #ifdef CONFIG_PPC_SMP_MUXED_IPI 43 void (*cause_ipi)(int cpu, unsigned long data); 44 #endif 45 int (*probe)(void); 46 int (*kick_cpu)(int nr); 47 void (*setup_cpu)(int nr); 48 void (*bringup_done)(void); 49 void (*take_timebase)(void); 50 void (*give_timebase)(void); 51 int (*cpu_disable)(void); 52 void (*cpu_die)(unsigned int nr); 53 int (*cpu_bootable)(unsigned int nr); 54 }; 55 56 extern void smp_send_debugger_break(void); 57 extern void start_secondary_resume(void); 58 extern void smp_generic_give_timebase(void); 59 extern void smp_generic_take_timebase(void); 60 61 DECLARE_PER_CPU(unsigned int, cpu_pvr); 62 63 #ifdef CONFIG_HOTPLUG_CPU 64 extern void migrate_irqs(void); 65 int generic_cpu_disable(void); 66 void generic_cpu_die(unsigned int cpu); 67 void generic_mach_cpu_die(void); 68 void generic_set_cpu_dead(unsigned int cpu); 69 void generic_set_cpu_up(unsigned int cpu); 70 int generic_check_cpu_restart(unsigned int cpu); 71 #endif 72 73 #ifdef CONFIG_PPC64 74 #define raw_smp_processor_id() (local_paca->paca_index) 75 #define hard_smp_processor_id() (get_paca()->hw_cpu_id) 76 #else 77 /* 32-bit */ 78 extern int smp_hw_index[]; 79 80 #define raw_smp_processor_id() (current_thread_info()->cpu) 81 #define hard_smp_processor_id() (smp_hw_index[smp_processor_id()]) 82 83 static inline int get_hard_smp_processor_id(int cpu) 84 { 85 return smp_hw_index[cpu]; 86 } 87 88 static inline void set_hard_smp_processor_id(int cpu, int phys) 89 { 90 smp_hw_index[cpu] = phys; 91 } 92 #endif 93 94 DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map); 95 DECLARE_PER_CPU(cpumask_var_t, cpu_core_map); 96 97 static inline struct cpumask *cpu_sibling_mask(int cpu) 98 { 99 return per_cpu(cpu_sibling_map, cpu); 100 } 101 102 static inline struct cpumask *cpu_core_mask(int cpu) 103 { 104 return per_cpu(cpu_core_map, cpu); 105 } 106 107 extern int cpu_to_core_id(int cpu); 108 109 /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers. 110 * 111 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up 112 * in /proc/interrupts will be wrong!!! --Troy */ 113 #define PPC_MSG_CALL_FUNCTION 0 114 #define PPC_MSG_RESCHEDULE 1 115 #define PPC_MSG_TICK_BROADCAST 2 116 #define PPC_MSG_DEBUGGER_BREAK 3 117 118 /* for irq controllers that have dedicated ipis per message (4) */ 119 extern int smp_request_message_ipi(int virq, int message); 120 extern const char *smp_ipi_name[]; 121 122 /* for irq controllers with only a single ipi */ 123 extern void smp_muxed_ipi_set_data(int cpu, unsigned long data); 124 extern void smp_muxed_ipi_message_pass(int cpu, int msg); 125 extern irqreturn_t smp_ipi_demux(void); 126 127 void smp_init_pSeries(void); 128 void smp_init_cell(void); 129 void smp_init_celleb(void); 130 void smp_setup_cpu_maps(void); 131 132 extern int __cpu_disable(void); 133 extern void __cpu_die(unsigned int cpu); 134 135 #else 136 /* for UP */ 137 #define hard_smp_processor_id() get_hard_smp_processor_id(0) 138 #define smp_setup_cpu_maps() 139 static inline void inhibit_secondary_onlining(void) {} 140 static inline void uninhibit_secondary_onlining(void) {} 141 static inline const struct cpumask *cpu_sibling_mask(int cpu) 142 { 143 return cpumask_of(cpu); 144 } 145 146 #endif /* CONFIG_SMP */ 147 148 #ifdef CONFIG_PPC64 149 static inline int get_hard_smp_processor_id(int cpu) 150 { 151 return paca[cpu].hw_cpu_id; 152 } 153 154 static inline void set_hard_smp_processor_id(int cpu, int phys) 155 { 156 paca[cpu].hw_cpu_id = phys; 157 } 158 159 extern void smp_release_cpus(void); 160 161 #else 162 /* 32-bit */ 163 #ifndef CONFIG_SMP 164 extern int boot_cpuid_phys; 165 static inline int get_hard_smp_processor_id(int cpu) 166 { 167 return boot_cpuid_phys; 168 } 169 170 static inline void set_hard_smp_processor_id(int cpu, int phys) 171 { 172 boot_cpuid_phys = phys; 173 } 174 #endif /* !CONFIG_SMP */ 175 #endif /* !CONFIG_PPC64 */ 176 177 extern int smt_enabled_at_boot; 178 179 extern int smp_mpic_probe(void); 180 extern void smp_mpic_setup_cpu(int cpu); 181 extern int smp_generic_kick_cpu(int nr); 182 extern int smp_generic_cpu_bootable(unsigned int nr); 183 184 185 extern void smp_generic_give_timebase(void); 186 extern void smp_generic_take_timebase(void); 187 188 extern struct smp_ops_t *smp_ops; 189 190 extern void arch_send_call_function_single_ipi(int cpu); 191 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); 192 193 /* Definitions relative to the secondary CPU spin loop 194 * and entry point. Not all of them exist on both 32 and 195 * 64-bit but defining them all here doesn't harm 196 */ 197 extern void generic_secondary_smp_init(void); 198 extern void generic_secondary_thread_init(void); 199 extern unsigned long __secondary_hold_spinloop; 200 extern unsigned long __secondary_hold_acknowledge; 201 extern char __secondary_hold; 202 203 extern void __early_start(void); 204 #endif /* __ASSEMBLY__ */ 205 206 #endif /* __KERNEL__ */ 207 #endif /* _ASM_POWERPC_SMP_H) */ 208