1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * smp.h: PowerPC-specific SMP code. 4 * 5 * Original was a copy of sparc smp.h. Now heavily modified 6 * for PPC. 7 * 8 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) 9 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com> 10 */ 11 12 #ifndef _ASM_POWERPC_SMP_H 13 #define _ASM_POWERPC_SMP_H 14 #ifdef __KERNEL__ 15 16 #include <linux/threads.h> 17 #include <linux/cpumask.h> 18 #include <linux/kernel.h> 19 #include <linux/irqreturn.h> 20 21 #ifndef __ASSEMBLY__ 22 23 #ifdef CONFIG_PPC64 24 #include <asm/paca.h> 25 #endif 26 #include <asm/percpu.h> 27 28 extern int boot_cpuid; 29 extern int spinning_secondaries; 30 extern u32 *cpu_to_phys_id; 31 extern bool coregroup_enabled; 32 33 extern int cpu_to_chip_id(int cpu); 34 extern int *chip_id_lookup_table; 35 36 #ifdef CONFIG_SMP 37 38 struct smp_ops_t { 39 void (*message_pass)(int cpu, int msg); 40 #ifdef CONFIG_PPC_SMP_MUXED_IPI 41 void (*cause_ipi)(int cpu); 42 #endif 43 int (*cause_nmi_ipi)(int cpu); 44 void (*probe)(void); 45 int (*kick_cpu)(int nr); 46 int (*prepare_cpu)(int nr); 47 void (*setup_cpu)(int nr); 48 void (*bringup_done)(void); 49 void (*take_timebase)(void); 50 void (*give_timebase)(void); 51 int (*cpu_disable)(void); 52 void (*cpu_die)(unsigned int nr); 53 int (*cpu_bootable)(unsigned int nr); 54 #ifdef CONFIG_HOTPLUG_CPU 55 void (*cpu_offline_self)(void); 56 #endif 57 }; 58 59 extern int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us); 60 extern int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us); 61 extern void smp_send_debugger_break(void); 62 extern void start_secondary_resume(void); 63 extern void smp_generic_give_timebase(void); 64 extern void smp_generic_take_timebase(void); 65 66 DECLARE_PER_CPU(unsigned int, cpu_pvr); 67 68 #ifdef CONFIG_HOTPLUG_CPU 69 int generic_cpu_disable(void); 70 void generic_cpu_die(unsigned int cpu); 71 void generic_set_cpu_dead(unsigned int cpu); 72 void generic_set_cpu_up(unsigned int cpu); 73 int generic_check_cpu_restart(unsigned int cpu); 74 int is_cpu_dead(unsigned int cpu); 75 #else 76 #define generic_set_cpu_up(i) do { } while (0) 77 #endif 78 79 #ifdef CONFIG_PPC64 80 #define raw_smp_processor_id() (local_paca->paca_index) 81 #define hard_smp_processor_id() (get_paca()->hw_cpu_id) 82 #else 83 /* 32-bit */ 84 extern int smp_hw_index[]; 85 86 /* 87 * This is particularly ugly: it appears we can't actually get the definition 88 * of task_struct here, but we need access to the CPU this task is running on. 89 * Instead of using task_struct we're using _TASK_CPU which is extracted from 90 * asm-offsets.h by kbuild to get the current processor ID. 91 * 92 * This also needs to be safeguarded when building asm-offsets.s because at 93 * that time _TASK_CPU is not defined yet. It could have been guarded by 94 * _TASK_CPU itself, but we want the build to fail if _TASK_CPU is missing 95 * when building something else than asm-offsets.s 96 */ 97 #ifdef GENERATING_ASM_OFFSETS 98 #define raw_smp_processor_id() (0) 99 #else 100 #define raw_smp_processor_id() (*(unsigned int *)((void *)current + _TASK_CPU)) 101 #endif 102 #define hard_smp_processor_id() (smp_hw_index[smp_processor_id()]) 103 104 static inline int get_hard_smp_processor_id(int cpu) 105 { 106 return smp_hw_index[cpu]; 107 } 108 109 static inline void set_hard_smp_processor_id(int cpu, int phys) 110 { 111 smp_hw_index[cpu] = phys; 112 } 113 #endif 114 115 DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map); 116 DECLARE_PER_CPU(cpumask_var_t, cpu_l2_cache_map); 117 DECLARE_PER_CPU(cpumask_var_t, cpu_core_map); 118 DECLARE_PER_CPU(cpumask_var_t, cpu_smallcore_map); 119 120 static inline struct cpumask *cpu_sibling_mask(int cpu) 121 { 122 return per_cpu(cpu_sibling_map, cpu); 123 } 124 125 static inline struct cpumask *cpu_core_mask(int cpu) 126 { 127 return per_cpu(cpu_core_map, cpu); 128 } 129 130 static inline struct cpumask *cpu_l2_cache_mask(int cpu) 131 { 132 return per_cpu(cpu_l2_cache_map, cpu); 133 } 134 135 static inline struct cpumask *cpu_smallcore_mask(int cpu) 136 { 137 return per_cpu(cpu_smallcore_map, cpu); 138 } 139 140 extern int cpu_to_core_id(int cpu); 141 142 extern bool has_big_cores; 143 extern bool thread_group_shares_l2; 144 145 #define cpu_smt_mask cpu_smt_mask 146 #ifdef CONFIG_SCHED_SMT 147 static inline const struct cpumask *cpu_smt_mask(int cpu) 148 { 149 if (has_big_cores) 150 return per_cpu(cpu_smallcore_map, cpu); 151 152 return per_cpu(cpu_sibling_map, cpu); 153 } 154 #endif /* CONFIG_SCHED_SMT */ 155 156 /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers. 157 * 158 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up 159 * in /proc/interrupts will be wrong!!! --Troy */ 160 #define PPC_MSG_CALL_FUNCTION 0 161 #define PPC_MSG_RESCHEDULE 1 162 #define PPC_MSG_TICK_BROADCAST 2 163 #define PPC_MSG_NMI_IPI 3 164 165 /* This is only used by the powernv kernel */ 166 #define PPC_MSG_RM_HOST_ACTION 4 167 168 #define NMI_IPI_ALL_OTHERS -2 169 170 #ifdef CONFIG_NMI_IPI 171 extern int smp_handle_nmi_ipi(struct pt_regs *regs); 172 #else 173 static inline int smp_handle_nmi_ipi(struct pt_regs *regs) { return 0; } 174 #endif 175 176 /* for irq controllers that have dedicated ipis per message (4) */ 177 extern int smp_request_message_ipi(int virq, int message); 178 extern const char *smp_ipi_name[]; 179 180 /* for irq controllers with only a single ipi */ 181 extern void smp_muxed_ipi_message_pass(int cpu, int msg); 182 extern void smp_muxed_ipi_set_message(int cpu, int msg); 183 extern irqreturn_t smp_ipi_demux(void); 184 extern irqreturn_t smp_ipi_demux_relaxed(void); 185 186 void smp_init_pSeries(void); 187 void smp_init_cell(void); 188 void smp_setup_cpu_maps(void); 189 190 extern int __cpu_disable(void); 191 extern void __cpu_die(unsigned int cpu); 192 193 #else 194 /* for UP */ 195 #define hard_smp_processor_id() get_hard_smp_processor_id(0) 196 #define smp_setup_cpu_maps() 197 #define thread_group_shares_l2 0 198 static inline void inhibit_secondary_onlining(void) {} 199 static inline void uninhibit_secondary_onlining(void) {} 200 static inline const struct cpumask *cpu_sibling_mask(int cpu) 201 { 202 return cpumask_of(cpu); 203 } 204 205 static inline const struct cpumask *cpu_smallcore_mask(int cpu) 206 { 207 return cpumask_of(cpu); 208 } 209 210 static inline const struct cpumask *cpu_l2_cache_mask(int cpu) 211 { 212 return cpumask_of(cpu); 213 } 214 #endif /* CONFIG_SMP */ 215 216 #ifdef CONFIG_PPC64 217 static inline int get_hard_smp_processor_id(int cpu) 218 { 219 return paca_ptrs[cpu]->hw_cpu_id; 220 } 221 222 static inline void set_hard_smp_processor_id(int cpu, int phys) 223 { 224 paca_ptrs[cpu]->hw_cpu_id = phys; 225 } 226 #else 227 /* 32-bit */ 228 #ifndef CONFIG_SMP 229 extern int boot_cpuid_phys; 230 static inline int get_hard_smp_processor_id(int cpu) 231 { 232 return boot_cpuid_phys; 233 } 234 235 static inline void set_hard_smp_processor_id(int cpu, int phys) 236 { 237 boot_cpuid_phys = phys; 238 } 239 #endif /* !CONFIG_SMP */ 240 #endif /* !CONFIG_PPC64 */ 241 242 #if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE)) 243 extern void smp_release_cpus(void); 244 #else 245 static inline void smp_release_cpus(void) { } 246 #endif 247 248 extern int smt_enabled_at_boot; 249 250 extern void smp_mpic_probe(void); 251 extern void smp_mpic_setup_cpu(int cpu); 252 extern int smp_generic_kick_cpu(int nr); 253 extern int smp_generic_cpu_bootable(unsigned int nr); 254 255 256 extern void smp_generic_give_timebase(void); 257 extern void smp_generic_take_timebase(void); 258 259 extern struct smp_ops_t *smp_ops; 260 261 extern void arch_send_call_function_single_ipi(int cpu); 262 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); 263 264 /* Definitions relative to the secondary CPU spin loop 265 * and entry point. Not all of them exist on both 32 and 266 * 64-bit but defining them all here doesn't harm 267 */ 268 extern void generic_secondary_smp_init(void); 269 extern unsigned long __secondary_hold_spinloop; 270 extern unsigned long __secondary_hold_acknowledge; 271 extern char __secondary_hold; 272 extern unsigned int booting_thread_hwid; 273 274 extern void __early_start(void); 275 #endif /* __ASSEMBLY__ */ 276 277 #endif /* __KERNEL__ */ 278 #endif /* _ASM_POWERPC_SMP_H) */ 279