1 /* 2 * smp.h: PowerPC-specific SMP code. 3 * 4 * Original was a copy of sparc smp.h. Now heavily modified 5 * for PPC. 6 * 7 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) 8 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com> 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * as published by the Free Software Foundation; either version 13 * 2 of the License, or (at your option) any later version. 14 */ 15 16 #ifndef _ASM_POWERPC_SMP_H 17 #define _ASM_POWERPC_SMP_H 18 #ifdef __KERNEL__ 19 20 #include <linux/threads.h> 21 #include <linux/cpumask.h> 22 #include <linux/kernel.h> 23 #include <linux/irqreturn.h> 24 25 #ifndef __ASSEMBLY__ 26 27 #ifdef CONFIG_PPC64 28 #include <asm/paca.h> 29 #endif 30 #include <asm/percpu.h> 31 32 extern int boot_cpuid; 33 extern int spinning_secondaries; 34 35 extern void cpu_die(void); 36 extern int cpu_to_chip_id(int cpu); 37 38 #ifdef CONFIG_SMP 39 40 struct smp_ops_t { 41 void (*message_pass)(int cpu, int msg); 42 #ifdef CONFIG_PPC_SMP_MUXED_IPI 43 void (*cause_ipi)(int cpu); 44 #endif 45 int (*cause_nmi_ipi)(int cpu); 46 void (*probe)(void); 47 int (*kick_cpu)(int nr); 48 int (*prepare_cpu)(int nr); 49 void (*setup_cpu)(int nr); 50 void (*bringup_done)(void); 51 void (*take_timebase)(void); 52 void (*give_timebase)(void); 53 int (*cpu_disable)(void); 54 void (*cpu_die)(unsigned int nr); 55 int (*cpu_bootable)(unsigned int nr); 56 }; 57 58 extern void smp_flush_nmi_ipi(u64 delay_us); 59 extern int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us); 60 extern void smp_send_debugger_break(void); 61 extern void start_secondary_resume(void); 62 extern void smp_generic_give_timebase(void); 63 extern void smp_generic_take_timebase(void); 64 65 DECLARE_PER_CPU(unsigned int, cpu_pvr); 66 67 #ifdef CONFIG_HOTPLUG_CPU 68 int generic_cpu_disable(void); 69 void generic_cpu_die(unsigned int cpu); 70 void generic_set_cpu_dead(unsigned int cpu); 71 void generic_set_cpu_up(unsigned int cpu); 72 int generic_check_cpu_restart(unsigned int cpu); 73 int is_cpu_dead(unsigned int cpu); 74 #else 75 #define generic_set_cpu_up(i) do { } while (0) 76 #endif 77 78 #ifdef CONFIG_PPC64 79 #define raw_smp_processor_id() (local_paca->paca_index) 80 #define hard_smp_processor_id() (get_paca()->hw_cpu_id) 81 #else 82 /* 32-bit */ 83 extern int smp_hw_index[]; 84 85 #define raw_smp_processor_id() (current_thread_info()->cpu) 86 #define hard_smp_processor_id() (smp_hw_index[smp_processor_id()]) 87 88 static inline int get_hard_smp_processor_id(int cpu) 89 { 90 return smp_hw_index[cpu]; 91 } 92 93 static inline void set_hard_smp_processor_id(int cpu, int phys) 94 { 95 smp_hw_index[cpu] = phys; 96 } 97 #endif 98 99 DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map); 100 DECLARE_PER_CPU(cpumask_var_t, cpu_core_map); 101 102 static inline struct cpumask *cpu_sibling_mask(int cpu) 103 { 104 return per_cpu(cpu_sibling_map, cpu); 105 } 106 107 static inline struct cpumask *cpu_core_mask(int cpu) 108 { 109 return per_cpu(cpu_core_map, cpu); 110 } 111 112 extern int cpu_to_core_id(int cpu); 113 114 /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers. 115 * 116 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up 117 * in /proc/interrupts will be wrong!!! --Troy */ 118 #define PPC_MSG_CALL_FUNCTION 0 119 #define PPC_MSG_RESCHEDULE 1 120 #define PPC_MSG_TICK_BROADCAST 2 121 #define PPC_MSG_NMI_IPI 3 122 123 /* This is only used by the powernv kernel */ 124 #define PPC_MSG_RM_HOST_ACTION 4 125 126 #define NMI_IPI_ALL_OTHERS -2 127 128 #ifdef CONFIG_NMI_IPI 129 extern int smp_handle_nmi_ipi(struct pt_regs *regs); 130 #else 131 static inline int smp_handle_nmi_ipi(struct pt_regs *regs) { return 0; } 132 #endif 133 134 /* for irq controllers that have dedicated ipis per message (4) */ 135 extern int smp_request_message_ipi(int virq, int message); 136 extern const char *smp_ipi_name[]; 137 138 /* for irq controllers with only a single ipi */ 139 extern void smp_muxed_ipi_message_pass(int cpu, int msg); 140 extern void smp_muxed_ipi_set_message(int cpu, int msg); 141 extern irqreturn_t smp_ipi_demux(void); 142 extern irqreturn_t smp_ipi_demux_relaxed(void); 143 144 void smp_init_pSeries(void); 145 void smp_init_cell(void); 146 void smp_setup_cpu_maps(void); 147 148 extern int __cpu_disable(void); 149 extern void __cpu_die(unsigned int cpu); 150 151 #else 152 /* for UP */ 153 #define hard_smp_processor_id() get_hard_smp_processor_id(0) 154 #define smp_setup_cpu_maps() 155 static inline void inhibit_secondary_onlining(void) {} 156 static inline void uninhibit_secondary_onlining(void) {} 157 static inline const struct cpumask *cpu_sibling_mask(int cpu) 158 { 159 return cpumask_of(cpu); 160 } 161 162 #endif /* CONFIG_SMP */ 163 164 #ifdef CONFIG_PPC64 165 static inline int get_hard_smp_processor_id(int cpu) 166 { 167 return paca[cpu].hw_cpu_id; 168 } 169 170 static inline void set_hard_smp_processor_id(int cpu, int phys) 171 { 172 paca[cpu].hw_cpu_id = phys; 173 } 174 #else 175 /* 32-bit */ 176 #ifndef CONFIG_SMP 177 extern int boot_cpuid_phys; 178 static inline int get_hard_smp_processor_id(int cpu) 179 { 180 return boot_cpuid_phys; 181 } 182 183 static inline void set_hard_smp_processor_id(int cpu, int phys) 184 { 185 boot_cpuid_phys = phys; 186 } 187 #endif /* !CONFIG_SMP */ 188 #endif /* !CONFIG_PPC64 */ 189 190 #if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE)) 191 extern void smp_release_cpus(void); 192 #else 193 static inline void smp_release_cpus(void) { }; 194 #endif 195 196 extern int smt_enabled_at_boot; 197 198 extern void smp_mpic_probe(void); 199 extern void smp_mpic_setup_cpu(int cpu); 200 extern int smp_generic_kick_cpu(int nr); 201 extern int smp_generic_cpu_bootable(unsigned int nr); 202 203 204 extern void smp_generic_give_timebase(void); 205 extern void smp_generic_take_timebase(void); 206 207 extern struct smp_ops_t *smp_ops; 208 209 extern void arch_send_call_function_single_ipi(int cpu); 210 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); 211 212 /* Definitions relative to the secondary CPU spin loop 213 * and entry point. Not all of them exist on both 32 and 214 * 64-bit but defining them all here doesn't harm 215 */ 216 extern void generic_secondary_smp_init(void); 217 extern void generic_secondary_thread_init(void); 218 extern unsigned long __secondary_hold_spinloop; 219 extern unsigned long __secondary_hold_acknowledge; 220 extern char __secondary_hold; 221 extern unsigned int booting_thread_hwid; 222 223 extern void __early_start(void); 224 #endif /* __ASSEMBLY__ */ 225 226 #endif /* __KERNEL__ */ 227 #endif /* _ASM_POWERPC_SMP_H) */ 228