1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Copyright 2017 IBM Corp. 4 */ 5 6 #ifndef _ASM_POWERNV_H 7 #define _ASM_POWERNV_H 8 9 #ifdef CONFIG_PPC_POWERNV 10 #define NPU2_WRITE 1 11 extern void powernv_set_nmmu_ptcr(unsigned long ptcr); 12 extern struct npu_context *pnv_npu2_init_context(struct pci_dev *gpdev, 13 unsigned long flags, 14 void (*cb)(struct npu_context *, void *), 15 void *priv); 16 extern void pnv_npu2_destroy_context(struct npu_context *context, 17 struct pci_dev *gpdev); 18 extern int pnv_npu2_handle_fault(struct npu_context *context, uintptr_t *ea, 19 unsigned long *flags, unsigned long *status, 20 int count); 21 22 void pnv_program_cpu_hotplug_lpcr(unsigned int cpu, u64 lpcr_val); 23 24 void pnv_tm_init(void); 25 #else 26 static inline void powernv_set_nmmu_ptcr(unsigned long ptcr) { } 27 static inline struct npu_context *pnv_npu2_init_context(struct pci_dev *gpdev, 28 unsigned long flags, 29 struct npu_context *(*cb)(struct npu_context *, void *), 30 void *priv) { return ERR_PTR(-ENODEV); } 31 static inline void pnv_npu2_destroy_context(struct npu_context *context, 32 struct pci_dev *gpdev) { } 33 34 static inline int pnv_npu2_handle_fault(struct npu_context *context, 35 uintptr_t *ea, unsigned long *flags, 36 unsigned long *status, int count) { 37 return -ENODEV; 38 } 39 40 static inline void pnv_tm_init(void) { } 41 #endif 42 43 #endif /* _ASM_POWERNV_H */ 44