1 /* 2 * Definition of platform feature hooks for PowerMacs 3 * 4 * This file is subject to the terms and conditions of the GNU General Public 5 * License. See the file "COPYING" in the main directory of this archive 6 * for more details. 7 * 8 * Copyright (C) 1998 Paul Mackerras & 9 * Ben. Herrenschmidt. 10 * 11 * 12 * Note: I removed media-bay details from the feature stuff, I believe it's 13 * not worth it, the media-bay driver can directly use the mac-io 14 * ASIC registers. 15 * 16 * Implementation note: Currently, none of these functions will block. 17 * However, they may internally protect themselves with a spinlock 18 * for way too long. Be prepared for at least some of these to block 19 * in the future. 20 * 21 * Unless specifically defined, the result code is assumed to be an 22 * error when negative, 0 is the default success result. Some functions 23 * may return additional positive result values. 24 * 25 * To keep implementation simple, all feature calls are assumed to have 26 * the prototype parameters (struct device_node* node, int value). 27 * When either is not used, pass 0. 28 */ 29 30 #ifdef __KERNEL__ 31 #ifndef __ASM_POWERPC_PMAC_FEATURE_H 32 #define __ASM_POWERPC_PMAC_FEATURE_H 33 34 #include <asm/macio.h> 35 #include <asm/machdep.h> 36 37 /* 38 * Known Mac motherboard models 39 * 40 * Please, report any error here to benh@kernel.crashing.org, thanks ! 41 * 42 * Note that I don't fully maintain this list for Core99 & MacRISC2 43 * and I'm considering removing all NewWorld entries from it and 44 * entirely rely on the model string. 45 */ 46 47 /* PowerSurge are the first generation of PCI Pmacs. This include 48 * all of the Grand-Central based machines. We currently don't 49 * differentiate most of them. 50 */ 51 #define PMAC_TYPE_PSURGE 0x10 /* PowerSurge */ 52 #define PMAC_TYPE_ANS 0x11 /* Apple Network Server */ 53 54 /* Here is the infamous serie of OHare based machines 55 */ 56 #define PMAC_TYPE_COMET 0x20 /* Believed to be PowerBook 2400 */ 57 #define PMAC_TYPE_HOOPER 0x21 /* Believed to be PowerBook 3400 */ 58 #define PMAC_TYPE_KANGA 0x22 /* PowerBook 3500 (first G3) */ 59 #define PMAC_TYPE_ALCHEMY 0x23 /* Alchemy motherboard base */ 60 #define PMAC_TYPE_GAZELLE 0x24 /* Spartacus, some 5xxx/6xxx */ 61 #define PMAC_TYPE_UNKNOWN_OHARE 0x2f /* Unknown, but OHare based */ 62 63 /* Here are the Heathrow based machines 64 * FIXME: Differenciate wallstreet,mainstreet,wallstreetII 65 */ 66 #define PMAC_TYPE_GOSSAMER 0x30 /* Gossamer motherboard */ 67 #define PMAC_TYPE_SILK 0x31 /* Desktop PowerMac G3 */ 68 #define PMAC_TYPE_WALLSTREET 0x32 /* Wallstreet/Mainstreet PowerBook*/ 69 #define PMAC_TYPE_UNKNOWN_HEATHROW 0x3f /* Unknown but heathrow based */ 70 71 /* Here are newworld machines based on Paddington (heathrow derivative) 72 */ 73 #define PMAC_TYPE_101_PBOOK 0x40 /* 101 PowerBook (aka Lombard) */ 74 #define PMAC_TYPE_ORIG_IMAC 0x41 /* First generation iMac */ 75 #define PMAC_TYPE_YOSEMITE 0x42 /* B&W G3 */ 76 #define PMAC_TYPE_YIKES 0x43 /* Yikes G4 (PCI graphics) */ 77 #define PMAC_TYPE_UNKNOWN_PADDINGTON 0x4f /* Unknown but paddington based */ 78 79 /* Core99 machines based on UniNorth 1.0 and 1.5 80 * 81 * Note: A single entry here may cover several actual models according 82 * to the device-tree. (Sawtooth is most tower G4s, FW_IMAC is most 83 * FireWire based iMacs, etc...). Those machines are too similar to be 84 * distinguished here, when they need to be differencied, use the 85 * device-tree "model" or "compatible" property. 86 */ 87 #define PMAC_TYPE_ORIG_IBOOK 0x40 /* First iBook model (no firewire) */ 88 #define PMAC_TYPE_SAWTOOTH 0x41 /* Desktop G4s */ 89 #define PMAC_TYPE_FW_IMAC 0x42 /* FireWire iMacs (except Pangea based) */ 90 #define PMAC_TYPE_FW_IBOOK 0x43 /* FireWire iBooks (except iBook2) */ 91 #define PMAC_TYPE_CUBE 0x44 /* Cube PowerMac */ 92 #define PMAC_TYPE_QUICKSILVER 0x45 /* QuickSilver G4s */ 93 #define PMAC_TYPE_PISMO 0x46 /* Pismo PowerBook */ 94 #define PMAC_TYPE_TITANIUM 0x47 /* Titanium PowerBook */ 95 #define PMAC_TYPE_TITANIUM2 0x48 /* Titanium II PowerBook (no L3, M6) */ 96 #define PMAC_TYPE_TITANIUM3 0x49 /* Titanium III PowerBook (with L3 & M7) */ 97 #define PMAC_TYPE_TITANIUM4 0x50 /* Titanium IV PowerBook (with L3 & M9) */ 98 #define PMAC_TYPE_EMAC 0x50 /* eMac */ 99 #define PMAC_TYPE_UNKNOWN_CORE99 0x5f 100 101 /* MacRisc2 with UniNorth 2.0 */ 102 #define PMAC_TYPE_RACKMAC 0x80 /* XServe */ 103 #define PMAC_TYPE_WINDTUNNEL 0x81 104 105 /* MacRISC2 machines based on the Pangea chipset 106 */ 107 #define PMAC_TYPE_PANGEA_IMAC 0x100 /* Flower Power iMac */ 108 #define PMAC_TYPE_IBOOK2 0x101 /* iBook2 (polycarbonate) */ 109 #define PMAC_TYPE_FLAT_PANEL_IMAC 0x102 /* Flat panel iMac */ 110 #define PMAC_TYPE_UNKNOWN_PANGEA 0x10f 111 112 /* MacRISC2 machines based on the Intrepid chipset 113 */ 114 #define PMAC_TYPE_UNKNOWN_INTREPID 0x11f /* Generic */ 115 116 /* MacRISC4 / G5 machines. We don't have per-machine selection here anymore, 117 * but rather machine families 118 */ 119 #define PMAC_TYPE_POWERMAC_G5 0x150 /* U3 & U3H based */ 120 #define PMAC_TYPE_POWERMAC_G5_U3L 0x151 /* U3L based desktop */ 121 #define PMAC_TYPE_IMAC_G5 0x152 /* iMac G5 */ 122 #define PMAC_TYPE_XSERVE_G5 0x153 /* Xserve G5 */ 123 #define PMAC_TYPE_UNKNOWN_K2 0x19f /* Any other K2 based */ 124 #define PMAC_TYPE_UNKNOWN_SHASTA 0x19e /* Any other Shasta based */ 125 126 /* 127 * Motherboard flags 128 */ 129 130 #define PMAC_MB_CAN_SLEEP 0x00000001 131 #define PMAC_MB_HAS_FW_POWER 0x00000002 132 #define PMAC_MB_OLD_CORE99 0x00000004 133 #define PMAC_MB_MOBILE 0x00000008 134 #define PMAC_MB_MAY_SLEEP 0x00000010 135 136 /* 137 * Feature calls supported on pmac 138 * 139 */ 140 141 /* 142 * Use this inline wrapper 143 */ 144 struct device_node; 145 146 static inline long pmac_call_feature(int selector, struct device_node* node, 147 long param, long value) 148 { 149 if (!ppc_md.feature_call || !machine_is(powermac)) 150 return -ENODEV; 151 return ppc_md.feature_call(selector, node, param, value); 152 } 153 154 /* PMAC_FTR_SERIAL_ENABLE (struct device_node* node, int param, int value) 155 * enable/disable an SCC side. Pass the node corresponding to the 156 * channel side as a parameter. 157 * param is the type of port 158 * if param is ored with PMAC_SCC_FLAG_XMON, then the SCC is locked enabled 159 * for use by xmon. 160 */ 161 #define PMAC_FTR_SCC_ENABLE PMAC_FTR_DEF(0) 162 #define PMAC_SCC_ASYNC 0 163 #define PMAC_SCC_IRDA 1 164 #define PMAC_SCC_I2S1 2 165 #define PMAC_SCC_FLAG_XMON 0x00001000 166 167 /* PMAC_FTR_MODEM_ENABLE (struct device_node* node, 0, int value) 168 * enable/disable the internal modem. 169 */ 170 #define PMAC_FTR_MODEM_ENABLE PMAC_FTR_DEF(1) 171 172 /* PMAC_FTR_SWIM3_ENABLE (struct device_node* node, 0,int value) 173 * enable/disable the swim3 (floppy) cell of a mac-io ASIC 174 */ 175 #define PMAC_FTR_SWIM3_ENABLE PMAC_FTR_DEF(2) 176 177 /* PMAC_FTR_MESH_ENABLE (struct device_node* node, 0, int value) 178 * enable/disable the mesh (scsi) cell of a mac-io ASIC 179 */ 180 #define PMAC_FTR_MESH_ENABLE PMAC_FTR_DEF(3) 181 182 /* PMAC_FTR_IDE_ENABLE (struct device_node* node, int busID, int value) 183 * enable/disable an IDE port of a mac-io ASIC 184 * pass the busID parameter 185 */ 186 #define PMAC_FTR_IDE_ENABLE PMAC_FTR_DEF(4) 187 188 /* PMAC_FTR_IDE_RESET (struct device_node* node, int busID, int value) 189 * assert(1)/release(0) an IDE reset line (mac-io IDE only) 190 */ 191 #define PMAC_FTR_IDE_RESET PMAC_FTR_DEF(5) 192 193 /* PMAC_FTR_BMAC_ENABLE (struct device_node* node, 0, int value) 194 * enable/disable the bmac (ethernet) cell of a mac-io ASIC, also drive 195 * it's reset line 196 */ 197 #define PMAC_FTR_BMAC_ENABLE PMAC_FTR_DEF(6) 198 199 /* PMAC_FTR_GMAC_ENABLE (struct device_node* node, 0, int value) 200 * enable/disable the gmac (ethernet) cell of an uninorth ASIC. This 201 * control the cell's clock. 202 */ 203 #define PMAC_FTR_GMAC_ENABLE PMAC_FTR_DEF(7) 204 205 /* PMAC_FTR_GMAC_PHY_RESET (struct device_node* node, 0, 0) 206 * Perform a HW reset of the PHY connected to a gmac controller. 207 * Pass the gmac device node, not the PHY node. 208 */ 209 #define PMAC_FTR_GMAC_PHY_RESET PMAC_FTR_DEF(8) 210 211 /* PMAC_FTR_SOUND_CHIP_ENABLE (struct device_node* node, 0, int value) 212 * enable/disable the sound chip, whatever it is and provided it can 213 * actually be controlled 214 */ 215 #define PMAC_FTR_SOUND_CHIP_ENABLE PMAC_FTR_DEF(9) 216 217 /* -- add various tweaks related to sound routing -- */ 218 219 /* PMAC_FTR_AIRPORT_ENABLE (struct device_node* node, 0, int value) 220 * enable/disable the airport card 221 */ 222 #define PMAC_FTR_AIRPORT_ENABLE PMAC_FTR_DEF(10) 223 224 /* PMAC_FTR_RESET_CPU (NULL, int cpu_nr, 0) 225 * toggle the reset line of a CPU on an uninorth-based SMP machine 226 */ 227 #define PMAC_FTR_RESET_CPU PMAC_FTR_DEF(11) 228 229 /* PMAC_FTR_USB_ENABLE (struct device_node* node, 0, int value) 230 * enable/disable an USB cell, along with the power of the USB "pad" 231 * on keylargo based machines 232 */ 233 #define PMAC_FTR_USB_ENABLE PMAC_FTR_DEF(12) 234 235 /* PMAC_FTR_1394_ENABLE (struct device_node* node, 0, int value) 236 * enable/disable the firewire cell of an uninorth ASIC. 237 */ 238 #define PMAC_FTR_1394_ENABLE PMAC_FTR_DEF(13) 239 240 /* PMAC_FTR_1394_CABLE_POWER (struct device_node* node, 0, int value) 241 * enable/disable the firewire cable power supply of the uninorth 242 * firewire cell 243 */ 244 #define PMAC_FTR_1394_CABLE_POWER PMAC_FTR_DEF(14) 245 246 /* PMAC_FTR_SLEEP_STATE (struct device_node* node, 0, int value) 247 * set the sleep state of the motherboard. 248 * 249 * Pass -1 as value to query for sleep capability 250 * Pass 1 to set IOs to sleep 251 * Pass 0 to set IOs to wake 252 */ 253 #define PMAC_FTR_SLEEP_STATE PMAC_FTR_DEF(15) 254 255 /* PMAC_FTR_GET_MB_INFO (NULL, selector, 0) 256 * 257 * returns some motherboard infos. 258 * selector: 0 - model id 259 * 1 - model flags (capabilities) 260 * 2 - model name (cast to const char *) 261 */ 262 #define PMAC_FTR_GET_MB_INFO PMAC_FTR_DEF(16) 263 #define PMAC_MB_INFO_MODEL 0 264 #define PMAC_MB_INFO_FLAGS 1 265 #define PMAC_MB_INFO_NAME 2 266 267 /* PMAC_FTR_READ_GPIO (NULL, int index, 0) 268 * 269 * read a GPIO from a mac-io controller of type KeyLargo or Pangea. 270 * the value returned is a byte (positive), or a negative error code 271 */ 272 #define PMAC_FTR_READ_GPIO PMAC_FTR_DEF(17) 273 274 /* PMAC_FTR_WRITE_GPIO (NULL, int index, int value) 275 * 276 * write a GPIO of a mac-io controller of type KeyLargo or Pangea. 277 */ 278 #define PMAC_FTR_WRITE_GPIO PMAC_FTR_DEF(18) 279 280 /* PMAC_FTR_ENABLE_MPIC 281 * 282 * Enable the MPIC cell 283 */ 284 #define PMAC_FTR_ENABLE_MPIC PMAC_FTR_DEF(19) 285 286 /* PMAC_FTR_AACK_DELAY_ENABLE (NULL, int enable, 0) 287 * 288 * Enable/disable the AACK delay on the northbridge for systems using DFS 289 */ 290 #define PMAC_FTR_AACK_DELAY_ENABLE PMAC_FTR_DEF(20) 291 292 /* PMAC_FTR_DEVICE_CAN_WAKE 293 * 294 * Used by video drivers to inform system that they can actually perform 295 * wakeup from sleep 296 */ 297 #define PMAC_FTR_DEVICE_CAN_WAKE PMAC_FTR_DEF(22) 298 299 300 /* Don't use those directly, they are for the sake of pmac_setup.c */ 301 extern long pmac_do_feature_call(unsigned int selector, ...); 302 extern void pmac_feature_init(void); 303 304 /* Video suspend tweak */ 305 extern void pmac_set_early_video_resume(void (*proc)(void *data), void *data); 306 extern void pmac_call_early_video_resume(void); 307 308 #define PMAC_FTR_DEF(x) ((0x6660000) | (x)) 309 310 /* The AGP driver registers itself here */ 311 extern void pmac_register_agp_pm(struct pci_dev *bridge, 312 int (*suspend)(struct pci_dev *bridge), 313 int (*resume)(struct pci_dev *bridge)); 314 315 /* Those are meant to be used by video drivers to deal with AGP 316 * suspend resume properly 317 */ 318 extern void pmac_suspend_agp_for_card(struct pci_dev *dev); 319 extern void pmac_resume_agp_for_card(struct pci_dev *dev); 320 321 /* 322 * The part below is for use by macio_asic.c only, do not rely 323 * on the data structures or constants below in a normal driver 324 * 325 */ 326 327 #define MAX_MACIO_CHIPS 2 328 329 enum { 330 macio_unknown = 0, 331 macio_grand_central, 332 macio_ohare, 333 macio_ohareII, 334 macio_heathrow, 335 macio_gatwick, 336 macio_paddington, 337 macio_keylargo, 338 macio_pangea, 339 macio_intrepid, 340 macio_keylargo2, 341 macio_shasta, 342 }; 343 344 struct macio_chip 345 { 346 struct device_node *of_node; 347 int type; 348 const char *name; 349 int rev; 350 volatile u32 __iomem *base; 351 unsigned long flags; 352 353 /* For use by macio_asic PCI driver */ 354 struct macio_bus lbus; 355 }; 356 357 extern struct macio_chip macio_chips[MAX_MACIO_CHIPS]; 358 359 #define MACIO_FLAG_SCCA_ON 0x00000001 360 #define MACIO_FLAG_SCCB_ON 0x00000002 361 #define MACIO_FLAG_SCC_LOCKED 0x00000004 362 #define MACIO_FLAG_AIRPORT_ON 0x00000010 363 #define MACIO_FLAG_FW_SUPPORTED 0x00000020 364 365 extern struct macio_chip* macio_find(struct device_node* child, int type); 366 367 #define MACIO_FCR32(macio, r) ((macio)->base + ((r) >> 2)) 368 #define MACIO_FCR8(macio, r) (((volatile u8 __iomem *)((macio)->base)) + (r)) 369 370 #define MACIO_IN32(r) (in_le32(MACIO_FCR32(macio,r))) 371 #define MACIO_OUT32(r,v) (out_le32(MACIO_FCR32(macio,r), (v))) 372 #define MACIO_BIS(r,v) (MACIO_OUT32((r), MACIO_IN32(r) | (v))) 373 #define MACIO_BIC(r,v) (MACIO_OUT32((r), MACIO_IN32(r) & ~(v))) 374 #define MACIO_IN8(r) (in_8(MACIO_FCR8(macio,r))) 375 #define MACIO_OUT8(r,v) (out_8(MACIO_FCR8(macio,r), (v))) 376 377 /* 378 * Those are exported by pmac feature for internal use by arch code 379 * only like the platform function callbacks, do not use directly in drivers 380 */ 381 extern raw_spinlock_t feature_lock; 382 extern struct device_node *uninorth_node; 383 extern u32 __iomem *uninorth_base; 384 385 /* 386 * Uninorth reg. access. Note that Uni-N regs are big endian 387 */ 388 389 #define UN_REG(r) (uninorth_base + ((r) >> 2)) 390 #define UN_IN(r) (in_be32(UN_REG(r))) 391 #define UN_OUT(r,v) (out_be32(UN_REG(r), (v))) 392 #define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v))) 393 #define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v))) 394 395 /* Uninorth variant: 396 * 397 * 0 = not uninorth 398 * 1 = U1.x or U2.x 399 * 3 = U3 400 * 4 = U4 401 */ 402 extern int pmac_get_uninorth_variant(void); 403 404 /* 405 * Power macintoshes have either a CUDA, PMU or SMU controlling 406 * system reset, power, NVRAM, RTC. 407 */ 408 typedef enum sys_ctrler_kind { 409 SYS_CTRLER_UNKNOWN = 0, 410 SYS_CTRLER_CUDA = 1, 411 SYS_CTRLER_PMU = 2, 412 SYS_CTRLER_SMU = 3, 413 } sys_ctrler_t; 414 extern sys_ctrler_t sys_ctrler; 415 416 #endif /* __ASM_POWERPC_PMAC_FEATURE_H */ 417 #endif /* __KERNEL__ */ 418