xref: /openbmc/linux/arch/powerpc/include/asm/perf_event.h (revision 023e41632e065d49bcbe31b3c4b336217f96a271)
1 /*
2  * Performance event support - hardware-specific disambiguation
3  *
4  * For now this is a compile-time decision, but eventually it should be
5  * runtime.  This would allow multiplatform perf event support for e300 (fsl
6  * embedded perf counters) plus server/classic, and would accommodate
7  * devices other than the core which provide their own performance counters.
8  *
9  * Copyright 2010 Freescale Semiconductor, Inc.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version
14  * 2 of the License, or (at your option) any later version.
15  */
16 
17 #ifdef CONFIG_PPC_PERF_CTRS
18 #include <asm/perf_event_server.h>
19 #endif
20 
21 #ifdef CONFIG_FSL_EMB_PERF_EVENT
22 #include <asm/perf_event_fsl_emb.h>
23 #endif
24 
25 #ifdef CONFIG_PERF_EVENTS
26 #include <asm/ptrace.h>
27 #include <asm/reg.h>
28 
29 #define perf_arch_bpf_user_pt_regs(regs) &regs->user_regs
30 
31 /*
32  * Overload regs->result to specify whether we should use the MSR (result
33  * is zero) or the SIAR (result is non zero).
34  */
35 #define perf_arch_fetch_caller_regs(regs, __ip)			\
36 	do {							\
37 		(regs)->result = 0;				\
38 		(regs)->nip = __ip;				\
39 		(regs)->gpr[1] = current_stack_pointer();	\
40 		asm volatile("mfmsr %0" : "=r" ((regs)->msr));	\
41 	} while (0)
42 
43 /* To support perf_regs sier update */
44 extern bool is_sier_available(void);
45 #endif
46