1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 #ifndef __ASM_POWERPC_PCI_H 3 #define __ASM_POWERPC_PCI_H 4 #ifdef __KERNEL__ 5 6 /* 7 */ 8 9 #include <linux/types.h> 10 #include <linux/slab.h> 11 #include <linux/string.h> 12 #include <linux/dma-map-ops.h> 13 #include <linux/scatterlist.h> 14 15 #include <asm/machdep.h> 16 #include <asm/io.h> 17 #include <asm/prom.h> 18 #include <asm/pci-bridge.h> 19 20 /* Return values for pci_controller_ops.probe_mode function */ 21 #define PCI_PROBE_NONE -1 /* Don't look at this bus at all */ 22 #define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */ 23 #define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */ 24 25 #define PCIBIOS_MIN_IO 0x1000 26 #define PCIBIOS_MIN_MEM 0x10000000 27 28 /* Values for the `which' argument to sys_pciconfig_iobase syscall. */ 29 #define IOBASE_BRIDGE_NUMBER 0 30 #define IOBASE_MEMORY 1 31 #define IOBASE_IO 2 32 #define IOBASE_ISA_IO 3 33 #define IOBASE_ISA_MEM 4 34 35 /* 36 * Set this to 1 if you want the kernel to re-assign all PCI 37 * bus numbers (don't do that on ppc64 yet !) 38 */ 39 #define pcibios_assign_all_busses() \ 40 (pci_has_flag(PCI_REASSIGN_ALL_BUS)) 41 42 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 43 { 44 if (ppc_md.pci_get_legacy_ide_irq) 45 return ppc_md.pci_get_legacy_ide_irq(dev, channel); 46 return channel ? 15 : 14; 47 } 48 49 #ifdef CONFIG_PCI 50 void __init set_pci_dma_ops(const struct dma_map_ops *dma_ops); 51 #else /* CONFIG_PCI */ 52 #define set_pci_dma_ops(d) 53 #endif 54 55 #ifdef CONFIG_PPC64 56 57 /* 58 * We want to avoid touching the cacheline size or MWI bit. 59 * pSeries firmware sets the cacheline size (which is not the cpu cacheline 60 * size in all cases) and hardware treats MWI the same as memory write. 61 */ 62 #define PCI_DISABLE_MWI 63 64 #endif /* CONFIG_PPC64 */ 65 66 extern int pci_domain_nr(struct pci_bus *bus); 67 68 /* Decide whether to display the domain number in /proc */ 69 extern int pci_proc_domain(struct pci_bus *bus); 70 71 struct vm_area_struct; 72 73 /* Tell PCI code what kind of PCI resource mappings we support */ 74 #define HAVE_PCI_MMAP 1 75 #define ARCH_GENERIC_PCI_MMAP_RESOURCE 1 76 #define arch_can_pci_mmap_io() 1 77 #define arch_can_pci_mmap_wc() 1 78 79 extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val, 80 size_t count); 81 extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val, 82 size_t count); 83 extern int pci_mmap_legacy_page_range(struct pci_bus *bus, 84 struct vm_area_struct *vma, 85 enum pci_mmap_state mmap_state); 86 87 #define HAVE_PCI_LEGACY 1 88 89 extern void pcibios_claim_one_bus(struct pci_bus *b); 90 91 extern void pcibios_finish_adding_to_bus(struct pci_bus *bus); 92 93 extern void pcibios_resource_survey(void); 94 95 extern struct pci_controller *init_phb_dynamic(struct device_node *dn); 96 extern int remove_phb_dynamic(struct pci_controller *phb); 97 98 extern struct pci_dev *of_create_pci_dev(struct device_node *node, 99 struct pci_bus *bus, int devfn); 100 101 extern unsigned int pci_parse_of_flags(u32 addr0, int bridge); 102 103 extern void of_scan_pci_bridge(struct pci_dev *dev); 104 105 extern void of_scan_bus(struct device_node *node, struct pci_bus *bus); 106 extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus); 107 108 struct file; 109 extern pgprot_t pci_phys_mem_access_prot(struct file *file, 110 unsigned long pfn, 111 unsigned long size, 112 pgprot_t prot); 113 114 extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose); 115 extern void pcibios_setup_bus_self(struct pci_bus *bus); 116 extern void pcibios_setup_phb_io_space(struct pci_controller *hose); 117 extern void pcibios_scan_phb(struct pci_controller *hose); 118 119 #endif /* __KERNEL__ */ 120 121 #endif /* __ASM_POWERPC_PCI_H */ 122