1 #ifndef __ASM_POWERPC_PCI_H 2 #define __ASM_POWERPC_PCI_H 3 #ifdef __KERNEL__ 4 5 /* 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 12 #include <linux/types.h> 13 #include <linux/slab.h> 14 #include <linux/string.h> 15 #include <linux/dma-mapping.h> 16 #include <linux/scatterlist.h> 17 18 #include <asm/machdep.h> 19 #include <asm/io.h> 20 #include <asm/prom.h> 21 #include <asm/pci-bridge.h> 22 23 /* Return values for pci_controller_ops.probe_mode function */ 24 #define PCI_PROBE_NONE -1 /* Don't look at this bus at all */ 25 #define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */ 26 #define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */ 27 28 #define PCIBIOS_MIN_IO 0x1000 29 #define PCIBIOS_MIN_MEM 0x10000000 30 31 /* Values for the `which' argument to sys_pciconfig_iobase syscall. */ 32 #define IOBASE_BRIDGE_NUMBER 0 33 #define IOBASE_MEMORY 1 34 #define IOBASE_IO 2 35 #define IOBASE_ISA_IO 3 36 #define IOBASE_ISA_MEM 4 37 38 /* 39 * Set this to 1 if you want the kernel to re-assign all PCI 40 * bus numbers (don't do that on ppc64 yet !) 41 */ 42 #define pcibios_assign_all_busses() \ 43 (pci_has_flag(PCI_REASSIGN_ALL_BUS)) 44 45 #define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ 46 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 47 { 48 if (ppc_md.pci_get_legacy_ide_irq) 49 return ppc_md.pci_get_legacy_ide_irq(dev, channel); 50 return channel ? 15 : 14; 51 } 52 53 #ifdef CONFIG_PCI 54 extern void set_pci_dma_ops(const struct dma_map_ops *dma_ops); 55 extern const struct dma_map_ops *get_pci_dma_ops(void); 56 #else /* CONFIG_PCI */ 57 #define set_pci_dma_ops(d) 58 #define get_pci_dma_ops() NULL 59 #endif 60 61 #ifdef CONFIG_PPC64 62 63 /* 64 * We want to avoid touching the cacheline size or MWI bit. 65 * pSeries firmware sets the cacheline size (which is not the cpu cacheline 66 * size in all cases) and hardware treats MWI the same as memory write. 67 */ 68 #define PCI_DISABLE_MWI 69 70 #endif /* CONFIG_PPC64 */ 71 72 extern int pci_domain_nr(struct pci_bus *bus); 73 74 /* Decide whether to display the domain number in /proc */ 75 extern int pci_proc_domain(struct pci_bus *bus); 76 77 struct vm_area_struct; 78 79 /* Tell PCI code what kind of PCI resource mappings we support */ 80 #define HAVE_PCI_MMAP 1 81 #define ARCH_GENERIC_PCI_MMAP_RESOURCE 1 82 #define arch_can_pci_mmap_io() 1 83 #define arch_can_pci_mmap_wc() 1 84 85 extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val, 86 size_t count); 87 extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val, 88 size_t count); 89 extern int pci_mmap_legacy_page_range(struct pci_bus *bus, 90 struct vm_area_struct *vma, 91 enum pci_mmap_state mmap_state); 92 93 #define HAVE_PCI_LEGACY 1 94 95 #ifdef CONFIG_PPC64 96 97 /* The PCI address space does not equal the physical memory address 98 * space (we have an IOMMU). The IDE and SCSI device layers use 99 * this boolean for bounce buffer decisions. 100 */ 101 #define PCI_DMA_BUS_IS_PHYS (0) 102 103 #else /* 32-bit */ 104 105 /* The PCI address space does equal the physical memory 106 * address space (no IOMMU). The IDE and SCSI device layers use 107 * this boolean for bounce buffer decisions. 108 */ 109 #define PCI_DMA_BUS_IS_PHYS (1) 110 111 #endif /* CONFIG_PPC64 */ 112 113 extern void pcibios_claim_one_bus(struct pci_bus *b); 114 115 extern void pcibios_finish_adding_to_bus(struct pci_bus *bus); 116 117 extern void pcibios_resource_survey(void); 118 119 extern struct pci_controller *init_phb_dynamic(struct device_node *dn); 120 extern int remove_phb_dynamic(struct pci_controller *phb); 121 122 extern struct pci_dev *of_create_pci_dev(struct device_node *node, 123 struct pci_bus *bus, int devfn); 124 125 extern unsigned int pci_parse_of_flags(u32 addr0, int bridge); 126 127 extern void of_scan_pci_bridge(struct pci_dev *dev); 128 129 extern void of_scan_bus(struct device_node *node, struct pci_bus *bus); 130 extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus); 131 132 struct file; 133 extern pgprot_t pci_phys_mem_access_prot(struct file *file, 134 unsigned long pfn, 135 unsigned long size, 136 pgprot_t prot); 137 138 #define HAVE_ARCH_PCI_RESOURCE_TO_USER 139 140 extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose); 141 extern void pcibios_setup_bus_devices(struct pci_bus *bus); 142 extern void pcibios_setup_bus_self(struct pci_bus *bus); 143 extern void pcibios_setup_phb_io_space(struct pci_controller *hose); 144 extern void pcibios_scan_phb(struct pci_controller *hose); 145 146 #endif /* __KERNEL__ */ 147 148 extern struct pci_dev *pnv_pci_get_gpu_dev(struct pci_dev *npdev); 149 extern struct pci_dev *pnv_pci_get_npu_dev(struct pci_dev *gpdev, int index); 150 151 #endif /* __ASM_POWERPC_PCI_H */ 152