1b8b572e1SStephen Rothwell #ifndef __ASM_POWERPC_PCI_H 2b8b572e1SStephen Rothwell #define __ASM_POWERPC_PCI_H 3b8b572e1SStephen Rothwell #ifdef __KERNEL__ 4b8b572e1SStephen Rothwell 5b8b572e1SStephen Rothwell /* 6b8b572e1SStephen Rothwell * This program is free software; you can redistribute it and/or 7b8b572e1SStephen Rothwell * modify it under the terms of the GNU General Public License 8b8b572e1SStephen Rothwell * as published by the Free Software Foundation; either version 9b8b572e1SStephen Rothwell * 2 of the License, or (at your option) any later version. 10b8b572e1SStephen Rothwell */ 11b8b572e1SStephen Rothwell 12b8b572e1SStephen Rothwell #include <linux/types.h> 13b8b572e1SStephen Rothwell #include <linux/slab.h> 14b8b572e1SStephen Rothwell #include <linux/string.h> 15b8b572e1SStephen Rothwell #include <linux/dma-mapping.h> 1684be456fSChristoph Hellwig #include <linux/scatterlist.h> 17b8b572e1SStephen Rothwell 18b8b572e1SStephen Rothwell #include <asm/machdep.h> 19b8b572e1SStephen Rothwell #include <asm/io.h> 20b8b572e1SStephen Rothwell #include <asm/prom.h> 21b8b572e1SStephen Rothwell #include <asm/pci-bridge.h> 22b8b572e1SStephen Rothwell 23b8b572e1SStephen Rothwell #include <asm-generic/pci-dma-compat.h> 24b8b572e1SStephen Rothwell 25467efc2eSDaniel Axtens /* Return values for pci_controller_ops.probe_mode function */ 26467efc2eSDaniel Axtens #define PCI_PROBE_NONE -1 /* Don't look at this bus at all */ 27467efc2eSDaniel Axtens #define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */ 28467efc2eSDaniel Axtens #define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */ 29467efc2eSDaniel Axtens 30b8b572e1SStephen Rothwell #define PCIBIOS_MIN_IO 0x1000 31b8b572e1SStephen Rothwell #define PCIBIOS_MIN_MEM 0x10000000 32b8b572e1SStephen Rothwell 33b8b572e1SStephen Rothwell struct pci_dev; 34b8b572e1SStephen Rothwell 35b8b572e1SStephen Rothwell /* Values for the `which' argument to sys_pciconfig_iobase syscall. */ 36b8b572e1SStephen Rothwell #define IOBASE_BRIDGE_NUMBER 0 37b8b572e1SStephen Rothwell #define IOBASE_MEMORY 1 38b8b572e1SStephen Rothwell #define IOBASE_IO 2 39b8b572e1SStephen Rothwell #define IOBASE_ISA_IO 3 40b8b572e1SStephen Rothwell #define IOBASE_ISA_MEM 4 41b8b572e1SStephen Rothwell 42b8b572e1SStephen Rothwell /* 43b8b572e1SStephen Rothwell * Set this to 1 if you want the kernel to re-assign all PCI 44b8b572e1SStephen Rothwell * bus numbers (don't do that on ppc64 yet !) 45b8b572e1SStephen Rothwell */ 467fe519c2SJosh Boyer #define pcibios_assign_all_busses() \ 470e47ff1cSRob Herring (pci_has_flag(PCI_REASSIGN_ALL_BUS)) 48b8b572e1SStephen Rothwell 49b8b572e1SStephen Rothwell #define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ 50b8b572e1SStephen Rothwell static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 51b8b572e1SStephen Rothwell { 52b8b572e1SStephen Rothwell if (ppc_md.pci_get_legacy_ide_irq) 53b8b572e1SStephen Rothwell return ppc_md.pci_get_legacy_ide_irq(dev, channel); 54b8b572e1SStephen Rothwell return channel ? 15 : 14; 55b8b572e1SStephen Rothwell } 56b8b572e1SStephen Rothwell 574fc665b8SBecky Bruce #ifdef CONFIG_PCI 5845223c54SFUJITA Tomonori extern void set_pci_dma_ops(struct dma_map_ops *dma_ops); 5945223c54SFUJITA Tomonori extern struct dma_map_ops *get_pci_dma_ops(void); 604fc665b8SBecky Bruce #else /* CONFIG_PCI */ 614fc665b8SBecky Bruce #define set_pci_dma_ops(d) 624fc665b8SBecky Bruce #define get_pci_dma_ops() NULL 634fc665b8SBecky Bruce #endif 644fc665b8SBecky Bruce 65b8b572e1SStephen Rothwell #ifdef CONFIG_PPC64 66b8b572e1SStephen Rothwell 67b8b572e1SStephen Rothwell /* 68b8b572e1SStephen Rothwell * We want to avoid touching the cacheline size or MWI bit. 69b8b572e1SStephen Rothwell * pSeries firmware sets the cacheline size (which is not the cpu cacheline 70b8b572e1SStephen Rothwell * size in all cases) and hardware treats MWI the same as memory write. 71b8b572e1SStephen Rothwell */ 72b8b572e1SStephen Rothwell #define PCI_DISABLE_MWI 73b8b572e1SStephen Rothwell 74b8b572e1SStephen Rothwell #ifdef CONFIG_PCI 75b8b572e1SStephen Rothwell static inline void pci_dma_burst_advice(struct pci_dev *pdev, 76b8b572e1SStephen Rothwell enum pci_dma_burst_strategy *strat, 77b8b572e1SStephen Rothwell unsigned long *strategy_parameter) 78b8b572e1SStephen Rothwell { 79b8b572e1SStephen Rothwell unsigned long cacheline_size; 80b8b572e1SStephen Rothwell u8 byte; 81b8b572e1SStephen Rothwell 82b8b572e1SStephen Rothwell pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte); 83b8b572e1SStephen Rothwell if (byte == 0) 84b8b572e1SStephen Rothwell cacheline_size = 1024; 85b8b572e1SStephen Rothwell else 86b8b572e1SStephen Rothwell cacheline_size = (int) byte * 4; 87b8b572e1SStephen Rothwell 88b8b572e1SStephen Rothwell *strat = PCI_DMA_BURST_MULTIPLE; 89b8b572e1SStephen Rothwell *strategy_parameter = cacheline_size; 90b8b572e1SStephen Rothwell } 91b8b572e1SStephen Rothwell #endif 92b8b572e1SStephen Rothwell 93b8b572e1SStephen Rothwell #else /* 32-bit */ 94b8b572e1SStephen Rothwell 95b8b572e1SStephen Rothwell #ifdef CONFIG_PCI 96b8b572e1SStephen Rothwell static inline void pci_dma_burst_advice(struct pci_dev *pdev, 97b8b572e1SStephen Rothwell enum pci_dma_burst_strategy *strat, 98b8b572e1SStephen Rothwell unsigned long *strategy_parameter) 99b8b572e1SStephen Rothwell { 100b8b572e1SStephen Rothwell *strat = PCI_DMA_BURST_INFINITY; 101b8b572e1SStephen Rothwell *strategy_parameter = ~0UL; 102b8b572e1SStephen Rothwell } 103b8b572e1SStephen Rothwell #endif 104b8b572e1SStephen Rothwell #endif /* CONFIG_PPC64 */ 105b8b572e1SStephen Rothwell 106b8b572e1SStephen Rothwell extern int pci_domain_nr(struct pci_bus *bus); 107b8b572e1SStephen Rothwell 108b8b572e1SStephen Rothwell /* Decide whether to display the domain number in /proc */ 109b8b572e1SStephen Rothwell extern int pci_proc_domain(struct pci_bus *bus); 110b8b572e1SStephen Rothwell 111b8b572e1SStephen Rothwell struct vm_area_struct; 112b8b572e1SStephen Rothwell /* Map a range of PCI memory or I/O space for a device into user space */ 113b8b572e1SStephen Rothwell int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, 114b8b572e1SStephen Rothwell enum pci_mmap_state mmap_state, int write_combine); 115b8b572e1SStephen Rothwell 116b8b572e1SStephen Rothwell /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */ 117b8b572e1SStephen Rothwell #define HAVE_PCI_MMAP 1 118b8b572e1SStephen Rothwell 119e9f82cb7SBenjamin Herrenschmidt extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val, 120e9f82cb7SBenjamin Herrenschmidt size_t count); 121e9f82cb7SBenjamin Herrenschmidt extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val, 122e9f82cb7SBenjamin Herrenschmidt size_t count); 123e9f82cb7SBenjamin Herrenschmidt extern int pci_mmap_legacy_page_range(struct pci_bus *bus, 124e9f82cb7SBenjamin Herrenschmidt struct vm_area_struct *vma, 125e9f82cb7SBenjamin Herrenschmidt enum pci_mmap_state mmap_state); 126e9f82cb7SBenjamin Herrenschmidt 127e9f82cb7SBenjamin Herrenschmidt #define HAVE_PCI_LEGACY 1 128e9f82cb7SBenjamin Herrenschmidt 129b8b572e1SStephen Rothwell #ifdef CONFIG_PPC64 130b8b572e1SStephen Rothwell 131b8b572e1SStephen Rothwell /* The PCI address space does not equal the physical memory address 132b8b572e1SStephen Rothwell * space (we have an IOMMU). The IDE and SCSI device layers use 133b8b572e1SStephen Rothwell * this boolean for bounce buffer decisions. 134b8b572e1SStephen Rothwell */ 135b8b572e1SStephen Rothwell #define PCI_DMA_BUS_IS_PHYS (0) 136b8b572e1SStephen Rothwell 137b8b572e1SStephen Rothwell #else /* 32-bit */ 138b8b572e1SStephen Rothwell 139b8b572e1SStephen Rothwell /* The PCI address space does equal the physical memory 140b8b572e1SStephen Rothwell * address space (no IOMMU). The IDE and SCSI device layers use 141b8b572e1SStephen Rothwell * this boolean for bounce buffer decisions. 142b8b572e1SStephen Rothwell */ 143b8b572e1SStephen Rothwell #define PCI_DMA_BUS_IS_PHYS (1) 144b8b572e1SStephen Rothwell 145b8b572e1SStephen Rothwell #endif /* CONFIG_PPC64 */ 146b8b572e1SStephen Rothwell 147b8b572e1SStephen Rothwell extern void pcibios_claim_one_bus(struct pci_bus *b); 148b8b572e1SStephen Rothwell 149fd6852c8SBenjamin Herrenschmidt extern void pcibios_finish_adding_to_bus(struct pci_bus *bus); 150e90a1318SNathan Fontenot 151b8b572e1SStephen Rothwell extern void pcibios_resource_survey(void); 152b8b572e1SStephen Rothwell 153b8b572e1SStephen Rothwell extern struct pci_controller *init_phb_dynamic(struct device_node *dn); 154fd6852c8SBenjamin Herrenschmidt extern int remove_phb_dynamic(struct pci_controller *phb); 155b8b572e1SStephen Rothwell 156b8b572e1SStephen Rothwell extern struct pci_dev *of_create_pci_dev(struct device_node *node, 157b8b572e1SStephen Rothwell struct pci_bus *bus, int devfn); 158b8b572e1SStephen Rothwell 15998d9f30cSBenjamin Herrenschmidt extern void of_scan_pci_bridge(struct pci_dev *dev); 160b8b572e1SStephen Rothwell 161b8b572e1SStephen Rothwell extern void of_scan_bus(struct device_node *node, struct pci_bus *bus); 1628b8da358SBenjamin Herrenschmidt extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus); 163b8b572e1SStephen Rothwell 164b8b572e1SStephen Rothwell struct file; 165b8b572e1SStephen Rothwell extern pgprot_t pci_phys_mem_access_prot(struct file *file, 166b8b572e1SStephen Rothwell unsigned long pfn, 167b8b572e1SStephen Rothwell unsigned long size, 168b8b572e1SStephen Rothwell pgprot_t prot); 169b8b572e1SStephen Rothwell 170b8b572e1SStephen Rothwell #define HAVE_ARCH_PCI_RESOURCE_TO_USER 171b8b572e1SStephen Rothwell extern void pci_resource_to_user(const struct pci_dev *dev, int bar, 172b8b572e1SStephen Rothwell const struct resource *rsrc, 173b8b572e1SStephen Rothwell resource_size_t *start, resource_size_t *end); 174b8b572e1SStephen Rothwell 17538973ba7SBjorn Helgaas extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose); 1768b8da358SBenjamin Herrenschmidt extern void pcibios_setup_bus_devices(struct pci_bus *bus); 1778b8da358SBenjamin Herrenschmidt extern void pcibios_setup_bus_self(struct pci_bus *bus); 1780ed2c722SGrant Likely extern void pcibios_setup_phb_io_space(struct pci_controller *hose); 179b5d937deSGrant Likely extern void pcibios_scan_phb(struct pci_controller *hose); 180e9f82cb7SBenjamin Herrenschmidt 181b8b572e1SStephen Rothwell #endif /* __KERNEL__ */ 182b8b572e1SStephen Rothwell #endif /* __ASM_POWERPC_PCI_H */ 183